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-rw-r--r--arch/x86/include/asm/apic.h91
1 files changed, 56 insertions, 35 deletions
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 1fa03e04ae44..4a0b7c7e2cce 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -2,7 +2,6 @@
2#define _ASM_X86_APIC_H 2#define _ASM_X86_APIC_H
3 3
4#include <linux/cpumask.h> 4#include <linux/cpumask.h>
5#include <linux/delay.h>
6#include <linux/pm.h> 5#include <linux/pm.h>
7 6
8#include <asm/alternative.h> 7#include <asm/alternative.h>
@@ -141,13 +140,13 @@ static inline void native_apic_msr_write(u32 reg, u32 v)
141 140
142static inline u32 native_apic_msr_read(u32 reg) 141static inline u32 native_apic_msr_read(u32 reg)
143{ 142{
144 u32 low, high; 143 u64 msr;
145 144
146 if (reg == APIC_DFR) 145 if (reg == APIC_DFR)
147 return -1; 146 return -1;
148 147
149 rdmsr(APIC_BASE_MSR + (reg >> 4), low, high); 148 rdmsrl(APIC_BASE_MSR + (reg >> 4), msr);
150 return low; 149 return (u32)msr;
151} 150}
152 151
153static inline void native_x2apic_wait_icr_idle(void) 152static inline void native_x2apic_wait_icr_idle(void)
@@ -181,12 +180,12 @@ extern void enable_x2apic(void);
181extern void x2apic_icr_write(u32 low, u32 id); 180extern void x2apic_icr_write(u32 low, u32 id);
182static inline int x2apic_enabled(void) 181static inline int x2apic_enabled(void)
183{ 182{
184 int msr, msr2; 183 u64 msr;
185 184
186 if (!cpu_has_x2apic) 185 if (!cpu_has_x2apic)
187 return 0; 186 return 0;
188 187
189 rdmsr(MSR_IA32_APICBASE, msr, msr2); 188 rdmsrl(MSR_IA32_APICBASE, msr);
190 if (msr & X2APIC_ENABLE) 189 if (msr & X2APIC_ENABLE)
191 return 1; 190 return 1;
192 return 0; 191 return 0;
@@ -220,7 +219,6 @@ extern void enable_IR_x2apic(void);
220 219
221extern int get_physical_broadcast(void); 220extern int get_physical_broadcast(void);
222 221
223extern void apic_disable(void);
224extern int lapic_get_maxlvt(void); 222extern int lapic_get_maxlvt(void);
225extern void clear_local_APIC(void); 223extern void clear_local_APIC(void);
226extern void connect_bsp_APIC(void); 224extern void connect_bsp_APIC(void);
@@ -228,22 +226,22 @@ extern void disconnect_bsp_APIC(int virt_wire_setup);
228extern void disable_local_APIC(void); 226extern void disable_local_APIC(void);
229extern void lapic_shutdown(void); 227extern void lapic_shutdown(void);
230extern int verify_local_APIC(void); 228extern int verify_local_APIC(void);
231extern void cache_APIC_registers(void);
232extern void sync_Arb_IDs(void); 229extern void sync_Arb_IDs(void);
233extern void init_bsp_APIC(void); 230extern void init_bsp_APIC(void);
234extern void setup_local_APIC(void); 231extern void setup_local_APIC(void);
235extern void end_local_APIC_setup(void); 232extern void end_local_APIC_setup(void);
233extern void bsp_end_local_APIC_setup(void);
236extern void init_apic_mappings(void); 234extern void init_apic_mappings(void);
235void register_lapic_address(unsigned long address);
237extern void setup_boot_APIC_clock(void); 236extern void setup_boot_APIC_clock(void);
238extern void setup_secondary_APIC_clock(void); 237extern void setup_secondary_APIC_clock(void);
239extern int APIC_init_uniprocessor(void); 238extern int APIC_init_uniprocessor(void);
240extern void enable_NMI_through_LVT0(void); 239extern int apic_force_enable(unsigned long addr);
241 240
242/* 241/*
243 * On 32bit this is mach-xxx local 242 * On 32bit this is mach-xxx local
244 */ 243 */
245#ifdef CONFIG_X86_64 244#ifdef CONFIG_X86_64
246extern void early_init_lapic_mapping(void);
247extern int apic_is_clustered_box(void); 245extern int apic_is_clustered_box(void);
248#else 246#else
249static inline int apic_is_clustered_box(void) 247static inline int apic_is_clustered_box(void)
@@ -252,16 +250,13 @@ static inline int apic_is_clustered_box(void)
252} 250}
253#endif 251#endif
254 252
255extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); 253extern int setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask);
256extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask);
257
258 254
259#else /* !CONFIG_X86_LOCAL_APIC */ 255#else /* !CONFIG_X86_LOCAL_APIC */
260static inline void lapic_shutdown(void) { } 256static inline void lapic_shutdown(void) { }
261#define local_apic_timer_c2_ok 1 257#define local_apic_timer_c2_ok 1
262static inline void init_apic_mappings(void) { } 258static inline void init_apic_mappings(void) { }
263static inline void disable_local_APIC(void) { } 259static inline void disable_local_APIC(void) { }
264static inline void apic_disable(void) { }
265# define setup_boot_APIC_clock x86_init_noop 260# define setup_boot_APIC_clock x86_init_noop
266# define setup_secondary_APIC_clock x86_init_noop 261# define setup_secondary_APIC_clock x86_init_noop
267#endif /* !CONFIG_X86_LOCAL_APIC */ 262#endif /* !CONFIG_X86_LOCAL_APIC */
@@ -307,8 +302,6 @@ struct apic {
307 302
308 void (*setup_apic_routing)(void); 303 void (*setup_apic_routing)(void);
309 int (*multi_timer_check)(int apic, int irq); 304 int (*multi_timer_check)(int apic, int irq);
310 int (*apicid_to_node)(int logical_apicid);
311 int (*cpu_to_logical_apicid)(int cpu);
312 int (*cpu_present_to_apicid)(int mps_cpu); 305 int (*cpu_present_to_apicid)(int mps_cpu);
313 void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap); 306 void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap);
314 void (*setup_portio_remap)(void); 307 void (*setup_portio_remap)(void);
@@ -356,6 +349,28 @@ struct apic {
356 void (*icr_write)(u32 low, u32 high); 349 void (*icr_write)(u32 low, u32 high);
357 void (*wait_icr_idle)(void); 350 void (*wait_icr_idle)(void);
358 u32 (*safe_wait_icr_idle)(void); 351 u32 (*safe_wait_icr_idle)(void);
352
353#ifdef CONFIG_X86_32
354 /*
355 * Called very early during boot from get_smp_config(). It should
356 * return the logical apicid. x86_[bios]_cpu_to_apicid is
357 * initialized before this function is called.
358 *
359 * If logical apicid can't be determined that early, the function
360 * may return BAD_APICID. Logical apicid will be configured after
361 * init_apic_ldr() while bringing up CPUs. Note that NUMA affinity
362 * won't be applied properly during early boot in this case.
363 */
364 int (*x86_32_early_logical_apicid)(int cpu);
365
366 /*
367 * Optional method called from setup_local_APIC() after logical
368 * apicid is guaranteed to be known to initialize apicid -> node
369 * mapping if NUMA initialization hasn't done so already. Don't
370 * add new users.
371 */
372 int (*x86_32_numa_cpu_node)(int cpu);
373#endif
359}; 374};
360 375
361/* 376/*
@@ -366,6 +381,26 @@ struct apic {
366extern struct apic *apic; 381extern struct apic *apic;
367 382
368/* 383/*
384 * APIC drivers are probed based on how they are listed in the .apicdrivers
385 * section. So the order is important and enforced by the ordering
386 * of different apic driver files in the Makefile.
387 *
388 * For the files having two apic drivers, we use apic_drivers()
389 * to enforce the order with in them.
390 */
391#define apic_driver(sym) \
392 static struct apic *__apicdrivers_##sym __used \
393 __aligned(sizeof(struct apic *)) \
394 __section(.apicdrivers) = { &sym }
395
396#define apic_drivers(sym1, sym2) \
397 static struct apic *__apicdrivers_##sym1##sym2[2] __used \
398 __aligned(sizeof(struct apic *)) \
399 __section(.apicdrivers) = { &sym1, &sym2 }
400
401extern struct apic *__apicdrivers[], *__apicdrivers_end[];
402
403/*
369 * APIC functionality to boot other CPUs - only used on SMP: 404 * APIC functionality to boot other CPUs - only used on SMP:
370 */ 405 */
371#ifdef CONFIG_SMP 406#ifdef CONFIG_SMP
@@ -443,15 +478,10 @@ static inline unsigned default_get_apic_id(unsigned long x)
443#define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469 478#define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469
444 479
445#ifdef CONFIG_X86_64 480#ifdef CONFIG_X86_64
446extern struct apic apic_flat;
447extern struct apic apic_physflat;
448extern struct apic apic_x2apic_cluster;
449extern struct apic apic_x2apic_phys;
450extern int default_acpi_madt_oem_check(char *, char *); 481extern int default_acpi_madt_oem_check(char *, char *);
451 482
452extern void apic_send_IPI_self(int vector); 483extern void apic_send_IPI_self(int vector);
453 484
454extern struct apic apic_x2apic_uv_x;
455DECLARE_PER_CPU(int, x2apic_extra_bits); 485DECLARE_PER_CPU(int, x2apic_extra_bits);
456 486
457extern int default_cpu_present_to_apicid(int mps_cpu); 487extern int default_cpu_present_to_apicid(int mps_cpu);
@@ -465,7 +495,7 @@ static inline void default_wait_for_init_deassert(atomic_t *deassert)
465 return; 495 return;
466} 496}
467 497
468extern void generic_bigsmp_probe(void); 498extern struct apic *generic_bigsmp_probe(void);
469 499
470 500
471#ifdef CONFIG_X86_LOCAL_APIC 501#ifdef CONFIG_X86_LOCAL_APIC
@@ -501,7 +531,10 @@ extern struct apic apic_noop;
501 531
502#ifdef CONFIG_X86_32 532#ifdef CONFIG_X86_32
503 533
504extern struct apic apic_default; 534static inline int noop_x86_32_early_logical_apicid(int cpu)
535{
536 return BAD_APICID;
537}
505 538
506/* 539/*
507 * Set up the logical destination ID. 540 * Set up the logical destination ID.
@@ -522,8 +555,6 @@ static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
522 return cpuid_apic >> index_msb; 555 return cpuid_apic >> index_msb;
523} 556}
524 557
525extern int default_apicid_to_node(int logical_apicid);
526
527#endif 558#endif
528 559
529static inline unsigned int 560static inline unsigned int
@@ -558,12 +589,6 @@ static inline void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_ma
558 *retmap = *phys_map; 589 *retmap = *phys_map;
559} 590}
560 591
561/* Mapping from cpu number to logical apicid */
562static inline int default_cpu_to_logical_apicid(int cpu)
563{
564 return 1 << cpu;
565}
566
567static inline int __default_cpu_present_to_apicid(int mps_cpu) 592static inline int __default_cpu_present_to_apicid(int mps_cpu)
568{ 593{
569 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu)) 594 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
@@ -596,8 +621,4 @@ extern int default_check_phys_apicid_present(int phys_apicid);
596 621
597#endif /* CONFIG_X86_LOCAL_APIC */ 622#endif /* CONFIG_X86_LOCAL_APIC */
598 623
599#ifdef CONFIG_X86_32
600extern u8 cpu_2_logical_apicid[NR_CPUS];
601#endif
602
603#endif /* _ASM_X86_APIC_H */ 624#endif /* _ASM_X86_APIC_H */