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-rw-r--r--arch/x86/include/asm/acpi.h178
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1#ifndef ASM_X86__ACPI_H
2#define ASM_X86__ACPI_H
3
4/*
5 * Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
7 *
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 */
26#include <acpi/pdc_intel.h>
27
28#include <asm/numa.h>
29#include <asm/processor.h>
30#include <asm/mmu.h>
31#include <asm/mpspec.h>
32
33#define COMPILER_DEPENDENT_INT64 long long
34#define COMPILER_DEPENDENT_UINT64 unsigned long long
35
36/*
37 * Calling conventions:
38 *
39 * ACPI_SYSTEM_XFACE - Interfaces to host OS (handlers, threads)
40 * ACPI_EXTERNAL_XFACE - External ACPI interfaces
41 * ACPI_INTERNAL_XFACE - Internal ACPI interfaces
42 * ACPI_INTERNAL_VAR_XFACE - Internal variable-parameter list interfaces
43 */
44#define ACPI_SYSTEM_XFACE
45#define ACPI_EXTERNAL_XFACE
46#define ACPI_INTERNAL_XFACE
47#define ACPI_INTERNAL_VAR_XFACE
48
49/* Asm macros */
50
51#define ACPI_ASM_MACROS
52#define BREAKPOINT3
53#define ACPI_DISABLE_IRQS() local_irq_disable()
54#define ACPI_ENABLE_IRQS() local_irq_enable()
55#define ACPI_FLUSH_CPU_CACHE() wbinvd()
56
57int __acpi_acquire_global_lock(unsigned int *lock);
58int __acpi_release_global_lock(unsigned int *lock);
59
60#define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
61 ((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
62
63#define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
64 ((Acq) = __acpi_release_global_lock(&facs->global_lock))
65
66/*
67 * Math helper asm macros
68 */
69#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
70 asm("divl %2;" \
71 : "=a"(q32), "=d"(r32) \
72 : "r"(d32), \
73 "0"(n_lo), "1"(n_hi))
74
75
76#define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
77 asm("shrl $1,%2 ;" \
78 "rcrl $1,%3;" \
79 : "=r"(n_hi), "=r"(n_lo) \
80 : "0"(n_hi), "1"(n_lo))
81
82#ifdef CONFIG_ACPI
83extern int acpi_lapic;
84extern int acpi_ioapic;
85extern int acpi_noirq;
86extern int acpi_strict;
87extern int acpi_disabled;
88extern int acpi_ht;
89extern int acpi_pci_disabled;
90extern int acpi_skip_timer_override;
91extern int acpi_use_timer_override;
92
93extern u8 acpi_sci_flags;
94extern int acpi_sci_override_gsi;
95void acpi_pic_sci_set_trigger(unsigned int, u16);
96
97static inline void disable_acpi(void)
98{
99 acpi_disabled = 1;
100 acpi_ht = 0;
101 acpi_pci_disabled = 1;
102 acpi_noirq = 1;
103}
104
105/* Fixmap pages to reserve for ACPI boot-time tables (see fixmap.h) */
106#define FIX_ACPI_PAGES 4
107
108extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
109
110static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
111static inline void acpi_disable_pci(void)
112{
113 acpi_pci_disabled = 1;
114 acpi_noirq_set();
115}
116extern int acpi_irq_balance_set(char *str);
117
118/* routines for saving/restoring kernel state */
119extern int acpi_save_state_mem(void);
120extern void acpi_restore_state_mem(void);
121
122extern unsigned long acpi_wakeup_address;
123
124/* early initialization routine */
125extern void acpi_reserve_bootmem(void);
126
127/*
128 * Check if the CPU can handle C2 and deeper
129 */
130static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
131{
132 /*
133 * Early models (<=5) of AMD Opterons are not supposed to go into
134 * C2 state.
135 *
136 * Steppings 0x0A and later are good
137 */
138 if (boot_cpu_data.x86 == 0x0F &&
139 boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
140 boot_cpu_data.x86_model <= 0x05 &&
141 boot_cpu_data.x86_mask < 0x0A)
142 return 1;
143 else if (boot_cpu_has(X86_FEATURE_AMDC1E))
144 return 1;
145 else
146 return max_cstate;
147}
148
149#else /* !CONFIG_ACPI */
150
151#define acpi_lapic 0
152#define acpi_ioapic 0
153static inline void acpi_noirq_set(void) { }
154static inline void acpi_disable_pci(void) { }
155static inline void disable_acpi(void) { }
156
157#endif /* !CONFIG_ACPI */
158
159#define ARCH_HAS_POWER_INIT 1
160
161struct bootnode;
162
163#ifdef CONFIG_ACPI_NUMA
164extern int acpi_numa;
165extern int acpi_scan_nodes(unsigned long start, unsigned long end);
166#define NR_NODE_MEMBLKS (MAX_NUMNODES*2)
167extern void acpi_fake_nodes(const struct bootnode *fake_nodes,
168 int num_nodes);
169#else
170static inline void acpi_fake_nodes(const struct bootnode *fake_nodes,
171 int num_nodes)
172{
173}
174#endif
175
176#define acpi_unlazy_tlb(x) leave_mm(x)
177
178#endif /* ASM_X86__ACPI_H */