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-rw-r--r--arch/tile/Kconfig2
-rw-r--r--arch/tile/gxio/iorpc_mpipe.c90
-rw-r--r--arch/tile/gxio/iorpc_mpipe_info.c15
-rw-r--r--arch/tile/gxio/iorpc_trio.c28
-rw-r--r--arch/tile/gxio/iorpc_usb_host.c8
-rw-r--r--arch/tile/gxio/usb_host.c8
-rw-r--r--arch/tile/include/arch/mpipe.h24
-rw-r--r--arch/tile/include/arch/mpipe_constants.h6
-rw-r--r--arch/tile/include/arch/mpipe_shm.h54
-rw-r--r--arch/tile/include/arch/trio_constants.h10
-rw-r--r--arch/tile/include/asm/page.h5
-rw-r--r--arch/tile/include/asm/pgtable_32.h12
-rw-r--r--arch/tile/include/asm/pgtable_64.h4
-rw-r--r--arch/tile/include/gxio/iorpc_mpipe.h52
-rw-r--r--arch/tile/include/gxio/iorpc_mpipe_info.h12
-rw-r--r--arch/tile/include/gxio/iorpc_trio.h28
-rw-r--r--arch/tile/include/gxio/iorpc_usb_host.h8
-rw-r--r--arch/tile/include/gxio/usb_host.h8
-rw-r--r--arch/tile/kernel/compat.c2
-rw-r--r--arch/tile/kernel/futex_64.S55
-rw-r--r--arch/tile/kernel/setup.c3
-rw-r--r--arch/tile/kernel/unaligned.c4
-rw-r--r--arch/tile/mm/fault.c2
-rw-r--r--arch/tile/mm/init.c4
-rw-r--r--arch/tile/mm/pgtable.c3
25 files changed, 197 insertions, 250 deletions
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index 8a7cc663b3f8..d45a2c48f185 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -361,7 +361,7 @@ config CMDLINE_OVERRIDE
361 361
362config VMALLOC_RESERVE 362config VMALLOC_RESERVE
363 hex 363 hex
364 default 0x1000000 364 default 0x2000000
365 365
366config HARDWALL 366config HARDWALL
367 bool "Hardwall support to allow access to user dynamic network" 367 bool "Hardwall support to allow access to user dynamic network"
diff --git a/arch/tile/gxio/iorpc_mpipe.c b/arch/tile/gxio/iorpc_mpipe.c
index 4f8f3d619c4a..e19325c4c431 100644
--- a/arch/tile/gxio/iorpc_mpipe.c
+++ b/arch/tile/gxio/iorpc_mpipe.c
@@ -21,7 +21,7 @@ struct alloc_buffer_stacks_param {
21 unsigned int flags; 21 unsigned int flags;
22}; 22};
23 23
24int gxio_mpipe_alloc_buffer_stacks(gxio_mpipe_context_t * context, 24int gxio_mpipe_alloc_buffer_stacks(gxio_mpipe_context_t *context,
25 unsigned int count, unsigned int first, 25 unsigned int count, unsigned int first,
26 unsigned int flags) 26 unsigned int flags)
27{ 27{
@@ -45,7 +45,7 @@ struct init_buffer_stack_aux_param {
45 unsigned int buffer_size_enum; 45 unsigned int buffer_size_enum;
46}; 46};
47 47
48int gxio_mpipe_init_buffer_stack_aux(gxio_mpipe_context_t * context, 48int gxio_mpipe_init_buffer_stack_aux(gxio_mpipe_context_t *context,
49 void *mem_va, size_t mem_size, 49 void *mem_va, size_t mem_size,
50 unsigned int mem_flags, unsigned int stack, 50 unsigned int mem_flags, unsigned int stack,
51 unsigned int buffer_size_enum) 51 unsigned int buffer_size_enum)
@@ -80,7 +80,7 @@ struct alloc_notif_rings_param {
80 unsigned int flags; 80 unsigned int flags;
81}; 81};
82 82
83int gxio_mpipe_alloc_notif_rings(gxio_mpipe_context_t * context, 83int gxio_mpipe_alloc_notif_rings(gxio_mpipe_context_t *context,
84 unsigned int count, unsigned int first, 84 unsigned int count, unsigned int first,
85 unsigned int flags) 85 unsigned int flags)
86{ 86{
@@ -102,7 +102,7 @@ struct init_notif_ring_aux_param {
102 unsigned int ring; 102 unsigned int ring;
103}; 103};
104 104
105int gxio_mpipe_init_notif_ring_aux(gxio_mpipe_context_t * context, void *mem_va, 105int gxio_mpipe_init_notif_ring_aux(gxio_mpipe_context_t *context, void *mem_va,
106 size_t mem_size, unsigned int mem_flags, 106 size_t mem_size, unsigned int mem_flags,
107 unsigned int ring) 107 unsigned int ring)
108{ 108{
@@ -133,7 +133,7 @@ struct request_notif_ring_interrupt_param {
133 unsigned int ring; 133 unsigned int ring;
134}; 134};
135 135
136int gxio_mpipe_request_notif_ring_interrupt(gxio_mpipe_context_t * context, 136int gxio_mpipe_request_notif_ring_interrupt(gxio_mpipe_context_t *context,
137 int inter_x, int inter_y, 137 int inter_x, int inter_y,
138 int inter_ipi, int inter_event, 138 int inter_ipi, int inter_event,
139 unsigned int ring) 139 unsigned int ring)
@@ -158,7 +158,7 @@ struct enable_notif_ring_interrupt_param {
158 unsigned int ring; 158 unsigned int ring;
159}; 159};
160 160
161int gxio_mpipe_enable_notif_ring_interrupt(gxio_mpipe_context_t * context, 161int gxio_mpipe_enable_notif_ring_interrupt(gxio_mpipe_context_t *context,
162 unsigned int ring) 162 unsigned int ring)
163{ 163{
164 struct enable_notif_ring_interrupt_param temp; 164 struct enable_notif_ring_interrupt_param temp;
@@ -179,7 +179,7 @@ struct alloc_notif_groups_param {
179 unsigned int flags; 179 unsigned int flags;
180}; 180};
181 181
182int gxio_mpipe_alloc_notif_groups(gxio_mpipe_context_t * context, 182int gxio_mpipe_alloc_notif_groups(gxio_mpipe_context_t *context,
183 unsigned int count, unsigned int first, 183 unsigned int count, unsigned int first,
184 unsigned int flags) 184 unsigned int flags)
185{ 185{
@@ -201,7 +201,7 @@ struct init_notif_group_param {
201 gxio_mpipe_notif_group_bits_t bits; 201 gxio_mpipe_notif_group_bits_t bits;
202}; 202};
203 203
204int gxio_mpipe_init_notif_group(gxio_mpipe_context_t * context, 204int gxio_mpipe_init_notif_group(gxio_mpipe_context_t *context,
205 unsigned int group, 205 unsigned int group,
206 gxio_mpipe_notif_group_bits_t bits) 206 gxio_mpipe_notif_group_bits_t bits)
207{ 207{
@@ -223,7 +223,7 @@ struct alloc_buckets_param {
223 unsigned int flags; 223 unsigned int flags;
224}; 224};
225 225
226int gxio_mpipe_alloc_buckets(gxio_mpipe_context_t * context, unsigned int count, 226int gxio_mpipe_alloc_buckets(gxio_mpipe_context_t *context, unsigned int count,
227 unsigned int first, unsigned int flags) 227 unsigned int first, unsigned int flags)
228{ 228{
229 struct alloc_buckets_param temp; 229 struct alloc_buckets_param temp;
@@ -244,7 +244,7 @@ struct init_bucket_param {
244 MPIPE_LBL_INIT_DAT_BSTS_TBL_t bucket_info; 244 MPIPE_LBL_INIT_DAT_BSTS_TBL_t bucket_info;
245}; 245};
246 246
247int gxio_mpipe_init_bucket(gxio_mpipe_context_t * context, unsigned int bucket, 247int gxio_mpipe_init_bucket(gxio_mpipe_context_t *context, unsigned int bucket,
248 MPIPE_LBL_INIT_DAT_BSTS_TBL_t bucket_info) 248 MPIPE_LBL_INIT_DAT_BSTS_TBL_t bucket_info)
249{ 249{
250 struct init_bucket_param temp; 250 struct init_bucket_param temp;
@@ -265,7 +265,7 @@ struct alloc_edma_rings_param {
265 unsigned int flags; 265 unsigned int flags;
266}; 266};
267 267
268int gxio_mpipe_alloc_edma_rings(gxio_mpipe_context_t * context, 268int gxio_mpipe_alloc_edma_rings(gxio_mpipe_context_t *context,
269 unsigned int count, unsigned int first, 269 unsigned int count, unsigned int first,
270 unsigned int flags) 270 unsigned int flags)
271{ 271{
@@ -288,7 +288,7 @@ struct init_edma_ring_aux_param {
288 unsigned int channel; 288 unsigned int channel;
289}; 289};
290 290
291int gxio_mpipe_init_edma_ring_aux(gxio_mpipe_context_t * context, void *mem_va, 291int gxio_mpipe_init_edma_ring_aux(gxio_mpipe_context_t *context, void *mem_va,
292 size_t mem_size, unsigned int mem_flags, 292 size_t mem_size, unsigned int mem_flags,
293 unsigned int ring, unsigned int channel) 293 unsigned int ring, unsigned int channel)
294{ 294{
@@ -315,7 +315,7 @@ int gxio_mpipe_init_edma_ring_aux(gxio_mpipe_context_t * context, void *mem_va,
315EXPORT_SYMBOL(gxio_mpipe_init_edma_ring_aux); 315EXPORT_SYMBOL(gxio_mpipe_init_edma_ring_aux);
316 316
317 317
318int gxio_mpipe_commit_rules(gxio_mpipe_context_t * context, const void *blob, 318int gxio_mpipe_commit_rules(gxio_mpipe_context_t *context, const void *blob,
319 size_t blob_size) 319 size_t blob_size)
320{ 320{
321 const void *params = blob; 321 const void *params = blob;
@@ -332,7 +332,7 @@ struct register_client_memory_param {
332 unsigned int flags; 332 unsigned int flags;
333}; 333};
334 334
335int gxio_mpipe_register_client_memory(gxio_mpipe_context_t * context, 335int gxio_mpipe_register_client_memory(gxio_mpipe_context_t *context,
336 unsigned int iotlb, HV_PTE pte, 336 unsigned int iotlb, HV_PTE pte,
337 unsigned int flags) 337 unsigned int flags)
338{ 338{
@@ -355,7 +355,7 @@ struct link_open_aux_param {
355 unsigned int flags; 355 unsigned int flags;
356}; 356};
357 357
358int gxio_mpipe_link_open_aux(gxio_mpipe_context_t * context, 358int gxio_mpipe_link_open_aux(gxio_mpipe_context_t *context,
359 _gxio_mpipe_link_name_t name, unsigned int flags) 359 _gxio_mpipe_link_name_t name, unsigned int flags)
360{ 360{
361 struct link_open_aux_param temp; 361 struct link_open_aux_param temp;
@@ -374,7 +374,7 @@ struct link_close_aux_param {
374 int mac; 374 int mac;
375}; 375};
376 376
377int gxio_mpipe_link_close_aux(gxio_mpipe_context_t * context, int mac) 377int gxio_mpipe_link_close_aux(gxio_mpipe_context_t *context, int mac)
378{ 378{
379 struct link_close_aux_param temp; 379 struct link_close_aux_param temp;
380 struct link_close_aux_param *params = &temp; 380 struct link_close_aux_param *params = &temp;
@@ -393,7 +393,7 @@ struct link_set_attr_aux_param {
393 int64_t val; 393 int64_t val;
394}; 394};
395 395
396int gxio_mpipe_link_set_attr_aux(gxio_mpipe_context_t * context, int mac, 396int gxio_mpipe_link_set_attr_aux(gxio_mpipe_context_t *context, int mac,
397 uint32_t attr, int64_t val) 397 uint32_t attr, int64_t val)
398{ 398{
399 struct link_set_attr_aux_param temp; 399 struct link_set_attr_aux_param temp;
@@ -415,8 +415,8 @@ struct get_timestamp_aux_param {
415 uint64_t cycles; 415 uint64_t cycles;
416}; 416};
417 417
418int gxio_mpipe_get_timestamp_aux(gxio_mpipe_context_t * context, uint64_t * sec, 418int gxio_mpipe_get_timestamp_aux(gxio_mpipe_context_t *context, uint64_t *sec,
419 uint64_t * nsec, uint64_t * cycles) 419 uint64_t *nsec, uint64_t *cycles)
420{ 420{
421 int __result; 421 int __result;
422 struct get_timestamp_aux_param temp; 422 struct get_timestamp_aux_param temp;
@@ -440,7 +440,7 @@ struct set_timestamp_aux_param {
440 uint64_t cycles; 440 uint64_t cycles;
441}; 441};
442 442
443int gxio_mpipe_set_timestamp_aux(gxio_mpipe_context_t * context, uint64_t sec, 443int gxio_mpipe_set_timestamp_aux(gxio_mpipe_context_t *context, uint64_t sec,
444 uint64_t nsec, uint64_t cycles) 444 uint64_t nsec, uint64_t cycles)
445{ 445{
446 struct set_timestamp_aux_param temp; 446 struct set_timestamp_aux_param temp;
@@ -460,8 +460,7 @@ struct adjust_timestamp_aux_param {
460 int64_t nsec; 460 int64_t nsec;
461}; 461};
462 462
463int gxio_mpipe_adjust_timestamp_aux(gxio_mpipe_context_t * context, 463int gxio_mpipe_adjust_timestamp_aux(gxio_mpipe_context_t *context, int64_t nsec)
464 int64_t nsec)
465{ 464{
466 struct adjust_timestamp_aux_param temp; 465 struct adjust_timestamp_aux_param temp;
467 struct adjust_timestamp_aux_param *params = &temp; 466 struct adjust_timestamp_aux_param *params = &temp;
@@ -475,25 +474,6 @@ int gxio_mpipe_adjust_timestamp_aux(gxio_mpipe_context_t * context,
475 474
476EXPORT_SYMBOL(gxio_mpipe_adjust_timestamp_aux); 475EXPORT_SYMBOL(gxio_mpipe_adjust_timestamp_aux);
477 476
478struct adjust_timestamp_freq_param {
479 int32_t ppb;
480};
481
482int gxio_mpipe_adjust_timestamp_freq(gxio_mpipe_context_t * context,
483 int32_t ppb)
484{
485 struct adjust_timestamp_freq_param temp;
486 struct adjust_timestamp_freq_param *params = &temp;
487
488 params->ppb = ppb;
489
490 return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
491 sizeof(*params),
492 GXIO_MPIPE_OP_ADJUST_TIMESTAMP_FREQ);
493}
494
495EXPORT_SYMBOL(gxio_mpipe_adjust_timestamp_freq);
496
497struct config_edma_ring_blks_param { 477struct config_edma_ring_blks_param {
498 unsigned int ering; 478 unsigned int ering;
499 unsigned int max_blks; 479 unsigned int max_blks;
@@ -501,7 +481,7 @@ struct config_edma_ring_blks_param {
501 unsigned int db; 481 unsigned int db;
502}; 482};
503 483
504int gxio_mpipe_config_edma_ring_blks(gxio_mpipe_context_t * context, 484int gxio_mpipe_config_edma_ring_blks(gxio_mpipe_context_t *context,
505 unsigned int ering, unsigned int max_blks, 485 unsigned int ering, unsigned int max_blks,
506 unsigned int min_snf_blks, unsigned int db) 486 unsigned int min_snf_blks, unsigned int db)
507{ 487{
@@ -520,11 +500,29 @@ int gxio_mpipe_config_edma_ring_blks(gxio_mpipe_context_t * context,
520 500
521EXPORT_SYMBOL(gxio_mpipe_config_edma_ring_blks); 501EXPORT_SYMBOL(gxio_mpipe_config_edma_ring_blks);
522 502
503struct adjust_timestamp_freq_param {
504 int32_t ppb;
505};
506
507int gxio_mpipe_adjust_timestamp_freq(gxio_mpipe_context_t *context, int32_t ppb)
508{
509 struct adjust_timestamp_freq_param temp;
510 struct adjust_timestamp_freq_param *params = &temp;
511
512 params->ppb = ppb;
513
514 return hv_dev_pwrite(context->fd, 0, (HV_VirtAddr) params,
515 sizeof(*params),
516 GXIO_MPIPE_OP_ADJUST_TIMESTAMP_FREQ);
517}
518
519EXPORT_SYMBOL(gxio_mpipe_adjust_timestamp_freq);
520
523struct arm_pollfd_param { 521struct arm_pollfd_param {
524 union iorpc_pollfd pollfd; 522 union iorpc_pollfd pollfd;
525}; 523};
526 524
527int gxio_mpipe_arm_pollfd(gxio_mpipe_context_t * context, int pollfd_cookie) 525int gxio_mpipe_arm_pollfd(gxio_mpipe_context_t *context, int pollfd_cookie)
528{ 526{
529 struct arm_pollfd_param temp; 527 struct arm_pollfd_param temp;
530 struct arm_pollfd_param *params = &temp; 528 struct arm_pollfd_param *params = &temp;
@@ -541,7 +539,7 @@ struct close_pollfd_param {
541 union iorpc_pollfd pollfd; 539 union iorpc_pollfd pollfd;
542}; 540};
543 541
544int gxio_mpipe_close_pollfd(gxio_mpipe_context_t * context, int pollfd_cookie) 542int gxio_mpipe_close_pollfd(gxio_mpipe_context_t *context, int pollfd_cookie)
545{ 543{
546 struct close_pollfd_param temp; 544 struct close_pollfd_param temp;
547 struct close_pollfd_param *params = &temp; 545 struct close_pollfd_param *params = &temp;
@@ -558,7 +556,7 @@ struct get_mmio_base_param {
558 HV_PTE base; 556 HV_PTE base;
559}; 557};
560 558
561int gxio_mpipe_get_mmio_base(gxio_mpipe_context_t * context, HV_PTE *base) 559int gxio_mpipe_get_mmio_base(gxio_mpipe_context_t *context, HV_PTE *base)
562{ 560{
563 int __result; 561 int __result;
564 struct get_mmio_base_param temp; 562 struct get_mmio_base_param temp;
@@ -579,7 +577,7 @@ struct check_mmio_offset_param {
579 unsigned long size; 577 unsigned long size;
580}; 578};
581 579
582int gxio_mpipe_check_mmio_offset(gxio_mpipe_context_t * context, 580int gxio_mpipe_check_mmio_offset(gxio_mpipe_context_t *context,
583 unsigned long offset, unsigned long size) 581 unsigned long offset, unsigned long size)
584{ 582{
585 struct check_mmio_offset_param temp; 583 struct check_mmio_offset_param temp;
diff --git a/arch/tile/gxio/iorpc_mpipe_info.c b/arch/tile/gxio/iorpc_mpipe_info.c
index 64883aabeb9c..77019c6e9b4a 100644
--- a/arch/tile/gxio/iorpc_mpipe_info.c
+++ b/arch/tile/gxio/iorpc_mpipe_info.c
@@ -15,12 +15,11 @@
15/* This file is machine-generated; DO NOT EDIT! */ 15/* This file is machine-generated; DO NOT EDIT! */
16#include "gxio/iorpc_mpipe_info.h" 16#include "gxio/iorpc_mpipe_info.h"
17 17
18
19struct instance_aux_param { 18struct instance_aux_param {
20 _gxio_mpipe_link_name_t name; 19 _gxio_mpipe_link_name_t name;
21}; 20};
22 21
23int gxio_mpipe_info_instance_aux(gxio_mpipe_info_context_t * context, 22int gxio_mpipe_info_instance_aux(gxio_mpipe_info_context_t *context,
24 _gxio_mpipe_link_name_t name) 23 _gxio_mpipe_link_name_t name)
25{ 24{
26 struct instance_aux_param temp; 25 struct instance_aux_param temp;
@@ -39,10 +38,10 @@ struct enumerate_aux_param {
39 _gxio_mpipe_link_mac_t mac; 38 _gxio_mpipe_link_mac_t mac;
40}; 39};
41 40
42int gxio_mpipe_info_enumerate_aux(gxio_mpipe_info_context_t * context, 41int gxio_mpipe_info_enumerate_aux(gxio_mpipe_info_context_t *context,
43 unsigned int idx, 42 unsigned int idx,
44 _gxio_mpipe_link_name_t * name, 43 _gxio_mpipe_link_name_t *name,
45 _gxio_mpipe_link_mac_t * mac) 44 _gxio_mpipe_link_mac_t *mac)
46{ 45{
47 int __result; 46 int __result;
48 struct enumerate_aux_param temp; 47 struct enumerate_aux_param temp;
@@ -50,7 +49,7 @@ int gxio_mpipe_info_enumerate_aux(gxio_mpipe_info_context_t * context,
50 49
51 __result = 50 __result =
52 hv_dev_pread(context->fd, 0, (HV_VirtAddr) params, sizeof(*params), 51 hv_dev_pread(context->fd, 0, (HV_VirtAddr) params, sizeof(*params),
53 (((uint64_t) idx << 32) | 52 (((uint64_t)idx << 32) |
54 GXIO_MPIPE_INFO_OP_ENUMERATE_AUX)); 53 GXIO_MPIPE_INFO_OP_ENUMERATE_AUX));
55 *name = params->name; 54 *name = params->name;
56 *mac = params->mac; 55 *mac = params->mac;
@@ -64,7 +63,7 @@ struct get_mmio_base_param {
64 HV_PTE base; 63 HV_PTE base;
65}; 64};
66 65
67int gxio_mpipe_info_get_mmio_base(gxio_mpipe_info_context_t * context, 66int gxio_mpipe_info_get_mmio_base(gxio_mpipe_info_context_t *context,
68 HV_PTE *base) 67 HV_PTE *base)
69{ 68{
70 int __result; 69 int __result;
@@ -86,7 +85,7 @@ struct check_mmio_offset_param {
86 unsigned long size; 85 unsigned long size;
87}; 86};
88 87
89int gxio_mpipe_info_check_mmio_offset(gxio_mpipe_info_context_t * context, 88int gxio_mpipe_info_check_mmio_offset(gxio_mpipe_info_context_t *context,
90 unsigned long offset, unsigned long size) 89 unsigned long offset, unsigned long size)
91{ 90{
92 struct check_mmio_offset_param temp; 91 struct check_mmio_offset_param temp;
diff --git a/arch/tile/gxio/iorpc_trio.c b/arch/tile/gxio/iorpc_trio.c
index da6e18e049c3..1d3cedb9aeb4 100644
--- a/arch/tile/gxio/iorpc_trio.c
+++ b/arch/tile/gxio/iorpc_trio.c
@@ -21,7 +21,7 @@ struct alloc_asids_param {
21 unsigned int flags; 21 unsigned int flags;
22}; 22};
23 23
24int gxio_trio_alloc_asids(gxio_trio_context_t * context, unsigned int count, 24int gxio_trio_alloc_asids(gxio_trio_context_t *context, unsigned int count,
25 unsigned int first, unsigned int flags) 25 unsigned int first, unsigned int flags)
26{ 26{
27 struct alloc_asids_param temp; 27 struct alloc_asids_param temp;
@@ -44,7 +44,7 @@ struct alloc_memory_maps_param {
44 unsigned int flags; 44 unsigned int flags;
45}; 45};
46 46
47int gxio_trio_alloc_memory_maps(gxio_trio_context_t * context, 47int gxio_trio_alloc_memory_maps(gxio_trio_context_t *context,
48 unsigned int count, unsigned int first, 48 unsigned int count, unsigned int first,
49 unsigned int flags) 49 unsigned int flags)
50{ 50{
@@ -67,7 +67,7 @@ struct alloc_scatter_queues_param {
67 unsigned int flags; 67 unsigned int flags;
68}; 68};
69 69
70int gxio_trio_alloc_scatter_queues(gxio_trio_context_t * context, 70int gxio_trio_alloc_scatter_queues(gxio_trio_context_t *context,
71 unsigned int count, unsigned int first, 71 unsigned int count, unsigned int first,
72 unsigned int flags) 72 unsigned int flags)
73{ 73{
@@ -91,7 +91,7 @@ struct alloc_pio_regions_param {
91 unsigned int flags; 91 unsigned int flags;
92}; 92};
93 93
94int gxio_trio_alloc_pio_regions(gxio_trio_context_t * context, 94int gxio_trio_alloc_pio_regions(gxio_trio_context_t *context,
95 unsigned int count, unsigned int first, 95 unsigned int count, unsigned int first,
96 unsigned int flags) 96 unsigned int flags)
97{ 97{
@@ -115,7 +115,7 @@ struct init_pio_region_aux_param {
115 unsigned int flags; 115 unsigned int flags;
116}; 116};
117 117
118int gxio_trio_init_pio_region_aux(gxio_trio_context_t * context, 118int gxio_trio_init_pio_region_aux(gxio_trio_context_t *context,
119 unsigned int pio_region, unsigned int mac, 119 unsigned int pio_region, unsigned int mac,
120 uint32_t bus_address_hi, unsigned int flags) 120 uint32_t bus_address_hi, unsigned int flags)
121{ 121{
@@ -145,7 +145,7 @@ struct init_memory_map_mmu_aux_param {
145 unsigned int order_mode; 145 unsigned int order_mode;
146}; 146};
147 147
148int gxio_trio_init_memory_map_mmu_aux(gxio_trio_context_t * context, 148int gxio_trio_init_memory_map_mmu_aux(gxio_trio_context_t *context,
149 unsigned int map, unsigned long va, 149 unsigned int map, unsigned long va,
150 uint64_t size, unsigned int asid, 150 uint64_t size, unsigned int asid,
151 unsigned int mac, uint64_t bus_address, 151 unsigned int mac, uint64_t bus_address,
@@ -175,7 +175,7 @@ struct get_port_property_param {
175 struct pcie_trio_ports_property trio_ports; 175 struct pcie_trio_ports_property trio_ports;
176}; 176};
177 177
178int gxio_trio_get_port_property(gxio_trio_context_t * context, 178int gxio_trio_get_port_property(gxio_trio_context_t *context,
179 struct pcie_trio_ports_property *trio_ports) 179 struct pcie_trio_ports_property *trio_ports)
180{ 180{
181 int __result; 181 int __result;
@@ -198,7 +198,7 @@ struct config_legacy_intr_param {
198 unsigned int intx; 198 unsigned int intx;
199}; 199};
200 200
201int gxio_trio_config_legacy_intr(gxio_trio_context_t * context, int inter_x, 201int gxio_trio_config_legacy_intr(gxio_trio_context_t *context, int inter_x,
202 int inter_y, int inter_ipi, int inter_event, 202 int inter_y, int inter_ipi, int inter_event,
203 unsigned int mac, unsigned int intx) 203 unsigned int mac, unsigned int intx)
204{ 204{
@@ -227,7 +227,7 @@ struct config_msi_intr_param {
227 unsigned int asid; 227 unsigned int asid;
228}; 228};
229 229
230int gxio_trio_config_msi_intr(gxio_trio_context_t * context, int inter_x, 230int gxio_trio_config_msi_intr(gxio_trio_context_t *context, int inter_x,
231 int inter_y, int inter_ipi, int inter_event, 231 int inter_y, int inter_ipi, int inter_event,
232 unsigned int mac, unsigned int mem_map, 232 unsigned int mac, unsigned int mem_map,
233 uint64_t mem_map_base, uint64_t mem_map_limit, 233 uint64_t mem_map_base, uint64_t mem_map_limit,
@@ -259,7 +259,7 @@ struct set_mps_mrs_param {
259 unsigned int mac; 259 unsigned int mac;
260}; 260};
261 261
262int gxio_trio_set_mps_mrs(gxio_trio_context_t * context, uint16_t mps, 262int gxio_trio_set_mps_mrs(gxio_trio_context_t *context, uint16_t mps,
263 uint16_t mrs, unsigned int mac) 263 uint16_t mrs, unsigned int mac)
264{ 264{
265 struct set_mps_mrs_param temp; 265 struct set_mps_mrs_param temp;
@@ -279,7 +279,7 @@ struct force_rc_link_up_param {
279 unsigned int mac; 279 unsigned int mac;
280}; 280};
281 281
282int gxio_trio_force_rc_link_up(gxio_trio_context_t * context, unsigned int mac) 282int gxio_trio_force_rc_link_up(gxio_trio_context_t *context, unsigned int mac)
283{ 283{
284 struct force_rc_link_up_param temp; 284 struct force_rc_link_up_param temp;
285 struct force_rc_link_up_param *params = &temp; 285 struct force_rc_link_up_param *params = &temp;
@@ -296,7 +296,7 @@ struct force_ep_link_up_param {
296 unsigned int mac; 296 unsigned int mac;
297}; 297};
298 298
299int gxio_trio_force_ep_link_up(gxio_trio_context_t * context, unsigned int mac) 299int gxio_trio_force_ep_link_up(gxio_trio_context_t *context, unsigned int mac)
300{ 300{
301 struct force_ep_link_up_param temp; 301 struct force_ep_link_up_param temp;
302 struct force_ep_link_up_param *params = &temp; 302 struct force_ep_link_up_param *params = &temp;
@@ -313,7 +313,7 @@ struct get_mmio_base_param {
313 HV_PTE base; 313 HV_PTE base;
314}; 314};
315 315
316int gxio_trio_get_mmio_base(gxio_trio_context_t * context, HV_PTE *base) 316int gxio_trio_get_mmio_base(gxio_trio_context_t *context, HV_PTE *base)
317{ 317{
318 int __result; 318 int __result;
319 struct get_mmio_base_param temp; 319 struct get_mmio_base_param temp;
@@ -334,7 +334,7 @@ struct check_mmio_offset_param {
334 unsigned long size; 334 unsigned long size;
335}; 335};
336 336
337int gxio_trio_check_mmio_offset(gxio_trio_context_t * context, 337int gxio_trio_check_mmio_offset(gxio_trio_context_t *context,
338 unsigned long offset, unsigned long size) 338 unsigned long offset, unsigned long size)
339{ 339{
340 struct check_mmio_offset_param temp; 340 struct check_mmio_offset_param temp;
diff --git a/arch/tile/gxio/iorpc_usb_host.c b/arch/tile/gxio/iorpc_usb_host.c
index cf3c3cc12204..9c820073bfc0 100644
--- a/arch/tile/gxio/iorpc_usb_host.c
+++ b/arch/tile/gxio/iorpc_usb_host.c
@@ -19,7 +19,7 @@ struct cfg_interrupt_param {
19 union iorpc_interrupt interrupt; 19 union iorpc_interrupt interrupt;
20}; 20};
21 21
22int gxio_usb_host_cfg_interrupt(gxio_usb_host_context_t * context, int inter_x, 22int gxio_usb_host_cfg_interrupt(gxio_usb_host_context_t *context, int inter_x,
23 int inter_y, int inter_ipi, int inter_event) 23 int inter_y, int inter_ipi, int inter_event)
24{ 24{
25 struct cfg_interrupt_param temp; 25 struct cfg_interrupt_param temp;
@@ -41,7 +41,7 @@ struct register_client_memory_param {
41 unsigned int flags; 41 unsigned int flags;
42}; 42};
43 43
44int gxio_usb_host_register_client_memory(gxio_usb_host_context_t * context, 44int gxio_usb_host_register_client_memory(gxio_usb_host_context_t *context,
45 HV_PTE pte, unsigned int flags) 45 HV_PTE pte, unsigned int flags)
46{ 46{
47 struct register_client_memory_param temp; 47 struct register_client_memory_param temp;
@@ -61,7 +61,7 @@ struct get_mmio_base_param {
61 HV_PTE base; 61 HV_PTE base;
62}; 62};
63 63
64int gxio_usb_host_get_mmio_base(gxio_usb_host_context_t * context, HV_PTE *base) 64int gxio_usb_host_get_mmio_base(gxio_usb_host_context_t *context, HV_PTE *base)
65{ 65{
66 int __result; 66 int __result;
67 struct get_mmio_base_param temp; 67 struct get_mmio_base_param temp;
@@ -82,7 +82,7 @@ struct check_mmio_offset_param {
82 unsigned long size; 82 unsigned long size;
83}; 83};
84 84
85int gxio_usb_host_check_mmio_offset(gxio_usb_host_context_t * context, 85int gxio_usb_host_check_mmio_offset(gxio_usb_host_context_t *context,
86 unsigned long offset, unsigned long size) 86 unsigned long offset, unsigned long size)
87{ 87{
88 struct check_mmio_offset_param temp; 88 struct check_mmio_offset_param temp;
diff --git a/arch/tile/gxio/usb_host.c b/arch/tile/gxio/usb_host.c
index 66b002f54ecc..785afad7922e 100644
--- a/arch/tile/gxio/usb_host.c
+++ b/arch/tile/gxio/usb_host.c
@@ -26,7 +26,7 @@
26#include <gxio/kiorpc.h> 26#include <gxio/kiorpc.h>
27#include <gxio/usb_host.h> 27#include <gxio/usb_host.h>
28 28
29int gxio_usb_host_init(gxio_usb_host_context_t * context, int usb_index, 29int gxio_usb_host_init(gxio_usb_host_context_t *context, int usb_index,
30 int is_ehci) 30 int is_ehci)
31{ 31{
32 char file[32]; 32 char file[32];
@@ -63,7 +63,7 @@ int gxio_usb_host_init(gxio_usb_host_context_t * context, int usb_index,
63 63
64EXPORT_SYMBOL_GPL(gxio_usb_host_init); 64EXPORT_SYMBOL_GPL(gxio_usb_host_init);
65 65
66int gxio_usb_host_destroy(gxio_usb_host_context_t * context) 66int gxio_usb_host_destroy(gxio_usb_host_context_t *context)
67{ 67{
68 iounmap((void __force __iomem *)(context->mmio_base)); 68 iounmap((void __force __iomem *)(context->mmio_base));
69 hv_dev_close(context->fd); 69 hv_dev_close(context->fd);
@@ -76,14 +76,14 @@ int gxio_usb_host_destroy(gxio_usb_host_context_t * context)
76 76
77EXPORT_SYMBOL_GPL(gxio_usb_host_destroy); 77EXPORT_SYMBOL_GPL(gxio_usb_host_destroy);
78 78
79void *gxio_usb_host_get_reg_start(gxio_usb_host_context_t * context) 79void *gxio_usb_host_get_reg_start(gxio_usb_host_context_t *context)
80{ 80{
81 return context->mmio_base; 81 return context->mmio_base;
82} 82}
83 83
84EXPORT_SYMBOL_GPL(gxio_usb_host_get_reg_start); 84EXPORT_SYMBOL_GPL(gxio_usb_host_get_reg_start);
85 85
86size_t gxio_usb_host_get_reg_len(gxio_usb_host_context_t * context) 86size_t gxio_usb_host_get_reg_len(gxio_usb_host_context_t *context)
87{ 87{
88 return HV_USB_HOST_MMIO_SIZE; 88 return HV_USB_HOST_MMIO_SIZE;
89} 89}
diff --git a/arch/tile/include/arch/mpipe.h b/arch/tile/include/arch/mpipe.h
index 8a33912fd6cc..904538e754d8 100644
--- a/arch/tile/include/arch/mpipe.h
+++ b/arch/tile/include/arch/mpipe.h
@@ -176,7 +176,18 @@ typedef union
176 */ 176 */
177 uint_reg_t stack_idx : 5; 177 uint_reg_t stack_idx : 5;
178 /* Reserved. */ 178 /* Reserved. */
179 uint_reg_t __reserved_2 : 5; 179 uint_reg_t __reserved_2 : 3;
180 /*
181 * Instance ID. For devices that support automatic buffer return between
182 * mPIPE instances, this field indicates the buffer owner. If the INST
183 * field does not match the mPIPE's instance number when a packet is
184 * egressed, buffers with HWB set will be returned to the other mPIPE
185 * instance. Note that not all devices support multi-mPIPE buffer
186 * return. The MPIPE_EDMA_INFO.REMOTE_BUFF_RTN_SUPPORT bit indicates
187 * whether the INST field in the buffer descriptor is populated by iDMA
188 * hardware. This field is ignored on writes.
189 */
190 uint_reg_t inst : 2;
180 /* 191 /*
181 * Reads as one to indicate that this is a hardware managed buffer. 192 * Reads as one to indicate that this is a hardware managed buffer.
182 * Ignored on writes since all buffers on a given stack are the same size. 193 * Ignored on writes since all buffers on a given stack are the same size.
@@ -205,7 +216,8 @@ typedef union
205 uint_reg_t c : 2; 216 uint_reg_t c : 2;
206 uint_reg_t size : 3; 217 uint_reg_t size : 3;
207 uint_reg_t hwb : 1; 218 uint_reg_t hwb : 1;
208 uint_reg_t __reserved_2 : 5; 219 uint_reg_t inst : 2;
220 uint_reg_t __reserved_2 : 3;
209 uint_reg_t stack_idx : 5; 221 uint_reg_t stack_idx : 5;
210 uint_reg_t __reserved_1 : 6; 222 uint_reg_t __reserved_1 : 6;
211 int_reg_t va : 35; 223 int_reg_t va : 35;
@@ -231,9 +243,9 @@ typedef union
231 /* Reserved. */ 243 /* Reserved. */
232 uint_reg_t __reserved_0 : 3; 244 uint_reg_t __reserved_0 : 3;
233 /* eDMA ring being accessed */ 245 /* eDMA ring being accessed */
234 uint_reg_t ring : 5; 246 uint_reg_t ring : 6;
235 /* Reserved. */ 247 /* Reserved. */
236 uint_reg_t __reserved_1 : 18; 248 uint_reg_t __reserved_1 : 17;
237 /* 249 /*
238 * This field of the address selects the region (address space) to be 250 * This field of the address selects the region (address space) to be
239 * accessed. For the egress DMA post region, this field must be 5. 251 * accessed. For the egress DMA post region, this field must be 5.
@@ -250,8 +262,8 @@ typedef union
250 uint_reg_t svc_dom : 5; 262 uint_reg_t svc_dom : 5;
251 uint_reg_t __reserved_2 : 6; 263 uint_reg_t __reserved_2 : 6;
252 uint_reg_t region : 3; 264 uint_reg_t region : 3;
253 uint_reg_t __reserved_1 : 18; 265 uint_reg_t __reserved_1 : 17;
254 uint_reg_t ring : 5; 266 uint_reg_t ring : 6;
255 uint_reg_t __reserved_0 : 3; 267 uint_reg_t __reserved_0 : 3;
256#endif 268#endif
257 }; 269 };
diff --git a/arch/tile/include/arch/mpipe_constants.h b/arch/tile/include/arch/mpipe_constants.h
index 410a0400e055..84022ac5fe82 100644
--- a/arch/tile/include/arch/mpipe_constants.h
+++ b/arch/tile/include/arch/mpipe_constants.h
@@ -16,13 +16,13 @@
16#ifndef __ARCH_MPIPE_CONSTANTS_H__ 16#ifndef __ARCH_MPIPE_CONSTANTS_H__
17#define __ARCH_MPIPE_CONSTANTS_H__ 17#define __ARCH_MPIPE_CONSTANTS_H__
18 18
19#define MPIPE_NUM_CLASSIFIERS 10 19#define MPIPE_NUM_CLASSIFIERS 16
20#define MPIPE_CLS_MHZ 1200 20#define MPIPE_CLS_MHZ 1200
21 21
22#define MPIPE_NUM_EDMA_RINGS 32 22#define MPIPE_NUM_EDMA_RINGS 64
23 23
24#define MPIPE_NUM_SGMII_MACS 16 24#define MPIPE_NUM_SGMII_MACS 16
25#define MPIPE_NUM_XAUI_MACS 4 25#define MPIPE_NUM_XAUI_MACS 16
26#define MPIPE_NUM_LOOPBACK_CHANNELS 4 26#define MPIPE_NUM_LOOPBACK_CHANNELS 4
27#define MPIPE_NUM_NON_LB_CHANNELS 28 27#define MPIPE_NUM_NON_LB_CHANNELS 28
28 28
diff --git a/arch/tile/include/arch/mpipe_shm.h b/arch/tile/include/arch/mpipe_shm.h
index f2e9e122818d..13b3c4300e50 100644
--- a/arch/tile/include/arch/mpipe_shm.h
+++ b/arch/tile/include/arch/mpipe_shm.h
@@ -44,8 +44,14 @@ typedef union
44 * descriptors toggles each time the ring tail pointer wraps. 44 * descriptors toggles each time the ring tail pointer wraps.
45 */ 45 */
46 uint_reg_t gen : 1; 46 uint_reg_t gen : 1;
47 /**
48 * For devices with EDMA reorder support, this field allows the
49 * descriptor to select the egress FIFO. The associated DMA ring must
50 * have ALLOW_EFIFO_SEL enabled.
51 */
52 uint_reg_t efifo_sel : 6;
47 /** Reserved. Must be zero. */ 53 /** Reserved. Must be zero. */
48 uint_reg_t r0 : 7; 54 uint_reg_t r0 : 1;
49 /** Checksum generation enabled for this transfer. */ 55 /** Checksum generation enabled for this transfer. */
50 uint_reg_t csum : 1; 56 uint_reg_t csum : 1;
51 /** 57 /**
@@ -110,7 +116,8 @@ typedef union
110 uint_reg_t notif : 1; 116 uint_reg_t notif : 1;
111 uint_reg_t ns : 1; 117 uint_reg_t ns : 1;
112 uint_reg_t csum : 1; 118 uint_reg_t csum : 1;
113 uint_reg_t r0 : 7; 119 uint_reg_t r0 : 1;
120 uint_reg_t efifo_sel : 6;
114 uint_reg_t gen : 1; 121 uint_reg_t gen : 1;
115#endif 122#endif
116 123
@@ -126,14 +133,16 @@ typedef union
126 /** Reserved. */ 133 /** Reserved. */
127 uint_reg_t __reserved_1 : 3; 134 uint_reg_t __reserved_1 : 3;
128 /** 135 /**
129 * Instance ID. For devices that support more than one mPIPE instance, 136 * Instance ID. For devices that support automatic buffer return between
130 * this field indicates the buffer owner. If the INST field does not 137 * mPIPE instances, this field indicates the buffer owner. If the INST
131 * match the mPIPE's instance number when a packet is egressed, buffers 138 * field does not match the mPIPE's instance number when a packet is
132 * with HWB set will be returned to the other mPIPE instance. 139 * egressed, buffers with HWB set will be returned to the other mPIPE
140 * instance. Note that not all devices support multi-mPIPE buffer
141 * return. The MPIPE_EDMA_INFO.REMOTE_BUFF_RTN_SUPPORT bit indicates
142 * whether the INST field in the buffer descriptor is populated by iDMA
143 * hardware.
133 */ 144 */
134 uint_reg_t inst : 1; 145 uint_reg_t inst : 2;
135 /** Reserved. */
136 uint_reg_t __reserved_2 : 1;
137 /** 146 /**
138 * Always set to one by hardware in iDMA packet descriptors. For eDMA, 147 * Always set to one by hardware in iDMA packet descriptors. For eDMA,
139 * indicates whether the buffer will be released to the buffer stack 148 * indicates whether the buffer will be released to the buffer stack
@@ -166,8 +175,7 @@ typedef union
166 uint_reg_t c : 2; 175 uint_reg_t c : 2;
167 uint_reg_t size : 3; 176 uint_reg_t size : 3;
168 uint_reg_t hwb : 1; 177 uint_reg_t hwb : 1;
169 uint_reg_t __reserved_2 : 1; 178 uint_reg_t inst : 2;
170 uint_reg_t inst : 1;
171 uint_reg_t __reserved_1 : 3; 179 uint_reg_t __reserved_1 : 3;
172 uint_reg_t stack_idx : 5; 180 uint_reg_t stack_idx : 5;
173 uint_reg_t __reserved_0 : 6; 181 uint_reg_t __reserved_0 : 6;
@@ -408,7 +416,10 @@ typedef union
408 /** 416 /**
409 * Sequence number applied when packet is distributed. Classifier 417 * Sequence number applied when packet is distributed. Classifier
410 * selects which sequence number is to be applied by writing the 13-bit 418 * selects which sequence number is to be applied by writing the 13-bit
411 * SQN-selector into this field. 419 * SQN-selector into this field. For devices that support EXT_SQN (as
420 * indicated in IDMA_INFO.EXT_SQN_SUPPORT), the GP_SQN can be extended to
421 * 32-bits via the IDMA_CTL.EXT_SQN register. In this case the
422 * PACKET_SQN will be reduced to 32 bits.
412 */ 423 */
413 uint_reg_t gp_sqn : 16; 424 uint_reg_t gp_sqn : 16;
414 /** 425 /**
@@ -451,14 +462,16 @@ typedef union
451 /** Reserved. */ 462 /** Reserved. */
452 uint_reg_t __reserved_5 : 3; 463 uint_reg_t __reserved_5 : 3;
453 /** 464 /**
454 * Instance ID. For devices that support more than one mPIPE instance, 465 * Instance ID. For devices that support automatic buffer return between
455 * this field indicates the buffer owner. If the INST field does not 466 * mPIPE instances, this field indicates the buffer owner. If the INST
456 * match the mPIPE's instance number when a packet is egressed, buffers 467 * field does not match the mPIPE's instance number when a packet is
457 * with HWB set will be returned to the other mPIPE instance. 468 * egressed, buffers with HWB set will be returned to the other mPIPE
469 * instance. Note that not all devices support multi-mPIPE buffer
470 * return. The MPIPE_EDMA_INFO.REMOTE_BUFF_RTN_SUPPORT bit indicates
471 * whether the INST field in the buffer descriptor is populated by iDMA
472 * hardware.
458 */ 473 */
459 uint_reg_t inst : 1; 474 uint_reg_t inst : 2;
460 /** Reserved. */
461 uint_reg_t __reserved_6 : 1;
462 /** 475 /**
463 * Always set to one by hardware in iDMA packet descriptors. For eDMA, 476 * Always set to one by hardware in iDMA packet descriptors. For eDMA,
464 * indicates whether the buffer will be released to the buffer stack 477 * indicates whether the buffer will be released to the buffer stack
@@ -491,8 +504,7 @@ typedef union
491 uint_reg_t c : 2; 504 uint_reg_t c : 2;
492 uint_reg_t size : 3; 505 uint_reg_t size : 3;
493 uint_reg_t hwb : 1; 506 uint_reg_t hwb : 1;
494 uint_reg_t __reserved_6 : 1; 507 uint_reg_t inst : 2;
495 uint_reg_t inst : 1;
496 uint_reg_t __reserved_5 : 3; 508 uint_reg_t __reserved_5 : 3;
497 uint_reg_t stack_idx : 5; 509 uint_reg_t stack_idx : 5;
498 uint_reg_t __reserved_4 : 6; 510 uint_reg_t __reserved_4 : 6;
diff --git a/arch/tile/include/arch/trio_constants.h b/arch/tile/include/arch/trio_constants.h
index 628b045436b8..85647e91a458 100644
--- a/arch/tile/include/arch/trio_constants.h
+++ b/arch/tile/include/arch/trio_constants.h
@@ -16,21 +16,21 @@
16#ifndef __ARCH_TRIO_CONSTANTS_H__ 16#ifndef __ARCH_TRIO_CONSTANTS_H__
17#define __ARCH_TRIO_CONSTANTS_H__ 17#define __ARCH_TRIO_CONSTANTS_H__
18 18
19#define TRIO_NUM_ASIDS 16 19#define TRIO_NUM_ASIDS 32
20#define TRIO_NUM_TLBS_PER_ASID 16 20#define TRIO_NUM_TLBS_PER_ASID 16
21 21
22#define TRIO_NUM_TPIO_REGIONS 8 22#define TRIO_NUM_TPIO_REGIONS 8
23#define TRIO_LOG2_NUM_TPIO_REGIONS 3 23#define TRIO_LOG2_NUM_TPIO_REGIONS 3
24 24
25#define TRIO_NUM_MAP_MEM_REGIONS 16 25#define TRIO_NUM_MAP_MEM_REGIONS 32
26#define TRIO_LOG2_NUM_MAP_MEM_REGIONS 4 26#define TRIO_LOG2_NUM_MAP_MEM_REGIONS 5
27#define TRIO_NUM_MAP_SQ_REGIONS 8 27#define TRIO_NUM_MAP_SQ_REGIONS 8
28#define TRIO_LOG2_NUM_MAP_SQ_REGIONS 3 28#define TRIO_LOG2_NUM_MAP_SQ_REGIONS 3
29 29
30#define TRIO_LOG2_NUM_SQ_FIFO_ENTRIES 6 30#define TRIO_LOG2_NUM_SQ_FIFO_ENTRIES 6
31 31
32#define TRIO_NUM_PUSH_DMA_RINGS 32 32#define TRIO_NUM_PUSH_DMA_RINGS 64
33 33
34#define TRIO_NUM_PULL_DMA_RINGS 32 34#define TRIO_NUM_PULL_DMA_RINGS 64
35 35
36#endif /* __ARCH_TRIO_CONSTANTS_H__ */ 36#endif /* __ARCH_TRIO_CONSTANTS_H__ */
diff --git a/arch/tile/include/asm/page.h b/arch/tile/include/asm/page.h
index 6346888f7bdc..672768008618 100644
--- a/arch/tile/include/asm/page.h
+++ b/arch/tile/include/asm/page.h
@@ -182,10 +182,9 @@ static inline __attribute_const__ int get_order(unsigned long size)
182 182
183#define PAGE_OFFSET (-(_AC(1, UL) << (MAX_VA_WIDTH - 1))) 183#define PAGE_OFFSET (-(_AC(1, UL) << (MAX_VA_WIDTH - 1)))
184#define KERNEL_HIGH_VADDR _AC(0xfffffff800000000, UL) /* high 32GB */ 184#define KERNEL_HIGH_VADDR _AC(0xfffffff800000000, UL) /* high 32GB */
185#define FIXADDR_BASE (KERNEL_HIGH_VADDR - 0x400000000) /* 4 GB */ 185#define FIXADDR_BASE (KERNEL_HIGH_VADDR - 0x300000000) /* 4 GB */
186#define FIXADDR_TOP (KERNEL_HIGH_VADDR - 0x300000000) /* 4 GB */ 186#define FIXADDR_TOP (KERNEL_HIGH_VADDR - 0x200000000) /* 4 GB */
187#define _VMALLOC_START FIXADDR_TOP 187#define _VMALLOC_START FIXADDR_TOP
188#define HUGE_VMAP_BASE (KERNEL_HIGH_VADDR - 0x200000000) /* 4 GB */
189#define MEM_SV_START (KERNEL_HIGH_VADDR - 0x100000000) /* 256 MB */ 188#define MEM_SV_START (KERNEL_HIGH_VADDR - 0x100000000) /* 256 MB */
190#define MEM_MODULE_START (MEM_SV_START + (256*1024*1024)) /* 256 MB */ 189#define MEM_MODULE_START (MEM_SV_START + (256*1024*1024)) /* 256 MB */
191#define MEM_MODULE_END (MEM_MODULE_START + (256*1024*1024)) 190#define MEM_MODULE_END (MEM_MODULE_START + (256*1024*1024))
diff --git a/arch/tile/include/asm/pgtable_32.h b/arch/tile/include/asm/pgtable_32.h
index 63142ab3b3dd..d26a42279036 100644
--- a/arch/tile/include/asm/pgtable_32.h
+++ b/arch/tile/include/asm/pgtable_32.h
@@ -55,17 +55,9 @@
55#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE*LAST_PKMAP) & PGDIR_MASK) 55#define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE*LAST_PKMAP) & PGDIR_MASK)
56 56
57#ifdef CONFIG_HIGHMEM 57#ifdef CONFIG_HIGHMEM
58# define __VMAPPING_END (PKMAP_BASE & ~(HPAGE_SIZE-1)) 58# define _VMALLOC_END (PKMAP_BASE & ~(HPAGE_SIZE-1))
59#else 59#else
60# define __VMAPPING_END (FIXADDR_START & ~(HPAGE_SIZE-1)) 60# define _VMALLOC_END (FIXADDR_START & ~(HPAGE_SIZE-1))
61#endif
62
63#ifdef CONFIG_HUGEVMAP
64#define HUGE_VMAP_END __VMAPPING_END
65#define HUGE_VMAP_BASE (HUGE_VMAP_END - CONFIG_NR_HUGE_VMAPS * HPAGE_SIZE)
66#define _VMALLOC_END HUGE_VMAP_BASE
67#else
68#define _VMALLOC_END __VMAPPING_END
69#endif 61#endif
70 62
71/* 63/*
diff --git a/arch/tile/include/asm/pgtable_64.h b/arch/tile/include/asm/pgtable_64.h
index 3421177f7370..2c8a9cd102d3 100644
--- a/arch/tile/include/asm/pgtable_64.h
+++ b/arch/tile/include/asm/pgtable_64.h
@@ -52,12 +52,10 @@
52 * memory allocation code). The vmalloc code puts in an internal 52 * memory allocation code). The vmalloc code puts in an internal
53 * guard page between each allocation. 53 * guard page between each allocation.
54 */ 54 */
55#define _VMALLOC_END HUGE_VMAP_BASE 55#define _VMALLOC_END MEM_SV_START
56#define VMALLOC_END _VMALLOC_END 56#define VMALLOC_END _VMALLOC_END
57#define VMALLOC_START _VMALLOC_START 57#define VMALLOC_START _VMALLOC_START
58 58
59#define HUGE_VMAP_END (HUGE_VMAP_BASE + PGDIR_SIZE)
60
61#ifndef __ASSEMBLY__ 59#ifndef __ASSEMBLY__
62 60
63/* We have no pud since we are a three-level page table. */ 61/* We have no pud since we are a three-level page table. */
diff --git a/arch/tile/include/gxio/iorpc_mpipe.h b/arch/tile/include/gxio/iorpc_mpipe.h
index fdd07f88cfd7..4cda03de734f 100644
--- a/arch/tile/include/gxio/iorpc_mpipe.h
+++ b/arch/tile/include/gxio/iorpc_mpipe.h
@@ -56,89 +56,89 @@
56#define GXIO_MPIPE_OP_GET_MMIO_BASE IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8000) 56#define GXIO_MPIPE_OP_GET_MMIO_BASE IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8000)
57#define GXIO_MPIPE_OP_CHECK_MMIO_OFFSET IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8001) 57#define GXIO_MPIPE_OP_CHECK_MMIO_OFFSET IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8001)
58 58
59int gxio_mpipe_alloc_buffer_stacks(gxio_mpipe_context_t * context, 59int gxio_mpipe_alloc_buffer_stacks(gxio_mpipe_context_t *context,
60 unsigned int count, unsigned int first, 60 unsigned int count, unsigned int first,
61 unsigned int flags); 61 unsigned int flags);
62 62
63int gxio_mpipe_init_buffer_stack_aux(gxio_mpipe_context_t * context, 63int gxio_mpipe_init_buffer_stack_aux(gxio_mpipe_context_t *context,
64 void *mem_va, size_t mem_size, 64 void *mem_va, size_t mem_size,
65 unsigned int mem_flags, unsigned int stack, 65 unsigned int mem_flags, unsigned int stack,
66 unsigned int buffer_size_enum); 66 unsigned int buffer_size_enum);
67 67
68 68
69int gxio_mpipe_alloc_notif_rings(gxio_mpipe_context_t * context, 69int gxio_mpipe_alloc_notif_rings(gxio_mpipe_context_t *context,
70 unsigned int count, unsigned int first, 70 unsigned int count, unsigned int first,
71 unsigned int flags); 71 unsigned int flags);
72 72
73int gxio_mpipe_init_notif_ring_aux(gxio_mpipe_context_t * context, void *mem_va, 73int gxio_mpipe_init_notif_ring_aux(gxio_mpipe_context_t *context, void *mem_va,
74 size_t mem_size, unsigned int mem_flags, 74 size_t mem_size, unsigned int mem_flags,
75 unsigned int ring); 75 unsigned int ring);
76 76
77int gxio_mpipe_request_notif_ring_interrupt(gxio_mpipe_context_t * context, 77int gxio_mpipe_request_notif_ring_interrupt(gxio_mpipe_context_t *context,
78 int inter_x, int inter_y, 78 int inter_x, int inter_y,
79 int inter_ipi, int inter_event, 79 int inter_ipi, int inter_event,
80 unsigned int ring); 80 unsigned int ring);
81 81
82int gxio_mpipe_enable_notif_ring_interrupt(gxio_mpipe_context_t * context, 82int gxio_mpipe_enable_notif_ring_interrupt(gxio_mpipe_context_t *context,
83 unsigned int ring); 83 unsigned int ring);
84 84
85int gxio_mpipe_alloc_notif_groups(gxio_mpipe_context_t * context, 85int gxio_mpipe_alloc_notif_groups(gxio_mpipe_context_t *context,
86 unsigned int count, unsigned int first, 86 unsigned int count, unsigned int first,
87 unsigned int flags); 87 unsigned int flags);
88 88
89int gxio_mpipe_init_notif_group(gxio_mpipe_context_t * context, 89int gxio_mpipe_init_notif_group(gxio_mpipe_context_t *context,
90 unsigned int group, 90 unsigned int group,
91 gxio_mpipe_notif_group_bits_t bits); 91 gxio_mpipe_notif_group_bits_t bits);
92 92
93int gxio_mpipe_alloc_buckets(gxio_mpipe_context_t * context, unsigned int count, 93int gxio_mpipe_alloc_buckets(gxio_mpipe_context_t *context, unsigned int count,
94 unsigned int first, unsigned int flags); 94 unsigned int first, unsigned int flags);
95 95
96int gxio_mpipe_init_bucket(gxio_mpipe_context_t * context, unsigned int bucket, 96int gxio_mpipe_init_bucket(gxio_mpipe_context_t *context, unsigned int bucket,
97 MPIPE_LBL_INIT_DAT_BSTS_TBL_t bucket_info); 97 MPIPE_LBL_INIT_DAT_BSTS_TBL_t bucket_info);
98 98
99int gxio_mpipe_alloc_edma_rings(gxio_mpipe_context_t * context, 99int gxio_mpipe_alloc_edma_rings(gxio_mpipe_context_t *context,
100 unsigned int count, unsigned int first, 100 unsigned int count, unsigned int first,
101 unsigned int flags); 101 unsigned int flags);
102 102
103int gxio_mpipe_init_edma_ring_aux(gxio_mpipe_context_t * context, void *mem_va, 103int gxio_mpipe_init_edma_ring_aux(gxio_mpipe_context_t *context, void *mem_va,
104 size_t mem_size, unsigned int mem_flags, 104 size_t mem_size, unsigned int mem_flags,
105 unsigned int ring, unsigned int channel); 105 unsigned int ring, unsigned int channel);
106 106
107 107
108int gxio_mpipe_commit_rules(gxio_mpipe_context_t * context, const void *blob, 108int gxio_mpipe_commit_rules(gxio_mpipe_context_t *context, const void *blob,
109 size_t blob_size); 109 size_t blob_size);
110 110
111int gxio_mpipe_register_client_memory(gxio_mpipe_context_t * context, 111int gxio_mpipe_register_client_memory(gxio_mpipe_context_t *context,
112 unsigned int iotlb, HV_PTE pte, 112 unsigned int iotlb, HV_PTE pte,
113 unsigned int flags); 113 unsigned int flags);
114 114
115int gxio_mpipe_link_open_aux(gxio_mpipe_context_t * context, 115int gxio_mpipe_link_open_aux(gxio_mpipe_context_t *context,
116 _gxio_mpipe_link_name_t name, unsigned int flags); 116 _gxio_mpipe_link_name_t name, unsigned int flags);
117 117
118int gxio_mpipe_link_close_aux(gxio_mpipe_context_t * context, int mac); 118int gxio_mpipe_link_close_aux(gxio_mpipe_context_t *context, int mac);
119 119
120int gxio_mpipe_link_set_attr_aux(gxio_mpipe_context_t * context, int mac, 120int gxio_mpipe_link_set_attr_aux(gxio_mpipe_context_t *context, int mac,
121 uint32_t attr, int64_t val); 121 uint32_t attr, int64_t val);
122 122
123int gxio_mpipe_get_timestamp_aux(gxio_mpipe_context_t * context, uint64_t * sec, 123int gxio_mpipe_get_timestamp_aux(gxio_mpipe_context_t *context, uint64_t *sec,
124 uint64_t * nsec, uint64_t * cycles); 124 uint64_t *nsec, uint64_t *cycles);
125 125
126int gxio_mpipe_set_timestamp_aux(gxio_mpipe_context_t * context, uint64_t sec, 126int gxio_mpipe_set_timestamp_aux(gxio_mpipe_context_t *context, uint64_t sec,
127 uint64_t nsec, uint64_t cycles); 127 uint64_t nsec, uint64_t cycles);
128 128
129int gxio_mpipe_adjust_timestamp_aux(gxio_mpipe_context_t * context, 129int gxio_mpipe_adjust_timestamp_aux(gxio_mpipe_context_t *context,
130 int64_t nsec); 130 int64_t nsec);
131 131
132int gxio_mpipe_adjust_timestamp_freq(gxio_mpipe_context_t * context, 132int gxio_mpipe_adjust_timestamp_freq(gxio_mpipe_context_t *context,
133 int32_t ppb); 133 int32_t ppb);
134 134
135int gxio_mpipe_arm_pollfd(gxio_mpipe_context_t * context, int pollfd_cookie); 135int gxio_mpipe_arm_pollfd(gxio_mpipe_context_t *context, int pollfd_cookie);
136 136
137int gxio_mpipe_close_pollfd(gxio_mpipe_context_t * context, int pollfd_cookie); 137int gxio_mpipe_close_pollfd(gxio_mpipe_context_t *context, int pollfd_cookie);
138 138
139int gxio_mpipe_get_mmio_base(gxio_mpipe_context_t * context, HV_PTE *base); 139int gxio_mpipe_get_mmio_base(gxio_mpipe_context_t *context, HV_PTE *base);
140 140
141int gxio_mpipe_check_mmio_offset(gxio_mpipe_context_t * context, 141int gxio_mpipe_check_mmio_offset(gxio_mpipe_context_t *context,
142 unsigned long offset, unsigned long size); 142 unsigned long offset, unsigned long size);
143 143
144#endif /* !__GXIO_MPIPE_LINUX_RPC_H__ */ 144#endif /* !__GXIO_MPIPE_LINUX_RPC_H__ */
diff --git a/arch/tile/include/gxio/iorpc_mpipe_info.h b/arch/tile/include/gxio/iorpc_mpipe_info.h
index 476c5e5ca22c..f0b04284468b 100644
--- a/arch/tile/include/gxio/iorpc_mpipe_info.h
+++ b/arch/tile/include/gxio/iorpc_mpipe_info.h
@@ -33,18 +33,18 @@
33#define GXIO_MPIPE_INFO_OP_CHECK_MMIO_OFFSET IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8001) 33#define GXIO_MPIPE_INFO_OP_CHECK_MMIO_OFFSET IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8001)
34 34
35 35
36int gxio_mpipe_info_instance_aux(gxio_mpipe_info_context_t * context, 36int gxio_mpipe_info_instance_aux(gxio_mpipe_info_context_t *context,
37 _gxio_mpipe_link_name_t name); 37 _gxio_mpipe_link_name_t name);
38 38
39int gxio_mpipe_info_enumerate_aux(gxio_mpipe_info_context_t * context, 39int gxio_mpipe_info_enumerate_aux(gxio_mpipe_info_context_t *context,
40 unsigned int idx, 40 unsigned int idx,
41 _gxio_mpipe_link_name_t * name, 41 _gxio_mpipe_link_name_t *name,
42 _gxio_mpipe_link_mac_t * mac); 42 _gxio_mpipe_link_mac_t *mac);
43 43
44int gxio_mpipe_info_get_mmio_base(gxio_mpipe_info_context_t * context, 44int gxio_mpipe_info_get_mmio_base(gxio_mpipe_info_context_t *context,
45 HV_PTE *base); 45 HV_PTE *base);
46 46
47int gxio_mpipe_info_check_mmio_offset(gxio_mpipe_info_context_t * context, 47int gxio_mpipe_info_check_mmio_offset(gxio_mpipe_info_context_t *context,
48 unsigned long offset, unsigned long size); 48 unsigned long offset, unsigned long size);
49 49
50#endif /* !__GXIO_MPIPE_INFO_LINUX_RPC_H__ */ 50#endif /* !__GXIO_MPIPE_INFO_LINUX_RPC_H__ */
diff --git a/arch/tile/include/gxio/iorpc_trio.h b/arch/tile/include/gxio/iorpc_trio.h
index d95b96fd6c93..376a4f771167 100644
--- a/arch/tile/include/gxio/iorpc_trio.h
+++ b/arch/tile/include/gxio/iorpc_trio.h
@@ -46,59 +46,59 @@
46#define GXIO_TRIO_OP_GET_MMIO_BASE IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8000) 46#define GXIO_TRIO_OP_GET_MMIO_BASE IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8000)
47#define GXIO_TRIO_OP_CHECK_MMIO_OFFSET IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8001) 47#define GXIO_TRIO_OP_CHECK_MMIO_OFFSET IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8001)
48 48
49int gxio_trio_alloc_asids(gxio_trio_context_t * context, unsigned int count, 49int gxio_trio_alloc_asids(gxio_trio_context_t *context, unsigned int count,
50 unsigned int first, unsigned int flags); 50 unsigned int first, unsigned int flags);
51 51
52 52
53int gxio_trio_alloc_memory_maps(gxio_trio_context_t * context, 53int gxio_trio_alloc_memory_maps(gxio_trio_context_t *context,
54 unsigned int count, unsigned int first, 54 unsigned int count, unsigned int first,
55 unsigned int flags); 55 unsigned int flags);
56 56
57 57
58int gxio_trio_alloc_scatter_queues(gxio_trio_context_t * context, 58int gxio_trio_alloc_scatter_queues(gxio_trio_context_t *context,
59 unsigned int count, unsigned int first, 59 unsigned int count, unsigned int first,
60 unsigned int flags); 60 unsigned int flags);
61 61
62int gxio_trio_alloc_pio_regions(gxio_trio_context_t * context, 62int gxio_trio_alloc_pio_regions(gxio_trio_context_t *context,
63 unsigned int count, unsigned int first, 63 unsigned int count, unsigned int first,
64 unsigned int flags); 64 unsigned int flags);
65 65
66int gxio_trio_init_pio_region_aux(gxio_trio_context_t * context, 66int gxio_trio_init_pio_region_aux(gxio_trio_context_t *context,
67 unsigned int pio_region, unsigned int mac, 67 unsigned int pio_region, unsigned int mac,
68 uint32_t bus_address_hi, unsigned int flags); 68 uint32_t bus_address_hi, unsigned int flags);
69 69
70 70
71int gxio_trio_init_memory_map_mmu_aux(gxio_trio_context_t * context, 71int gxio_trio_init_memory_map_mmu_aux(gxio_trio_context_t *context,
72 unsigned int map, unsigned long va, 72 unsigned int map, unsigned long va,
73 uint64_t size, unsigned int asid, 73 uint64_t size, unsigned int asid,
74 unsigned int mac, uint64_t bus_address, 74 unsigned int mac, uint64_t bus_address,
75 unsigned int node, 75 unsigned int node,
76 unsigned int order_mode); 76 unsigned int order_mode);
77 77
78int gxio_trio_get_port_property(gxio_trio_context_t * context, 78int gxio_trio_get_port_property(gxio_trio_context_t *context,
79 struct pcie_trio_ports_property *trio_ports); 79 struct pcie_trio_ports_property *trio_ports);
80 80
81int gxio_trio_config_legacy_intr(gxio_trio_context_t * context, int inter_x, 81int gxio_trio_config_legacy_intr(gxio_trio_context_t *context, int inter_x,
82 int inter_y, int inter_ipi, int inter_event, 82 int inter_y, int inter_ipi, int inter_event,
83 unsigned int mac, unsigned int intx); 83 unsigned int mac, unsigned int intx);
84 84
85int gxio_trio_config_msi_intr(gxio_trio_context_t * context, int inter_x, 85int gxio_trio_config_msi_intr(gxio_trio_context_t *context, int inter_x,
86 int inter_y, int inter_ipi, int inter_event, 86 int inter_y, int inter_ipi, int inter_event,
87 unsigned int mac, unsigned int mem_map, 87 unsigned int mac, unsigned int mem_map,
88 uint64_t mem_map_base, uint64_t mem_map_limit, 88 uint64_t mem_map_base, uint64_t mem_map_limit,
89 unsigned int asid); 89 unsigned int asid);
90 90
91 91
92int gxio_trio_set_mps_mrs(gxio_trio_context_t * context, uint16_t mps, 92int gxio_trio_set_mps_mrs(gxio_trio_context_t *context, uint16_t mps,
93 uint16_t mrs, unsigned int mac); 93 uint16_t mrs, unsigned int mac);
94 94
95int gxio_trio_force_rc_link_up(gxio_trio_context_t * context, unsigned int mac); 95int gxio_trio_force_rc_link_up(gxio_trio_context_t *context, unsigned int mac);
96 96
97int gxio_trio_force_ep_link_up(gxio_trio_context_t * context, unsigned int mac); 97int gxio_trio_force_ep_link_up(gxio_trio_context_t *context, unsigned int mac);
98 98
99int gxio_trio_get_mmio_base(gxio_trio_context_t * context, HV_PTE *base); 99int gxio_trio_get_mmio_base(gxio_trio_context_t *context, HV_PTE *base);
100 100
101int gxio_trio_check_mmio_offset(gxio_trio_context_t * context, 101int gxio_trio_check_mmio_offset(gxio_trio_context_t *context,
102 unsigned long offset, unsigned long size); 102 unsigned long offset, unsigned long size);
103 103
104#endif /* !__GXIO_TRIO_LINUX_RPC_H__ */ 104#endif /* !__GXIO_TRIO_LINUX_RPC_H__ */
diff --git a/arch/tile/include/gxio/iorpc_usb_host.h b/arch/tile/include/gxio/iorpc_usb_host.h
index 8622e7d126ad..79962a97de8e 100644
--- a/arch/tile/include/gxio/iorpc_usb_host.h
+++ b/arch/tile/include/gxio/iorpc_usb_host.h
@@ -31,16 +31,16 @@
31#define GXIO_USB_HOST_OP_GET_MMIO_BASE IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8000) 31#define GXIO_USB_HOST_OP_GET_MMIO_BASE IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8000)
32#define GXIO_USB_HOST_OP_CHECK_MMIO_OFFSET IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8001) 32#define GXIO_USB_HOST_OP_CHECK_MMIO_OFFSET IORPC_OPCODE(IORPC_FORMAT_NONE_NOUSER, 0x8001)
33 33
34int gxio_usb_host_cfg_interrupt(gxio_usb_host_context_t * context, int inter_x, 34int gxio_usb_host_cfg_interrupt(gxio_usb_host_context_t *context, int inter_x,
35 int inter_y, int inter_ipi, int inter_event); 35 int inter_y, int inter_ipi, int inter_event);
36 36
37int gxio_usb_host_register_client_memory(gxio_usb_host_context_t * context, 37int gxio_usb_host_register_client_memory(gxio_usb_host_context_t *context,
38 HV_PTE pte, unsigned int flags); 38 HV_PTE pte, unsigned int flags);
39 39
40int gxio_usb_host_get_mmio_base(gxio_usb_host_context_t * context, 40int gxio_usb_host_get_mmio_base(gxio_usb_host_context_t *context,
41 HV_PTE *base); 41 HV_PTE *base);
42 42
43int gxio_usb_host_check_mmio_offset(gxio_usb_host_context_t * context, 43int gxio_usb_host_check_mmio_offset(gxio_usb_host_context_t *context,
44 unsigned long offset, unsigned long size); 44 unsigned long offset, unsigned long size);
45 45
46#endif /* !__GXIO_USB_HOST_LINUX_RPC_H__ */ 46#endif /* !__GXIO_USB_HOST_LINUX_RPC_H__ */
diff --git a/arch/tile/include/gxio/usb_host.h b/arch/tile/include/gxio/usb_host.h
index 5eedec0e988e..93c9636d2dd7 100644
--- a/arch/tile/include/gxio/usb_host.h
+++ b/arch/tile/include/gxio/usb_host.h
@@ -53,7 +53,7 @@ typedef struct {
53 * @return Zero if the context was successfully initialized, else a 53 * @return Zero if the context was successfully initialized, else a
54 * GXIO_ERR_xxx error code. 54 * GXIO_ERR_xxx error code.
55 */ 55 */
56extern int gxio_usb_host_init(gxio_usb_host_context_t * context, int usb_index, 56extern int gxio_usb_host_init(gxio_usb_host_context_t *context, int usb_index,
57 int is_ehci); 57 int is_ehci);
58 58
59/* Destroy a USB context. 59/* Destroy a USB context.
@@ -68,20 +68,20 @@ extern int gxio_usb_host_init(gxio_usb_host_context_t * context, int usb_index,
68 * @return Zero if the context was successfully destroyed, else a 68 * @return Zero if the context was successfully destroyed, else a
69 * GXIO_ERR_xxx error code. 69 * GXIO_ERR_xxx error code.
70 */ 70 */
71extern int gxio_usb_host_destroy(gxio_usb_host_context_t * context); 71extern int gxio_usb_host_destroy(gxio_usb_host_context_t *context);
72 72
73/* Retrieve the address of the shim's MMIO registers. 73/* Retrieve the address of the shim's MMIO registers.
74 * 74 *
75 * @param context Pointer to a properly initialized gxio_usb_host_context_t. 75 * @param context Pointer to a properly initialized gxio_usb_host_context_t.
76 * @return The address of the shim's MMIO registers. 76 * @return The address of the shim's MMIO registers.
77 */ 77 */
78extern void *gxio_usb_host_get_reg_start(gxio_usb_host_context_t * context); 78extern void *gxio_usb_host_get_reg_start(gxio_usb_host_context_t *context);
79 79
80/* Retrieve the length of the shim's MMIO registers. 80/* Retrieve the length of the shim's MMIO registers.
81 * 81 *
82 * @param context Pointer to a properly initialized gxio_usb_host_context_t. 82 * @param context Pointer to a properly initialized gxio_usb_host_context_t.
83 * @return The length of the shim's MMIO registers. 83 * @return The length of the shim's MMIO registers.
84 */ 84 */
85extern size_t gxio_usb_host_get_reg_len(gxio_usb_host_context_t * context); 85extern size_t gxio_usb_host_get_reg_len(gxio_usb_host_context_t *context);
86 86
87#endif /* _GXIO_USB_H_ */ 87#endif /* _GXIO_USB_H_ */
diff --git a/arch/tile/kernel/compat.c b/arch/tile/kernel/compat.c
index ed378416b86a..49120843ff96 100644
--- a/arch/tile/kernel/compat.c
+++ b/arch/tile/kernel/compat.c
@@ -84,7 +84,7 @@ COMPAT_SYSCALL_DEFINE5(llseek, unsigned int, fd, unsigned int, offset_high,
84{ 84{
85 return sys_llseek(fd, offset_high, offset_low, result, origin); 85 return sys_llseek(fd, offset_high, offset_low, result, origin);
86} 86}
87 87
88/* Provide the compat syscall number to call mapping. */ 88/* Provide the compat syscall number to call mapping. */
89#undef __SYSCALL 89#undef __SYSCALL
90#define __SYSCALL(nr, call) [nr] = (call), 90#define __SYSCALL(nr, call) [nr] = (call),
diff --git a/arch/tile/kernel/futex_64.S b/arch/tile/kernel/futex_64.S
deleted file mode 100644
index f465d1eda20f..000000000000
--- a/arch/tile/kernel/futex_64.S
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * Copyright 2011 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 *
14 * Atomically access user memory, but use MMU to avoid propagating
15 * kernel exceptions.
16 */
17
18#include <linux/linkage.h>
19#include <asm/errno.h>
20#include <asm/futex.h>
21#include <asm/page.h>
22#include <asm/processor.h>
23
24/*
25 * Provide a set of atomic memory operations supporting <asm/futex.h>.
26 *
27 * r0: user address to manipulate
28 * r1: new value to write, or for cmpxchg, old value to compare against
29 * r2: (cmpxchg only) new value to write
30 *
31 * Return __get_user struct, r0 with value, r1 with error.
32 */
33#define FUTEX_OP(name, ...) \
34STD_ENTRY(futex_##name) \
35 __VA_ARGS__; \
36 { \
37 move r1, zero; \
38 jrp lr \
39 }; \
40 STD_ENDPROC(futex_##name); \
41 .pushsection __ex_table,"a"; \
42 .quad 1b, get_user_fault; \
43 .popsection
44
45 .pushsection .fixup,"ax"
46get_user_fault:
47 { movei r1, -EFAULT; jrp lr }
48 ENDPROC(get_user_fault)
49 .popsection
50
51FUTEX_OP(cmpxchg, mtspr CMPEXCH_VALUE, r1; 1: cmpexch4 r0, r0, r2)
52FUTEX_OP(set, 1: exch4 r0, r0, r1)
53FUTEX_OP(add, 1: fetchadd4 r0, r0, r1)
54FUTEX_OP(or, 1: fetchor4 r0, r0, r1)
55FUTEX_OP(andn, nor r1, r1, zero; 1: fetchand4 r0, r0, r1)
diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c
index 4c34caea9dd3..74c91729a62a 100644
--- a/arch/tile/kernel/setup.c
+++ b/arch/tile/kernel/setup.c
@@ -1268,8 +1268,7 @@ static void __init validate_va(void)
1268 if ((long)VMALLOC_START >= 0) 1268 if ((long)VMALLOC_START >= 0)
1269 early_panic( 1269 early_panic(
1270 "Linux VMALLOC region below the 2GB line (%#lx)!\n" 1270 "Linux VMALLOC region below the 2GB line (%#lx)!\n"
1271 "Reconfigure the kernel with fewer NR_HUGE_VMAPS\n" 1271 "Reconfigure the kernel with smaller VMALLOC_RESERVE.\n",
1272 "or smaller VMALLOC_RESERVE.\n",
1273 VMALLOC_START); 1272 VMALLOC_START);
1274#endif 1273#endif
1275} 1274}
diff --git a/arch/tile/kernel/unaligned.c b/arch/tile/kernel/unaligned.c
index b425fb6a480d..b030b4e78845 100644
--- a/arch/tile/kernel/unaligned.c
+++ b/arch/tile/kernel/unaligned.c
@@ -551,8 +551,8 @@ static tilegx_bundle_bits jit_x1_bnezt(int ra, int broff)
551/* 551/*
552 * This function generates unalign fixup JIT. 552 * This function generates unalign fixup JIT.
553 * 553 *
554 * We fist find unalign load/store instruction's destination, source 554 * We first find unalign load/store instruction's destination, source
555 * reguisters: ra, rb and rd. and 3 scratch registers by calling 555 * registers: ra, rb and rd. and 3 scratch registers by calling
556 * find_regs(...). 3 scratch clobbers should not alias with any register 556 * find_regs(...). 3 scratch clobbers should not alias with any register
557 * used in the fault bundle. Then analyze the fault bundle to determine 557 * used in the fault bundle. Then analyze the fault bundle to determine
558 * if it's a load or store, operand width, branch or address increment etc. 558 * if it's a load or store, operand width, branch or address increment etc.
diff --git a/arch/tile/mm/fault.c b/arch/tile/mm/fault.c
index 4c288f199453..6c0571216a9d 100644
--- a/arch/tile/mm/fault.c
+++ b/arch/tile/mm/fault.c
@@ -149,8 +149,6 @@ static inline int vmalloc_fault(pgd_t *pgd, unsigned long address)
149 pmd_k = vmalloc_sync_one(pgd, address); 149 pmd_k = vmalloc_sync_one(pgd, address);
150 if (!pmd_k) 150 if (!pmd_k)
151 return -1; 151 return -1;
152 if (pmd_huge(*pmd_k))
153 return 0; /* support TILE huge_vmap() API */
154 pte_k = pte_offset_kernel(pmd_k, address); 152 pte_k = pte_offset_kernel(pmd_k, address);
155 if (!pte_present(*pte_k)) 153 if (!pte_present(*pte_k))
156 return -1; 154 return -1;
diff --git a/arch/tile/mm/init.c b/arch/tile/mm/init.c
index 4e316deb92fd..0fa1acfac79a 100644
--- a/arch/tile/mm/init.c
+++ b/arch/tile/mm/init.c
@@ -828,10 +828,6 @@ void __init mem_init(void)
828 printk(KERN_DEBUG " PKMAP %#lx - %#lx\n", 828 printk(KERN_DEBUG " PKMAP %#lx - %#lx\n",
829 PKMAP_BASE, PKMAP_ADDR(LAST_PKMAP) - 1); 829 PKMAP_BASE, PKMAP_ADDR(LAST_PKMAP) - 1);
830#endif 830#endif
831#ifdef CONFIG_HUGEVMAP
832 printk(KERN_DEBUG " HUGEMAP %#lx - %#lx\n",
833 HUGE_VMAP_BASE, HUGE_VMAP_END - 1);
834#endif
835 printk(KERN_DEBUG " VMALLOC %#lx - %#lx\n", 831 printk(KERN_DEBUG " VMALLOC %#lx - %#lx\n",
836 _VMALLOC_START, _VMALLOC_END - 1); 832 _VMALLOC_START, _VMALLOC_END - 1);
837#ifdef __tilegx__ 833#ifdef __tilegx__
diff --git a/arch/tile/mm/pgtable.c b/arch/tile/mm/pgtable.c
index 2deaddf3e01f..4fd9ec0b58ed 100644
--- a/arch/tile/mm/pgtable.c
+++ b/arch/tile/mm/pgtable.c
@@ -127,8 +127,7 @@ void shatter_huge_page(unsigned long addr)
127 } 127 }
128 128
129 /* Shatter the huge page into the preallocated L2 page table. */ 129 /* Shatter the huge page into the preallocated L2 page table. */
130 pmd_populate_kernel(&init_mm, pmd, 130 pmd_populate_kernel(&init_mm, pmd, get_prealloc_pte(pmd_pfn(*pmd)));
131 get_prealloc_pte(pte_pfn(*(pte_t *)pmd)));
132 131
133#ifdef __PAGETABLE_PMD_FOLDED 132#ifdef __PAGETABLE_PMD_FOLDED
134 /* Walk every pgd on the system and update the pmd there. */ 133 /* Walk every pgd on the system and update the pmd there. */