aboutsummaryrefslogtreecommitdiffstats
path: root/arch/tile/include/asm/uaccess.h
diff options
context:
space:
mode:
Diffstat (limited to 'arch/tile/include/asm/uaccess.h')
-rw-r--r--arch/tile/include/asm/uaccess.h31
1 files changed, 0 insertions, 31 deletions
diff --git a/arch/tile/include/asm/uaccess.h b/arch/tile/include/asm/uaccess.h
index e4d44bd7df27..f68503f8e0aa 100644
--- a/arch/tile/include/asm/uaccess.h
+++ b/arch/tile/include/asm/uaccess.h
@@ -567,37 +567,6 @@ static inline unsigned long __must_check flush_user(
567} 567}
568 568
569/** 569/**
570 * inv_user: - Invalidate a block of memory in user space from cache.
571 * @mem: Destination address, in user space.
572 * @len: Number of bytes to invalidate.
573 *
574 * Returns number of bytes that could not be invalidated.
575 * On success, this will be zero.
576 *
577 * Note that on Tile64, the "inv" operation is in fact a
578 * "flush and invalidate", so cache write-backs will occur prior
579 * to the cache being marked invalid.
580 */
581extern unsigned long inv_user_asm(void __user *mem, unsigned long len);
582static inline unsigned long __must_check __inv_user(
583 void __user *mem, unsigned long len)
584{
585 int retval;
586
587 might_fault();
588 retval = inv_user_asm(mem, len);
589 mb_incoherent();
590 return retval;
591}
592static inline unsigned long __must_check inv_user(
593 void __user *mem, unsigned long len)
594{
595 if (access_ok(VERIFY_WRITE, mem, len))
596 return __inv_user(mem, len);
597 return len;
598}
599
600/**
601 * finv_user: - Flush-inval a block of memory in user space from cache. 570 * finv_user: - Flush-inval a block of memory in user space from cache.
602 * @mem: Destination address, in user space. 571 * @mem: Destination address, in user space.
603 * @len: Number of bytes to invalidate. 572 * @len: Number of bytes to invalidate.