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-rw-r--r--arch/sparc64/kernel/pci.c133
-rw-r--r--arch/sparc64/kernel/pci_psycho.c34
-rw-r--r--arch/sparc64/kernel/pci_sabre.c36
-rw-r--r--arch/sparc64/kernel/pci_schizo.c48
4 files changed, 64 insertions, 187 deletions
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index 9c17591c2a79..2ff7c32ab0ce 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -359,140 +359,17 @@ void pcibios_fixup_bus(struct pci_bus *pbus)
359 pbus->resource[1] = &pbm->mem_space; 359 pbus->resource[1] = &pbm->mem_space;
360} 360}
361 361
362int pci_claim_resource(struct pci_dev *pdev, int resource) 362struct resource *pcibios_select_root(struct pci_dev *pdev, struct resource *r)
363{ 363{
364 struct pci_pbm_info *pbm = pdev->bus->sysdata; 364 struct pci_pbm_info *pbm = pdev->bus->sysdata;
365 struct resource *res = &pdev->resource[resource]; 365 struct resource *root = NULL;
366 struct resource *root;
367
368 if (!pbm)
369 return -EINVAL;
370 366
371 if (res->flags & IORESOURCE_IO) 367 if (r->flags & IORESOURCE_IO)
372 root = &pbm->io_space; 368 root = &pbm->io_space;
373 else 369 if (r->flags & IORESOURCE_MEM)
374 root = &pbm->mem_space; 370 root = &pbm->mem_space;
375 371
376 pbm->parent->resource_adjust(pdev, res, root); 372 return root;
377
378 return request_resource(root, res);
379}
380
381/*
382 * Given the PCI bus a device resides on, try to
383 * find an acceptable resource allocation for a
384 * specific device resource..
385 */
386static int pci_assign_bus_resource(const struct pci_bus *bus,
387 struct pci_dev *dev,
388 struct resource *res,
389 unsigned long size,
390 unsigned long min,
391 int resno)
392{
393 unsigned int type_mask;
394 int i;
395
396 type_mask = IORESOURCE_IO | IORESOURCE_MEM;
397 for (i = 0 ; i < 4; i++) {
398 struct resource *r = bus->resource[i];
399 if (!r)
400 continue;
401
402 /* type_mask must match */
403 if ((res->flags ^ r->flags) & type_mask)
404 continue;
405
406 /* Ok, try it out.. */
407 if (allocate_resource(r, res, size, min, -1, size, NULL, NULL) < 0)
408 continue;
409
410 /* PCI config space updated by caller. */
411 return 0;
412 }
413 return -EBUSY;
414}
415
416void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno)
417{
418 /* Not implemented for sparc64... */
419 BUG();
420}
421
422int pci_assign_resource(struct pci_dev *pdev, int resource)
423{
424 struct pcidev_cookie *pcp = pdev->sysdata;
425 struct pci_pbm_info *pbm = pcp->pbm;
426 struct resource *res = &pdev->resource[resource];
427 unsigned long min, size;
428 int err;
429
430 if (res->flags & IORESOURCE_IO)
431 min = pbm->io_space.start + 0x400UL;
432 else
433 min = pbm->mem_space.start;
434
435 size = res->end - res->start + 1;
436
437 err = pci_assign_bus_resource(pdev->bus, pdev, res, size, min, resource);
438
439 if (err < 0) {
440 printk("PCI: Failed to allocate resource %d for %s\n",
441 resource, pci_name(pdev));
442 } else {
443 /* Update PCI config space. */
444 pbm->parent->base_address_update(pdev, resource);
445 }
446
447 return err;
448}
449
450/* Sort resources by alignment */
451void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
452{
453 int i;
454
455 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
456 struct resource *r;
457 struct resource_list *list, *tmp;
458 unsigned long r_align;
459
460 r = &dev->resource[i];
461 r_align = r->end - r->start;
462
463 if (!(r->flags) || r->parent)
464 continue;
465 if (!r_align) {
466 printk(KERN_WARNING "PCI: Ignore bogus resource %d "
467 "[%lx:%lx] of %s\n",
468 i, r->start, r->end, pci_name(dev));
469 continue;
470 }
471 r_align = (i < PCI_BRIDGE_RESOURCES) ? r_align + 1 : r->start;
472 for (list = head; ; list = list->next) {
473 unsigned long align = 0;
474 struct resource_list *ln = list->next;
475 int idx;
476
477 if (ln) {
478 idx = ln->res - &ln->dev->resource[0];
479 align = (idx < PCI_BRIDGE_RESOURCES) ?
480 ln->res->end - ln->res->start + 1 :
481 ln->res->start;
482 }
483 if (r_align > align) {
484 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
485 if (!tmp)
486 panic("pdev_sort_resources(): "
487 "kmalloc() failed!\n");
488 tmp->next = ln;
489 tmp->res = r;
490 tmp->dev = dev;
491 list->next = tmp;
492 break;
493 }
494 }
495 }
496} 373}
497 374
498void pcibios_update_irq(struct pci_dev *pdev, int irq) 375void pcibios_update_irq(struct pci_dev *pdev, int irq)
diff --git a/arch/sparc64/kernel/pci_psycho.c b/arch/sparc64/kernel/pci_psycho.c
index 91ab466d6c66..6ed1ef25e0ac 100644
--- a/arch/sparc64/kernel/pci_psycho.c
+++ b/arch/sparc64/kernel/pci_psycho.c
@@ -307,7 +307,7 @@ static unsigned char psycho_pil_table[] = {
307/*0x32*/15, /* Power Management */ 307/*0x32*/15, /* Power Management */
308}; 308};
309 309
310static int __init psycho_ino_to_pil(struct pci_dev *pdev, unsigned int ino) 310static int psycho_ino_to_pil(struct pci_dev *pdev, unsigned int ino)
311{ 311{
312 int ret; 312 int ret;
313 313
@@ -344,9 +344,9 @@ static int __init psycho_ino_to_pil(struct pci_dev *pdev, unsigned int ino)
344 return ret; 344 return ret;
345} 345}
346 346
347static unsigned int __init psycho_irq_build(struct pci_pbm_info *pbm, 347static unsigned int psycho_irq_build(struct pci_pbm_info *pbm,
348 struct pci_dev *pdev, 348 struct pci_dev *pdev,
349 unsigned int ino) 349 unsigned int ino)
350{ 350{
351 struct ino_bucket *bucket; 351 struct ino_bucket *bucket;
352 unsigned long imap, iclr; 352 unsigned long imap, iclr;
@@ -1024,7 +1024,7 @@ static irqreturn_t psycho_pcierr_intr(int irq, void *dev_id, struct pt_regs *reg
1024#define PSYCHO_CE_INO 0x2f 1024#define PSYCHO_CE_INO 0x2f
1025#define PSYCHO_PCIERR_A_INO 0x30 1025#define PSYCHO_PCIERR_A_INO 0x30
1026#define PSYCHO_PCIERR_B_INO 0x31 1026#define PSYCHO_PCIERR_B_INO 0x31
1027static void __init psycho_register_error_handlers(struct pci_controller_info *p) 1027static void psycho_register_error_handlers(struct pci_controller_info *p)
1028{ 1028{
1029 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */ 1029 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */
1030 unsigned long base = p->pbm_A.controller_regs; 1030 unsigned long base = p->pbm_A.controller_regs;
@@ -1091,15 +1091,15 @@ static void __init psycho_register_error_handlers(struct pci_controller_info *p)
1091} 1091}
1092 1092
1093/* PSYCHO boot time probing and initialization. */ 1093/* PSYCHO boot time probing and initialization. */
1094static void __init psycho_resource_adjust(struct pci_dev *pdev, 1094static void psycho_resource_adjust(struct pci_dev *pdev,
1095 struct resource *res, 1095 struct resource *res,
1096 struct resource *root) 1096 struct resource *root)
1097{ 1097{
1098 res->start += root->start; 1098 res->start += root->start;
1099 res->end += root->start; 1099 res->end += root->start;
1100} 1100}
1101 1101
1102static void __init psycho_base_address_update(struct pci_dev *pdev, int resource) 1102static void psycho_base_address_update(struct pci_dev *pdev, int resource)
1103{ 1103{
1104 struct pcidev_cookie *pcp = pdev->sysdata; 1104 struct pcidev_cookie *pcp = pdev->sysdata;
1105 struct pci_pbm_info *pbm = pcp->pbm; 1105 struct pci_pbm_info *pbm = pcp->pbm;
@@ -1144,7 +1144,7 @@ static void __init psycho_base_address_update(struct pci_dev *pdev, int resource
1144 pci_write_config_dword(pdev, where + 4, 0); 1144 pci_write_config_dword(pdev, where + 4, 0);
1145} 1145}
1146 1146
1147static void __init pbm_config_busmastering(struct pci_pbm_info *pbm) 1147static void pbm_config_busmastering(struct pci_pbm_info *pbm)
1148{ 1148{
1149 u8 *addr; 1149 u8 *addr;
1150 1150
@@ -1161,8 +1161,8 @@ static void __init pbm_config_busmastering(struct pci_pbm_info *pbm)
1161 pci_config_write8(addr, 64); 1161 pci_config_write8(addr, 64);
1162} 1162}
1163 1163
1164static void __init pbm_scan_bus(struct pci_controller_info *p, 1164static void pbm_scan_bus(struct pci_controller_info *p,
1165 struct pci_pbm_info *pbm) 1165 struct pci_pbm_info *pbm)
1166{ 1166{
1167 struct pcidev_cookie *cookie = kmalloc(sizeof(*cookie), GFP_KERNEL); 1167 struct pcidev_cookie *cookie = kmalloc(sizeof(*cookie), GFP_KERNEL);
1168 1168
@@ -1189,7 +1189,7 @@ static void __init pbm_scan_bus(struct pci_controller_info *p,
1189 pci_setup_busmastering(pbm, pbm->pci_bus); 1189 pci_setup_busmastering(pbm, pbm->pci_bus);
1190} 1190}
1191 1191
1192static void __init psycho_scan_bus(struct pci_controller_info *p) 1192static void psycho_scan_bus(struct pci_controller_info *p)
1193{ 1193{
1194 pbm_config_busmastering(&p->pbm_B); 1194 pbm_config_busmastering(&p->pbm_B);
1195 p->pbm_B.is_66mhz_capable = 0; 1195 p->pbm_B.is_66mhz_capable = 0;
@@ -1204,7 +1204,7 @@ static void __init psycho_scan_bus(struct pci_controller_info *p)
1204 psycho_register_error_handlers(p); 1204 psycho_register_error_handlers(p);
1205} 1205}
1206 1206
1207static void __init psycho_iommu_init(struct pci_controller_info *p) 1207static void psycho_iommu_init(struct pci_controller_info *p)
1208{ 1208{
1209 struct pci_iommu *iommu = p->pbm_A.iommu; 1209 struct pci_iommu *iommu = p->pbm_A.iommu;
1210 unsigned long tsbbase, i; 1210 unsigned long tsbbase, i;
@@ -1327,8 +1327,8 @@ static void psycho_controller_hwinit(struct pci_controller_info *p)
1327 psycho_write(p->pbm_A.controller_regs + PSYCHO_PCIB_DIAG, tmp); 1327 psycho_write(p->pbm_A.controller_regs + PSYCHO_PCIB_DIAG, tmp);
1328} 1328}
1329 1329
1330static void __init pbm_register_toplevel_resources(struct pci_controller_info *p, 1330static void pbm_register_toplevel_resources(struct pci_controller_info *p,
1331 struct pci_pbm_info *pbm) 1331 struct pci_pbm_info *pbm)
1332{ 1332{
1333 char *name = pbm->name; 1333 char *name = pbm->name;
1334 1334
@@ -1481,7 +1481,7 @@ static void psycho_pbm_init(struct pci_controller_info *p,
1481 1481
1482#define PSYCHO_CONFIGSPACE 0x001000000UL 1482#define PSYCHO_CONFIGSPACE 0x001000000UL
1483 1483
1484void __init psycho_init(int node, char *model_name) 1484void psycho_init(int node, char *model_name)
1485{ 1485{
1486 struct linux_prom64_registers pr_regs[3]; 1486 struct linux_prom64_registers pr_regs[3];
1487 struct pci_controller_info *p; 1487 struct pci_controller_info *p;
diff --git a/arch/sparc64/kernel/pci_sabre.c b/arch/sparc64/kernel/pci_sabre.c
index 52bf3431a422..0ee6bd5b9ac6 100644
--- a/arch/sparc64/kernel/pci_sabre.c
+++ b/arch/sparc64/kernel/pci_sabre.c
@@ -554,7 +554,7 @@ static unsigned char sabre_pil_table[] = {
554/*0x32*/15, /* Power Management */ 554/*0x32*/15, /* Power Management */
555}; 555};
556 556
557static int __init sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino) 557static int sabre_ino_to_pil(struct pci_dev *pdev, unsigned int ino)
558{ 558{
559 int ret; 559 int ret;
560 560
@@ -612,9 +612,9 @@ static void sabre_wsync_handler(struct ino_bucket *bucket, void *_arg1, void *_a
612 sabre_read(sync_reg); 612 sabre_read(sync_reg);
613} 613}
614 614
615static unsigned int __init sabre_irq_build(struct pci_pbm_info *pbm, 615static unsigned int sabre_irq_build(struct pci_pbm_info *pbm,
616 struct pci_dev *pdev, 616 struct pci_dev *pdev,
617 unsigned int ino) 617 unsigned int ino)
618{ 618{
619 struct ino_bucket *bucket; 619 struct ino_bucket *bucket;
620 unsigned long imap, iclr; 620 unsigned long imap, iclr;
@@ -1009,7 +1009,7 @@ static irqreturn_t sabre_pcierr_intr(int irq, void *dev_id, struct pt_regs *regs
1009#define SABRE_UE_INO 0x2e 1009#define SABRE_UE_INO 0x2e
1010#define SABRE_CE_INO 0x2f 1010#define SABRE_CE_INO 0x2f
1011#define SABRE_PCIERR_INO 0x30 1011#define SABRE_PCIERR_INO 0x30
1012static void __init sabre_register_error_handlers(struct pci_controller_info *p) 1012static void sabre_register_error_handlers(struct pci_controller_info *p)
1013{ 1013{
1014 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */ 1014 struct pci_pbm_info *pbm = &p->pbm_A; /* arbitrary */
1015 unsigned long base = pbm->controller_regs; 1015 unsigned long base = pbm->controller_regs;
@@ -1056,9 +1056,9 @@ static void __init sabre_register_error_handlers(struct pci_controller_info *p)
1056 sabre_write(base + SABRE_PCICTRL, tmp); 1056 sabre_write(base + SABRE_PCICTRL, tmp);
1057} 1057}
1058 1058
1059static void __init sabre_resource_adjust(struct pci_dev *pdev, 1059static void sabre_resource_adjust(struct pci_dev *pdev,
1060 struct resource *res, 1060 struct resource *res,
1061 struct resource *root) 1061 struct resource *root)
1062{ 1062{
1063 struct pci_pbm_info *pbm = pdev->bus->sysdata; 1063 struct pci_pbm_info *pbm = pdev->bus->sysdata;
1064 unsigned long base; 1064 unsigned long base;
@@ -1072,7 +1072,7 @@ static void __init sabre_resource_adjust(struct pci_dev *pdev,
1072 res->end += base; 1072 res->end += base;
1073} 1073}
1074 1074
1075static void __init sabre_base_address_update(struct pci_dev *pdev, int resource) 1075static void sabre_base_address_update(struct pci_dev *pdev, int resource)
1076{ 1076{
1077 struct pcidev_cookie *pcp = pdev->sysdata; 1077 struct pcidev_cookie *pcp = pdev->sysdata;
1078 struct pci_pbm_info *pbm = pcp->pbm; 1078 struct pci_pbm_info *pbm = pcp->pbm;
@@ -1118,7 +1118,7 @@ static void __init sabre_base_address_update(struct pci_dev *pdev, int resource)
1118 pci_write_config_dword(pdev, where + 4, 0); 1118 pci_write_config_dword(pdev, where + 4, 0);
1119} 1119}
1120 1120
1121static void __init apb_init(struct pci_controller_info *p, struct pci_bus *sabre_bus) 1121static void apb_init(struct pci_controller_info *p, struct pci_bus *sabre_bus)
1122{ 1122{
1123 struct pci_dev *pdev; 1123 struct pci_dev *pdev;
1124 1124
@@ -1181,7 +1181,7 @@ static struct pcidev_cookie *alloc_bridge_cookie(struct pci_pbm_info *pbm)
1181 return cookie; 1181 return cookie;
1182} 1182}
1183 1183
1184static void __init sabre_scan_bus(struct pci_controller_info *p) 1184static void sabre_scan_bus(struct pci_controller_info *p)
1185{ 1185{
1186 static int once; 1186 static int once;
1187 struct pci_bus *sabre_bus, *pbus; 1187 struct pci_bus *sabre_bus, *pbus;
@@ -1262,9 +1262,9 @@ static void __init sabre_scan_bus(struct pci_controller_info *p)
1262 sabre_register_error_handlers(p); 1262 sabre_register_error_handlers(p);
1263} 1263}
1264 1264
1265static void __init sabre_iommu_init(struct pci_controller_info *p, 1265static void sabre_iommu_init(struct pci_controller_info *p,
1266 int tsbsize, unsigned long dvma_offset, 1266 int tsbsize, unsigned long dvma_offset,
1267 u32 dma_mask) 1267 u32 dma_mask)
1268{ 1268{
1269 struct pci_iommu *iommu = p->pbm_A.iommu; 1269 struct pci_iommu *iommu = p->pbm_A.iommu;
1270 unsigned long tsbbase, i, order; 1270 unsigned long tsbbase, i, order;
@@ -1345,8 +1345,8 @@ static void __init sabre_iommu_init(struct pci_controller_info *p,
1345 } 1345 }
1346} 1346}
1347 1347
1348static void __init pbm_register_toplevel_resources(struct pci_controller_info *p, 1348static void pbm_register_toplevel_resources(struct pci_controller_info *p,
1349 struct pci_pbm_info *pbm) 1349 struct pci_pbm_info *pbm)
1350{ 1350{
1351 char *name = pbm->name; 1351 char *name = pbm->name;
1352 unsigned long ibase = p->pbm_A.controller_regs + SABRE_IOSPACE; 1352 unsigned long ibase = p->pbm_A.controller_regs + SABRE_IOSPACE;
@@ -1415,7 +1415,7 @@ static void __init pbm_register_toplevel_resources(struct pci_controller_info *p
1415 &pbm->mem_space); 1415 &pbm->mem_space);
1416} 1416}
1417 1417
1418static void __init sabre_pbm_init(struct pci_controller_info *p, int sabre_node, u32 dma_begin) 1418static void sabre_pbm_init(struct pci_controller_info *p, int sabre_node, u32 dma_begin)
1419{ 1419{
1420 struct pci_pbm_info *pbm; 1420 struct pci_pbm_info *pbm;
1421 char namebuf[128]; 1421 char namebuf[128];
@@ -1552,7 +1552,7 @@ static void __init sabre_pbm_init(struct pci_controller_info *p, int sabre_node,
1552 } 1552 }
1553} 1553}
1554 1554
1555void __init sabre_init(int pnode, char *model_name) 1555void sabre_init(int pnode, char *model_name)
1556{ 1556{
1557 struct linux_prom64_registers pr_regs[2]; 1557 struct linux_prom64_registers pr_regs[2];
1558 struct pci_controller_info *p; 1558 struct pci_controller_info *p;
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 6a182bb66281..331382e1a75d 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -285,7 +285,7 @@ static unsigned char schizo_pil_table[] = {
285/*0x3f*/0, /* Reserved for NewLink */ 285/*0x3f*/0, /* Reserved for NewLink */
286}; 286};
287 287
288static int __init schizo_ino_to_pil(struct pci_dev *pdev, unsigned int ino) 288static int schizo_ino_to_pil(struct pci_dev *pdev, unsigned int ino)
289{ 289{
290 int ret; 290 int ret;
291 291
@@ -1221,7 +1221,7 @@ static irqreturn_t schizo_safarierr_intr(int irq, void *dev_id, struct pt_regs *
1221 * PCI bus units of the same Tomatillo. I still have not really 1221 * PCI bus units of the same Tomatillo. I still have not really
1222 * figured this out... 1222 * figured this out...
1223 */ 1223 */
1224static void __init tomatillo_register_error_handlers(struct pci_controller_info *p) 1224static void tomatillo_register_error_handlers(struct pci_controller_info *p)
1225{ 1225{
1226 struct pci_pbm_info *pbm; 1226 struct pci_pbm_info *pbm;
1227 unsigned int irq; 1227 unsigned int irq;
@@ -1359,7 +1359,7 @@ static void __init tomatillo_register_error_handlers(struct pci_controller_info
1359 (SCHIZO_SAFIRQCTRL_EN | (BUS_ERROR_UNMAP))); 1359 (SCHIZO_SAFIRQCTRL_EN | (BUS_ERROR_UNMAP)));
1360} 1360}
1361 1361
1362static void __init schizo_register_error_handlers(struct pci_controller_info *p) 1362static void schizo_register_error_handlers(struct pci_controller_info *p)
1363{ 1363{
1364 struct pci_pbm_info *pbm; 1364 struct pci_pbm_info *pbm;
1365 unsigned int irq; 1365 unsigned int irq;
@@ -1505,7 +1505,7 @@ static void __init schizo_register_error_handlers(struct pci_controller_info *p)
1505 (SCHIZO_SAFIRQCTRL_EN | (BUS_ERROR_UNMAP))); 1505 (SCHIZO_SAFIRQCTRL_EN | (BUS_ERROR_UNMAP)));
1506} 1506}
1507 1507
1508static void __init pbm_config_busmastering(struct pci_pbm_info *pbm) 1508static void pbm_config_busmastering(struct pci_pbm_info *pbm)
1509{ 1509{
1510 u8 *addr; 1510 u8 *addr;
1511 1511
@@ -1522,8 +1522,8 @@ static void __init pbm_config_busmastering(struct pci_pbm_info *pbm)
1522 pci_config_write8(addr, 64); 1522 pci_config_write8(addr, 64);
1523} 1523}
1524 1524
1525static void __init pbm_scan_bus(struct pci_controller_info *p, 1525static void pbm_scan_bus(struct pci_controller_info *p,
1526 struct pci_pbm_info *pbm) 1526 struct pci_pbm_info *pbm)
1527{ 1527{
1528 struct pcidev_cookie *cookie = kmalloc(sizeof(*cookie), GFP_KERNEL); 1528 struct pcidev_cookie *cookie = kmalloc(sizeof(*cookie), GFP_KERNEL);
1529 1529
@@ -1550,8 +1550,8 @@ static void __init pbm_scan_bus(struct pci_controller_info *p,
1550 pci_setup_busmastering(pbm, pbm->pci_bus); 1550 pci_setup_busmastering(pbm, pbm->pci_bus);
1551} 1551}
1552 1552
1553static void __init __schizo_scan_bus(struct pci_controller_info *p, 1553static void __schizo_scan_bus(struct pci_controller_info *p,
1554 int chip_type) 1554 int chip_type)
1555{ 1555{
1556 if (!p->pbm_B.prom_node || !p->pbm_A.prom_node) { 1556 if (!p->pbm_B.prom_node || !p->pbm_A.prom_node) {
1557 printk("PCI: Only one PCI bus module of controller found.\n"); 1557 printk("PCI: Only one PCI bus module of controller found.\n");
@@ -1577,17 +1577,17 @@ static void __init __schizo_scan_bus(struct pci_controller_info *p,
1577 schizo_register_error_handlers(p); 1577 schizo_register_error_handlers(p);
1578} 1578}
1579 1579
1580static void __init schizo_scan_bus(struct pci_controller_info *p) 1580static void schizo_scan_bus(struct pci_controller_info *p)
1581{ 1581{
1582 __schizo_scan_bus(p, PBM_CHIP_TYPE_SCHIZO); 1582 __schizo_scan_bus(p, PBM_CHIP_TYPE_SCHIZO);
1583} 1583}
1584 1584
1585static void __init tomatillo_scan_bus(struct pci_controller_info *p) 1585static void tomatillo_scan_bus(struct pci_controller_info *p)
1586{ 1586{
1587 __schizo_scan_bus(p, PBM_CHIP_TYPE_TOMATILLO); 1587 __schizo_scan_bus(p, PBM_CHIP_TYPE_TOMATILLO);
1588} 1588}
1589 1589
1590static void __init schizo_base_address_update(struct pci_dev *pdev, int resource) 1590static void schizo_base_address_update(struct pci_dev *pdev, int resource)
1591{ 1591{
1592 struct pcidev_cookie *pcp = pdev->sysdata; 1592 struct pcidev_cookie *pcp = pdev->sysdata;
1593 struct pci_pbm_info *pbm = pcp->pbm; 1593 struct pci_pbm_info *pbm = pcp->pbm;
@@ -1632,9 +1632,9 @@ static void __init schizo_base_address_update(struct pci_dev *pdev, int resource
1632 pci_write_config_dword(pdev, where + 4, 0); 1632 pci_write_config_dword(pdev, where + 4, 0);
1633} 1633}
1634 1634
1635static void __init schizo_resource_adjust(struct pci_dev *pdev, 1635static void schizo_resource_adjust(struct pci_dev *pdev,
1636 struct resource *res, 1636 struct resource *res,
1637 struct resource *root) 1637 struct resource *root)
1638{ 1638{
1639 res->start += root->start; 1639 res->start += root->start;
1640 res->end += root->start; 1640 res->end += root->start;
@@ -1702,8 +1702,8 @@ static void schizo_determine_mem_io_space(struct pci_pbm_info *pbm)
1702 pbm->mem_space.start); 1702 pbm->mem_space.start);
1703} 1703}
1704 1704
1705static void __init pbm_register_toplevel_resources(struct pci_controller_info *p, 1705static void pbm_register_toplevel_resources(struct pci_controller_info *p,
1706 struct pci_pbm_info *pbm) 1706 struct pci_pbm_info *pbm)
1707{ 1707{
1708 pbm->io_space.name = pbm->mem_space.name = pbm->name; 1708 pbm->io_space.name = pbm->mem_space.name = pbm->name;
1709 1709
@@ -1932,7 +1932,7 @@ static void schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
1932#define TOMATILLO_PCI_IOC_TDIAG (0x2250UL) 1932#define TOMATILLO_PCI_IOC_TDIAG (0x2250UL)
1933#define TOMATILLO_PCI_IOC_DDIAG (0x2290UL) 1933#define TOMATILLO_PCI_IOC_DDIAG (0x2290UL)
1934 1934
1935static void __init schizo_pbm_hw_init(struct pci_pbm_info *pbm) 1935static void schizo_pbm_hw_init(struct pci_pbm_info *pbm)
1936{ 1936{
1937 u64 tmp; 1937 u64 tmp;
1938 1938
@@ -1986,9 +1986,9 @@ static void __init schizo_pbm_hw_init(struct pci_pbm_info *pbm)
1986 } 1986 }
1987} 1987}
1988 1988
1989static void __init schizo_pbm_init(struct pci_controller_info *p, 1989static void schizo_pbm_init(struct pci_controller_info *p,
1990 int prom_node, u32 portid, 1990 int prom_node, u32 portid,
1991 int chip_type) 1991 int chip_type)
1992{ 1992{
1993 struct linux_prom64_registers pr_regs[4]; 1993 struct linux_prom64_registers pr_regs[4];
1994 unsigned int busrange[2]; 1994 unsigned int busrange[2];
@@ -2145,7 +2145,7 @@ static inline int portid_compare(u32 x, u32 y, int chip_type)
2145 return (x == y); 2145 return (x == y);
2146} 2146}
2147 2147
2148static void __init __schizo_init(int node, char *model_name, int chip_type) 2148static void __schizo_init(int node, char *model_name, int chip_type)
2149{ 2149{
2150 struct pci_controller_info *p; 2150 struct pci_controller_info *p;
2151 struct pci_iommu *iommu; 2151 struct pci_iommu *iommu;
@@ -2213,17 +2213,17 @@ static void __init __schizo_init(int node, char *model_name, int chip_type)
2213 schizo_pbm_init(p, node, portid, chip_type); 2213 schizo_pbm_init(p, node, portid, chip_type);
2214} 2214}
2215 2215
2216void __init schizo_init(int node, char *model_name) 2216void schizo_init(int node, char *model_name)
2217{ 2217{
2218 __schizo_init(node, model_name, PBM_CHIP_TYPE_SCHIZO); 2218 __schizo_init(node, model_name, PBM_CHIP_TYPE_SCHIZO);
2219} 2219}
2220 2220
2221void __init schizo_plus_init(int node, char *model_name) 2221void schizo_plus_init(int node, char *model_name)
2222{ 2222{
2223 __schizo_init(node, model_name, PBM_CHIP_TYPE_SCHIZO_PLUS); 2223 __schizo_init(node, model_name, PBM_CHIP_TYPE_SCHIZO_PLUS);
2224} 2224}
2225 2225
2226void __init tomatillo_init(int node, char *model_name) 2226void tomatillo_init(int node, char *model_name)
2227{ 2227{
2228 __schizo_init(node, model_name, PBM_CHIP_TYPE_TOMATILLO); 2228 __schizo_init(node, model_name, PBM_CHIP_TYPE_TOMATILLO);
2229} 2229}
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-21 22:02:07 -0400