1 files changed, 38 insertions, 4 deletions

diff --git a/arch/sparc/kernel/ktlb.S b/arch/sparc/kernel/ktlb.S
index cef8defcd7a9..3ea6e8cde8c5 100644
--- a/arch/sparc/kernel/ktlb.S
+++ b/arch/sparc/kernel/ktlb.S
@@ -151,12 +151,46 @@ kvmap_dtlb_4v:
          * Must preserve %g1 and %g6 (TAG).
          */
 kvmap_dtlb_tsb4m_miss:
-        sethi           %hi(kpte_linear_bitmap), %g2
-        or              %g2, %lo(kpte_linear_bitmap), %g2
+        /* Clear the PAGE_OFFSET top virtual bits, shift
+         * down to get PFN, and make sure PFN is in range.
+         */
+        sllx            %g4, 21, %g5
 
-        /* Clear the PAGE_OFFSET top virtual bits, then shift
-         * down to get a 256MB physical address index.
+        /* Check to see if we know about valid memory at the 4MB
+         * chunk this physical address will reside within.
          */
+        srlx            %g5, 21 + 41, %g2
+        brnz,pn         %g2, kvmap_dtlb_longpath
+         nop
+
+        /* This unconditional branch and delay-slot nop gets patched
+         * by the sethi sequence once the bitmap is properly setup.
+         */
+        .globl          valid_addr_bitmap_insn
+valid_addr_bitmap_insn:
+        ba,pt           %xcc, 2f
+         nop
+        .subsection     2
+        .globl          valid_addr_bitmap_patch
+valid_addr_bitmap_patch:
+        sethi           %hi(sparc64_valid_addr_bitmap), %g7
+        or              %g7, %lo(sparc64_valid_addr_bitmap), %g7
+        .previous
+
+        srlx            %g5, 21 + 22, %g2
+        srlx            %g2, 6, %g5
+        and             %g2, 63, %g2
+        sllx            %g5, 3, %g5
+        ldx             [%g7 + %g5], %g5
+        mov             1, %g7
+        sllx            %g7, %g2, %g7
+        andcc           %g5, %g7, %g0
+        be,pn           %xcc, kvmap_dtlb_longpath
+
+2:       sethi          %hi(kpte_linear_bitmap), %g2
+        or              %g2, %lo(kpte_linear_bitmap), %g2
+
+        /* Get the 256MB physical address index. */
         sllx            %g4, 21, %g5
         mov             1, %g7
         srlx            %g5, 21 + 28, %g5