8 files changed, 56 insertions, 42 deletions

diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 2eaeb9e59585..f48c492a68d3 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -720,32 +720,6 @@ static struct platform_device camera_devices[] = {
 };
 
 /* FSI */
-/*
- * FSI-B use external clock which came from da7210.
- * So, we should change parent of fsi
- */
-#define FCLKBCR         0xa415000c
-static void fsimck_init(struct clk *clk)
-{
-        u32 status = __raw_readl(clk->enable_reg);
-
-        /* use external clock */
-        status &= ~0x000000ff;
-        status |= 0x00000080;
-
-        __raw_writel(status, clk->enable_reg);
-}
-
-static struct clk_ops fsimck_clk_ops = {
-        .init = fsimck_init,
-};
-
-static struct clk fsimckb_clk = {
-        .ops            = &fsimck_clk_ops,
-        .enable_reg     = (void __iomem *)FCLKBCR,
-        .rate           = 0, /* unknown */
-};
-
 static struct sh_fsi_platform_info fsi_info = {
         .portb_flags = SH_FSI_BRS_INV |
                        SH_FSI_OUT_SLAVE_MODE |
@@ -1264,10 +1238,10 @@ static int __init arch_setup(void)
         /* change parent of FSI B */
         clk = clk_get(NULL, "fsib_clk");
         if (!IS_ERR(clk)) {
-                clk_register(&fsimckb_clk);
-                clk_set_parent(clk, &fsimckb_clk);
-                clk_set_rate(clk, 11000);
-                clk_set_rate(&fsimckb_clk, 11000);
+                /* 48kHz dummy clock was used to make sure 1/1 divide */
+                clk_set_rate(&sh7724_fsimckb_clk, 48000);
+                clk_set_parent(clk, &sh7724_fsimckb_clk);
+                clk_set_rate(clk, 48000);
                 clk_put(clk);
         }
 
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index c31d228fdfc6..673530500e27 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -871,14 +871,14 @@ static int __init devices_setup(void)
 
         /* set SPU2 clock to 83.4 MHz */
         clk = clk_get(NULL, "spu_clk");
-        if (clk) {
+        if (!IS_ERR(clk)) {
                 clk_set_rate(clk, clk_round_rate(clk, 83333333));
                 clk_put(clk);
         }
 
         /* change parent of FSI A */
         clk = clk_get(NULL, "fsia_clk");
-        if (clk) {
+        if (!IS_ERR(clk)) {
                 clk_register(&fsimcka_clk);
                 clk_set_parent(clk, &fsimcka_clk);
                 clk_set_rate(clk, 11000);
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 46d5179c9f49..e3c73cdd8c90 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -199,10 +199,13 @@ extern unsigned long get_wchan(struct task_struct *p);
 #define ARCH_HAS_PREFETCHW
 static inline void prefetch(void *x)
 {
-        __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
+        __builtin_prefetch(x, 0, 3);
 }
 
-#define prefetchw(x)    prefetch(x)
+static inline void prefetchw(void *x)
+{
+        __builtin_prefetch(x, 1, 3);
+}
 #endif
 
 #endif /* __KERNEL__ */
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h
index 4c27b68789b3..7eb435999426 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7724.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h
@@ -303,4 +303,7 @@ enum {
         SHDMA_SLAVE_SDHI1_RX,
 };
 
+extern struct clk sh7724_fsimcka_clk;
+extern struct clk sh7724_fsimckb_clk;
+
 #endif /* __ASM_SH7724_H__ */
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 4eabc68cd753..b601fa3978d1 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -110,7 +110,7 @@ static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate)
         return 0;
 }
 
-static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id)
+static int shoc_clk_set_rate(struct clk *clk, unsigned long rate)
 {
         unsigned long frqcr3;
         unsigned int tmp;
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 0fe2e9329cb2..271c0b325a9a 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -111,12 +111,21 @@ static struct clk div3_clk = {
         .parent         = &pll_clk,
 };
 
+/* External input clock (pin name: FSIMCKA/FSIMCKB ) */
+struct clk sh7724_fsimcka_clk = {
+};
+
+struct clk sh7724_fsimckb_clk = {
+};
+
 static struct clk *main_clks[] = {
         &r_clk,
         &extal_clk,
         &fll_clk,
         &pll_clk,
         &div3_clk,
+        &sh7724_fsimcka_clk,
+        &sh7724_fsimckb_clk,
 };
 
 static void div4_kick(struct clk *clk)
@@ -154,16 +163,38 @@ struct clk div4_clks[DIV4_NR] = {
         [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
 };
 
-enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR };
+enum { DIV6_V, DIV6_I, DIV6_S, DIV6_NR };
 
 static struct clk div6_clks[DIV6_NR] = {
         [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
-        [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0),
-        [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0),
         [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
         [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
 };
 
+enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR };
+
+/* Indices are important - they are the actual src selecting values */
+static struct clk *fclkacr_parent[] = {
+        [0] = &div3_clk,
+        [1] = NULL,
+        [2] = &sh7724_fsimcka_clk,
+        [3] = NULL,
+};
+
+static struct clk *fclkbcr_parent[] = {
+        [0] = &div3_clk,
+        [1] = NULL,
+        [2] = &sh7724_fsimckb_clk,
+        [3] = NULL,
+};
+
+static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
+        [DIV6_FA] = SH_CLK_DIV6_EXT(&div3_clk, FCLKACR, 0,
+                                      fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2),
+        [DIV6_FB] = SH_CLK_DIV6_EXT(&div3_clk, FCLKBCR, 0,
+                                      fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2),
+};
+
 static struct clk mstp_clks[HWBLK_NR] = {
         SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
         SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT),
@@ -240,8 +271,8 @@ static struct clk_lookup lookups[] = {
 
         /* DIV6 clocks */
         CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
-        CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]),
-        CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]),
+        CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FA]),
+        CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FB]),
         CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]),
         CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
 
@@ -376,6 +407,9 @@ int __init arch_clk_init(void)
                 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
 
         if (!ret)
+                ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR);
+
+        if (!ret)
                 ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
 
         return ret;
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 81f58371613d..8c6a350df751 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -88,7 +88,7 @@ asmlinkage int sys_cacheflush(unsigned long addr, unsigned long len, int op)
         }
 
         if (op & CACHEFLUSH_I)
-                flush_cache_all();
+                flush_icache_range(addr, addr+len);
 
         up_read(&current->mm->mmap_sem);
         return 0;
diff --git a/arch/sh/kernel/vsyscall/vsyscall-trapa.S b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
index 3b6eb34c43fa..3e70f851cdc6 100644
--- a/arch/sh/kernel/vsyscall/vsyscall-trapa.S
+++ b/arch/sh/kernel/vsyscall/vsyscall-trapa.S
@@ -8,9 +8,9 @@ __kernel_vsyscall:
          * fill out .eh_frame -- PFM. */
 .LEND_vsyscall:
         .size __kernel_vsyscall,.-.LSTART_vsyscall
-        .previous
 
         .section .eh_frame,"a",@progbits
+        .previous
 .LCIE:
         .ualong .LCIE_end - .LCIE_start
 .LCIE_start: