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-rw-r--r--arch/sh/mm/consistent.c28
1 files changed, 10 insertions, 18 deletions
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index e098ec158ddb..902967e3f841 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -15,11 +15,15 @@
15#include <linux/dma-mapping.h> 15#include <linux/dma-mapping.h>
16#include <linux/dma-debug.h> 16#include <linux/dma-debug.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/module.h>
18#include <asm/cacheflush.h> 19#include <asm/cacheflush.h>
19#include <asm/addrspace.h> 20#include <asm/addrspace.h>
20 21
21#define PREALLOC_DMA_DEBUG_ENTRIES 4096 22#define PREALLOC_DMA_DEBUG_ENTRIES 4096
22 23
24struct dma_map_ops *dma_ops;
25EXPORT_SYMBOL(dma_ops);
26
23static int __init dma_init(void) 27static int __init dma_init(void)
24{ 28{
25 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES); 29 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
@@ -27,15 +31,12 @@ static int __init dma_init(void)
27} 31}
28fs_initcall(dma_init); 32fs_initcall(dma_init);
29 33
30void *dma_alloc_coherent(struct device *dev, size_t size, 34void *dma_generic_alloc_coherent(struct device *dev, size_t size,
31 dma_addr_t *dma_handle, gfp_t gfp) 35 dma_addr_t *dma_handle, gfp_t gfp)
32{ 36{
33 void *ret, *ret_nocache; 37 void *ret, *ret_nocache;
34 int order = get_order(size); 38 int order = get_order(size);
35 39
36 if (dma_alloc_from_coherent(dev, size, dma_handle, &ret))
37 return ret;
38
39 ret = (void *)__get_free_pages(gfp, order); 40 ret = (void *)__get_free_pages(gfp, order);
40 if (!ret) 41 if (!ret)
41 return NULL; 42 return NULL;
@@ -57,35 +58,26 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
57 58
58 *dma_handle = virt_to_phys(ret); 59 *dma_handle = virt_to_phys(ret);
59 60
60 debug_dma_alloc_coherent(dev, size, *dma_handle, ret_nocache);
61
62 return ret_nocache; 61 return ret_nocache;
63} 62}
64EXPORT_SYMBOL(dma_alloc_coherent);
65 63
66void dma_free_coherent(struct device *dev, size_t size, 64void dma_generic_free_coherent(struct device *dev, size_t size,
67 void *vaddr, dma_addr_t dma_handle) 65 void *vaddr, dma_addr_t dma_handle)
68{ 66{
69 int order = get_order(size); 67 int order = get_order(size);
70 unsigned long pfn = dma_handle >> PAGE_SHIFT; 68 unsigned long pfn = dma_handle >> PAGE_SHIFT;
71 int k; 69 int k;
72 70
73 WARN_ON(irqs_disabled()); /* for portability */
74
75 if (dma_release_from_coherent(dev, order, vaddr))
76 return;
77
78 debug_dma_free_coherent(dev, size, vaddr, dma_handle);
79 for (k = 0; k < (1 << order); k++) 71 for (k = 0; k < (1 << order); k++)
80 __free_pages(pfn_to_page(pfn + k), 0); 72 __free_pages(pfn_to_page(pfn + k), 0);
73
81 iounmap(vaddr); 74 iounmap(vaddr);
82} 75}
83EXPORT_SYMBOL(dma_free_coherent);
84 76
85void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 77void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
86 enum dma_data_direction direction) 78 enum dma_data_direction direction)
87{ 79{
88#ifdef CONFIG_CPU_SH5 80#if defined(CONFIG_CPU_SH5) || defined(CONFIG_PMB)
89 void *p1addr = vaddr; 81 void *p1addr = vaddr;
90#else 82#else
91 void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr); 83 void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr);