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-rw-r--r--arch/sh/kernel/Makefile_322
-rw-r--r--arch/sh/kernel/cf-enabler.c2
-rw-r--r--arch/sh/kernel/cpu/clock.c20
-rw-r--r--arch/sh/kernel/cpu/irq/intc.c31
-rw-r--r--arch/sh/kernel/cpu/sh2/entry.S133
-rw-r--r--arch/sh/kernel/cpu/sh2/ex.S15
-rw-r--r--arch/sh/kernel/cpu/sh2/setup-sh7619.c24
-rw-r--r--arch/sh/kernel/cpu/sh2a/Makefile2
-rw-r--r--arch/sh/kernel/cpu/sh2a/entry.S249
-rw-r--r--arch/sh/kernel/cpu/sh2a/ex.S72
-rw-r--r--arch/sh/kernel/cpu/sh3/ex.S38
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7343.c99
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c221
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7343.c253
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c139
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c85
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c138
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c21
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c11
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c17
-rw-r--r--arch/sh/kernel/entry-common.S2
-rw-r--r--arch/sh/kernel/process_32.c14
-rw-r--r--arch/sh/kernel/process_64.c10
-rw-r--r--arch/sh/kernel/ptrace_32.c23
-rw-r--r--arch/sh/kernel/setup.c7
-rw-r--r--arch/sh/kernel/signal_32.c36
-rw-r--r--arch/sh/kernel/syscalls_32.S6
-rw-r--r--arch/sh/kernel/syscalls_64.S6
-rw-r--r--arch/sh/kernel/time_32.c2
-rw-r--r--arch/sh/kernel/timers/timer-tmu.c2
-rw-r--r--arch/sh/kernel/traps_32.c4
33 files changed, 1339 insertions, 353 deletions
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32
index 4bbdce36b92b..0e6905fe9fec 100644
--- a/arch/sh/kernel/Makefile_32
+++ b/arch/sh/kernel/Makefile_32
@@ -21,7 +21,7 @@ obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
21obj-$(CONFIG_CRASH_DUMP) += crash_dump.o 21obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
22obj-$(CONFIG_PM) += pm.o 22obj-$(CONFIG_PM) += pm.o
23obj-$(CONFIG_STACKTRACE) += stacktrace.o 23obj-$(CONFIG_STACKTRACE) += stacktrace.o
24obj-$(CONFIG_BINFMT_ELF) += dump_task.o 24obj-$(CONFIG_ELF_CORE) += dump_task.o
25obj-$(CONFIG_IO_TRAPPED) += io_trapped.o 25obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
26 26
27EXTRA_CFLAGS += -Werror 27EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/cf-enabler.c b/arch/sh/kernel/cf-enabler.c
index 01ff4d05aab0..d3d9f3204230 100644
--- a/arch/sh/kernel/cf-enabler.c
+++ b/arch/sh/kernel/cf-enabler.c
@@ -157,7 +157,7 @@ static int __init cf_init_se(void)
157} 157}
158#endif 158#endif
159 159
160int __init cf_init(void) 160static int __init cf_init(void)
161{ 161{
162 if (mach_is_se() || mach_is_7722se() || mach_is_7721se()) 162 if (mach_is_se() || mach_is_7722se() || mach_is_7721se())
163 return cf_init_se(); 163 return cf_init_se();
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index b5f1e23ed57c..f5eb56e6bc59 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -88,7 +88,7 @@ static void propagate_rate(struct clk *clk)
88 } 88 }
89} 89}
90 90
91int __clk_enable(struct clk *clk) 91static int __clk_enable(struct clk *clk)
92{ 92{
93 /* 93 /*
94 * See if this is the first time we're enabling the clock, some 94 * See if this is the first time we're enabling the clock, some
@@ -111,7 +111,6 @@ int __clk_enable(struct clk *clk)
111 111
112 return 0; 112 return 0;
113} 113}
114EXPORT_SYMBOL_GPL(__clk_enable);
115 114
116int clk_enable(struct clk *clk) 115int clk_enable(struct clk *clk)
117{ 116{
@@ -131,7 +130,7 @@ static void clk_kref_release(struct kref *kref)
131 /* Nothing to do */ 130 /* Nothing to do */
132} 131}
133 132
134void __clk_disable(struct clk *clk) 133static void __clk_disable(struct clk *clk)
135{ 134{
136 int count = kref_put(&clk->kref, clk_kref_release); 135 int count = kref_put(&clk->kref, clk_kref_release);
137 136
@@ -143,7 +142,6 @@ void __clk_disable(struct clk *clk)
143 clk->ops->disable(clk); 142 clk->ops->disable(clk);
144 } 143 }
145} 144}
146EXPORT_SYMBOL_GPL(__clk_disable);
147 145
148void clk_disable(struct clk *clk) 146void clk_disable(struct clk *clk)
149{ 147{
@@ -310,15 +308,11 @@ static int show_clocks(char *buf, char **start, off_t off,
310 list_for_each_entry_reverse(clk, &clock_list, node) { 308 list_for_each_entry_reverse(clk, &clock_list, node) {
311 unsigned long rate = clk_get_rate(clk); 309 unsigned long rate = clk_get_rate(clk);
312 310
313 /* 311 p += sprintf(p, "%-12s\t: %ld.%02ldMHz\t%s\n", clk->name,
314 * Don't bother listing dummy clocks with no ancestry 312 rate / 1000000, (rate % 1000000) / 10000,
315 * that only support enable and disable ops. 313 ((clk->flags & CLK_ALWAYS_ENABLED) ||
316 */ 314 (atomic_read(&clk->kref.refcount) != 1)) ?
317 if (unlikely(!rate && !clk->parent)) 315 "enabled" : "disabled");
318 continue;
319
320 p += sprintf(p, "%-12s\t: %ld.%02ldMHz\n", clk->name,
321 rate / 1000000, (rate % 1000000) / 10000);
322 } 316 }
323 317
324 return p - buf; 318 return p - buf;
diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c
index da5dae787888..8c70e201bde0 100644
--- a/arch/sh/kernel/cpu/irq/intc.c
+++ b/arch/sh/kernel/cpu/irq/intc.c
@@ -62,7 +62,7 @@ struct intc_desc_int {
62#endif 62#endif
63 63
64static unsigned int intc_prio_level[NR_IRQS]; /* for now */ 64static unsigned int intc_prio_level[NR_IRQS]; /* for now */
65#ifdef CONFIG_CPU_SH3 65#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
66static unsigned long ack_handle[NR_IRQS]; 66static unsigned long ack_handle[NR_IRQS];
67#endif 67#endif
68 68
@@ -231,7 +231,7 @@ static void intc_disable(unsigned int irq)
231 } 231 }
232} 232}
233 233
234#ifdef CONFIG_CPU_SH3 234#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
235static void intc_mask_ack(unsigned int irq) 235static void intc_mask_ack(unsigned int irq)
236{ 236{
237 struct intc_desc_int *d = get_intc_desc(irq); 237 struct intc_desc_int *d = get_intc_desc(irq);
@@ -244,8 +244,23 @@ static void intc_mask_ack(unsigned int irq)
244 244
245 if (handle) { 245 if (handle) {
246 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0); 246 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
247 ctrl_inb(addr); 247 switch (_INTC_FN(handle)) {
248 ctrl_outb(0x3f ^ set_field(0, 1, handle), addr); 248 case REG_FN_MODIFY_BASE + 0: /* 8bit */
249 ctrl_inb(addr);
250 ctrl_outb(0xff ^ set_field(0, 1, handle), addr);
251 break;
252 case REG_FN_MODIFY_BASE + 1: /* 16bit */
253 ctrl_inw(addr);
254 ctrl_outw(0xffff ^ set_field(0, 1, handle), addr);
255 break;
256 case REG_FN_MODIFY_BASE + 3: /* 32bit */
257 ctrl_inl(addr);
258 ctrl_outl(0xffffffff ^ set_field(0, 1, handle), addr);
259 break;
260 default:
261 BUG();
262 break;
263 }
249 } 264 }
250} 265}
251#endif 266#endif
@@ -466,7 +481,7 @@ static unsigned int __init intc_prio_data(struct intc_desc *desc,
466 return 0; 481 return 0;
467} 482}
468 483
469#ifdef CONFIG_CPU_SH3 484#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
470static unsigned int __init intc_ack_data(struct intc_desc *desc, 485static unsigned int __init intc_ack_data(struct intc_desc *desc,
471 struct intc_desc_int *d, 486 struct intc_desc_int *d,
472 intc_enum enum_id) 487 intc_enum enum_id)
@@ -601,7 +616,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
601 /* irq should be disabled by default */ 616 /* irq should be disabled by default */
602 d->chip.mask(irq); 617 d->chip.mask(irq);
603 618
604#ifdef CONFIG_CPU_SH3 619#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
605 if (desc->ack_regs) 620 if (desc->ack_regs)
606 ack_handle[irq] = intc_ack_data(desc, d, enum_id); 621 ack_handle[irq] = intc_ack_data(desc, d, enum_id);
607#endif 622#endif
@@ -635,7 +650,7 @@ void __init register_intc_controller(struct intc_desc *desc)
635 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0; 650 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0;
636 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0; 651 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0;
637 652
638#ifdef CONFIG_CPU_SH3 653#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
639 d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0; 654 d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0;
640#endif 655#endif
641 d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg)); 656 d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg));
@@ -676,7 +691,7 @@ void __init register_intc_controller(struct intc_desc *desc)
676 d->chip.mask_ack = intc_disable; 691 d->chip.mask_ack = intc_disable;
677 d->chip.set_type = intc_set_sense; 692 d->chip.set_type = intc_set_sense;
678 693
679#ifdef CONFIG_CPU_SH3 694#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
680 if (desc->ack_regs) { 695 if (desc->ack_regs) {
681 for (i = 0; i < desc->nr_ack_regs; i++) 696 for (i = 0; i < desc->nr_ack_regs; i++)
682 k += save_reg(d, k, desc->ack_regs[i].set_reg, 0); 697 k += save_reg(d, k, desc->ack_regs[i].set_reg, 0);
diff --git a/arch/sh/kernel/cpu/sh2/entry.S b/arch/sh/kernel/cpu/sh2/entry.S
index 0fc89069d8c7..ee894e5a45e7 100644
--- a/arch/sh/kernel/cpu/sh2/entry.S
+++ b/arch/sh/kernel/cpu/sh2/entry.S
@@ -3,7 +3,7 @@
3 * 3 *
4 * The SH-2 exception entry 4 * The SH-2 exception entry
5 * 5 *
6 * Copyright (C) 2005,2006 Yoshinori Sato 6 * Copyright (C) 2005-2008 Yoshinori Sato
7 * Copyright (C) 2005 AXE,Inc. 7 * Copyright (C) 2005 AXE,Inc.
8 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
@@ -36,43 +36,41 @@ OFF_TRA = (16*4+6*4)
36#include <asm/entry-macros.S> 36#include <asm/entry-macros.S>
37 37
38ENTRY(exception_handler) 38ENTRY(exception_handler)
39 ! already saved r0/r1 39 ! stack
40 ! r0 <- point sp
41 ! r1
42 ! pc
43 ! sr
44 ! r0 = temporary
45 ! r1 = vector (pseudo EXPEVT / INTEVT / TRA)
40 mov.l r2,@-sp 46 mov.l r2,@-sp
41 mov.l r3,@-sp 47 mov.l r3,@-sp
42 mov r0,r1
43 cli 48 cli
44 mov.l $cpu_mode,r2 49 mov.l $cpu_mode,r2
45 mov.l @r2,r0 50 mov.l @r2,r0
46 mov.l @(5*4,r15),r3 ! previous SR 51 mov.l @(5*4,r15),r3 ! previous SR
47 shll2 r3 ! set "S" flag 52 or r0,r3 ! set MD
48 rotl r0 ! T <- "S" flag 53 tst r0,r0
49 rotl r0 ! "S" flag is LSB 54 bf/s 1f ! previous mode check
50 rotcr r3 ! T -> r3:b30 55 mov.l r3,@(5*4,r15) ! update SR
51 shlr r3
52 shlr r0
53 bt/s 1f
54 mov.l r3,@(5*4,r15) ! copy cpu mode to SR
55 ! switch to kernel mode 56 ! switch to kernel mode
56 mov #1,r0 57 mov.l __md_bit,r0
57 rotr r0
58 rotr r0
59 mov.l r0,@r2 ! enter kernel mode 58 mov.l r0,@r2 ! enter kernel mode
60 mov.l $current_thread_info,r2 59 mov.l $current_thread_info,r2
61 mov.l @r2,r2 60 mov.l @r2,r2
62 mov #0x20,r0 61 mov #(THREAD_SIZE >> 8),r0
63 shll8 r0 62 shll8 r0
64 add r2,r0 63 add r2,r0
65 mov r15,r2 ! r2 = user stack top 64 mov r15,r2 ! r2 = user stack top
66 mov r0,r15 ! switch kernel stack 65 mov r0,r15 ! switch kernel stack
67 add #-4,r15 ! dummy
68 mov.l r1,@-r15 ! TRA 66 mov.l r1,@-r15 ! TRA
69 sts.l macl, @-r15 67 sts.l macl, @-r15
70 sts.l mach, @-r15 68 sts.l mach, @-r15
71 stc.l gbr, @-r15 69 stc.l gbr, @-r15
72 mov.l @(4*4,r2),r0 70 mov.l @(5*4,r2),r0
73 mov.l @(5*4,r2),r1 71 mov.l r0,@-r15 ! original SR
74 mov.l r1,@-r15 ! original SR
75 sts.l pr,@-r15 72 sts.l pr,@-r15
73 mov.l @(4*4,r2),r0
76 mov.l r0,@-r15 ! original PC 74 mov.l r0,@-r15 ! original PC
77 mov r2,r3 75 mov r2,r3
78 add #(4+2)*4,r3 ! rewind r0 - r3 + exception frame 76 add #(4+2)*4,r3 ! rewind r0 - r3 + exception frame
@@ -88,14 +86,15 @@ ENTRY(exception_handler)
88 mov.l r6,@-r15 86 mov.l r6,@-r15
89 mov.l r5,@-r15 87 mov.l r5,@-r15
90 mov.l r4,@-r15 88 mov.l r4,@-r15
89 mov r1,r9 ! save TRA
91 mov r2,r8 ! copy user -> kernel stack 90 mov r2,r8 ! copy user -> kernel stack
92 mov.l @r8+,r3 91 mov.l @(0,r8),r3
93 mov.l r3,@-r15 92 mov.l r3,@-r15
94 mov.l @r8+,r2 93 mov.l @(4,r8),r2
95 mov.l r2,@-r15 94 mov.l r2,@-r15
96 mov.l @r8+,r1 95 mov.l @(12,r8),r1
97 mov.l r1,@-r15 96 mov.l r1,@-r15
98 mov.l @r8+,r0 97 mov.l @(8,r8),r0
99 bra 2f 98 bra 2f
100 mov.l r0,@-r15 99 mov.l r0,@-r15
1011: 1001:
@@ -107,10 +106,11 @@ ENTRY(exception_handler)
107 mov.l r0,@-r15 106 mov.l r0,@-r15
108 mov.l @r2+,r0 ! old R2 107 mov.l @r2+,r0 ! old R2
109 mov.l r0,@-r15 108 mov.l r0,@-r15
110 mov.l @r2+,r0 ! old R1 109 mov.l @(4,r2),r0 ! old R1
111 mov.l r0,@-r15
112 mov.l @r2+,r0 ! old R0
113 mov.l r0,@-r15 110 mov.l r0,@-r15
111 mov.l @r2,r0 ! old R0
112 mov.l r0,@-r15
113 add #8,r2
114 mov.l @r2+,r3 ! old PC 114 mov.l @r2+,r3 ! old PC
115 mov.l @r2+,r0 ! old SR 115 mov.l @r2+,r0 ! old SR
116 add #-4,r2 ! exception frame stub (sr) 116 add #-4,r2 ! exception frame stub (sr)
@@ -135,14 +135,12 @@ ENTRY(exception_handler)
135 mov.l r6,@-r2 135 mov.l r6,@-r2
136 mov.l r5,@-r2 136 mov.l r5,@-r2
137 mov.l r4,@-r2 137 mov.l r4,@-r2
138 mov r1,r9
138 mov.l @(OFF_R0,r15),r0 139 mov.l @(OFF_R0,r15),r0
139 mov.l @(OFF_R1,r15),r1 140 mov.l @(OFF_R1,r15),r1
140 mov.l @(OFF_R2,r15),r2 141 mov.l @(OFF_R2,r15),r2
141 mov.l @(OFF_R3,r15),r3 142 mov.l @(OFF_R3,r15),r3
1422: 1432:
143 mov #OFF_TRA,r8
144 add r15,r8
145 mov.l @r8,r9
146 mov #64,r8 144 mov #64,r8
147 cmp/hs r8,r9 145 cmp/hs r8,r9
148 bt interrupt_entry ! vec >= 64 is interrupt 146 bt interrupt_entry ! vec >= 64 is interrupt
@@ -150,26 +148,14 @@ ENTRY(exception_handler)
150 cmp/hs r8,r9 148 cmp/hs r8,r9
151 bt trap_entry ! 64 > vec >= 32 is trap 149 bt trap_entry ! 64 > vec >= 32 is trap
152 150
153#if defined(CONFIG_SH_FPU)
154 mov #13,r8
155 cmp/eq r8,r9
156 bt 10f ! fpu
157 nop
158#endif
159
160 mov.l 4f,r8 151 mov.l 4f,r8
161 mov r9,r4 152 mov r9,r4
162 shll2 r9 153 shll2 r9
163 add r9,r8 154 add r9,r8
164 mov.l @r8,r8 155 mov.l @r8,r8 ! exception handler address
165 mov #0,r9 156 tst r8,r8
166 cmp/eq r9,r8
167 bf 3f 157 bf 3f
168 mov.l 8f,r8 ! unhandled exception 158 mov.l 8f,r8 ! unhandled exception
169#if defined(CONFIG_SH_FPU)
17010:
171 mov.l 9f, r8 ! unhandled exception
172#endif
1733: 1593:
174 mov.l 5f,r10 160 mov.l 5f,r10
175 jmp @r8 161 jmp @r8
@@ -188,10 +174,7 @@ interrupt_entry:
1885: .long ret_from_exception 1745: .long ret_from_exception
1896: .long ret_from_irq 1756: .long ret_from_irq
1907: .long do_IRQ 1767: .long do_IRQ
1918: .long do_exception_error 1778: .long exception_error
192#ifdef CONFIG_SH_FPU
1939: .long fpu_error_trap_handler
194#endif
195 178
196trap_entry: 179trap_entry:
197 mov #0x30,r8 180 mov #0x30,r8
@@ -200,24 +183,9 @@ trap_entry:
200 add #-0x10,r9 ! convert SH2 to SH3/4 ABI 183 add #-0x10,r9 ! convert SH2 to SH3/4 ABI
2011: 1841:
202 shll2 r9 ! TRA 185 shll2 r9 ! TRA
203 mov #OFF_TRA,r8 186 bra system_call ! jump common systemcall entry
204 add r15,r8 187 mov r9,r8
205 mov.l r9,@r8
206 mov r9,r8
207#ifdef CONFIG_TRACE_IRQFLAGS
208 mov.l 2f, r9
209 jsr @r9
210 nop
211#endif
212 sti
213 bra system_call
214 nop
215 188
216 .align 2
217#ifdef CONFIG_TRACE_IRQFLAGS
2182: .long trace_hardirqs_on
219#endif
220
221#if defined(CONFIG_SH_STANDARD_BIOS) 189#if defined(CONFIG_SH_STANDARD_BIOS)
222 /* Unwind the stack and jmp to the debug entry */ 190 /* Unwind the stack and jmp to the debug entry */
223ENTRY(sh_bios_handler) 191ENTRY(sh_bios_handler)
@@ -240,7 +208,7 @@ ENTRY(sh_bios_handler)
240 mov.l @r2,r2 208 mov.l @r2,r2
241 stc sr,r3 209 stc sr,r3
242 mov.l r2,@r0 210 mov.l r2,@r0
243 mov.l r3,@r0 211 mov.l r3,@(4,r0)
244 mov.l r1,@(8,r0) 212 mov.l r1,@(8,r0)
245 mov.l @r15+, r0 213 mov.l @r15+, r0
246 mov.l @r15+, r1 214 mov.l @r15+, r1
@@ -272,22 +240,30 @@ ENTRY(address_error_trap_handler)
272 mov.l 1f,r0 240 mov.l 1f,r0
273 jmp @r0 241 jmp @r0
274 mov #0,r5 ! writeaccess is unknown 242 mov #0,r5 ! writeaccess is unknown
275 .align 2
276 243
244 .align 2
2771: .long do_address_error 2451: .long do_address_error
278 246
279restore_all: 247restore_all:
280 cli 248 stc sr,r0
281#ifdef CONFIG_TRACE_IRQFLAGS 249 or #0xf0,r0
282 mov.l 1f, r0 250 ldc r0,sr ! all interrupt block (same BL = 1)
283 jsr @r0 251 ! restore special register
284 nop 252 ! overlap exception frame
285#endif 253 mov r15,r0
254 add #17*4,r0
255 lds.l @r0+,pr
256 add #4,r0
257 ldc.l @r0+,gbr
258 lds.l @r0+,mach
259 lds.l @r0+,macl
286 mov r15,r0 260 mov r15,r0
287 mov.l $cpu_mode,r2 261 mov.l $cpu_mode,r2
288 mov #OFF_SR,r3 262 mov #OFF_SR,r3
289 mov.l @(r0,r3),r1 263 mov.l @(r0,r3),r1
290 mov.l r1,@r2 264 mov.l __md_bit,r3
265 and r1,r3 ! copy MD bit
266 mov.l r3,@r2
291 shll2 r1 ! clear MD bit 267 shll2 r1 ! clear MD bit
292 shlr2 r1 268 shlr2 r1
293 mov.l @(OFF_SP,r0),r2 269 mov.l @(OFF_SP,r0),r2
@@ -297,12 +273,6 @@ restore_all:
297 mov #OFF_PC,r3 273 mov #OFF_PC,r3
298 mov.l @(r0,r3),r1 274 mov.l @(r0,r3),r1
299 mov.l r1,@r2 ! set pc 275 mov.l r1,@r2 ! set pc
300 add #4*16+4,r0
301 lds.l @r0+,pr
302 add #4,r0 ! skip sr
303 ldc.l @r0+,gbr
304 lds.l @r0+,mach
305 lds.l @r0+,macl
306 get_current_thread_info r0, r1 276 get_current_thread_info r0, r1
307 mov.l $current_thread_info,r1 277 mov.l $current_thread_info,r1
308 mov.l r0,@r1 278 mov.l r0,@r1
@@ -326,9 +296,8 @@ restore_all:
326 nop 296 nop
327 297
328 .align 2 298 .align 2
329#ifdef CONFIG_TRACE_IRQFLAGS 299__md_bit:
3301: .long trace_hardirqs_off 300 .long 0x40000000
331#endif
332$current_thread_info: 301$current_thread_info:
333 .long __current_thread_info 302 .long __current_thread_info
334$cpu_mode: 303$cpu_mode:
diff --git a/arch/sh/kernel/cpu/sh2/ex.S b/arch/sh/kernel/cpu/sh2/ex.S
index 6d285af7846c..85b0bf81fc1d 100644
--- a/arch/sh/kernel/cpu/sh2/ex.S
+++ b/arch/sh/kernel/cpu/sh2/ex.S
@@ -18,16 +18,17 @@
18exception_entry: 18exception_entry:
19no = 0 19no = 0
20 .rept 256 20 .rept 256
21 mov.l r0,@-sp 21 mov.l r1,@-sp
22 mov #no,r0
23 bra exception_trampoline 22 bra exception_trampoline
24 and #0xff,r0 23 mov #no,r1
25no = no + 1 24no = no + 1
26 .endr 25 .endr
27exception_trampoline: 26exception_trampoline:
28 mov.l r1,@-sp 27 mov.l r0,@-sp
29 mov.l $exception_handler,r1 28 mov.l $exception_handler,r0
30 jmp @r1 29 extu.b r1,r1
30 jmp @r0
31 extu.w r1,r1
31 32
32 .align 2 33 .align 2
33$exception_entry: 34$exception_entry:
@@ -41,6 +42,6 @@ $exception_handler:
41ENTRY(vbr_base) 42ENTRY(vbr_base)
42vector = 0 43vector = 0
43 .rept 256 44 .rept 256
44 .long exception_entry + vector * 8 45 .long exception_entry + vector * 6
45vector = vector + 1 46vector = vector + 1
46 .endr 47 .endr
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index cc530f4d84d6..56e5878e5516 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -96,8 +96,32 @@ static struct platform_device sci_device = {
96 }, 96 },
97}; 97};
98 98
99static struct resource eth_resources[] = {
100 [0] = {
101 .start = 0xfb000000,
102 .end = 0xfb0001c8,
103 .flags = IORESOURCE_MEM,
104 },
105 [1] = {
106 .start = 85,
107 .end = 85,
108 .flags = IORESOURCE_IRQ,
109 },
110};
111
112static struct platform_device eth_device = {
113 .name = "sh-eth",
114 .id = -1,
115 .dev = {
116 .platform_data = (void *)1,
117 },
118 .num_resources = ARRAY_SIZE(eth_resources),
119 .resource = eth_resources,
120};
121
99static struct platform_device *sh7619_devices[] __initdata = { 122static struct platform_device *sh7619_devices[] __initdata = {
100 &sci_device, 123 &sci_device,
124 &eth_device,
101}; 125};
102 126
103static int __init sh7619_devices_setup(void) 127static int __init sh7619_devices_setup(void)
diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile
index 7e2b90cfa7bf..1ab1ecf4c768 100644
--- a/arch/sh/kernel/cpu/sh2a/Makefile
+++ b/arch/sh/kernel/cpu/sh2a/Makefile
@@ -4,7 +4,7 @@
4 4
5obj-y := common.o probe.o opcode_helper.o 5obj-y := common.o probe.o opcode_helper.o
6 6
7common-y += $(addprefix ../sh2/, ex.o entry.o) 7common-y += ex.o entry.o
8 8
9obj-$(CONFIG_SH_FPU) += fpu.o 9obj-$(CONFIG_SH_FPU) += fpu.o
10 10
diff --git a/arch/sh/kernel/cpu/sh2a/entry.S b/arch/sh/kernel/cpu/sh2a/entry.S
new file mode 100644
index 000000000000..47096dc3d206
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/entry.S
@@ -0,0 +1,249 @@
1/*
2 * arch/sh/kernel/cpu/sh2a/entry.S
3 *
4 * The SH-2A exception entry
5 *
6 * Copyright (C) 2008 Yoshinori Sato
7 * Based on arch/sh/kernel/cpu/sh2/entry.S
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13
14#include <linux/linkage.h>
15#include <asm/asm-offsets.h>
16#include <asm/thread_info.h>
17#include <asm/cpu/mmu_context.h>
18#include <asm/unistd.h>
19#include <asm/errno.h>
20#include <asm/page.h>
21
22/* Offsets to the stack */
23OFF_R0 = 0 /* Return value. New ABI also arg4 */
24OFF_R1 = 4 /* New ABI: arg5 */
25OFF_R2 = 8 /* New ABI: arg6 */
26OFF_R3 = 12 /* New ABI: syscall_nr */
27OFF_R4 = 16 /* New ABI: arg0 */
28OFF_R5 = 20 /* New ABI: arg1 */
29OFF_R6 = 24 /* New ABI: arg2 */
30OFF_R7 = 28 /* New ABI: arg3 */
31OFF_SP = (15*4)
32OFF_PC = (16*4)
33OFF_SR = (16*4+2*4)
34OFF_TRA = (16*4+6*4)
35
36#include <asm/entry-macros.S>
37
38ENTRY(exception_handler)
39 ! stack
40 ! r0 <- point sp
41 ! r1
42 ! pc
43 ! sr
44 ! r0 = temporary
45 ! r1 = vector (pseudo EXPEVT / INTEVT / TRA)
46 mov.l r2,@-sp
47 cli
48 mov.l $cpu_mode,r2
49 bld.b #6,@(0,r2) !previus SR.MD
50 bst.b #6,@(4*4,r15) !set cpu mode to SR.MD
51 bt 1f
52 ! switch to kernel mode
53 bset.b #6,@(0,r2) !set SR.MD
54 mov.l $current_thread_info,r2
55 mov.l @r2,r2
56 mov #(THREAD_SIZE >> 8),r0
57 shll8 r0
58 add r2,r0 ! r0 = kernel stack tail
59 mov r15,r2 ! r2 = user stack top
60 mov r0,r15 ! switch kernel stack
61 mov.l r1,@-r15 ! TRA
62 sts.l macl, @-r15
63 sts.l mach, @-r15
64 stc.l gbr, @-r15
65 mov.l @(4*4,r2),r0
66 mov.l r0,@-r15 ! original SR
67 sts.l pr,@-r15
68 mov.l @(3*4,r2),r0
69 mov.l r0,@-r15 ! original PC
70 mov r2,r0
71 add #(3+2)*4,r0 ! rewind r0 - r3 + exception frame
72 lds r0,pr ! pr = original SP
73 movmu.l r3,@-r15 ! save regs
74 mov r2,r8 ! r8 = previus stack top
75 mov r1,r9 ! r9 = interrupt vector
76 ! restore previous stack
77 mov.l @r8+,r2
78 mov.l @r8+,r0
79 mov.l @r8+,r1
80 bra 2f
81 movml.l r2,@-r15
821:
83 ! in kernel exception
84 mov r15,r2
85 add #-((OFF_TRA + 4) - OFF_PC) + 5*4,r15
86 movmu.l r3,@-r15
87 mov r2,r8 ! r8 = previous stack top
88 mov r1,r9 ! r9 = interrupt vector
89 ! restore exception frame & regs
90 mov.l @r8+,r2 ! old R2
91 mov.l @r8+,r0 ! old R0
92 mov.l @r8+,r1 ! old R1
93 mov.l @r8+,r10 ! old PC
94 mov.l @r8+,r11 ! old SR
95 movml.l r2,@-r15
96 mov.l r10,@(OFF_PC,r15)
97 mov.l r11,@(OFF_SR,r15)
98 mov.l r8,@(OFF_SP,r15) ! save old sp
99 mov r15,r8
100 add #OFF_TRA + 4,r8
101 mov.l r9,@-r8
102 sts.l macl,@-r8
103 sts.l mach,@-r8
104 stc.l gbr,@-r8
105 add #-4,r8
106 sts.l pr,@-r8
1072:
108 ! dispatch exception / interrupt
109 mov #64,r8
110 cmp/hs r8,r9
111 bt interrupt_entry ! vec >= 64 is interrupt
112 mov #32,r8
113 cmp/hs r8,r9
114 bt trap_entry ! 64 > vec >= 32 is trap
115
116 mov.l 4f,r8
117 mov r9,r4
118 shll2 r9
119 add r9,r8
120 mov.l @r8,r8 ! exception handler address
121 tst r8,r8
122 bf 3f
123 mov.l 8f,r8 ! unhandled exception
1243:
125 mov.l 5f,r10
126 jmp @r8
127 lds r10,pr
128
129interrupt_entry:
130 mov r9,r4
131 mov r15,r5
132 mov.l 7f,r8
133 mov.l 6f,r9
134 jmp @r8
135 lds r9,pr
136
137 .align 2
1384: .long exception_handling_table
1395: .long ret_from_exception
1406: .long ret_from_irq
1417: .long do_IRQ
1428: .long exception_error
143
144trap_entry:
145 mov #0x30,r8
146 cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall
147 bt 1f
148 add #-0x10,r9 ! convert SH2 to SH3/4 ABI
1491:
150 shll2 r9 ! TRA
151 bra system_call ! jump common systemcall entry
152 mov r9,r8
153
154#if defined(CONFIG_SH_STANDARD_BIOS)
155 /* Unwind the stack and jmp to the debug entry */
156ENTRY(sh_bios_handler)
157 mov r15,r0
158 add #(22-4)*4-4,r0
159 ldc.l @r0+,gbr
160 lds.l @r0+,mach
161 lds.l @r0+,macl
162 mov r15,r0
163 mov.l @(OFF_SP,r0),r1
164 mov.l @(OFF_SR,r2),r3
165 mov.l r3,@-r1
166 mov.l @(OFF_SP,r2),r3
167 mov.l r3,@-r1
168 mov r15,r0
169 add #(22-4)*4-8,r0
170 mov.l 1f,r2
171 mov.l @r2,r2
172 stc sr,r3
173 mov.l r2,@r0
174 mov.l r3,@(4,r0)
175 mov.l r1,@(8,r0)
176 movml.l @r15+,r14
177 add #8,r15
178 lds.l @r15+, pr
179 rte
180 mov.l @r15+,r15
181 .align 2
1821: .long gdb_vbr_vector
183#endif /* CONFIG_SH_STANDARD_BIOS */
184
185ENTRY(address_error_trap_handler)
186 mov r15,r4 ! regs
187 mov.l @(OFF_PC,r15),r6 ! pc
188 mov.l 1f,r0
189 jmp @r0
190 mov #0,r5 ! writeaccess is unknown
191
192 .align 2
1931: .long do_address_error
194
195restore_all:
196 stc sr,r0
197 or #0xf0,r0
198 ldc r0,sr ! all interrupt block (same BL = 1)
199 ! restore special register
200 ! overlap exception frame
201 mov r15,r0
202 add #17*4,r0
203 lds.l @r0+,pr
204 add #4,r0
205 ldc.l @r0+,gbr
206 lds.l @r0+,mach
207 lds.l @r0+,macl
208 mov r15,r0
209 mov.l $cpu_mode,r2
210 bld.b #6,@(OFF_SR,r15)
211 bst.b #6,@(0,r2) ! save CPU mode
212 mov.l @(OFF_SR,r0),r1
213 shll2 r1
214 shlr2 r1 ! clear MD bit
215 mov.l @(OFF_SP,r0),r2
216 add #-8,r2
217 mov.l r2,@(OFF_SP,r0) ! point exception frame top
218 mov.l r1,@(4,r2) ! set sr
219 mov.l @(OFF_PC,r0),r1
220 mov.l r1,@r2 ! set pc
221 get_current_thread_info r0, r1
222 mov.l $current_thread_info,r1
223 mov.l r0,@r1
224 movml.l @r15+,r14
225 mov.l @r15,r15
226 rte
227 nop
228
229 .align 2
230$current_thread_info:
231 .long __current_thread_info
232$cpu_mode:
233 .long __cpu_mode
234
235! common exception handler
236#include "../../entry-common.S"
237
238 .data
239! cpu operation mode
240! bit30 = MD (compatible SH3/4)
241__cpu_mode:
242 .long 0x40000000
243
244 .section .bss
245__current_thread_info:
246 .long 0
247
248ENTRY(exception_handling_table)
249 .space 4*32
diff --git a/arch/sh/kernel/cpu/sh2a/ex.S b/arch/sh/kernel/cpu/sh2a/ex.S
new file mode 100644
index 000000000000..3ead9e63965a
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/ex.S
@@ -0,0 +1,72 @@
1/*
2 * arch/sh/kernel/cpu/sh2a/ex.S
3 *
4 * The SH-2A exception vector table
5 *
6 * Copyright (C) 2008 Yoshinori Sato
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/linkage.h>
14
15!
16! convert Exception Vector to Exception Number
17!
18
19! exception no 0 to 255
20exception_entry0:
21no = 0
22 .rept 256
23 mov.l r1,@-sp
24 bra exception_trampoline0
25 mov #no,r1
26no = no + 1
27 .endr
28exception_trampoline0:
29 mov.l r0,@-sp
30 mov.l 1f,r0
31 extu.b r1,r1
32 jmp @r0
33 extu.w r1,r1
34
35 .align 2
361: .long exception_handler
37
38! exception no 256 to 511
39exception_entry1:
40no = 0
41 .rept 256
42 mov.l r1,@-sp
43 bra exception_trampoline1
44 mov #no,r1
45no = no + 1
46 .endr
47exception_trampoline1:
48 mov.l r0,@-sp
49 extu.b r1,r1
50 movi20 #0x100,r0
51 add r0,r1
52 mov.l 1f,r0
53 jmp @r0
54 extu.w r1,r1
55
56 .align 2
571: .long exception_handler
58
59 !
60! Exception Vector Base
61!
62 .align 2
63ENTRY(vbr_base)
64vector = 0
65 .rept 256
66 .long exception_entry0 + vector * 6
67vector = vector + 1
68 .endr
69 .rept 256
70 .long exception_entry1 + vector * 6
71vector = vector + 1
72 .endr
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index 11b6d9c6edae..dac429726899 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -4,7 +4,7 @@
4 * The SH-3 and SH-4 exception vector table. 4 * The SH-3 and SH-4 exception vector table.
5 5
6 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 6 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka
7 * Copyright (C) 2003 - 2006 Paul Mundt 7 * Copyright (C) 2003 - 2008 Paul Mundt
8 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive 10 * License. See the file "COPYING" in the main directory of this archive
@@ -12,13 +12,30 @@
12 */ 12 */
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14 14
15#if !defined(CONFIG_MMU)
16#define tlb_miss_load exception_error
17#define tlb_miss_store exception_error
18#define initial_page_write exception_error
19#define tlb_protection_violation_load exception_error
20#define tlb_protection_violation_store exception_error
21#define address_error_load exception_error
22#define address_error_store exception_error
23#endif
24
25#if !defined(CONFIG_SH_FPU)
26#define fpu_error_trap_handler exception_error
27#endif
28
29#if !defined(CONFIG_KGDB_NMI)
30#define kgdb_handle_exception exception_error
31#endif
32
15 .align 2 33 .align 2
16 .data 34 .data
17 35
18ENTRY(exception_handling_table) 36ENTRY(exception_handling_table)
19 .long exception_error /* 000 */ 37 .long exception_error /* 000 */
20 .long exception_error 38 .long exception_error
21#if defined(CONFIG_MMU)
22 .long tlb_miss_load /* 040 */ 39 .long tlb_miss_load /* 040 */
23 .long tlb_miss_store 40 .long tlb_miss_store
24 .long initial_page_write 41 .long initial_page_write
@@ -26,30 +43,13 @@ ENTRY(exception_handling_table)
26 .long tlb_protection_violation_store 43 .long tlb_protection_violation_store
27 .long address_error_load 44 .long address_error_load
28 .long address_error_store /* 100 */ 45 .long address_error_store /* 100 */
29#else
30 .long exception_error ! tlb miss load /* 040 */
31 .long exception_error ! tlb miss store
32 .long exception_error ! initial page write
33 .long exception_error ! tlb prot violation load
34 .long exception_error ! tlb prot violation store
35 .long exception_error ! address error load
36 .long exception_error ! address error store /* 100 */
37#endif
38#if defined(CONFIG_SH_FPU)
39 .long fpu_error_trap_handler /* 120 */ 46 .long fpu_error_trap_handler /* 120 */
40#else
41 .long exception_error /* 120 */
42#endif
43 .long exception_error /* 140 */ 47 .long exception_error /* 140 */
44 .long system_call ! Unconditional Trap /* 160 */ 48 .long system_call ! Unconditional Trap /* 160 */
45 .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ 49 .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */
46 .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ 50 .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/
47ENTRY(nmi_slot) 51ENTRY(nmi_slot)
48#if defined (CONFIG_KGDB_NMI)
49 .long kgdb_handle_exception /* 1C0 */ ! Allow trap to debugger 52 .long kgdb_handle_exception /* 1C0 */ ! Allow trap to debugger
50#else
51 .long exception_none /* 1C0 */ ! Not implemented yet
52#endif
53ENTRY(user_break_point_trap) 53ENTRY(user_break_point_trap)
54 .long break_point_trap /* 1E0 */ 54 .long break_point_trap /* 1E0 */
55 55
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index be4926969181..2e42572b1b11 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -50,14 +50,18 @@ int __init detect_cpu_and_cache_system(void)
50 boot_cpu_data.dcache.ways = 1; 50 boot_cpu_data.dcache.ways = 1;
51 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; 51 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES;
52 52
53 /* We don't know the chip cut */
54 boot_cpu_data.cut_major = boot_cpu_data.cut_minor = -1;
55
53 /* 56 /*
54 * Setup some generic flags we can probe on SH-4A parts 57 * Setup some generic flags we can probe on SH-4A parts
55 */ 58 */
56 if (((pvr >> 24) & 0xff) == 0x10) { 59 if (((pvr >> 16) & 0xff) == 0x10) {
57 if ((cvr & 0x10000000) == 0) 60 if ((cvr & 0x10000000) == 0)
58 boot_cpu_data.flags |= CPU_HAS_DSP; 61 boot_cpu_data.flags |= CPU_HAS_DSP;
59 62
60 boot_cpu_data.flags |= CPU_HAS_LLSC; 63 boot_cpu_data.flags |= CPU_HAS_LLSC;
64 boot_cpu_data.cut_major = pvr & 0x7f;
61 } 65 }
62 66
63 /* FPU detection works for everyone */ 67 /* FPU detection works for everyone */
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index a880e7968750..9381ad8da263 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -21,7 +21,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o
21clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o 21clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o
22clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o 22clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
23clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o 23clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
24clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o 24clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7722.o
25clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o 25clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
26clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7722.o 26clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7722.o
27clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o 27clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
deleted file mode 100644
index 7adc4f16e95a..000000000000
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * arch/sh/kernel/cpu/sh4a/clock-sh7343.c
3 *
4 * SH7343/SH7722 support for the clock framework
5 *
6 * Copyright (C) 2006 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/io.h>
15#include <asm/clock.h>
16#include <asm/freq.h>
17
18/*
19 * SH7343/SH7722 uses a common set of multipliers and divisors, so this
20 * is quite simple..
21 */
22static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
23static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
24
25#define pll_calc() (((ctrl_inl(FRQCR) >> 24) & 0x1f) + 1)
26
27static void master_clk_init(struct clk *clk)
28{
29 clk->parent = clk_get(NULL, "cpu_clk");
30}
31
32static void master_clk_recalc(struct clk *clk)
33{
34 int idx = (ctrl_inl(FRQCR) & 0x000f);
35 clk->rate *= clk->parent->rate * multipliers[idx] / divisors[idx];
36}
37
38static struct clk_ops sh7343_master_clk_ops = {
39 .init = master_clk_init,
40 .recalc = master_clk_recalc,
41};
42
43static void module_clk_init(struct clk *clk)
44{
45 clk->parent = NULL;
46 clk->rate = CONFIG_SH_PCLK_FREQ;
47}
48
49static struct clk_ops sh7343_module_clk_ops = {
50 .init = module_clk_init,
51};
52
53static void bus_clk_init(struct clk *clk)
54{
55 clk->parent = clk_get(NULL, "cpu_clk");
56}
57
58static void bus_clk_recalc(struct clk *clk)
59{
60 int idx = (ctrl_inl(FRQCR) >> 8) & 0x000f;
61 clk->rate = clk->parent->rate * multipliers[idx] / divisors[idx];
62}
63
64static struct clk_ops sh7343_bus_clk_ops = {
65 .init = bus_clk_init,
66 .recalc = bus_clk_recalc,
67};
68
69static void cpu_clk_init(struct clk *clk)
70{
71 clk->parent = clk_get(NULL, "module_clk");
72 clk->flags |= CLK_RATE_PROPAGATES;
73 clk_set_rate(clk, clk_get_rate(clk));
74}
75
76static void cpu_clk_recalc(struct clk *clk)
77{
78 int idx = (ctrl_inl(FRQCR) >> 20) & 0x000f;
79 clk->rate = clk->parent->rate * pll_calc() *
80 multipliers[idx] / divisors[idx];
81}
82
83static struct clk_ops sh7343_cpu_clk_ops = {
84 .init = cpu_clk_init,
85 .recalc = cpu_clk_recalc,
86};
87
88static struct clk_ops *sh7343_clk_ops[] = {
89 &sh7343_master_clk_ops,
90 &sh7343_module_clk_ops,
91 &sh7343_bus_clk_ops,
92 &sh7343_cpu_clk_ops,
93};
94
95void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
96{
97 if (idx < ARRAY_SIZE(sh7343_clk_ops))
98 *ops = sh7343_clk_ops[idx];
99}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 299138ebe160..db913855c2fd 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/sh/kernel/cpu/sh4a/clock-sh7722.c 2 * arch/sh/kernel/cpu/sh4a/clock-sh7722.c
3 * 3 *
4 * SH7722 & SH7366 support for the clock framework 4 * SH7343, SH7722, SH7723 & SH7366 support for the clock framework
5 * 5 *
6 * Copyright (c) 2006-2007 Nomad Global Solutions Inc 6 * Copyright (c) 2006-2007 Nomad Global Solutions Inc
7 * Based on code for sh7343 by Paul Mundt 7 * Based on code for sh7343 by Paul Mundt
@@ -14,6 +14,7 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/errno.h> 16#include <linux/errno.h>
17#include <linux/stringify.h>
17#include <asm/clock.h> 18#include <asm/clock.h>
18#include <asm/freq.h> 19#include <asm/freq.h>
19 20
@@ -411,40 +412,40 @@ static struct clk_ops sh7722_frqcr_clk_ops = {
411 * clock ops methods for SIU A/B and IrDA clock 412 * clock ops methods for SIU A/B and IrDA clock
412 * 413 *
413 */ 414 */
414static int sh7722_siu_which(struct clk *clk) 415
416#ifndef CONFIG_CPU_SUBTYPE_SH7343
417
418static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
415{ 419{
416 if (!strcmp(clk->name, "siu_a_clk")) 420 unsigned long r;
417 return 0; 421 int div;
418 if (!strcmp(clk->name, "siu_b_clk")) 422
419 return 1; 423 r = ctrl_inl(clk->arch_flags);
420#if defined(CONFIG_CPU_SUBTYPE_SH7722) 424 div = sh7722_find_divisors(clk->parent->rate, rate);
421 if (!strcmp(clk->name, "irda_clk")) 425 if (div < 0)
422 return 2; 426 return div;
423#endif 427 r = (r & ~0xF) | div;
424 return -EINVAL; 428 ctrl_outl(r, clk->arch_flags);
429 return 0;
425} 430}
426 431
427static unsigned long sh7722_siu_regs[] = { 432static void sh7722_siu_recalc(struct clk *clk)
428 [0] = SCLKACR, 433{
429 [1] = SCLKBCR, 434 unsigned long r;
430#if defined(CONFIG_CPU_SUBTYPE_SH7722) 435
431 [2] = IrDACLKCR, 436 r = ctrl_inl(clk->arch_flags);
432#endif 437 clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
433}; 438}
434 439
435static int sh7722_siu_start_stop(struct clk *clk, int enable) 440static int sh7722_siu_start_stop(struct clk *clk, int enable)
436{ 441{
437 int siu = sh7722_siu_which(clk);
438 unsigned long r; 442 unsigned long r;
439 443
440 if (siu < 0) 444 r = ctrl_inl(clk->arch_flags);
441 return siu;
442 BUG_ON(siu > 2);
443 r = ctrl_inl(sh7722_siu_regs[siu]);
444 if (enable) 445 if (enable)
445 ctrl_outl(r & ~(1 << 8), sh7722_siu_regs[siu]); 446 ctrl_outl(r & ~(1 << 8), clk->arch_flags);
446 else 447 else
447 ctrl_outl(r | (1 << 8), sh7722_siu_regs[siu]); 448 ctrl_outl(r | (1 << 8), clk->arch_flags);
448 return 0; 449 return 0;
449} 450}
450 451
@@ -458,6 +459,15 @@ static void sh7722_siu_disable(struct clk *clk)
458 sh7722_siu_start_stop(clk, 0); 459 sh7722_siu_start_stop(clk, 0);
459} 460}
460 461
462static struct clk_ops sh7722_siu_clk_ops = {
463 .recalc = sh7722_siu_recalc,
464 .set_rate = sh7722_siu_set_rate,
465 .enable = sh7722_siu_enable,
466 .disable = sh7722_siu_disable,
467};
468
469#endif /* CONFIG_CPU_SUBTYPE_SH7343 */
470
461static void sh7722_video_enable(struct clk *clk) 471static void sh7722_video_enable(struct clk *clk)
462{ 472{
463 unsigned long r; 473 unsigned long r;
@@ -494,43 +504,6 @@ static void sh7722_video_recalc(struct clk *clk)
494 clk->rate = clk->parent->rate / ((r & 0x3F) + 1); 504 clk->rate = clk->parent->rate / ((r & 0x3F) + 1);
495} 505}
496 506
497static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
498{
499 int siu = sh7722_siu_which(clk);
500 unsigned long r;
501 int div;
502
503 if (siu < 0)
504 return siu;
505 BUG_ON(siu > 2);
506 r = ctrl_inl(sh7722_siu_regs[siu]);
507 div = sh7722_find_divisors(clk->parent->rate, rate);
508 if (div < 0)
509 return div;
510 r = (r & ~0xF) | div;
511 ctrl_outl(r, sh7722_siu_regs[siu]);
512 return 0;
513}
514
515static void sh7722_siu_recalc(struct clk *clk)
516{
517 int siu = sh7722_siu_which(clk);
518 unsigned long r;
519
520 if (siu < 0)
521 return /* siu */ ;
522 BUG_ON(siu > 2);
523 r = ctrl_inl(sh7722_siu_regs[siu]);
524 clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
525}
526
527static struct clk_ops sh7722_siu_clk_ops = {
528 .recalc = sh7722_siu_recalc,
529 .set_rate = sh7722_siu_set_rate,
530 .enable = sh7722_siu_enable,
531 .disable = sh7722_siu_disable,
532};
533
534static struct clk_ops sh7722_video_clk_ops = { 507static struct clk_ops sh7722_video_clk_ops = {
535 .recalc = sh7722_video_recalc, 508 .recalc = sh7722_video_recalc,
536 .set_rate = sh7722_video_set_rate, 509 .set_rate = sh7722_video_set_rate,
@@ -560,6 +533,9 @@ static struct clk sh7722_sdram_clock = {
560 .ops = &sh7722_frqcr_clk_ops, 533 .ops = &sh7722_frqcr_clk_ops,
561}; 534};
562 535
536
537#ifndef CONFIG_CPU_SUBTYPE_SH7343
538
563/* 539/*
564 * these three clocks - SIU A, SIU B, IrDA - share the same clk_ops 540 * these three clocks - SIU A, SIU B, IrDA - share the same clk_ops
565 * methods of clk_ops determine which register they should access by 541 * methods of clk_ops determine which register they should access by
@@ -567,36 +543,151 @@ static struct clk sh7722_sdram_clock = {
567 */ 543 */
568static struct clk sh7722_siu_a_clock = { 544static struct clk sh7722_siu_a_clock = {
569 .name = "siu_a_clk", 545 .name = "siu_a_clk",
546 .arch_flags = SCLKACR,
570 .ops = &sh7722_siu_clk_ops, 547 .ops = &sh7722_siu_clk_ops,
571}; 548};
572 549
573static struct clk sh7722_siu_b_clock = { 550static struct clk sh7722_siu_b_clock = {
574 .name = "siu_b_clk", 551 .name = "siu_b_clk",
552 .arch_flags = SCLKBCR,
575 .ops = &sh7722_siu_clk_ops, 553 .ops = &sh7722_siu_clk_ops,
576}; 554};
577 555
578#if defined(CONFIG_CPU_SUBTYPE_SH7722) 556#if defined(CONFIG_CPU_SUBTYPE_SH7722)
579static struct clk sh7722_irda_clock = { 557static struct clk sh7722_irda_clock = {
580 .name = "irda_clk", 558 .name = "irda_clk",
559 .arch_flags = IrDACLKCR,
581 .ops = &sh7722_siu_clk_ops, 560 .ops = &sh7722_siu_clk_ops,
582}; 561};
583#endif 562#endif
563#endif /* CONFIG_CPU_SUBTYPE_SH7343 */
584 564
585static struct clk sh7722_video_clock = { 565static struct clk sh7722_video_clock = {
586 .name = "video_clk", 566 .name = "video_clk",
587 .ops = &sh7722_video_clk_ops, 567 .ops = &sh7722_video_clk_ops,
588}; 568};
589 569
570static int sh7722_mstpcr_start_stop(struct clk *clk, unsigned long reg,
571 int enable)
572{
573 unsigned long bit = clk->arch_flags;
574 unsigned long r;
575
576 r = ctrl_inl(reg);
577
578 if (enable)
579 r &= ~(1 << bit);
580 else
581 r |= (1 << bit);
582
583 ctrl_outl(r, reg);
584 return 0;
585}
586
587static void sh7722_mstpcr0_enable(struct clk *clk)
588{
589 sh7722_mstpcr_start_stop(clk, MSTPCR0, 1);
590}
591
592static void sh7722_mstpcr0_disable(struct clk *clk)
593{
594 sh7722_mstpcr_start_stop(clk, MSTPCR0, 0);
595}
596
597static void sh7722_mstpcr1_enable(struct clk *clk)
598{
599 sh7722_mstpcr_start_stop(clk, MSTPCR1, 1);
600}
601
602static void sh7722_mstpcr1_disable(struct clk *clk)
603{
604 sh7722_mstpcr_start_stop(clk, MSTPCR1, 0);
605}
606
607static void sh7722_mstpcr2_enable(struct clk *clk)
608{
609 sh7722_mstpcr_start_stop(clk, MSTPCR2, 1);
610}
611
612static void sh7722_mstpcr2_disable(struct clk *clk)
613{
614 sh7722_mstpcr_start_stop(clk, MSTPCR2, 0);
615}
616
617static struct clk_ops sh7722_mstpcr0_clk_ops = {
618 .enable = sh7722_mstpcr0_enable,
619 .disable = sh7722_mstpcr0_disable,
620};
621
622static struct clk_ops sh7722_mstpcr1_clk_ops = {
623 .enable = sh7722_mstpcr1_enable,
624 .disable = sh7722_mstpcr1_disable,
625};
626
627static struct clk_ops sh7722_mstpcr2_clk_ops = {
628 .enable = sh7722_mstpcr2_enable,
629 .disable = sh7722_mstpcr2_disable,
630};
631
632#define DECLARE_MSTPCRN(regnr, bitnr, bitstr) \
633{ \
634 .name = "mstp" __stringify(regnr) bitstr, \
635 .arch_flags = bitnr, \
636 .ops = &sh7722_mstpcr ## regnr ## _clk_ops, \
637}
638
639#define DECLARE_MSTPCR(regnr) \
640 DECLARE_MSTPCRN(regnr, 31, "31"), \
641 DECLARE_MSTPCRN(regnr, 30, "30"), \
642 DECLARE_MSTPCRN(regnr, 29, "29"), \
643 DECLARE_MSTPCRN(regnr, 28, "28"), \
644 DECLARE_MSTPCRN(regnr, 27, "27"), \
645 DECLARE_MSTPCRN(regnr, 26, "26"), \
646 DECLARE_MSTPCRN(regnr, 25, "25"), \
647 DECLARE_MSTPCRN(regnr, 24, "24"), \
648 DECLARE_MSTPCRN(regnr, 23, "23"), \
649 DECLARE_MSTPCRN(regnr, 22, "22"), \
650 DECLARE_MSTPCRN(regnr, 21, "21"), \
651 DECLARE_MSTPCRN(regnr, 20, "20"), \
652 DECLARE_MSTPCRN(regnr, 19, "19"), \
653 DECLARE_MSTPCRN(regnr, 18, "18"), \
654 DECLARE_MSTPCRN(regnr, 17, "17"), \
655 DECLARE_MSTPCRN(regnr, 16, "16"), \
656 DECLARE_MSTPCRN(regnr, 15, "15"), \
657 DECLARE_MSTPCRN(regnr, 14, "14"), \
658 DECLARE_MSTPCRN(regnr, 13, "13"), \
659 DECLARE_MSTPCRN(regnr, 12, "12"), \
660 DECLARE_MSTPCRN(regnr, 11, "11"), \
661 DECLARE_MSTPCRN(regnr, 10, "10"), \
662 DECLARE_MSTPCRN(regnr, 9, "09"), \
663 DECLARE_MSTPCRN(regnr, 8, "08"), \
664 DECLARE_MSTPCRN(regnr, 7, "07"), \
665 DECLARE_MSTPCRN(regnr, 6, "06"), \
666 DECLARE_MSTPCRN(regnr, 5, "05"), \
667 DECLARE_MSTPCRN(regnr, 4, "04"), \
668 DECLARE_MSTPCRN(regnr, 3, "03"), \
669 DECLARE_MSTPCRN(regnr, 2, "02"), \
670 DECLARE_MSTPCRN(regnr, 1, "01"), \
671 DECLARE_MSTPCRN(regnr, 0, "00")
672
673static struct clk sh7722_mstpcr[] = {
674 DECLARE_MSTPCR(0),
675 DECLARE_MSTPCR(1),
676 DECLARE_MSTPCR(2),
677};
678
590static struct clk *sh7722_clocks[] = { 679static struct clk *sh7722_clocks[] = {
591 &sh7722_umem_clock, 680 &sh7722_umem_clock,
592 &sh7722_sh_clock, 681 &sh7722_sh_clock,
593 &sh7722_peripheral_clock, 682 &sh7722_peripheral_clock,
594 &sh7722_sdram_clock, 683 &sh7722_sdram_clock,
684#ifndef CONFIG_CPU_SUBTYPE_SH7343
595 &sh7722_siu_a_clock, 685 &sh7722_siu_a_clock,
596 &sh7722_siu_b_clock, 686 &sh7722_siu_b_clock,
597#if defined(CONFIG_CPU_SUBTYPE_SH7722) 687#if defined(CONFIG_CPU_SUBTYPE_SH7722)
598 &sh7722_irda_clock, 688 &sh7722_irda_clock,
599#endif 689#endif
690#endif
600 &sh7722_video_clock, 691 &sh7722_video_clock,
601}; 692};
602 693
@@ -629,5 +720,11 @@ int __init arch_clk_init(void)
629 clk_register(sh7722_clocks[i]); 720 clk_register(sh7722_clocks[i]);
630 } 721 }
631 clk_put(master); 722 clk_put(master);
723
724 for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr); i++) {
725 pr_debug( "Registering mstpcr '%s'\n", sh7722_mstpcr[i].name);
726 clk_register(&sh7722_mstpcr[i]);
727 }
728
632 return 0; 729 return 0;
633} 730}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 6d4f50cd4aaf..78881b4214da 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -11,6 +11,104 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <linux/serial_sci.h> 13#include <linux/serial_sci.h>
14#include <linux/uio_driver.h>
15#include <asm/clock.h>
16
17static struct resource iic0_resources[] = {
18 [0] = {
19 .name = "IIC0",
20 .start = 0x04470000,
21 .end = 0x04470017,
22 .flags = IORESOURCE_MEM,
23 },
24 [1] = {
25 .start = 96,
26 .end = 99,
27 .flags = IORESOURCE_IRQ,
28 },
29};
30
31static struct platform_device iic0_device = {
32 .name = "i2c-sh_mobile",
33 .num_resources = ARRAY_SIZE(iic0_resources),
34 .resource = iic0_resources,
35};
36
37static struct resource iic1_resources[] = {
38 [0] = {
39 .name = "IIC1",
40 .start = 0x04750000,
41 .end = 0x04750017,
42 .flags = IORESOURCE_MEM,
43 },
44 [1] = {
45 .start = 44,
46 .end = 47,
47 .flags = IORESOURCE_IRQ,
48 },
49};
50
51static struct platform_device iic1_device = {
52 .name = "i2c-sh_mobile",
53 .num_resources = ARRAY_SIZE(iic1_resources),
54 .resource = iic1_resources,
55};
56
57static struct uio_info vpu_platform_data = {
58 .name = "VPU4",
59 .version = "0",
60 .irq = 60,
61};
62
63static struct resource vpu_resources[] = {
64 [0] = {
65 .name = "VPU",
66 .start = 0xfe900000,
67 .end = 0xfe9022eb,
68 .flags = IORESOURCE_MEM,
69 },
70 [1] = {
71 /* place holder for contiguous memory */
72 },
73};
74
75static struct platform_device vpu_device = {
76 .name = "uio_pdrv_genirq",
77 .id = 0,
78 .dev = {
79 .platform_data = &vpu_platform_data,
80 },
81 .resource = vpu_resources,
82 .num_resources = ARRAY_SIZE(vpu_resources),
83};
84
85static struct uio_info veu_platform_data = {
86 .name = "VEU",
87 .version = "0",
88 .irq = 54,
89};
90
91static struct resource veu_resources[] = {
92 [0] = {
93 .name = "VEU",
94 .start = 0xfe920000,
95 .end = 0xfe9200b7,
96 .flags = IORESOURCE_MEM,
97 },
98 [1] = {
99 /* place holder for contiguous memory */
100 },
101};
102
103static struct platform_device veu_device = {
104 .name = "uio_pdrv_genirq",
105 .id = 1,
106 .dev = {
107 .platform_data = &veu_platform_data,
108 },
109 .resource = veu_resources,
110 .num_resources = ARRAY_SIZE(veu_resources),
111};
14 112
15static struct plat_sci_port sci_platform_data[] = { 113static struct plat_sci_port sci_platform_data[] = {
16 { 114 {
@@ -32,16 +130,171 @@ static struct platform_device sci_device = {
32}; 130};
33 131
34static struct platform_device *sh7343_devices[] __initdata = { 132static struct platform_device *sh7343_devices[] __initdata = {
133 &iic0_device,
134 &iic1_device,
35 &sci_device, 135 &sci_device,
136 &vpu_device,
137 &veu_device,
36}; 138};
37 139
38static int __init sh7343_devices_setup(void) 140static int __init sh7343_devices_setup(void)
39{ 141{
142 clk_always_enable("mstp031"); /* TLB */
143 clk_always_enable("mstp030"); /* IC */
144 clk_always_enable("mstp029"); /* OC */
145 clk_always_enable("mstp028"); /* URAM */
146 clk_always_enable("mstp026"); /* XYMEM */
147 clk_always_enable("mstp023"); /* INTC3 */
148 clk_always_enable("mstp022"); /* INTC */
149 clk_always_enable("mstp020"); /* SuperHyway */
150 clk_always_enable("mstp109"); /* I2C0 */
151 clk_always_enable("mstp108"); /* I2C1 */
152 clk_always_enable("mstp202"); /* VEU */
153 clk_always_enable("mstp201"); /* VPU */
154
155 platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
156 platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
157
40 return platform_add_devices(sh7343_devices, 158 return platform_add_devices(sh7343_devices,
41 ARRAY_SIZE(sh7343_devices)); 159 ARRAY_SIZE(sh7343_devices));
42} 160}
43__initcall(sh7343_devices_setup); 161__initcall(sh7343_devices_setup);
44 162
163enum {
164 UNUSED = 0,
165
166 /* interrupt sources */
167 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
168 DMAC0, DMAC1, DMAC2, DMAC3,
169 VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU,
170 MFI, VPU, TPU, Z3D4, USBI0, USBI1,
171 MMC_ERR, MMC_TRAN, MMC_FSTAT, MMC_FRDY,
172 DMAC4, DMAC5, DMAC_DADERR,
173 KEYSC,
174 SCIF, SCIF1, SCIF2, SCIF3, SCIF4,
175 SIOF0, SIOF1, SIO,
176 FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
177 I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI,
178 I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI,
179 SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI,
180 IRDA,
181 SDHI0, SDHI1, SDHI2, SDHI3,
182 CMT, TSIF, SIU,
183 TMU0, TMU1, TMU2,
184 JPU, LCDC,
185
186 /* interrupt groups */
187
188 DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, SDHI, USB,
189};
190
191static struct intc_vect vectors[] __initdata = {
192 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
193 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
194 INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
195 INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0),
196 INTC_VECT(I2C1_ALI, 0x780), INTC_VECT(I2C1_TACKI, 0x7a0),
197 INTC_VECT(I2C1_WAITI, 0x7c0), INTC_VECT(I2C1_DTEI, 0x7e0),
198 INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820),
199 INTC_VECT(DMAC2, 0x840), INTC_VECT(DMAC3, 0x860),
200 INTC_VECT(VIO_CEUI, 0x880), INTC_VECT(VIO_BEUI, 0x8a0),
201 INTC_VECT(VIO_VEUI, 0x8c0), INTC_VECT(VOU, 0x8e0),
202 INTC_VECT(MFI, 0x900), INTC_VECT(VPU, 0x980),
203 INTC_VECT(TPU, 0x9a0), INTC_VECT(Z3D4, 0x9e0),
204 INTC_VECT(USBI0, 0xa20), INTC_VECT(USBI1, 0xa40),
205 INTC_VECT(MMC_ERR, 0xb00), INTC_VECT(MMC_TRAN, 0xb20),
206 INTC_VECT(MMC_FSTAT, 0xb40), INTC_VECT(MMC_FRDY, 0xb60),
207 INTC_VECT(DMAC4, 0xb80), INTC_VECT(DMAC5, 0xba0),
208 INTC_VECT(DMAC_DADERR, 0xbc0), INTC_VECT(KEYSC, 0xbe0),
209 INTC_VECT(SCIF, 0xc00), INTC_VECT(SCIF1, 0xc20),
210 INTC_VECT(SCIF2, 0xc40), INTC_VECT(SCIF3, 0xc60),
211 INTC_VECT(SIOF0, 0xc80), INTC_VECT(SIOF1, 0xca0),
212 INTC_VECT(SIO, 0xd00),
213 INTC_VECT(FLCTL_FLSTEI, 0xd80), INTC_VECT(FLCTL_FLENDI, 0xda0),
214 INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0),
215 INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20),
216 INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60),
217 INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0),
218 INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0),
219 INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20),
220 INTC_VECT(SIU, 0xf80),
221 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
222 INTC_VECT(TMU2, 0x440),
223 INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580),
224};
225
226static struct intc_group groups[] __initdata = {
227 INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3),
228 INTC_GROUP(VIOVOU, VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU),
229 INTC_GROUP(MMC, MMC_FRDY, MMC_FSTAT, MMC_TRAN, MMC_ERR),
230 INTC_GROUP(DMAC45, DMAC4, DMAC5, DMAC_DADERR),
231 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI,
232 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
233 INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI),
234 INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI),
235 INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI),
236 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
237 INTC_GROUP(USB, USBI0, USBI1),
238};
239
240static struct intc_mask_reg mask_registers[] __initdata = {
241 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
242 { VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } },
243 { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
244 { 0, 0, 0, VPU, 0, 0, 0, MFI } },
245 { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */
246 { SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, 0, 0, 0, IRDA } },
247 { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */
248 { 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } },
249 { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */
250 { KEYSC, DMAC_DADERR, DMAC5, DMAC4, SCIF3, SCIF2, SCIF1, SCIF } },
251 { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */
252 { 0, 0, 0, SIO, Z3D4, 0, SIOF1, SIOF0 } },
253 { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */
254 { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI,
255 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } },
256 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
257 { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } },
258 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
259 { 0, 0, 0, CMT, 0, USBI1, USBI0 } },
260 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
261 { MMC_FRDY, MMC_FSTAT, MMC_TRAN, MMC_ERR } },
262 { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */
263 { I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI, TPU, 0, 0, TSIF } },
264 { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */
265 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
266};
267
268static struct intc_prio_reg prio_registers[] __initdata = {
269 { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
270 { 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } },
271 { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, MFI, VPU } },
272 { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } },
273 { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF, SCIF1, SCIF2, SCIF3 } },
274 { 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C0 } },
275 { 0xa4080020, 0, 16, 4, /* IPRI */ { SIO, 0, TSIF, I2C1 } },
276 { 0xa4080024, 0, 16, 4, /* IPRJ */ { Z3D4, 0, SIU } },
277 { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } },
278 { 0xa408002c, 0, 16, 4, /* IPRL */ { 0, 0, TPU } },
279 { 0xa4140010, 0, 32, 4, /* INTPRI00 */
280 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
281};
282
283static struct intc_sense_reg sense_registers[] __initdata = {
284 { 0xa414001c, 16, 2, /* ICR1 */
285 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
286};
287
288static struct intc_mask_reg ack_registers[] __initdata = {
289 { 0xa4140024, 0, 8, /* INTREQ00 */
290 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
291};
292
293static DECLARE_INTC_DESC_ACK(intc_desc, "sh7343", vectors, groups,
294 mask_registers, prio_registers, sense_registers,
295 ack_registers);
296
45void __init plat_irq_setup(void) 297void __init plat_irq_setup(void)
46{ 298{
299 register_intc_controller(&intc_desc);
47} 300}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index f26b5cdad0d1..6851dba02f31 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -13,6 +13,112 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial.h> 14#include <linux/serial.h>
15#include <linux/serial_sci.h> 15#include <linux/serial_sci.h>
16#include <linux/uio_driver.h>
17#include <asm/clock.h>
18
19static struct resource iic_resources[] = {
20 [0] = {
21 .name = "IIC",
22 .start = 0x04470000,
23 .end = 0x04470017,
24 .flags = IORESOURCE_MEM,
25 },
26 [1] = {
27 .start = 96,
28 .end = 99,
29 .flags = IORESOURCE_IRQ,
30 },
31};
32
33static struct platform_device iic_device = {
34 .name = "i2c-sh_mobile",
35 .num_resources = ARRAY_SIZE(iic_resources),
36 .resource = iic_resources,
37};
38
39static struct uio_info vpu_platform_data = {
40 .name = "VPU5",
41 .version = "0",
42 .irq = 60,
43};
44
45static struct resource vpu_resources[] = {
46 [0] = {
47 .name = "VPU",
48 .start = 0xfe900000,
49 .end = 0xfe902807,
50 .flags = IORESOURCE_MEM,
51 },
52 [1] = {
53 /* place holder for contiguous memory */
54 },
55};
56
57static struct platform_device vpu_device = {
58 .name = "uio_pdrv_genirq",
59 .id = 0,
60 .dev = {
61 .platform_data = &vpu_platform_data,
62 },
63 .resource = vpu_resources,
64 .num_resources = ARRAY_SIZE(vpu_resources),
65};
66
67static struct uio_info veu0_platform_data = {
68 .name = "VEU",
69 .version = "0",
70 .irq = 54,
71};
72
73static struct resource veu0_resources[] = {
74 [0] = {
75 .name = "VEU(1)",
76 .start = 0xfe920000,
77 .end = 0xfe9200b7,
78 .flags = IORESOURCE_MEM,
79 },
80 [1] = {
81 /* place holder for contiguous memory */
82 },
83};
84
85static struct platform_device veu0_device = {
86 .name = "uio_pdrv_genirq",
87 .id = 1,
88 .dev = {
89 .platform_data = &veu0_platform_data,
90 },
91 .resource = veu0_resources,
92 .num_resources = ARRAY_SIZE(veu0_resources),
93};
94
95static struct uio_info veu1_platform_data = {
96 .name = "VEU",
97 .version = "0",
98 .irq = 27,
99};
100
101static struct resource veu1_resources[] = {
102 [0] = {
103 .name = "VEU(2)",
104 .start = 0xfe924000,
105 .end = 0xfe9240b7,
106 .flags = IORESOURCE_MEM,
107 },
108 [1] = {
109 /* place holder for contiguous memory */
110 },
111};
112
113static struct platform_device veu1_device = {
114 .name = "uio_pdrv_genirq",
115 .id = 2,
116 .dev = {
117 .platform_data = &veu1_platform_data,
118 },
119 .resource = veu1_resources,
120 .num_resources = ARRAY_SIZE(veu1_resources),
121};
16 122
17static struct plat_sci_port sci_platform_data[] = { 123static struct plat_sci_port sci_platform_data[] = {
18 { 124 {
@@ -34,11 +140,32 @@ static struct platform_device sci_device = {
34}; 140};
35 141
36static struct platform_device *sh7366_devices[] __initdata = { 142static struct platform_device *sh7366_devices[] __initdata = {
143 &iic_device,
37 &sci_device, 144 &sci_device,
145 &vpu_device,
146 &veu0_device,
147 &veu1_device,
38}; 148};
39 149
40static int __init sh7366_devices_setup(void) 150static int __init sh7366_devices_setup(void)
41{ 151{
152 clk_always_enable("mstp031"); /* TLB */
153 clk_always_enable("mstp030"); /* IC */
154 clk_always_enable("mstp029"); /* OC */
155 clk_always_enable("mstp028"); /* RSMEM */
156 clk_always_enable("mstp026"); /* XYMEM */
157 clk_always_enable("mstp023"); /* INTC3 */
158 clk_always_enable("mstp022"); /* INTC */
159 clk_always_enable("mstp020"); /* SuperHyway */
160 clk_always_enable("mstp109"); /* I2C */
161 clk_always_enable("mstp207"); /* VEU-2 */
162 clk_always_enable("mstp202"); /* VEU-1 */
163 clk_always_enable("mstp201"); /* VPU */
164
165 platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
166 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
167 platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
168
42 return platform_add_devices(sh7366_devices, 169 return platform_add_devices(sh7366_devices,
43 ARRAY_SIZE(sh7366_devices)); 170 ARRAY_SIZE(sh7366_devices));
44} 171}
@@ -97,7 +224,7 @@ static struct intc_vect vectors[] __initdata = {
97 INTC_VECT(SIU, 0xf80), 224 INTC_VECT(SIU, 0xf80),
98 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 225 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
99 INTC_VECT(TMU2, 0x440), 226 INTC_VECT(TMU2, 0x440),
100 INTC_VECT(VEU2, 0x580), INTC_VECT(LCDC, 0x580), 227 INTC_VECT(VEU2, 0x560), INTC_VECT(LCDC, 0x580),
101}; 228};
102 229
103static struct intc_group groups[] __initdata = { 230static struct intc_group groups[] __initdata = {
@@ -163,8 +290,14 @@ static struct intc_sense_reg sense_registers[] __initdata = {
163 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 290 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
164}; 291};
165 292
166static DECLARE_INTC_DESC(intc_desc, "sh7366", vectors, groups, 293static struct intc_mask_reg ack_registers[] __initdata = {
167 mask_registers, prio_registers, sense_registers); 294 { 0xa4140024, 0, 8, /* INTREQ00 */
295 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
296};
297
298static DECLARE_INTC_DESC_ACK(intc_desc, "sh7366", vectors, groups,
299 mask_registers, prio_registers, sense_registers,
300 ack_registers);
168 301
169void __init plat_irq_setup(void) 302void __init plat_irq_setup(void)
170{ 303{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 62ebccf18b3c..de1ede92176e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -12,6 +12,8 @@
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <linux/serial_sci.h> 13#include <linux/serial_sci.h>
14#include <linux/mm.h> 14#include <linux/mm.h>
15#include <linux/uio_driver.h>
16#include <asm/clock.h>
15#include <asm/mmzone.h> 17#include <asm/mmzone.h>
16 18
17static struct resource usbf_resources[] = { 19static struct resource usbf_resources[] = {
@@ -59,6 +61,62 @@ static struct platform_device iic_device = {
59 .resource = iic_resources, 61 .resource = iic_resources,
60}; 62};
61 63
64static struct uio_info vpu_platform_data = {
65 .name = "VPU4",
66 .version = "0",
67 .irq = 60,
68};
69
70static struct resource vpu_resources[] = {
71 [0] = {
72 .name = "VPU",
73 .start = 0xfe900000,
74 .end = 0xfe9022eb,
75 .flags = IORESOURCE_MEM,
76 },
77 [1] = {
78 /* place holder for contiguous memory */
79 },
80};
81
82static struct platform_device vpu_device = {
83 .name = "uio_pdrv_genirq",
84 .id = 0,
85 .dev = {
86 .platform_data = &vpu_platform_data,
87 },
88 .resource = vpu_resources,
89 .num_resources = ARRAY_SIZE(vpu_resources),
90};
91
92static struct uio_info veu_platform_data = {
93 .name = "VEU",
94 .version = "0",
95 .irq = 54,
96};
97
98static struct resource veu_resources[] = {
99 [0] = {
100 .name = "VEU",
101 .start = 0xfe920000,
102 .end = 0xfe9200b7,
103 .flags = IORESOURCE_MEM,
104 },
105 [1] = {
106 /* place holder for contiguous memory */
107 },
108};
109
110static struct platform_device veu_device = {
111 .name = "uio_pdrv_genirq",
112 .id = 1,
113 .dev = {
114 .platform_data = &veu_platform_data,
115 },
116 .resource = veu_resources,
117 .num_resources = ARRAY_SIZE(veu_resources),
118};
119
62static struct plat_sci_port sci_platform_data[] = { 120static struct plat_sci_port sci_platform_data[] = {
63 { 121 {
64 .mapbase = 0xffe00000, 122 .mapbase = 0xffe00000,
@@ -95,10 +153,27 @@ static struct platform_device *sh7722_devices[] __initdata = {
95 &usbf_device, 153 &usbf_device,
96 &iic_device, 154 &iic_device,
97 &sci_device, 155 &sci_device,
156 &vpu_device,
157 &veu_device,
98}; 158};
99 159
100static int __init sh7722_devices_setup(void) 160static int __init sh7722_devices_setup(void)
101{ 161{
162 clk_always_enable("mstp031"); /* TLB */
163 clk_always_enable("mstp030"); /* IC */
164 clk_always_enable("mstp029"); /* OC */
165 clk_always_enable("mstp028"); /* URAM */
166 clk_always_enable("mstp026"); /* XYMEM */
167 clk_always_enable("mstp022"); /* INTC */
168 clk_always_enable("mstp020"); /* SuperHyway */
169 clk_always_enable("mstp109"); /* I2C */
170 clk_always_enable("mstp211"); /* USB */
171 clk_always_enable("mstp202"); /* VEU */
172 clk_always_enable("mstp201"); /* VPU */
173
174 platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
175 platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
176
102 return platform_add_devices(sh7722_devices, 177 return platform_add_devices(sh7722_devices,
103 ARRAY_SIZE(sh7722_devices)); 178 ARRAY_SIZE(sh7722_devices));
104} 179}
@@ -229,8 +304,14 @@ static struct intc_sense_reg sense_registers[] __initdata = {
229 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 304 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
230}; 305};
231 306
232static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups, 307static struct intc_mask_reg ack_registers[] __initdata = {
233 mask_registers, prio_registers, sense_registers); 308 { 0xa4140024, 0, 8, /* INTREQ00 */
309 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
310};
311
312static DECLARE_INTC_DESC_ACK(intc_desc, "sh7722", vectors, groups,
313 mask_registers, prio_registers, sense_registers,
314 ack_registers);
234 315
235void __init plat_irq_setup(void) 316void __init plat_irq_setup(void)
236{ 317{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index a0470f2f5479..cd6baffdc896 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -12,8 +12,94 @@
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <linux/mm.h> 13#include <linux/mm.h>
14#include <linux/serial_sci.h> 14#include <linux/serial_sci.h>
15#include <linux/uio_driver.h>
16#include <asm/clock.h>
15#include <asm/mmzone.h> 17#include <asm/mmzone.h>
16 18
19static struct uio_info vpu_platform_data = {
20 .name = "VPU5",
21 .version = "0",
22 .irq = 60,
23};
24
25static struct resource vpu_resources[] = {
26 [0] = {
27 .name = "VPU",
28 .start = 0xfe900000,
29 .end = 0xfe902807,
30 .flags = IORESOURCE_MEM,
31 },
32 [1] = {
33 /* place holder for contiguous memory */
34 },
35};
36
37static struct platform_device vpu_device = {
38 .name = "uio_pdrv_genirq",
39 .id = 0,
40 .dev = {
41 .platform_data = &vpu_platform_data,
42 },
43 .resource = vpu_resources,
44 .num_resources = ARRAY_SIZE(vpu_resources),
45};
46
47static struct uio_info veu0_platform_data = {
48 .name = "VEU",
49 .version = "0",
50 .irq = 54,
51};
52
53static struct resource veu0_resources[] = {
54 [0] = {
55 .name = "VEU2H0",
56 .start = 0xfe920000,
57 .end = 0xfe92027b,
58 .flags = IORESOURCE_MEM,
59 },
60 [1] = {
61 /* place holder for contiguous memory */
62 },
63};
64
65static struct platform_device veu0_device = {
66 .name = "uio_pdrv_genirq",
67 .id = 1,
68 .dev = {
69 .platform_data = &veu0_platform_data,
70 },
71 .resource = veu0_resources,
72 .num_resources = ARRAY_SIZE(veu0_resources),
73};
74
75static struct uio_info veu1_platform_data = {
76 .name = "VEU",
77 .version = "0",
78 .irq = 27,
79};
80
81static struct resource veu1_resources[] = {
82 [0] = {
83 .name = "VEU2H1",
84 .start = 0xfe924000,
85 .end = 0xfe92427b,
86 .flags = IORESOURCE_MEM,
87 },
88 [1] = {
89 /* place holder for contiguous memory */
90 },
91};
92
93static struct platform_device veu1_device = {
94 .name = "uio_pdrv_genirq",
95 .id = 2,
96 .dev = {
97 .platform_data = &veu1_platform_data,
98 },
99 .resource = veu1_resources,
100 .num_resources = ARRAY_SIZE(veu1_resources),
101};
102
17static struct plat_sci_port sci_platform_data[] = { 103static struct plat_sci_port sci_platform_data[] = {
18 { 104 {
19 .mapbase = 0xffe00000, 105 .mapbase = 0xffe00000,
@@ -113,14 +199,56 @@ static struct platform_device sh7723_usb_host_device = {
113 .resource = sh7723_usb_host_resources, 199 .resource = sh7723_usb_host_resources,
114}; 200};
115 201
202static struct resource iic_resources[] = {
203 [0] = {
204 .name = "IIC",
205 .start = 0x04470000,
206 .end = 0x04470017,
207 .flags = IORESOURCE_MEM,
208 },
209 [1] = {
210 .start = 96,
211 .end = 99,
212 .flags = IORESOURCE_IRQ,
213 },
214};
215
216static struct platform_device iic_device = {
217 .name = "i2c-sh_mobile",
218 .num_resources = ARRAY_SIZE(iic_resources),
219 .resource = iic_resources,
220};
221
116static struct platform_device *sh7723_devices[] __initdata = { 222static struct platform_device *sh7723_devices[] __initdata = {
117 &sci_device, 223 &sci_device,
118 &rtc_device, 224 &rtc_device,
225 &iic_device,
119 &sh7723_usb_host_device, 226 &sh7723_usb_host_device,
227 &vpu_device,
228 &veu0_device,
229 &veu1_device,
120}; 230};
121 231
122static int __init sh7723_devices_setup(void) 232static int __init sh7723_devices_setup(void)
123{ 233{
234 clk_always_enable("mstp031"); /* TLB */
235 clk_always_enable("mstp030"); /* IC */
236 clk_always_enable("mstp029"); /* OC */
237 clk_always_enable("mstp024"); /* FPU */
238 clk_always_enable("mstp022"); /* INTC */
239 clk_always_enable("mstp020"); /* SuperHyway */
240 clk_always_enable("mstp000"); /* MERAM */
241 clk_always_enable("mstp109"); /* I2C */
242 clk_always_enable("mstp108"); /* RTC */
243 clk_always_enable("mstp211"); /* USB */
244 clk_always_enable("mstp206"); /* VEU2H1 */
245 clk_always_enable("mstp202"); /* VEU2H0 */
246 clk_always_enable("mstp201"); /* VPU */
247
248 platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
249 platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
250 platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
251
124 return platform_add_devices(sh7723_devices, 252 return platform_add_devices(sh7723_devices,
125 ARRAY_SIZE(sh7723_devices)); 253 ARRAY_SIZE(sh7723_devices));
126} 254}
@@ -326,8 +454,14 @@ static struct intc_sense_reg sense_registers[] __initdata = {
326 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 454 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
327}; 455};
328 456
329static DECLARE_INTC_DESC(intc_desc, "sh7723", vectors, groups, 457static struct intc_mask_reg ack_registers[] __initdata = {
330 mask_registers, prio_registers, sense_registers); 458 { 0xa4140024, 0, 8, /* INTREQ00 */
459 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
460};
461
462static DECLARE_INTC_DESC_ACK(intc_desc, "sh7723", vectors, groups,
463 mask_registers, prio_registers, sense_registers,
464 ack_registers);
331 465
332void __init plat_irq_setup(void) 466void __init plat_irq_setup(void)
333{ 467{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index f189a559462b..3c5b629887a8 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -3,6 +3,7 @@
3 * 3 *
4 * Copyright (C) 2006 Paul Mundt 4 * Copyright (C) 2006 Paul Mundt
5 * Copyright (C) 2007 Yoshihiro Shimoda 5 * Copyright (C) 2007 Yoshihiro Shimoda
6 * Copyright (C) 2008 Nobuhiro Iwamatsu
6 * 7 *
7 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -56,6 +57,11 @@ static struct plat_sci_port sci_platform_data[] = {
56 .type = PORT_SCIF, 57 .type = PORT_SCIF,
57 .irqs = { 76, 77, 79, 78 }, 58 .irqs = { 76, 77, 79, 78 },
58 }, { 59 }, {
60 .mapbase = 0xffe10000,
61 .flags = UPF_BOOT_AUTOCONF,
62 .type = PORT_SCIF,
63 .irqs = { 104, 105, 107, 106 },
64 }, {
59 .flags = 0, 65 .flags = 0,
60 } 66 }
61}; 67};
@@ -208,8 +214,8 @@ static struct intc_vect vectors[] __initdata = {
208 INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60), 214 INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60),
209 INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0), 215 INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
210 INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0), 216 INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0),
211 INTC_VECT(SCIF1_ERI, 0xf00), INTC_VECT(SCIF1_RXI, 0xf20), 217 INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20),
212 INTC_VECT(SCIF1_BRI, 0xf40), INTC_VECT(SCIF1_TXI, 0xf60), 218 INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60),
213 INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0), 219 INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0),
214 INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0), 220 INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0),
215}; 221};
@@ -290,9 +296,14 @@ static struct intc_sense_reg irq_sense_registers[] __initdata = {
290 IRQ4, IRQ5, IRQ6, IRQ7 } }, 296 IRQ4, IRQ5, IRQ6, IRQ7 } },
291}; 297};
292 298
293static DECLARE_INTC_DESC(intc_irq_desc, "sh7763-irq", irq_vectors, 299static struct intc_mask_reg irq_ack_registers[] __initdata = {
294 NULL, irq_mask_registers, irq_prio_registers, 300 { 0xffd00024, 0, 32, /* INTREQ */
295 irq_sense_registers); 301 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
302};
303
304static DECLARE_INTC_DESC_ACK(intc_irq_desc, "sh7763-irq", irq_vectors,
305 NULL, irq_mask_registers, irq_prio_registers,
306 irq_sense_registers, irq_ack_registers);
296 307
297 308
298/* External interrupt pins in IRL mode */ 309/* External interrupt pins in IRL mode */
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 18dbbe23fea1..fb8200cc7440 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -217,9 +217,14 @@ static struct intc_sense_reg irq_sense_registers[] __initdata = {
217 IRQ4, IRQ5, IRQ6, IRQ7 } }, 217 IRQ4, IRQ5, IRQ6, IRQ7 } },
218}; 218};
219 219
220static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors, 220static struct intc_mask_reg irq_ack_registers[] __initdata = {
221 NULL, irq_mask_registers, irq_prio_registers, 221 { 0xffd00024, 0, 32, /* INTREQ */
222 irq_sense_registers); 222 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
223};
224
225static DECLARE_INTC_DESC_ACK(intc_irq_desc, "sh7780-irq", irq_vectors,
226 NULL, irq_mask_registers, irq_prio_registers,
227 irq_sense_registers, irq_ack_registers);
223 228
224/* External interrupt pins in IRL mode */ 229/* External interrupt pins in IRL mode */
225 230
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 621e7329ec63..30baa63b24c8 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -238,13 +238,18 @@ static struct intc_sense_reg sense_registers[] __initdata = {
238 IRQ4, IRQ5, IRQ6, IRQ7 } }, 238 IRQ4, IRQ5, IRQ6, IRQ7 } },
239}; 239};
240 240
241static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123, 241static struct intc_mask_reg ack_registers[] __initdata = {
242 NULL, mask_registers, prio_registers, 242 { 0xffd00024, 0, 32, /* INTREQ */
243 sense_registers); 243 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
244};
245
246static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh7785-irq0123",
247 vectors_irq0123, NULL, mask_registers,
248 prio_registers, sense_registers, ack_registers);
244 249
245static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567, 250static DECLARE_INTC_DESC_ACK(intc_desc_irq4567, "sh7785-irq4567",
246 NULL, mask_registers, prio_registers, 251 vectors_irq4567, NULL, mask_registers,
247 sense_registers); 252 prio_registers, sense_registers, ack_registers);
248 253
249/* External interrupt pins in IRL mode */ 254/* External interrupt pins in IRL mode */
250 255
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index 718bd2356b34..5e0dd1933847 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -192,7 +192,7 @@ work_resched:
192 .align 2 192 .align 2
1931: .long schedule 1931: .long schedule
1942: .long do_notify_resume 1942: .long do_notify_resume
1953: .long restore_all 1953: .long resume_userspace
196#ifdef CONFIG_TRACE_IRQFLAGS 196#ifdef CONFIG_TRACE_IRQFLAGS
1974: .long trace_hardirqs_on 1974: .long trace_hardirqs_on
1985: .long trace_hardirqs_off 1985: .long trace_hardirqs_off
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 921892c351da..3326a45749d9 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -34,18 +34,6 @@ void (*pm_idle)(void);
34void (*pm_power_off)(void); 34void (*pm_power_off)(void);
35EXPORT_SYMBOL(pm_power_off); 35EXPORT_SYMBOL(pm_power_off);
36 36
37void disable_hlt(void)
38{
39 hlt_counter++;
40}
41EXPORT_SYMBOL(disable_hlt);
42
43void enable_hlt(void)
44{
45 hlt_counter--;
46}
47EXPORT_SYMBOL(enable_hlt);
48
49static int __init nohlt_setup(char *__unused) 37static int __init nohlt_setup(char *__unused)
50{ 38{
51 hlt_counter = 1; 39 hlt_counter = 1;
@@ -60,7 +48,7 @@ static int __init hlt_setup(char *__unused)
60} 48}
61__setup("hlt", hlt_setup); 49__setup("hlt", hlt_setup);
62 50
63void default_idle(void) 51static void default_idle(void)
64{ 52{
65 if (!hlt_counter) { 53 if (!hlt_counter) {
66 clear_thread_flag(TIF_POLLING_NRFLAG); 54 clear_thread_flag(TIF_POLLING_NRFLAG);
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index 0283d8133075..b9dbd2d3b4a5 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -36,16 +36,6 @@ static int hlt_counter = 1;
36 36
37#define HARD_IDLE_TIMEOUT (HZ / 3) 37#define HARD_IDLE_TIMEOUT (HZ / 3)
38 38
39void disable_hlt(void)
40{
41 hlt_counter++;
42}
43
44void enable_hlt(void)
45{
46 hlt_counter--;
47}
48
49static int __init nohlt_setup(char *__unused) 39static int __init nohlt_setup(char *__unused)
50{ 40{
51 hlt_counter = 1; 41 hlt_counter = 1;
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index fddb547f3c2b..2bc72def5cf8 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -241,6 +241,29 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
241 break; 241 break;
242 } 242 }
243#endif 243#endif
244#ifdef CONFIG_BINFMT_ELF_FDPIC
245 case PTRACE_GETFDPIC: {
246 unsigned long tmp = 0;
247
248 switch (addr) {
249 case PTRACE_GETFDPIC_EXEC:
250 tmp = child->mm->context.exec_fdpic_loadmap;
251 break;
252 case PTRACE_GETFDPIC_INTERP:
253 tmp = child->mm->context.interp_fdpic_loadmap;
254 break;
255 default:
256 break;
257 }
258
259 ret = 0;
260 if (put_user(tmp, (unsigned long *) data)) {
261 ret = -EFAULT;
262 break;
263 }
264 break;
265 }
266#endif
244 default: 267 default:
245 ret = ptrace_request(child, request, addr, data); 268 ret = ptrace_request(child, request, addr, data);
246 break; 269 break;
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index bca2bbc575db..6339d0c95715 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -398,6 +398,7 @@ const char *get_cpu_subtype(struct sh_cpuinfo *c)
398{ 398{
399 return cpu_name[c->type]; 399 return cpu_name[c->type];
400} 400}
401EXPORT_SYMBOL(get_cpu_subtype);
401 402
402#ifdef CONFIG_PROC_FS 403#ifdef CONFIG_PROC_FS
403/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ 404/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
@@ -452,6 +453,12 @@ static int show_cpuinfo(struct seq_file *m, void *v)
452 seq_printf(m, "processor\t: %d\n", cpu); 453 seq_printf(m, "processor\t: %d\n", cpu);
453 seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); 454 seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine);
454 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c)); 455 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c));
456 if (c->cut_major == -1)
457 seq_printf(m, "cut\t\t: unknown\n");
458 else if (c->cut_minor == -1)
459 seq_printf(m, "cut\t\t: %d.x\n", c->cut_major);
460 else
461 seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor);
455 462
456 show_cpuflags(m, c); 463 show_cpuflags(m, c);
457 464
diff --git a/arch/sh/kernel/signal_32.c b/arch/sh/kernel/signal_32.c
index f311551d9a05..4bbbde895a53 100644
--- a/arch/sh/kernel/signal_32.c
+++ b/arch/sh/kernel/signal_32.c
@@ -33,6 +33,11 @@
33 33
34#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 34#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
35 35
36struct fdpic_func_descriptor {
37 unsigned long text;
38 unsigned long GOT;
39};
40
36/* 41/*
37 * Atomically swap in the new signal mask, and wait for a signal. 42 * Atomically swap in the new signal mask, and wait for a signal.
38 */ 43 */
@@ -368,6 +373,7 @@ static int setup_frame(int sig, struct k_sigaction *ka,
368 err |= __put_user(OR_R0_R0, &frame->retcode[6]); 373 err |= __put_user(OR_R0_R0, &frame->retcode[6]);
369 err |= __put_user((__NR_sigreturn), &frame->retcode[7]); 374 err |= __put_user((__NR_sigreturn), &frame->retcode[7]);
370 regs->pr = (unsigned long) frame->retcode; 375 regs->pr = (unsigned long) frame->retcode;
376 flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode));
371 } 377 }
372 378
373 if (err) 379 if (err)
@@ -378,18 +384,21 @@ static int setup_frame(int sig, struct k_sigaction *ka,
378 regs->regs[4] = signal; /* Arg for signal handler */ 384 regs->regs[4] = signal; /* Arg for signal handler */
379 regs->regs[5] = 0; 385 regs->regs[5] = 0;
380 regs->regs[6] = (unsigned long) &frame->sc; 386 regs->regs[6] = (unsigned long) &frame->sc;
381 regs->pc = (unsigned long) ka->sa.sa_handler; 387
388 if (current->personality & FDPIC_FUNCPTRS) {
389 struct fdpic_func_descriptor __user *funcptr =
390 (struct fdpic_func_descriptor __user *)ka->sa.sa_handler;
391
392 __get_user(regs->pc, &funcptr->text);
393 __get_user(regs->regs[12], &funcptr->GOT);
394 } else
395 regs->pc = (unsigned long)ka->sa.sa_handler;
382 396
383 set_fs(USER_DS); 397 set_fs(USER_DS);
384 398
385 pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", 399 pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
386 current->comm, task_pid_nr(current), frame, regs->pc, regs->pr); 400 current->comm, task_pid_nr(current), frame, regs->pc, regs->pr);
387 401
388 flush_cache_sigtramp(regs->pr);
389
390 if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode))
391 flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES);
392
393 return 0; 402 return 0;
394 403
395give_sigsegv: 404give_sigsegv:
@@ -458,17 +467,22 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
458 regs->regs[4] = signal; /* Arg for signal handler */ 467 regs->regs[4] = signal; /* Arg for signal handler */
459 regs->regs[5] = (unsigned long) &frame->info; 468 regs->regs[5] = (unsigned long) &frame->info;
460 regs->regs[6] = (unsigned long) &frame->uc; 469 regs->regs[6] = (unsigned long) &frame->uc;
461 regs->pc = (unsigned long) ka->sa.sa_handler; 470
471 if (current->personality & FDPIC_FUNCPTRS) {
472 struct fdpic_func_descriptor __user *funcptr =
473 (struct fdpic_func_descriptor __user *)ka->sa.sa_handler;
474
475 __get_user(regs->pc, &funcptr->text);
476 __get_user(regs->regs[12], &funcptr->GOT);
477 } else
478 regs->pc = (unsigned long)ka->sa.sa_handler;
462 479
463 set_fs(USER_DS); 480 set_fs(USER_DS);
464 481
465 pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", 482 pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
466 current->comm, task_pid_nr(current), frame, regs->pc, regs->pr); 483 current->comm, task_pid_nr(current), frame, regs->pc, regs->pr);
467 484
468 flush_cache_sigtramp(regs->pr); 485 flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode));
469
470 if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode))
471 flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES);
472 486
473 return 0; 487 return 0;
474 488
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index a46cc3a41148..0af693e65764 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -343,3 +343,9 @@ ENTRY(sys_call_table)
343 .long sys_fallocate 343 .long sys_fallocate
344 .long sys_timerfd_settime /* 325 */ 344 .long sys_timerfd_settime /* 325 */
345 .long sys_timerfd_gettime 345 .long sys_timerfd_gettime
346 .long sys_signalfd4
347 .long sys_eventfd2
348 .long sys_epoll_create1
349 .long sys_dup3 /* 330 */
350 .long sys_pipe2
351 .long sys_inotify_init1
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S
index d5d7843aad94..0b436aa3cad7 100644
--- a/arch/sh/kernel/syscalls_64.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -381,3 +381,9 @@ sys_call_table:
381 .long sys_fallocate 381 .long sys_fallocate
382 .long sys_timerfd_settime 382 .long sys_timerfd_settime
383 .long sys_timerfd_gettime 383 .long sys_timerfd_gettime
384 .long sys_signalfd4 /* 355 */
385 .long sys_eventfd2
386 .long sys_epoll_create1
387 .long sys_dup3
388 .long sys_pipe2
389 .long sys_inotify_init1 /* 360 */
diff --git a/arch/sh/kernel/time_32.c b/arch/sh/kernel/time_32.c
index 7281342c044d..0758b5ee8180 100644
--- a/arch/sh/kernel/time_32.c
+++ b/arch/sh/kernel/time_32.c
@@ -211,7 +211,7 @@ unsigned long sh_hpt_frequency = 0;
211 211
212#define NSEC_PER_CYC_SHIFT 10 212#define NSEC_PER_CYC_SHIFT 10
213 213
214struct clocksource clocksource_sh = { 214static struct clocksource clocksource_sh = {
215 .name = "SuperH", 215 .name = "SuperH",
216 .rating = 200, 216 .rating = 200,
217 .mask = CLOCKSOURCE_MASK(32), 217 .mask = CLOCKSOURCE_MASK(32),
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index 8935570008d2..1ca9ad49b541 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -209,7 +209,7 @@ static int tmu_timer_init(void)
209 return 0; 209 return 0;
210} 210}
211 211
212struct sys_timer_ops tmu_timer_ops = { 212static struct sys_timer_ops tmu_timer_ops = {
213 .init = tmu_timer_init, 213 .init = tmu_timer_init,
214 .start = tmu_timer_start, 214 .start = tmu_timer_start,
215 .stop = tmu_timer_stop, 215 .stop = tmu_timer_stop,
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index e08b3bfeb656..511a9426cec5 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -43,6 +43,7 @@
43# define TRAP_ILLEGAL_SLOT_INST 6 43# define TRAP_ILLEGAL_SLOT_INST 6
44# define TRAP_ADDRESS_ERROR 9 44# define TRAP_ADDRESS_ERROR 9
45# ifdef CONFIG_CPU_SH2A 45# ifdef CONFIG_CPU_SH2A
46# define TRAP_FPU_ERROR 13
46# define TRAP_DIVZERO_ERROR 17 47# define TRAP_DIVZERO_ERROR 17
47# define TRAP_DIVOVF_ERROR 18 48# define TRAP_DIVOVF_ERROR 18
48# endif 49# endif
@@ -851,6 +852,9 @@ void __init trap_init(void)
851#ifdef CONFIG_CPU_SH2A 852#ifdef CONFIG_CPU_SH2A
852 set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error); 853 set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error);
853 set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error); 854 set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error);
855#ifdef CONFIG_SH_FPU
856 set_exception_table_vec(TRAP_FPU_ERROR, fpu_error_trap_handler);
857#endif
854#endif 858#endif
855 859
856 /* Setup VBR for boot cpu */ 860 /* Setup VBR for boot cpu */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 21:28:55 -0500