diff options
Diffstat (limited to 'arch/sh/kernel/timers')
-rw-r--r-- | arch/sh/kernel/timers/timer-cmt.c | 9 | ||||
-rw-r--r-- | arch/sh/kernel/timers/timer-mtu2.c | 10 | ||||
-rw-r--r-- | arch/sh/kernel/timers/timer-tmu.c | 9 |
3 files changed, 3 insertions, 25 deletions
diff --git a/arch/sh/kernel/timers/timer-cmt.c b/arch/sh/kernel/timers/timer-cmt.c index 24b03996da51..95581dccbbfd 100644 --- a/arch/sh/kernel/timers/timer-cmt.c +++ b/arch/sh/kernel/timers/timer-cmt.c | |||
@@ -11,7 +11,6 @@ | |||
11 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
13 | #include <linux/interrupt.h> | 13 | #include <linux/interrupt.h> |
14 | #include <linux/spinlock.h> | ||
15 | #include <linux/seqlock.h> | 14 | #include <linux/seqlock.h> |
16 | #include <asm/timer.h> | 15 | #include <asm/timer.h> |
17 | #include <asm/rtc.h> | 16 | #include <asm/rtc.h> |
@@ -46,13 +45,9 @@ | |||
46 | #error "Unknown CPU SUBTYPE" | 45 | #error "Unknown CPU SUBTYPE" |
47 | #endif | 46 | #endif |
48 | 47 | ||
49 | static DEFINE_SPINLOCK(cmt0_lock); | ||
50 | |||
51 | static unsigned long cmt_timer_get_offset(void) | 48 | static unsigned long cmt_timer_get_offset(void) |
52 | { | 49 | { |
53 | int count; | 50 | int count; |
54 | unsigned long flags; | ||
55 | |||
56 | static unsigned short count_p = 0xffff; /* for the first call after boot */ | 51 | static unsigned short count_p = 0xffff; /* for the first call after boot */ |
57 | static unsigned long jiffies_p = 0; | 52 | static unsigned long jiffies_p = 0; |
58 | 53 | ||
@@ -61,7 +56,6 @@ static unsigned long cmt_timer_get_offset(void) | |||
61 | */ | 56 | */ |
62 | unsigned long jiffies_t; | 57 | unsigned long jiffies_t; |
63 | 58 | ||
64 | spin_lock_irqsave(&cmt0_lock, flags); | ||
65 | /* timer count may underflow right here */ | 59 | /* timer count may underflow right here */ |
66 | count = ctrl_inw(CMT_CMCOR_0); | 60 | count = ctrl_inw(CMT_CMCOR_0); |
67 | count -= ctrl_inw(CMT_CMCNT_0); | 61 | count -= ctrl_inw(CMT_CMCNT_0); |
@@ -88,7 +82,6 @@ static unsigned long cmt_timer_get_offset(void) | |||
88 | jiffies_p = jiffies_t; | 82 | jiffies_p = jiffies_t; |
89 | 83 | ||
90 | count_p = count; | 84 | count_p = count; |
91 | spin_unlock_irqrestore(&cmt0_lock, flags); | ||
92 | 85 | ||
93 | count = ((LATCH-1) - count) * TICK_SIZE; | 86 | count = ((LATCH-1) - count) * TICK_SIZE; |
94 | count = (count + LATCH/2) / LATCH; | 87 | count = (count + LATCH/2) / LATCH; |
@@ -122,7 +115,7 @@ static irqreturn_t cmt_timer_interrupt(int irq, void *dev_id) | |||
122 | static struct irqaction cmt_irq = { | 115 | static struct irqaction cmt_irq = { |
123 | .name = "timer", | 116 | .name = "timer", |
124 | .handler = cmt_timer_interrupt, | 117 | .handler = cmt_timer_interrupt, |
125 | .flags = IRQF_DISABLED, | 118 | .flags = IRQF_DISABLED | IRQF_TIMER, |
126 | .mask = CPU_MASK_NONE, | 119 | .mask = CPU_MASK_NONE, |
127 | }; | 120 | }; |
128 | 121 | ||
diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c index 92c98b5b11ea..201f0a62132f 100644 --- a/arch/sh/kernel/timers/timer-mtu2.c +++ b/arch/sh/kernel/timers/timer-mtu2.c | |||
@@ -12,7 +12,6 @@ | |||
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
15 | #include <linux/spinlock.h> | ||
16 | #include <linux/seqlock.h> | 15 | #include <linux/seqlock.h> |
17 | #include <asm/timer.h> | 16 | #include <asm/timer.h> |
18 | #include <asm/io.h> | 17 | #include <asm/io.h> |
@@ -28,9 +27,6 @@ | |||
28 | * However, we can implement channel cascade if we go the overflow route and | 27 | * However, we can implement channel cascade if we go the overflow route and |
29 | * get away with using 2 MTU2 channels as a 32-bit timer. | 28 | * get away with using 2 MTU2 channels as a 32-bit timer. |
30 | */ | 29 | */ |
31 | |||
32 | static DEFINE_SPINLOCK(mtu2_lock); | ||
33 | |||
34 | #define MTU2_TSTR 0xfffe4280 | 30 | #define MTU2_TSTR 0xfffe4280 |
35 | #define MTU2_TCR_1 0xfffe4380 | 31 | #define MTU2_TCR_1 0xfffe4380 |
36 | #define MTU2_TMDR_1 0xfffe4381 | 32 | #define MTU2_TMDR_1 0xfffe4381 |
@@ -55,8 +51,6 @@ static DEFINE_SPINLOCK(mtu2_lock); | |||
55 | static unsigned long mtu2_timer_get_offset(void) | 51 | static unsigned long mtu2_timer_get_offset(void) |
56 | { | 52 | { |
57 | int count; | 53 | int count; |
58 | unsigned long flags; | ||
59 | |||
60 | static int count_p = 0x7fff; /* for the first call after boot */ | 54 | static int count_p = 0x7fff; /* for the first call after boot */ |
61 | static unsigned long jiffies_p = 0; | 55 | static unsigned long jiffies_p = 0; |
62 | 56 | ||
@@ -65,7 +59,6 @@ static unsigned long mtu2_timer_get_offset(void) | |||
65 | */ | 59 | */ |
66 | unsigned long jiffies_t; | 60 | unsigned long jiffies_t; |
67 | 61 | ||
68 | spin_lock_irqsave(&mtu2_lock, flags); | ||
69 | /* timer count may underflow right here */ | 62 | /* timer count may underflow right here */ |
70 | count = ctrl_inw(MTU2_TCNT_1); /* read the latched count */ | 63 | count = ctrl_inw(MTU2_TCNT_1); /* read the latched count */ |
71 | 64 | ||
@@ -90,7 +83,6 @@ static unsigned long mtu2_timer_get_offset(void) | |||
90 | jiffies_p = jiffies_t; | 83 | jiffies_p = jiffies_t; |
91 | 84 | ||
92 | count_p = count; | 85 | count_p = count; |
93 | spin_unlock_irqrestore(&mtu2_lock, flags); | ||
94 | 86 | ||
95 | count = ((LATCH-1) - count) * TICK_SIZE; | 87 | count = ((LATCH-1) - count) * TICK_SIZE; |
96 | count = (count + LATCH/2) / LATCH; | 88 | count = (count + LATCH/2) / LATCH; |
@@ -118,7 +110,7 @@ static irqreturn_t mtu2_timer_interrupt(int irq, void *dev_id) | |||
118 | static struct irqaction mtu2_irq = { | 110 | static struct irqaction mtu2_irq = { |
119 | .name = "timer", | 111 | .name = "timer", |
120 | .handler = mtu2_timer_interrupt, | 112 | .handler = mtu2_timer_interrupt, |
121 | .flags = IRQF_DISABLED, | 113 | .flags = IRQF_DISABLED | IRQF_TIMER, |
122 | .mask = CPU_MASK_NONE, | 114 | .mask = CPU_MASK_NONE, |
123 | }; | 115 | }; |
124 | 116 | ||
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c index 06a70db7386d..b9ed8a387555 100644 --- a/arch/sh/kernel/timers/timer-tmu.c +++ b/arch/sh/kernel/timers/timer-tmu.c | |||
@@ -17,7 +17,6 @@ | |||
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
19 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
20 | #include <linux/spinlock.h> | ||
21 | #include <linux/seqlock.h> | 20 | #include <linux/seqlock.h> |
22 | #include <asm/timer.h> | 21 | #include <asm/timer.h> |
23 | #include <asm/rtc.h> | 22 | #include <asm/rtc.h> |
@@ -31,13 +30,9 @@ | |||
31 | 30 | ||
32 | #define TMU0_TCR_CALIB 0x0000 | 31 | #define TMU0_TCR_CALIB 0x0000 |
33 | 32 | ||
34 | static DEFINE_SPINLOCK(tmu0_lock); | ||
35 | |||
36 | static unsigned long tmu_timer_get_offset(void) | 33 | static unsigned long tmu_timer_get_offset(void) |
37 | { | 34 | { |
38 | int count; | 35 | int count; |
39 | unsigned long flags; | ||
40 | |||
41 | static int count_p = 0x7fffffff; /* for the first call after boot */ | 36 | static int count_p = 0x7fffffff; /* for the first call after boot */ |
42 | static unsigned long jiffies_p = 0; | 37 | static unsigned long jiffies_p = 0; |
43 | 38 | ||
@@ -46,7 +41,6 @@ static unsigned long tmu_timer_get_offset(void) | |||
46 | */ | 41 | */ |
47 | unsigned long jiffies_t; | 42 | unsigned long jiffies_t; |
48 | 43 | ||
49 | spin_lock_irqsave(&tmu0_lock, flags); | ||
50 | /* timer count may underflow right here */ | 44 | /* timer count may underflow right here */ |
51 | count = ctrl_inl(TMU0_TCNT); /* read the latched count */ | 45 | count = ctrl_inl(TMU0_TCNT); /* read the latched count */ |
52 | 46 | ||
@@ -72,7 +66,6 @@ static unsigned long tmu_timer_get_offset(void) | |||
72 | jiffies_p = jiffies_t; | 66 | jiffies_p = jiffies_t; |
73 | 67 | ||
74 | count_p = count; | 68 | count_p = count; |
75 | spin_unlock_irqrestore(&tmu0_lock, flags); | ||
76 | 69 | ||
77 | count = ((LATCH-1) - count) * TICK_SIZE; | 70 | count = ((LATCH-1) - count) * TICK_SIZE; |
78 | count = (count + LATCH/2) / LATCH; | 71 | count = (count + LATCH/2) / LATCH; |
@@ -106,7 +99,7 @@ static irqreturn_t tmu_timer_interrupt(int irq, void *dummy) | |||
106 | static struct irqaction tmu_irq = { | 99 | static struct irqaction tmu_irq = { |
107 | .name = "timer", | 100 | .name = "timer", |
108 | .handler = tmu_timer_interrupt, | 101 | .handler = tmu_timer_interrupt, |
109 | .flags = IRQF_DISABLED, | 102 | .flags = IRQF_DISABLED | IRQF_TIMER, |
110 | .mask = CPU_MASK_NONE, | 103 | .mask = CPU_MASK_NONE, |
111 | }; | 104 | }; |
112 | 105 | ||