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-rw-r--r--arch/sh/kernel/cpu/Makefile2
-rw-r--r--arch/sh/kernel/cpu/bus.c197
-rw-r--r--arch/sh/kernel/cpu/clock.c13
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c59
4 files changed, 31 insertions, 240 deletions
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 5bfc33bec5d0..59d5b748752f 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the Linux/SuperH CPU-specifc backends. 2# Makefile for the Linux/SuperH CPU-specifc backends.
3# 3#
4 4
5obj-y += irq/ init.o bus.o clock.o 5obj-y += irq/ init.o clock.o
6 6
7obj-$(CONFIG_CPU_SH2) += sh2/ 7obj-$(CONFIG_CPU_SH2) += sh2/
8obj-$(CONFIG_CPU_SH3) += sh3/ 8obj-$(CONFIG_CPU_SH3) += sh3/
diff --git a/arch/sh/kernel/cpu/bus.c b/arch/sh/kernel/cpu/bus.c
deleted file mode 100644
index fc6c4bd40c65..000000000000
--- a/arch/sh/kernel/cpu/bus.c
+++ /dev/null
@@ -1,197 +0,0 @@
1/*
2 * arch/sh/kernel/cpu/bus.c
3 *
4 * Virtual bus for SuperH.
5 *
6 * Copyright (C) 2004 Paul Mundt
7 *
8 * Shamelessly cloned from arch/arm/mach-omap/bus.c, which was written
9 * by:
10 *
11 * Copyright (C) 2003 - 2004 Nokia Corporation
12 * Written by Tony Lindgren <tony@atomide.com>
13 * Portions of code based on sa1111.c.
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 */
20#include <linux/kernel.h>
21#include <linux/device.h>
22#include <linux/init.h>
23#include <linux/module.h>
24#include <asm/bus-sh.h>
25
26static int sh_bus_match(struct device *dev, struct device_driver *drv)
27{
28 struct sh_driver *shdrv = to_sh_driver(drv);
29 struct sh_dev *shdev = to_sh_dev(dev);
30
31 return shdev->dev_id == shdrv->dev_id;
32}
33
34static int sh_bus_suspend(struct device *dev, pm_message_t state)
35{
36 struct sh_dev *shdev = to_sh_dev(dev);
37 struct sh_driver *shdrv = to_sh_driver(dev->driver);
38
39 if (shdrv && shdrv->suspend)
40 return shdrv->suspend(shdev, state);
41
42 return 0;
43}
44
45static int sh_bus_resume(struct device *dev)
46{
47 struct sh_dev *shdev = to_sh_dev(dev);
48 struct sh_driver *shdrv = to_sh_driver(dev->driver);
49
50 if (shdrv && shdrv->resume)
51 return shdrv->resume(shdev);
52
53 return 0;
54}
55
56static int sh_device_probe(struct device *dev)
57{
58 struct sh_dev *shdev = to_sh_dev(dev);
59 struct sh_driver *shdrv = to_sh_driver(dev->driver);
60
61 if (shdrv && shdrv->probe)
62 return shdrv->probe(shdev);
63
64 return -ENODEV;
65}
66
67static int sh_device_remove(struct device *dev)
68{
69 struct sh_dev *shdev = to_sh_dev(dev);
70 struct sh_driver *shdrv = to_sh_driver(dev->driver);
71
72 if (shdrv && shdrv->remove)
73 return shdrv->remove(shdev);
74
75 return 0;
76}
77
78static struct device sh_bus_devices[SH_NR_BUSES] = {
79 {
80 .bus_id = SH_BUS_NAME_VIRT,
81 },
82};
83
84struct bus_type sh_bus_types[SH_NR_BUSES] = {
85 {
86 .name = SH_BUS_NAME_VIRT,
87 .match = sh_bus_match,
88 .probe = sh_bus_probe,
89 .remove = sh_bus_remove,
90 .suspend = sh_bus_suspend,
91 .resume = sh_bus_resume,
92 },
93};
94
95int sh_device_register(struct sh_dev *dev)
96{
97 if (!dev)
98 return -EINVAL;
99
100 if (dev->bus_id < 0 || dev->bus_id >= SH_NR_BUSES) {
101 printk(KERN_ERR "%s: bus_id invalid: %s bus: %d\n",
102 __FUNCTION__, dev->name, dev->bus_id);
103 return -EINVAL;
104 }
105
106 dev->dev.parent = &sh_bus_devices[dev->bus_id];
107 dev->dev.bus = &sh_bus_types[dev->bus_id];
108
109 /* This is needed for USB OHCI to work */
110 if (dev->dma_mask)
111 dev->dev.dma_mask = dev->dma_mask;
112 if (dev->coherent_dma_mask)
113 dev->dev.coherent_dma_mask = dev->coherent_dma_mask;
114
115 snprintf(dev->dev.bus_id, BUS_ID_SIZE, "%s%u",
116 dev->name, dev->dev_id);
117
118 printk(KERN_INFO "Registering SH device '%s'. Parent at %s\n",
119 dev->dev.bus_id, dev->dev.parent->bus_id);
120
121 return device_register(&dev->dev);
122}
123
124void sh_device_unregister(struct sh_dev *dev)
125{
126 device_unregister(&dev->dev);
127}
128
129int sh_driver_register(struct sh_driver *drv)
130{
131 if (!drv)
132 return -EINVAL;
133
134 if (drv->bus_id < 0 || drv->bus_id >= SH_NR_BUSES) {
135 printk(KERN_ERR "%s: bus_id invalid: bus: %d device %d\n",
136 __FUNCTION__, drv->bus_id, drv->dev_id);
137 return -EINVAL;
138 }
139
140 drv->drv.bus = &sh_bus_types[drv->bus_id];
141
142 return driver_register(&drv->drv);
143}
144
145void sh_driver_unregister(struct sh_driver *drv)
146{
147 driver_unregister(&drv->drv);
148}
149
150static int __init sh_bus_init(void)
151{
152 int i, ret = 0;
153
154 for (i = 0; i < SH_NR_BUSES; i++) {
155 ret = device_register(&sh_bus_devices[i]);
156 if (ret != 0) {
157 printk(KERN_ERR "Unable to register bus device %s\n",
158 sh_bus_devices[i].bus_id);
159 continue;
160 }
161
162 ret = bus_register(&sh_bus_types[i]);
163 if (ret != 0) {
164 printk(KERN_ERR "Unable to register bus %s\n",
165 sh_bus_types[i].name);
166 device_unregister(&sh_bus_devices[i]);
167 }
168 }
169
170 printk(KERN_INFO "SH Virtual Bus initialized\n");
171
172 return ret;
173}
174
175static void __exit sh_bus_exit(void)
176{
177 int i;
178
179 for (i = 0; i < SH_NR_BUSES; i++) {
180 bus_unregister(&sh_bus_types[i]);
181 device_unregister(&sh_bus_devices[i]);
182 }
183}
184
185module_init(sh_bus_init);
186module_exit(sh_bus_exit);
187
188MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
189MODULE_DESCRIPTION("SH Virtual Bus");
190MODULE_LICENSE("GPL");
191
192EXPORT_SYMBOL(sh_bus_types);
193EXPORT_SYMBOL(sh_device_register);
194EXPORT_SYMBOL(sh_device_unregister);
195EXPORT_SYMBOL(sh_driver_register);
196EXPORT_SYMBOL(sh_driver_unregister);
197
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 989e7fdd524d..97fa37f42b84 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -38,9 +38,7 @@ static DECLARE_MUTEX(clock_list_sem);
38static struct clk master_clk = { 38static struct clk master_clk = {
39 .name = "master_clk", 39 .name = "master_clk",
40 .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES, 40 .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
41#ifdef CONFIG_SH_PCLK_FREQ_BOOL
42 .rate = CONFIG_SH_PCLK_FREQ, 41 .rate = CONFIG_SH_PCLK_FREQ,
43#endif
44}; 42};
45 43
46static struct clk module_clk = { 44static struct clk module_clk = {
@@ -227,16 +225,7 @@ int __init clk_init(void)
227{ 225{
228 int i, ret = 0; 226 int i, ret = 0;
229 227
230 if (unlikely(!master_clk.rate)) 228 BUG_ON(unlikely(!master_clk.rate));
231 /*
232 * NOTE: This will break if the default divisor has been
233 * changed.
234 *
235 * No one should be changing the default on us however,
236 * expect that a sane value for CONFIG_SH_PCLK_FREQ will
237 * be defined in the event of a different divisor.
238 */
239 master_clk.rate = get_timer_frequency() * 4;
240 229
241 for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) { 230 for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
242 struct clk *clk = onchip_clocks[i]; 231 struct clk *clk = onchip_clocks[i];
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index fdbd718ae5c6..e55150ed0856 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -108,8 +108,7 @@ static void end_ipr_irq(unsigned int irq)
108 enable_ipr_irq(irq); 108 enable_ipr_irq(irq);
109} 109}
110 110
111void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, 111void make_ipr_irq(unsigned int irq, unsigned int addr, int pos, int priority)
112 int priority, int maskpos)
113{ 112{
114 disable_irq_nosync(irq); 113 disable_irq_nosync(irq);
115 ipr_data[irq].addr = addr; 114 ipr_data[irq].addr = addr;
@@ -123,44 +122,44 @@ void make_ipr_irq(unsigned int irq, unsigned int addr, int pos,
123void __init init_IRQ(void) 122void __init init_IRQ(void)
124{ 123{
125#ifndef CONFIG_CPU_SUBTYPE_SH7780 124#ifndef CONFIG_CPU_SUBTYPE_SH7780
126 make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY, 0); 125 make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY);
127 make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY, 0); 126 make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY);
128#if defined(CONFIG_SH_RTC) 127#if defined(CONFIG_SH_RTC)
129 make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY, 0); 128 make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY);
130#endif 129#endif
131 130
132#ifdef SCI_ERI_IRQ 131#ifdef SCI_ERI_IRQ
133 make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0); 132 make_ipr_irq(SCI_ERI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
134 make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0); 133 make_ipr_irq(SCI_RXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
135 make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY, 0); 134 make_ipr_irq(SCI_TXI_IRQ, SCI_IPR_ADDR, SCI_IPR_POS, SCI_PRIORITY);
136#endif 135#endif
137 136
138#ifdef SCIF1_ERI_IRQ 137#ifdef SCIF1_ERI_IRQ
139 make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); 138 make_ipr_irq(SCIF1_ERI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
140 make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); 139 make_ipr_irq(SCIF1_RXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
141 make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); 140 make_ipr_irq(SCIF1_BRI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
142 make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY, 0); 141 make_ipr_irq(SCIF1_TXI_IRQ, SCIF1_IPR_ADDR, SCIF1_IPR_POS, SCIF1_PRIORITY);
143#endif 142#endif
144 143
145#if defined(CONFIG_CPU_SUBTYPE_SH7300) 144#if defined(CONFIG_CPU_SUBTYPE_SH7300)
146 make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY, 0); 145 make_ipr_irq(SCIF0_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS, SCIF0_PRIORITY);
147 make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY, 0); 146 make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
148 make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY, 0); 147 make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
149 make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY, 0); 148 make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
150#endif 149#endif
151 150
152#ifdef SCIF_ERI_IRQ 151#ifdef SCIF_ERI_IRQ
153 make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); 152 make_ipr_irq(SCIF_ERI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
154 make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); 153 make_ipr_irq(SCIF_RXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
155 make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); 154 make_ipr_irq(SCIF_BRI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
156 make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY, 0); 155 make_ipr_irq(SCIF_TXI_IRQ, SCIF_IPR_ADDR, SCIF_IPR_POS, SCIF_PRIORITY);
157#endif 156#endif
158 157
159#ifdef IRDA_ERI_IRQ 158#ifdef IRDA_ERI_IRQ
160 make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); 159 make_ipr_irq(IRDA_ERI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
161 make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); 160 make_ipr_irq(IRDA_RXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
162 make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); 161 make_ipr_irq(IRDA_BRI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
163 make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY, 0); 162 make_ipr_irq(IRDA_TXI_IRQ, IRDA_IPR_ADDR, IRDA_IPR_POS, IRDA_PRIORITY);
164#endif 163#endif
165 164
166#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 165#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \
@@ -175,12 +174,12 @@ void __init init_IRQ(void)
175 * You should set corresponding bits of PFC to "00" 174 * You should set corresponding bits of PFC to "00"
176 * to enable these interrupts. 175 * to enable these interrupts.
177 */ 176 */
178 make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY, 0); 177 make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, IRQ0_PRIORITY);
179 make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY, 0); 178 make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY);
180 make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY, 0); 179 make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY);
181 make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY, 0); 180 make_ipr_irq(IRQ3_IRQ, IRQ3_IPR_ADDR, IRQ3_IPR_POS, IRQ3_PRIORITY);
182 make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY, 0); 181 make_ipr_irq(IRQ4_IRQ, IRQ4_IPR_ADDR, IRQ4_IPR_POS, IRQ4_PRIORITY);
183 make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY, 0); 182 make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR, IRQ5_IPR_POS, IRQ5_PRIORITY);
184#endif 183#endif
185#endif 184#endif
186 185