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Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7786.c')
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c29
1 files changed, 9 insertions, 20 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 93e0d2c017e8..b70049470a0b 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -595,9 +595,8 @@ enum {
595 HSPI, 595 HSPI,
596 GPIO0, GPIO1, 596 GPIO0, GPIO1,
597 Thermal, 597 Thermal,
598 INTC0, INTC1, INTC2, INTC3, INTC4, INTC5, INTC6, INTC7, 598 INTICI0, INTICI1, INTICI2, INTICI3,
599 599 INTICI4, INTICI5, INTICI6, INTICI7,
600 /* interrupt groups */
601}; 600};
602 601
603static struct intc_vect vectors[] __initdata = { 602static struct intc_vect vectors[] __initdata = {
@@ -638,10 +637,12 @@ static struct intc_vect vectors[] __initdata = {
638 INTC_VECT(HSPI, 0xe80), 637 INTC_VECT(HSPI, 0xe80),
639 INTC_VECT(GPIO0, 0xea0), INTC_VECT(GPIO1, 0xec0), 638 INTC_VECT(GPIO0, 0xea0), INTC_VECT(GPIO1, 0xec0),
640 INTC_VECT(Thermal, 0xee0), 639 INTC_VECT(Thermal, 0xee0),
640 INTC_VECT(INTICI0, 0xf00), INTC_VECT(INTICI1, 0xf20),
641 INTC_VECT(INTICI2, 0xf40), INTC_VECT(INTICI3, 0xf60),
642 INTC_VECT(INTICI4, 0xf80), INTC_VECT(INTICI5, 0xfa0),
643 INTC_VECT(INTICI6, 0xfc0), INTC_VECT(INTICI7, 0xfe0),
641}; 644};
642 645
643/* FIXME: Main CPU support only now */
644#if 1 /* Main CPU */
645#define CnINTMSK0 0xfe410030 646#define CnINTMSK0 0xfe410030
646#define CnINTMSK1 0xfe410040 647#define CnINTMSK1 0xfe410040
647#define CnINTMSKCLR0 0xfe410050 648#define CnINTMSKCLR0 0xfe410050
@@ -654,21 +655,6 @@ static struct intc_vect vectors[] __initdata = {
654#define CnINT2MSKCR1 0xfe410a34 655#define CnINT2MSKCR1 0xfe410a34
655#define CnINT2MSKCR2 0xfe410a38 656#define CnINT2MSKCR2 0xfe410a38
656#define CnINT2MSKCR3 0xfe410a3c 657#define CnINT2MSKCR3 0xfe410a3c
657#else /* Sub CPU */
658#define CnINTMSK0 0xfe410034
659#define CnINTMSK1 0xfe410044
660#define CnINTMSKCLR0 0xfe410054
661#define CnINTMSKCLR1 0xfe410064
662#define CnINT2MSKR0 0xfe410b20
663#define CnINT2MSKR1 0xfe410b24
664#define CnINT2MSKR2 0xfe410b28
665#define CnINT2MSKR3 0xfe410b2c
666#define CnINT2MSKCR0 0xfe410b30
667#define CnINT2MSKCR1 0xfe410b34
668#define CnINT2MSKCR2 0xfe410b38
669#define CnINT2MSKCR3 0xfe410b3c
670#endif
671
672#define INTMSK2 0xfe410068 658#define INTMSK2 0xfe410068
673#define INTMSKCLR2 0xfe41006c 659#define INTMSKCLR2 0xfe41006c
674 660
@@ -753,6 +739,9 @@ static struct intc_prio_reg prio_registers[] __initdata = {
753 GPIO1, Thermal } }, 739 GPIO1, Thermal } },
754 { 0xfe41085c, 0, 32, 8, /* INT2PRI23 */ { 0, 0, 0, 0 } }, 740 { 0xfe41085c, 0, 32, 8, /* INT2PRI23 */ { 0, 0, 0, 0 } },
755 { 0xfe410860, 0, 32, 8, /* INT2PRI24 */ { 0, 0, 0, 0 } }, 741 { 0xfe410860, 0, 32, 8, /* INT2PRI24 */ { 0, 0, 0, 0 } },
742 { 0xfe410090, 0xfe4100a0, 32, 4, /* CnICIPRI / CnICIPRICLR */
743 { INTICI7, INTICI6, INTICI5, INTICI4,
744 INTICI3, INTICI2, INTICI1, INTICI0 }, INTC_SMP(4, 2) },
756}; 745};
757 746
758static DECLARE_INTC_DESC(intc_desc, "sh7786", vectors, NULL, 747static DECLARE_INTC_DESC(intc_desc, "sh7786", vectors, NULL,