aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7786.c')
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c47
1 files changed, 25 insertions, 22 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 599022d73b28..2e6952f87848 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -32,7 +32,10 @@ static struct plat_sci_port scif0_platform_data = {
32 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 32 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
33 .scbrr_algo_id = SCBRR_ALGO_1, 33 .scbrr_algo_id = SCBRR_ALGO_1,
34 .type = PORT_SCIF, 34 .type = PORT_SCIF,
35 .irqs = { 40, 41, 43, 42 }, 35 .irqs = { evt2irq(0x700),
36 evt2irq(0x720),
37 evt2irq(0x760),
38 evt2irq(0x740) },
36 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, 39 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
37}; 40};
38 41
@@ -53,7 +56,7 @@ static struct plat_sci_port scif1_platform_data = {
53 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 56 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
54 .scbrr_algo_id = SCBRR_ALGO_1, 57 .scbrr_algo_id = SCBRR_ALGO_1,
55 .type = PORT_SCIF, 58 .type = PORT_SCIF,
56 .irqs = { 44, 44, 44, 44 }, 59 .irqs = SCIx_IRQ_MUXED(evt2irq(0x780)),
57 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, 60 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
58}; 61};
59 62
@@ -71,7 +74,7 @@ static struct plat_sci_port scif2_platform_data = {
71 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 74 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
72 .scbrr_algo_id = SCBRR_ALGO_1, 75 .scbrr_algo_id = SCBRR_ALGO_1,
73 .type = PORT_SCIF, 76 .type = PORT_SCIF,
74 .irqs = { 50, 50, 50, 50 }, 77 .irqs = SCIx_IRQ_MUXED(evt2irq(0x840)),
75 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, 78 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
76}; 79};
77 80
@@ -89,7 +92,7 @@ static struct plat_sci_port scif3_platform_data = {
89 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 92 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
90 .scbrr_algo_id = SCBRR_ALGO_1, 93 .scbrr_algo_id = SCBRR_ALGO_1,
91 .type = PORT_SCIF, 94 .type = PORT_SCIF,
92 .irqs = { 51, 51, 51, 51 }, 95 .irqs = SCIx_IRQ_MUXED(evt2irq(0x860)),
93 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, 96 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
94}; 97};
95 98
@@ -107,7 +110,7 @@ static struct plat_sci_port scif4_platform_data = {
107 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 110 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
108 .scbrr_algo_id = SCBRR_ALGO_1, 111 .scbrr_algo_id = SCBRR_ALGO_1,
109 .type = PORT_SCIF, 112 .type = PORT_SCIF,
110 .irqs = { 52, 52, 52, 52 }, 113 .irqs = SCIx_IRQ_MUXED(evt2irq(0x880)),
111 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, 114 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
112}; 115};
113 116
@@ -125,7 +128,7 @@ static struct plat_sci_port scif5_platform_data = {
125 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, 128 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
126 .scbrr_algo_id = SCBRR_ALGO_1, 129 .scbrr_algo_id = SCBRR_ALGO_1,
127 .type = PORT_SCIF, 130 .type = PORT_SCIF,
128 .irqs = { 53, 53, 53, 53 }, 131 .irqs = SCIx_IRQ_MUXED(evt2irq(0x8a0)),
129 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, 132 .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
130}; 133};
131 134
@@ -150,7 +153,7 @@ static struct resource tmu0_resources[] = {
150 .flags = IORESOURCE_MEM, 153 .flags = IORESOURCE_MEM,
151 }, 154 },
152 [1] = { 155 [1] = {
153 .start = 16, 156 .start = evt2irq(0x400),
154 .flags = IORESOURCE_IRQ, 157 .flags = IORESOURCE_IRQ,
155 }, 158 },
156}; 159};
@@ -178,7 +181,7 @@ static struct resource tmu1_resources[] = {
178 .flags = IORESOURCE_MEM, 181 .flags = IORESOURCE_MEM,
179 }, 182 },
180 [1] = { 183 [1] = {
181 .start = 17, 184 .start = evt2irq(0x420),
182 .flags = IORESOURCE_IRQ, 185 .flags = IORESOURCE_IRQ,
183 }, 186 },
184}; 187};
@@ -205,7 +208,7 @@ static struct resource tmu2_resources[] = {
205 .flags = IORESOURCE_MEM, 208 .flags = IORESOURCE_MEM,
206 }, 209 },
207 [1] = { 210 [1] = {
208 .start = 18, 211 .start = evt2irq(0x440),
209 .flags = IORESOURCE_IRQ, 212 .flags = IORESOURCE_IRQ,
210 }, 213 },
211}; 214};
@@ -232,7 +235,7 @@ static struct resource tmu3_resources[] = {
232 .flags = IORESOURCE_MEM, 235 .flags = IORESOURCE_MEM,
233 }, 236 },
234 [1] = { 237 [1] = {
235 .start = 20, 238 .start = evt2irq(0x480),
236 .flags = IORESOURCE_IRQ, 239 .flags = IORESOURCE_IRQ,
237 }, 240 },
238}; 241};
@@ -259,7 +262,7 @@ static struct resource tmu4_resources[] = {
259 .flags = IORESOURCE_MEM, 262 .flags = IORESOURCE_MEM,
260 }, 263 },
261 [1] = { 264 [1] = {
262 .start = 21, 265 .start = evt2irq(0x4a0),
263 .flags = IORESOURCE_IRQ, 266 .flags = IORESOURCE_IRQ,
264 }, 267 },
265}; 268};
@@ -286,7 +289,7 @@ static struct resource tmu5_resources[] = {
286 .flags = IORESOURCE_MEM, 289 .flags = IORESOURCE_MEM,
287 }, 290 },
288 [1] = { 291 [1] = {
289 .start = 22, 292 .start = evt2irq(0x4c0),
290 .flags = IORESOURCE_IRQ, 293 .flags = IORESOURCE_IRQ,
291 }, 294 },
292}; 295};
@@ -313,7 +316,7 @@ static struct resource tmu6_resources[] = {
313 .flags = IORESOURCE_MEM, 316 .flags = IORESOURCE_MEM,
314 }, 317 },
315 [1] = { 318 [1] = {
316 .start = 45, 319 .start = evt2irq(0x7a0),
317 .flags = IORESOURCE_IRQ, 320 .flags = IORESOURCE_IRQ,
318 }, 321 },
319}; 322};
@@ -340,7 +343,7 @@ static struct resource tmu7_resources[] = {
340 .flags = IORESOURCE_MEM, 343 .flags = IORESOURCE_MEM,
341 }, 344 },
342 [1] = { 345 [1] = {
343 .start = 45, 346 .start = evt2irq(0x7a0),
344 .flags = IORESOURCE_IRQ, 347 .flags = IORESOURCE_IRQ,
345 }, 348 },
346}; 349};
@@ -367,7 +370,7 @@ static struct resource tmu8_resources[] = {
367 .flags = IORESOURCE_MEM, 370 .flags = IORESOURCE_MEM,
368 }, 371 },
369 [1] = { 372 [1] = {
370 .start = 45, 373 .start = evt2irq(0x7a0),
371 .flags = IORESOURCE_IRQ, 374 .flags = IORESOURCE_IRQ,
372 }, 375 },
373}; 376};
@@ -394,7 +397,7 @@ static struct resource tmu9_resources[] = {
394 .flags = IORESOURCE_MEM, 397 .flags = IORESOURCE_MEM,
395 }, 398 },
396 [1] = { 399 [1] = {
397 .start = 46, 400 .start = evt2irq(0x7c0),
398 .flags = IORESOURCE_IRQ, 401 .flags = IORESOURCE_IRQ,
399 }, 402 },
400}; 403};
@@ -421,7 +424,7 @@ static struct resource tmu10_resources[] = {
421 .flags = IORESOURCE_MEM, 424 .flags = IORESOURCE_MEM,
422 }, 425 },
423 [1] = { 426 [1] = {
424 .start = 46, 427 .start = evt2irq(0x7c0),
425 .flags = IORESOURCE_IRQ, 428 .flags = IORESOURCE_IRQ,
426 }, 429 },
427}; 430};
@@ -448,7 +451,7 @@ static struct resource tmu11_resources[] = {
448 .flags = IORESOURCE_MEM, 451 .flags = IORESOURCE_MEM,
449 }, 452 },
450 [1] = { 453 [1] = {
451 .start = 46, 454 .start = evt2irq(0x7c0),
452 .flags = IORESOURCE_IRQ, 455 .flags = IORESOURCE_IRQ,
453 }, 456 },
454}; 457};
@@ -550,8 +553,8 @@ static struct resource usb_ehci_resources[] = {
550 .flags = IORESOURCE_MEM, 553 .flags = IORESOURCE_MEM,
551 }, 554 },
552 [1] = { 555 [1] = {
553 .start = 77, 556 .start = evt2irq(0xba0),
554 .end = 77, 557 .end = evt2irq(0xba0),
555 .flags = IORESOURCE_IRQ, 558 .flags = IORESOURCE_IRQ,
556 }, 559 },
557}; 560};
@@ -574,8 +577,8 @@ static struct resource usb_ohci_resources[] = {
574 .flags = IORESOURCE_MEM, 577 .flags = IORESOURCE_MEM,
575 }, 578 },
576 [1] = { 579 [1] = {
577 .start = 77, 580 .start = evt2irq(0xba0),
578 .end = 77, 581 .end = evt2irq(0xba0),
579 .flags = IORESOURCE_IRQ, 582 .flags = IORESOURCE_IRQ,
580 }, 583 },
581}; 584};