diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7722.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index 25b913e07e2c..55f66104431d 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c | |||
@@ -84,7 +84,7 @@ enum { | |||
84 | SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI, | 84 | SIM, RTC, DMAC0123, VIOVOU, USB, DMAC45, FLCTL, I2C, SDHI, |
85 | }; | 85 | }; |
86 | 86 | ||
87 | static struct intc_vect vectors[] = { | 87 | static struct intc_vect vectors[] __initdata = { |
88 | INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), | 88 | INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), |
89 | INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), | 89 | INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), |
90 | INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), | 90 | INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), |
@@ -117,7 +117,7 @@ static struct intc_vect vectors[] = { | |||
117 | INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580), | 117 | INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580), |
118 | }; | 118 | }; |
119 | 119 | ||
120 | static struct intc_group groups[] = { | 120 | static struct intc_group groups[] __initdata = { |
121 | INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI), | 121 | INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI), |
122 | INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), | 122 | INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), |
123 | INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3), | 123 | INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3), |
@@ -130,7 +130,7 @@ static struct intc_group groups[] = { | |||
130 | INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), | 130 | INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), |
131 | }; | 131 | }; |
132 | 132 | ||
133 | static struct intc_prio priorities[] = { | 133 | static struct intc_prio priorities[] __initdata = { |
134 | INTC_PRIO(SCIF0, 3), | 134 | INTC_PRIO(SCIF0, 3), |
135 | INTC_PRIO(SCIF1, 3), | 135 | INTC_PRIO(SCIF1, 3), |
136 | INTC_PRIO(SCIF2, 3), | 136 | INTC_PRIO(SCIF2, 3), |
@@ -138,7 +138,7 @@ static struct intc_prio priorities[] = { | |||
138 | INTC_PRIO(TMU1, 2), | 138 | INTC_PRIO(TMU1, 2), |
139 | }; | 139 | }; |
140 | 140 | ||
141 | static struct intc_mask_reg mask_registers[] = { | 141 | static struct intc_mask_reg mask_registers[] __initdata = { |
142 | { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ | 142 | { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ |
143 | { } }, | 143 | { } }, |
144 | { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ | 144 | { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ |
@@ -168,24 +168,24 @@ static struct intc_mask_reg mask_registers[] = { | |||
168 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | 168 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, |
169 | }; | 169 | }; |
170 | 170 | ||
171 | static struct intc_prio_reg prio_registers[] = { | 171 | static struct intc_prio_reg prio_registers[] __initdata = { |
172 | { 0xa4080000, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, IRDA } }, | 172 | { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, IRDA } }, |
173 | { 0xa4080004, 16, 4, /* IPRB */ { JPU, LCDC, SIM } }, | 173 | { 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } }, |
174 | { 0xa4080008, 16, 4, /* IPRC */ { } }, | 174 | { 0xa4080008, 0, 16, 4, /* IPRC */ { } }, |
175 | { 0xa408000c, 16, 4, /* IPRD */ { } }, | 175 | { 0xa408000c, 0, 16, 4, /* IPRD */ { } }, |
176 | { 0xa4080010, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, 0, VPU } }, | 176 | { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, 0, VPU } }, |
177 | { 0xa4080014, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } }, | 177 | { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } }, |
178 | { 0xa4080018, 16, 4, /* IPRG */ { SCIF0, SCIF1, SCIF2 } }, | 178 | { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, SCIF2 } }, |
179 | { 0xa408001c, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C } }, | 179 | { 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C } }, |
180 | { 0xa4080020, 16, 4, /* IPRI */ { SIO, 0, TSIF, RTC } }, | 180 | { 0xa4080020, 0, 16, 4, /* IPRI */ { SIO, 0, TSIF, RTC } }, |
181 | { 0xa4080024, 16, 4, /* IPRJ */ { 0, 0, SIU } }, | 181 | { 0xa4080024, 0, 16, 4, /* IPRJ */ { 0, 0, SIU } }, |
182 | { 0xa4080028, 16, 4, /* IPRK */ { 0, 0, 0, SDHI } }, | 182 | { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, 0, 0, SDHI } }, |
183 | { 0xa408002c, 16, 4, /* IPRL */ { TWODG, 0, TPU } }, | 183 | { 0xa408002c, 0, 16, 4, /* IPRL */ { TWODG, 0, TPU } }, |
184 | { 0xa4140010, 32, 4, /* INTPRI00 */ | 184 | { 0xa4140010, 0, 32, 4, /* INTPRI00 */ |
185 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | 185 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, |
186 | }; | 186 | }; |
187 | 187 | ||
188 | static struct intc_sense_reg sense_registers[] = { | 188 | static struct intc_sense_reg sense_registers[] __initdata = { |
189 | { 0xa414001c, 16, 2, /* ICR1 */ | 189 | { 0xa414001c, 16, 2, /* ICR1 */ |
190 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | 190 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, |
191 | }; | 191 | }; |