diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7343.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 40 |
1 files changed, 28 insertions, 12 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c index b91ea8300a3e..245d19254489 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c | |||
@@ -18,68 +18,84 @@ | |||
18 | 18 | ||
19 | /* Serial */ | 19 | /* Serial */ |
20 | static struct plat_sci_port scif0_platform_data = { | 20 | static struct plat_sci_port scif0_platform_data = { |
21 | .mapbase = 0xffe00000, | ||
22 | .flags = UPF_BOOT_AUTOCONF, | 21 | .flags = UPF_BOOT_AUTOCONF, |
23 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | 22 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, |
24 | .scbrr_algo_id = SCBRR_ALGO_2, | ||
25 | .type = PORT_SCIF, | 23 | .type = PORT_SCIF, |
26 | .irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)), | 24 | }; |
25 | |||
26 | static struct resource scif0_resources[] = { | ||
27 | DEFINE_RES_MEM(0xffe00000, 0x100), | ||
28 | DEFINE_RES_IRQ(evt2irq(0xc00)), | ||
27 | }; | 29 | }; |
28 | 30 | ||
29 | static struct platform_device scif0_device = { | 31 | static struct platform_device scif0_device = { |
30 | .name = "sh-sci", | 32 | .name = "sh-sci", |
31 | .id = 0, | 33 | .id = 0, |
34 | .resource = scif0_resources, | ||
35 | .num_resources = ARRAY_SIZE(scif0_resources), | ||
32 | .dev = { | 36 | .dev = { |
33 | .platform_data = &scif0_platform_data, | 37 | .platform_data = &scif0_platform_data, |
34 | }, | 38 | }, |
35 | }; | 39 | }; |
36 | 40 | ||
37 | static struct plat_sci_port scif1_platform_data = { | 41 | static struct plat_sci_port scif1_platform_data = { |
38 | .mapbase = 0xffe10000, | ||
39 | .flags = UPF_BOOT_AUTOCONF, | 42 | .flags = UPF_BOOT_AUTOCONF, |
40 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | 43 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, |
41 | .scbrr_algo_id = SCBRR_ALGO_2, | ||
42 | .type = PORT_SCIF, | 44 | .type = PORT_SCIF, |
43 | .irqs = SCIx_IRQ_MUXED(evt2irq(0xc20)), | 45 | }; |
46 | |||
47 | static struct resource scif1_resources[] = { | ||
48 | DEFINE_RES_MEM(0xffe10000, 0x100), | ||
49 | DEFINE_RES_IRQ(evt2irq(0xc20)), | ||
44 | }; | 50 | }; |
45 | 51 | ||
46 | static struct platform_device scif1_device = { | 52 | static struct platform_device scif1_device = { |
47 | .name = "sh-sci", | 53 | .name = "sh-sci", |
48 | .id = 1, | 54 | .id = 1, |
55 | .resource = scif1_resources, | ||
56 | .num_resources = ARRAY_SIZE(scif1_resources), | ||
49 | .dev = { | 57 | .dev = { |
50 | .platform_data = &scif1_platform_data, | 58 | .platform_data = &scif1_platform_data, |
51 | }, | 59 | }, |
52 | }; | 60 | }; |
53 | 61 | ||
54 | static struct plat_sci_port scif2_platform_data = { | 62 | static struct plat_sci_port scif2_platform_data = { |
55 | .mapbase = 0xffe20000, | ||
56 | .flags = UPF_BOOT_AUTOCONF, | 63 | .flags = UPF_BOOT_AUTOCONF, |
57 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | 64 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, |
58 | .scbrr_algo_id = SCBRR_ALGO_2, | ||
59 | .type = PORT_SCIF, | 65 | .type = PORT_SCIF, |
60 | .irqs = SCIx_IRQ_MUXED(evt2irq(0xc40)), | 66 | }; |
67 | |||
68 | static struct resource scif2_resources[] = { | ||
69 | DEFINE_RES_MEM(0xffe20000, 0x100), | ||
70 | DEFINE_RES_IRQ(evt2irq(0xc40)), | ||
61 | }; | 71 | }; |
62 | 72 | ||
63 | static struct platform_device scif2_device = { | 73 | static struct platform_device scif2_device = { |
64 | .name = "sh-sci", | 74 | .name = "sh-sci", |
65 | .id = 2, | 75 | .id = 2, |
76 | .resource = scif2_resources, | ||
77 | .num_resources = ARRAY_SIZE(scif2_resources), | ||
66 | .dev = { | 78 | .dev = { |
67 | .platform_data = &scif2_platform_data, | 79 | .platform_data = &scif2_platform_data, |
68 | }, | 80 | }, |
69 | }; | 81 | }; |
70 | 82 | ||
71 | static struct plat_sci_port scif3_platform_data = { | 83 | static struct plat_sci_port scif3_platform_data = { |
72 | .mapbase = 0xffe30000, | ||
73 | .flags = UPF_BOOT_AUTOCONF, | 84 | .flags = UPF_BOOT_AUTOCONF, |
74 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, | 85 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, |
75 | .scbrr_algo_id = SCBRR_ALGO_2, | ||
76 | .type = PORT_SCIF, | 86 | .type = PORT_SCIF, |
77 | .irqs = SCIx_IRQ_MUXED(evt2irq(0xc60)), | 87 | }; |
88 | |||
89 | static struct resource scif3_resources[] = { | ||
90 | DEFINE_RES_MEM(0xffe30000, 0x100), | ||
91 | DEFINE_RES_IRQ(evt2irq(0xc60)), | ||
78 | }; | 92 | }; |
79 | 93 | ||
80 | static struct platform_device scif3_device = { | 94 | static struct platform_device scif3_device = { |
81 | .name = "sh-sci", | 95 | .name = "sh-sci", |
82 | .id = 3, | 96 | .id = 3, |
97 | .resource = scif3_resources, | ||
98 | .num_resources = ARRAY_SIZE(scif3_resources), | ||
83 | .dev = { | 99 | .dev = { |
84 | .platform_data = &scif3_platform_data, | 100 | .platform_data = &scif3_platform_data, |
85 | }, | 101 | }, |