diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh3/setup-sh7705.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh7705.c | 162 |
1 files changed, 118 insertions, 44 deletions
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c index ebd9d06d8bdd..fb5802543e9a 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c | |||
@@ -10,9 +10,90 @@ | |||
10 | */ | 10 | */ |
11 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/irq.h> | ||
13 | #include <linux/serial.h> | 14 | #include <linux/serial.h> |
14 | #include <asm/sci.h> | 15 | #include <asm/sci.h> |
15 | 16 | ||
17 | enum{ | ||
18 | UNUSED = 0, | ||
19 | |||
20 | /* interrupt sources */ | ||
21 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, | ||
22 | PINT07, PINT815, | ||
23 | DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3, | ||
24 | SCIF0_ERI, SCIF0_RXI, SCIF0_TXI, | ||
25 | SCIF2_ERI, SCIF2_RXI, SCIF2_TXI, | ||
26 | ADC_ADI, | ||
27 | USB_USI0, USB_USI1, | ||
28 | TPU0, TPU1, TPU2, TPU3, | ||
29 | TMU0, TMU1, TMU2_TUNI, TMU2_TICPI, | ||
30 | RTC_ATI, RTC_PRI, RTC_CUI, | ||
31 | WDT, | ||
32 | REF_RCMI, | ||
33 | |||
34 | /* interrupt groups */ | ||
35 | RTC, TMU2, DMAC, USB, SCIF2, SCIF0, | ||
36 | }; | ||
37 | |||
38 | static struct intc_vect vectors[] = { | ||
39 | INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), | ||
40 | INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720), | ||
41 | INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820), | ||
42 | INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860), | ||
43 | INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0), | ||
44 | INTC_VECT(SCIF0_TXI, 0x8e0), | ||
45 | INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920), | ||
46 | INTC_VECT(SCIF2_TXI, 0x960), | ||
47 | INTC_VECT(ADC_ADI, 0x980), | ||
48 | INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40), | ||
49 | INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20), | ||
50 | INTC_VECT(TPU3, 0xc80), INTC_VECT(TPU1, 0xca0), | ||
51 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), | ||
52 | INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460), | ||
53 | INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), | ||
54 | INTC_VECT(RTC_CUI, 0x4c0), | ||
55 | INTC_VECT(WDT, 0x560), | ||
56 | INTC_VECT(REF_RCMI, 0x580), | ||
57 | }; | ||
58 | |||
59 | static struct intc_group groups[] = { | ||
60 | INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), | ||
61 | INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI), | ||
62 | INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3), | ||
63 | INTC_GROUP(USB, USB_USI0, USB_USI1), | ||
64 | INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI), | ||
65 | INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI), | ||
66 | }; | ||
67 | |||
68 | static struct intc_prio priorities[] = { | ||
69 | INTC_PRIO(DMAC, 7), | ||
70 | INTC_PRIO(SCIF2, 3), | ||
71 | INTC_PRIO(SCIF0, 3), | ||
72 | }; | ||
73 | |||
74 | static struct intc_prio_reg prio_registers[] = { | ||
75 | { 0xfffffee2, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, | ||
76 | { 0xfffffee4, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } }, | ||
77 | { 0xa4000016, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, | ||
78 | { 0xa4000018, 16, 4, /* IPRD */ { PINT07, PINT815, IRQ4, IRQ5 } }, | ||
79 | { 0xa400001a, 16, 4, /* IPRE */ { DMAC, SCIF0, SCIF2, ADC_ADI } }, | ||
80 | { 0xa4080000, 16, 4, /* IPRF */ { 0, 0, USB } }, | ||
81 | { 0xa4080002, 16, 4, /* IPRG */ { TPU0, TPU1 } }, | ||
82 | { 0xa4080004, 16, 4, /* IPRH */ { TPU2, TPU3 } }, | ||
83 | |||
84 | }; | ||
85 | |||
86 | static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups, | ||
87 | priorities, NULL, prio_registers, NULL); | ||
88 | |||
89 | static struct intc_vect vectors_irq[] = { | ||
90 | INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), | ||
91 | INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), | ||
92 | }; | ||
93 | |||
94 | static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL, | ||
95 | priorities, NULL, prio_registers, NULL); | ||
96 | |||
16 | static struct plat_sci_port sci_platform_data[] = { | 97 | static struct plat_sci_port sci_platform_data[] = { |
17 | { | 98 | { |
18 | .mapbase = 0xa4410000, | 99 | .mapbase = 0xa4410000, |
@@ -37,8 +118,36 @@ static struct platform_device sci_device = { | |||
37 | }, | 118 | }, |
38 | }; | 119 | }; |
39 | 120 | ||
121 | static struct resource rtc_resources[] = { | ||
122 | [0] = { | ||
123 | .start = 0xfffffec0, | ||
124 | .end = 0xfffffec0 + 0x1e, | ||
125 | .flags = IORESOURCE_IO, | ||
126 | }, | ||
127 | [1] = { | ||
128 | .start = 20, | ||
129 | .flags = IORESOURCE_IRQ, | ||
130 | }, | ||
131 | [2] = { | ||
132 | .start = 21, | ||
133 | .flags = IORESOURCE_IRQ, | ||
134 | }, | ||
135 | [3] = { | ||
136 | .start = 22, | ||
137 | .flags = IORESOURCE_IRQ, | ||
138 | }, | ||
139 | }; | ||
140 | |||
141 | static struct platform_device rtc_device = { | ||
142 | .name = "sh-rtc", | ||
143 | .id = -1, | ||
144 | .num_resources = ARRAY_SIZE(rtc_resources), | ||
145 | .resource = rtc_resources, | ||
146 | }; | ||
147 | |||
40 | static struct platform_device *sh7705_devices[] __initdata = { | 148 | static struct platform_device *sh7705_devices[] __initdata = { |
41 | &sci_device, | 149 | &sci_device, |
150 | &rtc_device, | ||
42 | }; | 151 | }; |
43 | 152 | ||
44 | static int __init sh7705_devices_setup(void) | 153 | static int __init sh7705_devices_setup(void) |
@@ -48,51 +157,16 @@ static int __init sh7705_devices_setup(void) | |||
48 | } | 157 | } |
49 | __initcall(sh7705_devices_setup); | 158 | __initcall(sh7705_devices_setup); |
50 | 159 | ||
51 | static struct ipr_data ipr_irq_table[] = { | 160 | void __init plat_irq_setup_pins(int mode) |
52 | /* IRQ, IPR-idx, shift, priority */ | 161 | { |
53 | { 16, 0, 12, 2 }, /* TMU0 TUNI*/ | 162 | if (mode == IRQ_MODE_IRQ) { |
54 | { 17, 0, 8, 2 }, /* TMU1 TUNI */ | 163 | register_intc_controller(&intc_desc_irq); |
55 | { 18, 0, 4, 2 }, /* TMU2 TUNI */ | 164 | return; |
56 | { 27, 1, 12, 2 }, /* WDT ITI */ | 165 | } |
57 | { 20, 0, 0, 2 }, /* RTC ATI (alarm) */ | 166 | BUG(); |
58 | { 21, 0, 0, 2 }, /* RTC PRI (period) */ | 167 | } |
59 | { 22, 0, 0, 2 }, /* RTC CUI (carry) */ | ||
60 | { 48, 4, 12, 7 }, /* DMAC DMTE0 */ | ||
61 | { 49, 4, 12, 7 }, /* DMAC DMTE1 */ | ||
62 | { 50, 4, 12, 7 }, /* DMAC DMTE2 */ | ||
63 | { 51, 4, 12, 7 }, /* DMAC DMTE3 */ | ||
64 | { 52, 4, 8, 3 }, /* SCIF0 ERI */ | ||
65 | { 53, 4, 8, 3 }, /* SCIF0 RXI */ | ||
66 | { 55, 4, 8, 3 }, /* SCIF0 TXI */ | ||
67 | { 56, 4, 4, 3 }, /* SCIF1 ERI */ | ||
68 | { 57, 4, 4, 3 }, /* SCIF1 RXI */ | ||
69 | { 59, 4, 4, 3 }, /* SCIF1 TXI */ | ||
70 | }; | ||
71 | |||
72 | static unsigned long ipr_offsets[] = { | ||
73 | 0xFFFFFEE2, /* 0: IPRA */ | ||
74 | 0xFFFFFEE4, /* 1: IPRB */ | ||
75 | 0xA4000016, /* 2: IPRC */ | ||
76 | 0xA4000018, /* 3: IPRD */ | ||
77 | 0xA400001A, /* 4: IPRE */ | ||
78 | 0xA4080000, /* 5: IPRF */ | ||
79 | 0xA4080002, /* 6: IPRG */ | ||
80 | 0xA4080004, /* 7: IPRH */ | ||
81 | }; | ||
82 | |||
83 | static struct ipr_desc ipr_irq_desc = { | ||
84 | .ipr_offsets = ipr_offsets, | ||
85 | .nr_offsets = ARRAY_SIZE(ipr_offsets), | ||
86 | |||
87 | .ipr_data = ipr_irq_table, | ||
88 | .nr_irqs = ARRAY_SIZE(ipr_irq_table), | ||
89 | |||
90 | .chip = { | ||
91 | .name = "IPR-sh7705", | ||
92 | }, | ||
93 | }; | ||
94 | 168 | ||
95 | void __init plat_irq_setup(void) | 169 | void __init plat_irq_setup(void) |
96 | { | 170 | { |
97 | register_ipr_controller(&ipr_irq_desc); | 171 | register_intc_controller(&intc_desc); |
98 | } | 172 | } |