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-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7201.c14
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7203.c15
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7206.c12
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-mxg.c111
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7201.c115
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7203.c154
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c187
7 files changed, 584 insertions, 24 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
index 4a5e59732334..7814c76159a7 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -34,37 +34,37 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
34 34
35static void master_clk_init(struct clk *clk) 35static void master_clk_init(struct clk *clk)
36{ 36{
37 clk->rate = 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 37 return 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
38} 38}
39 39
40static struct clk_ops sh7201_master_clk_ops = { 40static struct clk_ops sh7201_master_clk_ops = {
41 .init = master_clk_init, 41 .init = master_clk_init,
42}; 42};
43 43
44static void module_clk_recalc(struct clk *clk) 44static unsigned long module_clk_recalc(struct clk *clk)
45{ 45{
46 int idx = (ctrl_inw(FREQCR) & 0x0007); 46 int idx = (ctrl_inw(FREQCR) & 0x0007);
47 clk->rate = clk->parent->rate / pfc_divisors[idx]; 47 return clk->parent->rate / pfc_divisors[idx];
48} 48}
49 49
50static struct clk_ops sh7201_module_clk_ops = { 50static struct clk_ops sh7201_module_clk_ops = {
51 .recalc = module_clk_recalc, 51 .recalc = module_clk_recalc,
52}; 52};
53 53
54static void bus_clk_recalc(struct clk *clk) 54static unsigned long bus_clk_recalc(struct clk *clk)
55{ 55{
56 int idx = (ctrl_inw(FREQCR) & 0x0007); 56 int idx = (ctrl_inw(FREQCR) & 0x0007);
57 clk->rate = clk->parent->rate / pfc_divisors[idx]; 57 return clk->parent->rate / pfc_divisors[idx];
58} 58}
59 59
60static struct clk_ops sh7201_bus_clk_ops = { 60static struct clk_ops sh7201_bus_clk_ops = {
61 .recalc = bus_clk_recalc, 61 .recalc = bus_clk_recalc,
62}; 62};
63 63
64static void cpu_clk_recalc(struct clk *clk) 64static unsigned long cpu_clk_recalc(struct clk *clk)
65{ 65{
66 int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007); 66 int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007);
67 clk->rate = clk->parent->rate / ifc_divisors[idx]; 67 return clk->parent->rate / ifc_divisors[idx];
68} 68}
69 69
70static struct clk_ops sh7201_cpu_clk_ops = { 70static struct clk_ops sh7201_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
index fb781329848a..940986965102 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
@@ -46,33 +46,28 @@ static struct clk_ops sh7203_master_clk_ops = {
46 .init = master_clk_init, 46 .init = master_clk_init,
47}; 47};
48 48
49static void module_clk_recalc(struct clk *clk) 49static unsigned long module_clk_recalc(struct clk *clk)
50{ 50{
51 int idx = (ctrl_inw(FREQCR) & 0x0007); 51 int idx = (ctrl_inw(FREQCR) & 0x0007);
52 clk->rate = clk->parent->rate / pfc_divisors[idx]; 52 return clk->parent->rate / pfc_divisors[idx];
53} 53}
54 54
55static struct clk_ops sh7203_module_clk_ops = { 55static struct clk_ops sh7203_module_clk_ops = {
56 .recalc = module_clk_recalc, 56 .recalc = module_clk_recalc,
57}; 57};
58 58
59static void bus_clk_recalc(struct clk *clk) 59static unsigned long bus_clk_recalc(struct clk *clk)
60{ 60{
61 int idx = (ctrl_inw(FREQCR) & 0x0007); 61 int idx = (ctrl_inw(FREQCR) & 0x0007);
62 clk->rate = clk->parent->rate / pfc_divisors[idx-2]; 62 return clk->parent->rate / pfc_divisors[idx-2];
63} 63}
64 64
65static struct clk_ops sh7203_bus_clk_ops = { 65static struct clk_ops sh7203_bus_clk_ops = {
66 .recalc = bus_clk_recalc, 66 .recalc = bus_clk_recalc,
67}; 67};
68 68
69static void cpu_clk_recalc(struct clk *clk)
70{
71 clk->rate = clk->parent->rate;
72}
73
74static struct clk_ops sh7203_cpu_clk_ops = { 69static struct clk_ops sh7203_cpu_clk_ops = {
75 .recalc = cpu_clk_recalc, 70 .recalc = followparent_recalc,
76}; 71};
77 72
78static struct clk_ops *sh7203_clk_ops[] = { 73static struct clk_ops *sh7203_clk_ops[] = {
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
index 82d7f991ef6b..c2268bdeceeb 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
@@ -41,29 +41,29 @@ static struct clk_ops sh7206_master_clk_ops = {
41 .init = master_clk_init, 41 .init = master_clk_init,
42}; 42};
43 43
44static void module_clk_recalc(struct clk *clk) 44static unsigned long module_clk_recalc(struct clk *clk)
45{ 45{
46 int idx = (ctrl_inw(FREQCR) & 0x0007); 46 int idx = (ctrl_inw(FREQCR) & 0x0007);
47 clk->rate = clk->parent->rate / pfc_divisors[idx]; 47 return clk->parent->rate / pfc_divisors[idx];
48} 48}
49 49
50static struct clk_ops sh7206_module_clk_ops = { 50static struct clk_ops sh7206_module_clk_ops = {
51 .recalc = module_clk_recalc, 51 .recalc = module_clk_recalc,
52}; 52};
53 53
54static void bus_clk_recalc(struct clk *clk) 54static unsigned long bus_clk_recalc(struct clk *clk)
55{ 55{
56 clk->rate = clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007]; 56 return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
57} 57}
58 58
59static struct clk_ops sh7206_bus_clk_ops = { 59static struct clk_ops sh7206_bus_clk_ops = {
60 .recalc = bus_clk_recalc, 60 .recalc = bus_clk_recalc,
61}; 61};
62 62
63static void cpu_clk_recalc(struct clk *clk) 63static unsigned long cpu_clk_recalc(struct clk *clk)
64{ 64{
65 int idx = (ctrl_inw(FREQCR) & 0x0007); 65 int idx = (ctrl_inw(FREQCR) & 0x0007);
66 clk->rate = clk->parent->rate / ifc_divisors[idx]; 66 return clk->parent->rate / ifc_divisors[idx];
67} 67}
68 68
69static struct clk_ops sh7206_cpu_clk_ops = { 69static struct clk_ops sh7206_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index 844293723cfc..869c2da4820b 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -11,6 +11,7 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <linux/serial_sci.h> 13#include <linux/serial_sci.h>
14#include <linux/sh_timer.h>
14 15
15enum { 16enum {
16 UNUSED = 0, 17 UNUSED = 0,
@@ -24,7 +25,7 @@ enum {
24 25
25 SCIF0, SCIF1, 26 SCIF0, SCIF1,
26 27
27 MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5 28 MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5,
28 MTU2_TGI3B, MTU2_TGI3C, 29 MTU2_TGI3B, MTU2_TGI3C,
29 30
30 /* interrupt groups */ 31 /* interrupt groups */
@@ -113,6 +114,99 @@ static struct intc_mask_reg mask_registers[] __initdata = {
113static DECLARE_INTC_DESC(intc_desc, "mxg", vectors, groups, 114static DECLARE_INTC_DESC(intc_desc, "mxg", vectors, groups,
114 mask_registers, prio_registers, NULL); 115 mask_registers, prio_registers, NULL);
115 116
117static struct sh_timer_config mtu2_0_platform_data = {
118 .name = "MTU2_0",
119 .channel_offset = -0x80,
120 .timer_bit = 0,
121 .clk = "peripheral_clk",
122 .clockevent_rating = 200,
123};
124
125static struct resource mtu2_0_resources[] = {
126 [0] = {
127 .name = "MTU2_0",
128 .start = 0xff801300,
129 .end = 0xff801326,
130 .flags = IORESOURCE_MEM,
131 },
132 [1] = {
133 .start = 228,
134 .flags = IORESOURCE_IRQ,
135 },
136};
137
138static struct platform_device mtu2_0_device = {
139 .name = "sh_mtu2",
140 .id = 0,
141 .dev = {
142 .platform_data = &mtu2_0_platform_data,
143 },
144 .resource = mtu2_0_resources,
145 .num_resources = ARRAY_SIZE(mtu2_0_resources),
146};
147
148static struct sh_timer_config mtu2_1_platform_data = {
149 .name = "MTU2_1",
150 .channel_offset = -0x100,
151 .timer_bit = 1,
152 .clk = "peripheral_clk",
153 .clockevent_rating = 200,
154};
155
156static struct resource mtu2_1_resources[] = {
157 [0] = {
158 .name = "MTU2_1",
159 .start = 0xff801380,
160 .end = 0xff801390,
161 .flags = IORESOURCE_MEM,
162 },
163 [1] = {
164 .start = 234,
165 .flags = IORESOURCE_IRQ,
166 },
167};
168
169static struct platform_device mtu2_1_device = {
170 .name = "sh_mtu2",
171 .id = 1,
172 .dev = {
173 .platform_data = &mtu2_1_platform_data,
174 },
175 .resource = mtu2_1_resources,
176 .num_resources = ARRAY_SIZE(mtu2_1_resources),
177};
178
179static struct sh_timer_config mtu2_2_platform_data = {
180 .name = "MTU2_2",
181 .channel_offset = 0x80,
182 .timer_bit = 2,
183 .clk = "peripheral_clk",
184 .clockevent_rating = 200,
185};
186
187static struct resource mtu2_2_resources[] = {
188 [0] = {
189 .name = "MTU2_2",
190 .start = 0xff801000,
191 .end = 0xff80100a,
192 .flags = IORESOURCE_MEM,
193 },
194 [1] = {
195 .start = 240,
196 .flags = IORESOURCE_IRQ,
197 },
198};
199
200static struct platform_device mtu2_2_device = {
201 .name = "sh_mtu2",
202 .id = 2,
203 .dev = {
204 .platform_data = &mtu2_2_platform_data,
205 },
206 .resource = mtu2_2_resources,
207 .num_resources = ARRAY_SIZE(mtu2_2_resources),
208};
209
116static struct plat_sci_port sci_platform_data[] = { 210static struct plat_sci_port sci_platform_data[] = {
117 { 211 {
118 .mapbase = 0xff804000, 212 .mapbase = 0xff804000,
@@ -134,6 +228,9 @@ static struct platform_device sci_device = {
134 228
135static struct platform_device *mxg_devices[] __initdata = { 229static struct platform_device *mxg_devices[] __initdata = {
136 &sci_device, 230 &sci_device,
231 &mtu2_0_device,
232 &mtu2_1_device,
233 &mtu2_2_device,
137}; 234};
138 235
139static int __init mxg_devices_setup(void) 236static int __init mxg_devices_setup(void)
@@ -147,3 +244,15 @@ void __init plat_irq_setup(void)
147{ 244{
148 register_intc_controller(&intc_desc); 245 register_intc_controller(&intc_desc);
149} 246}
247
248static struct platform_device *mxg_early_devices[] __initdata = {
249 &mtu2_0_device,
250 &mtu2_1_device,
251 &mtu2_2_device,
252};
253
254void __init plat_early_device_setup(void)
255{
256 early_platform_add_devices(mxg_early_devices,
257 ARRAY_SIZE(mxg_early_devices));
258}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index 00f42f9e3f5c..d8febe128066 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -12,6 +12,8 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/serial.h> 13#include <linux/serial.h>
14#include <linux/serial_sci.h> 14#include <linux/serial_sci.h>
15#include <linux/sh_timer.h>
16#include <linux/io.h>
15 17
16enum { 18enum {
17 UNUSED = 0, 19 UNUSED = 0,
@@ -249,9 +251,105 @@ static struct platform_device rtc_device = {
249 .resource = rtc_resources, 251 .resource = rtc_resources,
250}; 252};
251 253
254static struct sh_timer_config mtu2_0_platform_data = {
255 .name = "MTU2_0",
256 .channel_offset = -0x80,
257 .timer_bit = 0,
258 .clk = "peripheral_clk",
259 .clockevent_rating = 200,
260};
261
262static struct resource mtu2_0_resources[] = {
263 [0] = {
264 .name = "MTU2_0",
265 .start = 0xfffe4300,
266 .end = 0xfffe4326,
267 .flags = IORESOURCE_MEM,
268 },
269 [1] = {
270 .start = 108,
271 .flags = IORESOURCE_IRQ,
272 },
273};
274
275static struct platform_device mtu2_0_device = {
276 .name = "sh_mtu2",
277 .id = 0,
278 .dev = {
279 .platform_data = &mtu2_0_platform_data,
280 },
281 .resource = mtu2_0_resources,
282 .num_resources = ARRAY_SIZE(mtu2_0_resources),
283};
284
285static struct sh_timer_config mtu2_1_platform_data = {
286 .name = "MTU2_1",
287 .channel_offset = -0x100,
288 .timer_bit = 1,
289 .clk = "peripheral_clk",
290 .clockevent_rating = 200,
291};
292
293static struct resource mtu2_1_resources[] = {
294 [0] = {
295 .name = "MTU2_1",
296 .start = 0xfffe4380,
297 .end = 0xfffe4390,
298 .flags = IORESOURCE_MEM,
299 },
300 [1] = {
301 .start = 116,
302 .flags = IORESOURCE_IRQ,
303 },
304};
305
306static struct platform_device mtu2_1_device = {
307 .name = "sh_mtu2",
308 .id = 1,
309 .dev = {
310 .platform_data = &mtu2_1_platform_data,
311 },
312 .resource = mtu2_1_resources,
313 .num_resources = ARRAY_SIZE(mtu2_1_resources),
314};
315
316static struct sh_timer_config mtu2_2_platform_data = {
317 .name = "MTU2_2",
318 .channel_offset = 0x80,
319 .timer_bit = 2,
320 .clk = "peripheral_clk",
321 .clockevent_rating = 200,
322};
323
324static struct resource mtu2_2_resources[] = {
325 [0] = {
326 .name = "MTU2_2",
327 .start = 0xfffe4000,
328 .end = 0xfffe400a,
329 .flags = IORESOURCE_MEM,
330 },
331 [1] = {
332 .start = 124,
333 .flags = IORESOURCE_IRQ,
334 },
335};
336
337static struct platform_device mtu2_2_device = {
338 .name = "sh_mtu2",
339 .id = 2,
340 .dev = {
341 .platform_data = &mtu2_2_platform_data,
342 },
343 .resource = mtu2_2_resources,
344 .num_resources = ARRAY_SIZE(mtu2_2_resources),
345};
346
252static struct platform_device *sh7201_devices[] __initdata = { 347static struct platform_device *sh7201_devices[] __initdata = {
253 &sci_device, 348 &sci_device,
254 &rtc_device, 349 &rtc_device,
350 &mtu2_0_device,
351 &mtu2_1_device,
352 &mtu2_2_device,
255}; 353};
256 354
257static int __init sh7201_devices_setup(void) 355static int __init sh7201_devices_setup(void)
@@ -265,3 +363,20 @@ void __init plat_irq_setup(void)
265{ 363{
266 register_intc_controller(&intc_desc); 364 register_intc_controller(&intc_desc);
267} 365}
366
367static struct platform_device *sh7201_early_devices[] __initdata = {
368 &mtu2_0_device,
369 &mtu2_1_device,
370 &mtu2_2_device,
371};
372
373#define STBCR3 0xfffe0408
374
375void __init plat_early_device_setup(void)
376{
377 /* enable MTU2 clock */
378 __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3);
379
380 early_platform_add_devices(sh7201_early_devices,
381 ARRAY_SIZE(sh7201_early_devices));
382}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index 820dfb2e8656..62e3039d2398 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -11,6 +11,8 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <linux/serial_sci.h> 13#include <linux/serial_sci.h>
14#include <linux/sh_timer.h>
15#include <linux/io.h>
14 16
15enum { 17enum {
16 UNUSED = 0, 18 UNUSED = 0,
@@ -205,6 +207,132 @@ static struct platform_device sci_device = {
205 }, 207 },
206}; 208};
207 209
210static struct sh_timer_config cmt0_platform_data = {
211 .name = "CMT0",
212 .channel_offset = 0x02,
213 .timer_bit = 0,
214 .clk = "peripheral_clk",
215 .clockevent_rating = 125,
216 .clocksource_rating = 0, /* disabled due to code generation issues */
217};
218
219static struct resource cmt0_resources[] = {
220 [0] = {
221 .name = "CMT0",
222 .start = 0xfffec002,
223 .end = 0xfffec007,
224 .flags = IORESOURCE_MEM,
225 },
226 [1] = {
227 .start = 142,
228 .flags = IORESOURCE_IRQ,
229 },
230};
231
232static struct platform_device cmt0_device = {
233 .name = "sh_cmt",
234 .id = 0,
235 .dev = {
236 .platform_data = &cmt0_platform_data,
237 },
238 .resource = cmt0_resources,
239 .num_resources = ARRAY_SIZE(cmt0_resources),
240};
241
242static struct sh_timer_config cmt1_platform_data = {
243 .name = "CMT1",
244 .channel_offset = 0x08,
245 .timer_bit = 1,
246 .clk = "peripheral_clk",
247 .clockevent_rating = 125,
248 .clocksource_rating = 0, /* disabled due to code generation issues */
249};
250
251static struct resource cmt1_resources[] = {
252 [0] = {
253 .name = "CMT1",
254 .start = 0xfffec008,
255 .end = 0xfffec00d,
256 .flags = IORESOURCE_MEM,
257 },
258 [1] = {
259 .start = 143,
260 .flags = IORESOURCE_IRQ,
261 },
262};
263
264static struct platform_device cmt1_device = {
265 .name = "sh_cmt",
266 .id = 1,
267 .dev = {
268 .platform_data = &cmt1_platform_data,
269 },
270 .resource = cmt1_resources,
271 .num_resources = ARRAY_SIZE(cmt1_resources),
272};
273
274static struct sh_timer_config mtu2_0_platform_data = {
275 .name = "MTU2_0",
276 .channel_offset = -0x80,
277 .timer_bit = 0,
278 .clk = "peripheral_clk",
279 .clockevent_rating = 200,
280};
281
282static struct resource mtu2_0_resources[] = {
283 [0] = {
284 .name = "MTU2_0",
285 .start = 0xfffe4300,
286 .end = 0xfffe4326,
287 .flags = IORESOURCE_MEM,
288 },
289 [1] = {
290 .start = 146,
291 .flags = IORESOURCE_IRQ,
292 },
293};
294
295static struct platform_device mtu2_0_device = {
296 .name = "sh_mtu2",
297 .id = 0,
298 .dev = {
299 .platform_data = &mtu2_0_platform_data,
300 },
301 .resource = mtu2_0_resources,
302 .num_resources = ARRAY_SIZE(mtu2_0_resources),
303};
304
305static struct sh_timer_config mtu2_1_platform_data = {
306 .name = "MTU2_1",
307 .channel_offset = -0x100,
308 .timer_bit = 1,
309 .clk = "peripheral_clk",
310 .clockevent_rating = 200,
311};
312
313static struct resource mtu2_1_resources[] = {
314 [0] = {
315 .name = "MTU2_1",
316 .start = 0xfffe4380,
317 .end = 0xfffe4390,
318 .flags = IORESOURCE_MEM,
319 },
320 [1] = {
321 .start = 153,
322 .flags = IORESOURCE_IRQ,
323 },
324};
325
326static struct platform_device mtu2_1_device = {
327 .name = "sh_mtu2",
328 .id = 1,
329 .dev = {
330 .platform_data = &mtu2_1_platform_data,
331 },
332 .resource = mtu2_1_resources,
333 .num_resources = ARRAY_SIZE(mtu2_1_resources),
334};
335
208static struct resource rtc_resources[] = { 336static struct resource rtc_resources[] = {
209 [0] = { 337 [0] = {
210 .start = 0xffff2000, 338 .start = 0xffff2000,
@@ -227,6 +355,10 @@ static struct platform_device rtc_device = {
227 355
228static struct platform_device *sh7203_devices[] __initdata = { 356static struct platform_device *sh7203_devices[] __initdata = {
229 &sci_device, 357 &sci_device,
358 &cmt0_device,
359 &cmt1_device,
360 &mtu2_0_device,
361 &mtu2_1_device,
230 &rtc_device, 362 &rtc_device,
231}; 363};
232 364
@@ -241,3 +373,25 @@ void __init plat_irq_setup(void)
241{ 373{
242 register_intc_controller(&intc_desc); 374 register_intc_controller(&intc_desc);
243} 375}
376
377static struct platform_device *sh7203_early_devices[] __initdata = {
378 &cmt0_device,
379 &cmt1_device,
380 &mtu2_0_device,
381 &mtu2_1_device,
382};
383
384#define STBCR3 0xfffe0408
385#define STBCR4 0xfffe040c
386
387void __init plat_early_device_setup(void)
388{
389 /* enable CMT clock */
390 __raw_writeb(__raw_readb(STBCR4) & ~0x04, STBCR4);
391
392 /* enable MTU2 clock */
393 __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3);
394
395 early_platform_add_devices(sh7203_early_devices,
396 ARRAY_SIZE(sh7203_early_devices));
397}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index c46a8355726d..3e6f3d7a58be 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -12,6 +12,8 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/serial.h> 13#include <linux/serial.h>
14#include <linux/serial_sci.h> 14#include <linux/serial_sci.h>
15#include <linux/sh_timer.h>
16#include <linux/io.h>
15 17
16enum { 18enum {
17 UNUSED = 0, 19 UNUSED = 0,
@@ -165,8 +167,170 @@ static struct platform_device sci_device = {
165 }, 167 },
166}; 168};
167 169
170static struct sh_timer_config cmt0_platform_data = {
171 .name = "CMT0",
172 .channel_offset = 0x02,
173 .timer_bit = 0,
174 .clk = "peripheral_clk",
175 .clockevent_rating = 125,
176 .clocksource_rating = 0, /* disabled due to code generation issues */
177};
178
179static struct resource cmt0_resources[] = {
180 [0] = {
181 .name = "CMT0",
182 .start = 0xfffec002,
183 .end = 0xfffec007,
184 .flags = IORESOURCE_MEM,
185 },
186 [1] = {
187 .start = 140,
188 .flags = IORESOURCE_IRQ,
189 },
190};
191
192static struct platform_device cmt0_device = {
193 .name = "sh_cmt",
194 .id = 0,
195 .dev = {
196 .platform_data = &cmt0_platform_data,
197 },
198 .resource = cmt0_resources,
199 .num_resources = ARRAY_SIZE(cmt0_resources),
200};
201
202static struct sh_timer_config cmt1_platform_data = {
203 .name = "CMT1",
204 .channel_offset = 0x08,
205 .timer_bit = 1,
206 .clk = "peripheral_clk",
207 .clockevent_rating = 125,
208 .clocksource_rating = 0, /* disabled due to code generation issues */
209};
210
211static struct resource cmt1_resources[] = {
212 [0] = {
213 .name = "CMT1",
214 .start = 0xfffec008,
215 .end = 0xfffec00d,
216 .flags = IORESOURCE_MEM,
217 },
218 [1] = {
219 .start = 144,
220 .flags = IORESOURCE_IRQ,
221 },
222};
223
224static struct platform_device cmt1_device = {
225 .name = "sh_cmt",
226 .id = 1,
227 .dev = {
228 .platform_data = &cmt1_platform_data,
229 },
230 .resource = cmt1_resources,
231 .num_resources = ARRAY_SIZE(cmt1_resources),
232};
233
234static struct sh_timer_config mtu2_0_platform_data = {
235 .name = "MTU2_0",
236 .channel_offset = -0x80,
237 .timer_bit = 0,
238 .clk = "peripheral_clk",
239 .clockevent_rating = 200,
240};
241
242static struct resource mtu2_0_resources[] = {
243 [0] = {
244 .name = "MTU2_0",
245 .start = 0xfffe4300,
246 .end = 0xfffe4326,
247 .flags = IORESOURCE_MEM,
248 },
249 [1] = {
250 .start = 156,
251 .flags = IORESOURCE_IRQ,
252 },
253};
254
255static struct platform_device mtu2_0_device = {
256 .name = "sh_mtu2",
257 .id = 0,
258 .dev = {
259 .platform_data = &mtu2_0_platform_data,
260 },
261 .resource = mtu2_0_resources,
262 .num_resources = ARRAY_SIZE(mtu2_0_resources),
263};
264
265static struct sh_timer_config mtu2_1_platform_data = {
266 .name = "MTU2_1",
267 .channel_offset = -0x100,
268 .timer_bit = 1,
269 .clk = "peripheral_clk",
270 .clockevent_rating = 200,
271};
272
273static struct resource mtu2_1_resources[] = {
274 [0] = {
275 .name = "MTU2_1",
276 .start = 0xfffe4380,
277 .end = 0xfffe4390,
278 .flags = IORESOURCE_MEM,
279 },
280 [1] = {
281 .start = 164,
282 .flags = IORESOURCE_IRQ,
283 },
284};
285
286static struct platform_device mtu2_1_device = {
287 .name = "sh_mtu2",
288 .id = 1,
289 .dev = {
290 .platform_data = &mtu2_1_platform_data,
291 },
292 .resource = mtu2_1_resources,
293 .num_resources = ARRAY_SIZE(mtu2_1_resources),
294};
295
296static struct sh_timer_config mtu2_2_platform_data = {
297 .name = "MTU2_2",
298 .channel_offset = 0x80,
299 .timer_bit = 2,
300 .clk = "peripheral_clk",
301 .clockevent_rating = 200,
302};
303
304static struct resource mtu2_2_resources[] = {
305 [0] = {
306 .name = "MTU2_2",
307 .start = 0xfffe4000,
308 .end = 0xfffe400a,
309 .flags = IORESOURCE_MEM,
310 },
311 [1] = {
312 .start = 180,
313 .flags = IORESOURCE_IRQ,
314 },
315};
316
317static struct platform_device mtu2_2_device = {
318 .name = "sh_mtu2",
319 .id = 2,
320 .dev = {
321 .platform_data = &mtu2_2_platform_data,
322 },
323 .resource = mtu2_2_resources,
324 .num_resources = ARRAY_SIZE(mtu2_2_resources),
325};
326
168static struct platform_device *sh7206_devices[] __initdata = { 327static struct platform_device *sh7206_devices[] __initdata = {
169 &sci_device, 328 &sci_device,
329 &cmt0_device,
330 &cmt1_device,
331 &mtu2_0_device,
332 &mtu2_1_device,
333 &mtu2_2_device,
170}; 334};
171 335
172static int __init sh7206_devices_setup(void) 336static int __init sh7206_devices_setup(void)
@@ -180,3 +344,26 @@ void __init plat_irq_setup(void)
180{ 344{
181 register_intc_controller(&intc_desc); 345 register_intc_controller(&intc_desc);
182} 346}
347
348static struct platform_device *sh7206_early_devices[] __initdata = {
349 &cmt0_device,
350 &cmt1_device,
351 &mtu2_0_device,
352 &mtu2_1_device,
353 &mtu2_2_device,
354};
355
356#define STBCR3 0xfffe0408
357#define STBCR4 0xfffe040c
358
359void __init plat_early_device_setup(void)
360{
361 /* enable CMT clock */
362 __raw_writeb(__raw_readb(STBCR4) & ~0x04, STBCR4);
363
364 /* enable MTU2 clock */
365 __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3);
366
367 early_platform_add_devices(sh7206_early_devices,
368 ARRAY_SIZE(sh7206_early_devices));
369}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 13:59:11 -0500