diff options
Diffstat (limited to 'arch/sh/kernel/cpu/sh2a/setup-mxg.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh2a/setup-mxg.c | 65 |
1 files changed, 23 insertions, 42 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c index e611d79fac4c..844293723cfc 100644 --- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c +++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Renesas MX-G (R8A03022BG) Setup | 2 | * Renesas MX-G (R8A03022BG) Setup |
3 | * | 3 | * |
4 | * Copyright (C) 2008 Paul Mundt | 4 | * Copyright (C) 2008, 2009 Paul Mundt |
5 | * | 5 | * |
6 | * This file is subject to the terms and conditions of the GNU General Public | 6 | * This file is subject to the terms and conditions of the GNU General Public |
7 | * License. See the file "COPYING" in the main directory of this archive | 7 | * License. See the file "COPYING" in the main directory of this archive |
@@ -20,23 +20,15 @@ enum { | |||
20 | IRQ8, IRQ9, IRQ10, IRQ11, IRQ12, IRQ13, IRQ14, IRQ15, | 20 | IRQ8, IRQ9, IRQ10, IRQ11, IRQ12, IRQ13, IRQ14, IRQ15, |
21 | 21 | ||
22 | PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, | 22 | PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, |
23 | |||
24 | SINT8, SINT7, SINT6, SINT5, SINT4, SINT3, SINT2, SINT1, | 23 | SINT8, SINT7, SINT6, SINT5, SINT4, SINT3, SINT2, SINT1, |
25 | 24 | ||
26 | SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI, | 25 | SCIF0, SCIF1, |
27 | SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI, | ||
28 | 26 | ||
29 | MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D, | 27 | MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5 |
30 | MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F, | 28 | MTU2_TGI3B, MTU2_TGI3C, |
31 | MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U, | ||
32 | MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U, | ||
33 | MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V, | ||
34 | MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V, | ||
35 | MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W, | ||
36 | 29 | ||
37 | /* interrupt groups */ | 30 | /* interrupt groups */ |
38 | PINT, SCIF0, SCIF1, | 31 | PINT, |
39 | MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5 | ||
40 | }; | 32 | }; |
41 | 33 | ||
42 | static struct intc_vect vectors[] __initdata = { | 34 | static struct intc_vect vectors[] __initdata = { |
@@ -59,47 +51,36 @@ static struct intc_vect vectors[] __initdata = { | |||
59 | INTC_IRQ(SINT4, 98), INTC_IRQ(SINT3, 99), | 51 | INTC_IRQ(SINT4, 98), INTC_IRQ(SINT3, 99), |
60 | INTC_IRQ(SINT2, 100), INTC_IRQ(SINT1, 101), | 52 | INTC_IRQ(SINT2, 100), INTC_IRQ(SINT1, 101), |
61 | 53 | ||
62 | INTC_IRQ(SCIF0_RXI, 220), INTC_IRQ(SCIF0_TXI, 221), | 54 | INTC_IRQ(SCIF0, 220), INTC_IRQ(SCIF0, 221), |
63 | INTC_IRQ(SCIF0_BRI, 222), INTC_IRQ(SCIF0_ERI, 223), | 55 | INTC_IRQ(SCIF0, 222), INTC_IRQ(SCIF0, 223), |
64 | INTC_IRQ(SCIF1_RXI, 224), INTC_IRQ(SCIF1_TXI, 225), | 56 | INTC_IRQ(SCIF1, 224), INTC_IRQ(SCIF1, 225), |
65 | INTC_IRQ(SCIF1_BRI, 226), INTC_IRQ(SCIF1_ERI, 227), | 57 | INTC_IRQ(SCIF1, 226), INTC_IRQ(SCIF1, 227), |
66 | 58 | ||
67 | INTC_IRQ(MTU2_TGI0A, 228), INTC_IRQ(MTU2_TGI0B, 229), | 59 | INTC_IRQ(MTU2_GROUP1, 228), INTC_IRQ(MTU2_GROUP1, 229), |
68 | INTC_IRQ(MTU2_TGI0C, 230), INTC_IRQ(MTU2_TGI0D, 231), | 60 | INTC_IRQ(MTU2_GROUP1, 230), INTC_IRQ(MTU2_GROUP1, 231), |
69 | INTC_IRQ(MTU2_TCI0V, 232), INTC_IRQ(MTU2_TGI0E, 233), | 61 | INTC_IRQ(MTU2_GROUP1, 232), INTC_IRQ(MTU2_GROUP1, 233), |
70 | 62 | ||
71 | INTC_IRQ(MTU2_TGI0F, 234), INTC_IRQ(MTU2_TGI1A, 235), | 63 | INTC_IRQ(MTU2_GROUP2, 234), INTC_IRQ(MTU2_GROUP2, 235), |
72 | INTC_IRQ(MTU2_TGI1B, 236), INTC_IRQ(MTU2_TCI1V, 237), | 64 | INTC_IRQ(MTU2_GROUP2, 236), INTC_IRQ(MTU2_GROUP2, 237), |
73 | INTC_IRQ(MTU2_TCI1U, 238), INTC_IRQ(MTU2_TGI2A, 239), | 65 | INTC_IRQ(MTU2_GROUP2, 238), INTC_IRQ(MTU2_GROUP2, 239), |
74 | 66 | ||
75 | INTC_IRQ(MTU2_TGI2B, 240), INTC_IRQ(MTU2_TCI2V, 241), | 67 | INTC_IRQ(MTU2_GROUP3, 240), INTC_IRQ(MTU2_GROUP3, 241), |
76 | INTC_IRQ(MTU2_TCI2U, 242), INTC_IRQ(MTU2_TGI3A, 243), | 68 | INTC_IRQ(MTU2_GROUP3, 242), INTC_IRQ(MTU2_GROUP3, 243), |
77 | 69 | ||
78 | INTC_IRQ(MTU2_TGI3B, 244), | 70 | INTC_IRQ(MTU2_TGI3B, 244), |
79 | INTC_IRQ(MTU2_TGI3C, 245), | 71 | INTC_IRQ(MTU2_TGI3C, 245), |
80 | 72 | ||
81 | INTC_IRQ(MTU2_TGI3D, 246), INTC_IRQ(MTU2_TCI3V, 247), | 73 | INTC_IRQ(MTU2_GROUP4, 246), INTC_IRQ(MTU2_GROUP4, 247), |
82 | INTC_IRQ(MTU2_TGI4A, 248), INTC_IRQ(MTU2_TGI4B, 249), | 74 | INTC_IRQ(MTU2_GROUP4, 248), INTC_IRQ(MTU2_GROUP4, 249), |
83 | INTC_IRQ(MTU2_TGI4C, 250), INTC_IRQ(MTU2_TGI4D, 251), | 75 | INTC_IRQ(MTU2_GROUP4, 250), INTC_IRQ(MTU2_GROUP4, 251), |
84 | 76 | ||
85 | INTC_IRQ(MTU2_TCI4V, 252), INTC_IRQ(MTU2_TGI5U, 253), | 77 | INTC_IRQ(MTU2_GROUP5, 252), INTC_IRQ(MTU2_GROUP5, 253), |
86 | INTC_IRQ(MTU2_TGI5V, 254), INTC_IRQ(MTU2_TGI5W, 255), | 78 | INTC_IRQ(MTU2_GROUP5, 254), INTC_IRQ(MTU2_GROUP5, 255), |
87 | }; | 79 | }; |
88 | 80 | ||
89 | static struct intc_group groups[] __initdata = { | 81 | static struct intc_group groups[] __initdata = { |
90 | INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3, | 82 | INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3, |
91 | PINT4, PINT5, PINT6, PINT7), | 83 | PINT4, PINT5, PINT6, PINT7), |
92 | INTC_GROUP(MTU2_GROUP1, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D, | ||
93 | MTU2_TCI0V, MTU2_TGI0E), | ||
94 | INTC_GROUP(MTU2_GROUP2, MTU2_TGI0F, MTU2_TGI1A, MTU2_TGI1B, | ||
95 | MTU2_TCI1V, MTU2_TCI1U, MTU2_TGI2A), | ||
96 | INTC_GROUP(MTU2_GROUP3, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U, | ||
97 | MTU2_TGI3A), | ||
98 | INTC_GROUP(MTU2_GROUP4, MTU2_TGI3D, MTU2_TCI3V, MTU2_TGI4A, | ||
99 | MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D), | ||
100 | INTC_GROUP(MTU2_GROUP5, MTU2_TCI4V, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W), | ||
101 | INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI), | ||
102 | INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI), | ||
103 | }; | 84 | }; |
104 | 85 | ||
105 | static struct intc_prio_reg prio_registers[] __initdata = { | 86 | static struct intc_prio_reg prio_registers[] __initdata = { |
@@ -137,7 +118,7 @@ static struct plat_sci_port sci_platform_data[] = { | |||
137 | .mapbase = 0xff804000, | 118 | .mapbase = 0xff804000, |
138 | .flags = UPF_BOOT_AUTOCONF, | 119 | .flags = UPF_BOOT_AUTOCONF, |
139 | .type = PORT_SCIF, | 120 | .type = PORT_SCIF, |
140 | .irqs = { 223, 220, 221, 222 }, | 121 | .irqs = { 220, 220, 220, 220 }, |
141 | }, { | 122 | }, { |
142 | .flags = 0, | 123 | .flags = 0, |
143 | } | 124 | } |