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-rw-r--r--arch/sh/include/asm/fixmap.h9
-rw-r--r--arch/sh/include/asm/io.h6
-rw-r--r--arch/sh/include/asm/page.h2
-rw-r--r--arch/sh/include/asm/pgtable_32.h4
-rw-r--r--arch/sh/include/asm/pgtable_64.h15
-rw-r--r--arch/sh/include/asm/tlb.h57
-rw-r--r--arch/sh/include/cpu-sh4/cpu/mmu_context.h4
7 files changed, 95 insertions, 2 deletions
diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h
index 5ac1e40a511c..38a1de866873 100644
--- a/arch/sh/include/asm/fixmap.h
+++ b/arch/sh/include/asm/fixmap.h
@@ -60,11 +60,20 @@ enum fixed_addresses {
60 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ 60 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
61 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, 61 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
62#endif 62#endif
63 /*
64 * FIX_IOREMAP entries are useful for mapping physical address
65 * space before ioremap() is useable, e.g. really early in boot
66 * before kmalloc() is working.
67 */
68#define FIX_N_IOREMAPS 32
69 FIX_IOREMAP_BEGIN,
70 FIX_IOREMAP_END = FIX_IOREMAP_BEGIN + FIX_N_IOREMAPS,
63 __end_of_fixed_addresses 71 __end_of_fixed_addresses
64}; 72};
65 73
66extern void __set_fixmap(enum fixed_addresses idx, 74extern void __set_fixmap(enum fixed_addresses idx,
67 unsigned long phys, pgprot_t flags); 75 unsigned long phys, pgprot_t flags);
76extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags);
68 77
69#define set_fixmap(idx, phys) \ 78#define set_fixmap(idx, phys) \
70 __set_fixmap(idx, phys, PAGE_KERNEL) 79 __set_fixmap(idx, phys, PAGE_KERNEL)
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index f4314d8b05b8..bee5965e0a82 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -237,6 +237,12 @@ void __iomem *__ioremap_caller(unsigned long offset, unsigned long size,
237 unsigned long flags, void *caller); 237 unsigned long flags, void *caller);
238void __iounmap(void __iomem *addr); 238void __iounmap(void __iomem *addr);
239 239
240#ifdef CONFIG_IOREMAP_FIXED
241extern void __iomem *ioremap_fixed(resource_size_t, unsigned long, pgprot_t);
242extern void iounmap_fixed(void __iomem *);
243extern void ioremap_fixed_init(void);
244#endif
245
240static inline void __iomem * 246static inline void __iomem *
241__ioremap(unsigned long offset, unsigned long size, unsigned long flags) 247__ioremap(unsigned long offset, unsigned long size, unsigned long flags)
242{ 248{
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index a86c0f1d05d4..61e58105adc3 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -88,7 +88,7 @@ typedef struct { unsigned long pgd; } pgd_t;
88#define __pte(x) ((pte_t) { (x) } ) 88#define __pte(x) ((pte_t) { (x) } )
89#else 89#else
90typedef struct { unsigned long long pte_low; } pte_t; 90typedef struct { unsigned long long pte_low; } pte_t;
91typedef struct { unsigned long pgprot; } pgprot_t; 91typedef struct { unsigned long long pgprot; } pgprot_t;
92typedef struct { unsigned long pgd; } pgd_t; 92typedef struct { unsigned long pgd; } pgd_t;
93#define pte_val(x) ((x).pte_low) 93#define pte_val(x) ((x).pte_low)
94#define __pte(x) ((pte_t) { (x) } ) 94#define __pte(x) ((pte_t) { (x) } )
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h
index 5003ee86f67b..c573d45f1286 100644
--- a/arch/sh/include/asm/pgtable_32.h
+++ b/arch/sh/include/asm/pgtable_32.h
@@ -71,6 +71,8 @@
71#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ 71#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */
72#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ 72#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */
73 73
74#define _PAGE_EXT_WIRED 0x4000 /* software: Wire TLB entry */
75
74/* Wrapper for extended mode pgprot twiddling */ 76/* Wrapper for extended mode pgprot twiddling */
75#define _PAGE_EXT(x) ((unsigned long long)(x) << 32) 77#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
76 78
@@ -164,6 +166,8 @@ static inline unsigned long copy_ptea_attributes(unsigned long x)
164 (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \ 166 (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \
165 _PAGE_DIRTY | _PAGE_SPECIAL) 167 _PAGE_DIRTY | _PAGE_SPECIAL)
166 168
169#define _PAGE_WIRED (_PAGE_EXT(_PAGE_EXT_WIRED))
170
167#ifndef __ASSEMBLY__ 171#ifndef __ASSEMBLY__
168 172
169#if defined(CONFIG_X2TLB) /* SH-X2 TLB */ 173#if defined(CONFIG_X2TLB) /* SH-X2 TLB */
diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h
index dd381588c695..0ee46776dad6 100644
--- a/arch/sh/include/asm/pgtable_64.h
+++ b/arch/sh/include/asm/pgtable_64.h
@@ -123,8 +123,21 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
123#define _PAGE_DIRTY 0x400 /* software: page accessed in write */ 123#define _PAGE_DIRTY 0x400 /* software: page accessed in write */
124#define _PAGE_ACCESSED 0x800 /* software: page referenced */ 124#define _PAGE_ACCESSED 0x800 /* software: page referenced */
125 125
126/* Wrapper for extended mode pgprot twiddling */
127#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
128
129/*
130 * We can use the sign-extended bits in the PTEL to get 32 bits of
131 * software flags. This works for now because no implementations uses
132 * anything above the PPN field.
133 */
134#define _PAGE_WIRED _PAGE_EXT(0x001) /* software: wire the tlb entry */
135
136#define _PAGE_CLEAR_FLAGS (_PAGE_PRESENT | _PAGE_FILE | _PAGE_SHARED | \
137 _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_WIRED)
138
126/* Mask which drops software flags */ 139/* Mask which drops software flags */
127#define _PAGE_FLAGS_HARDWARE_MASK 0xfffffffffffff3dbLL 140#define _PAGE_FLAGS_HARDWARE_MASK (NEFF_MASK & ~(_PAGE_CLEAR_FLAGS))
128 141
129/* 142/*
130 * HugeTLB support 143 * HugeTLB support
diff --git a/arch/sh/include/asm/tlb.h b/arch/sh/include/asm/tlb.h
index da8fe7ab8728..dfc8fcd8ee50 100644
--- a/arch/sh/include/asm/tlb.h
+++ b/arch/sh/include/asm/tlb.h
@@ -11,6 +11,7 @@
11#ifdef CONFIG_MMU 11#ifdef CONFIG_MMU
12#include <asm/pgalloc.h> 12#include <asm/pgalloc.h>
13#include <asm/tlbflush.h> 13#include <asm/tlbflush.h>
14#include <asm/mmu_context.h>
14 15
15/* 16/*
16 * TLB handling. This allows us to remove pages from the page 17 * TLB handling. This allows us to remove pages from the page
@@ -97,6 +98,62 @@ tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
97 98
98#define tlb_migrate_finish(mm) do { } while (0) 99#define tlb_migrate_finish(mm) do { } while (0)
99 100
101#ifdef CONFIG_CPU_SH4
102extern void tlb_wire_entry(struct vm_area_struct *, unsigned long, pte_t);
103extern void tlb_unwire_entry(void);
104#elif defined(CONFIG_SUPERH64)
105static int dtlb_entry;
106static unsigned long long dtlb_entries[64];
107
108static inline void tlb_wire_entry(struct vm_area_struct *vma,
109 unsigned long addr, pte_t pte)
110{
111 unsigned long long entry;
112 unsigned long paddr, flags;
113
114 BUG_ON(dtlb_entry == 64);
115
116 local_irq_save(flags);
117
118 entry = sh64_get_wired_dtlb_entry();
119 dtlb_entries[dtlb_entry++] = entry;
120
121 paddr = pte_val(pte) & _PAGE_FLAGS_HARDWARE_MASK;
122 paddr &= ~PAGE_MASK;
123
124 sh64_setup_tlb_slot(entry, addr, get_asid(), paddr);
125
126 local_irq_restore(flags);
127}
128
129static inline void tlb_unwire_entry(void)
130{
131 unsigned long long entry;
132 unsigned long flags;
133
134 BUG_ON(!dtlb_entry);
135
136 local_irq_save(flags);
137 entry = dtlb_entries[dtlb_entry--];
138
139 sh64_teardown_tlb_slot(entry);
140 sh64_put_wired_dtlb_entry(entry);
141
142 local_irq_restore(flags);
143}
144#else
145static inline void tlb_wire_entry(struct vm_area_struct *vma ,
146 unsigned long addr, pte_t pte)
147{
148 BUG();
149}
150
151static inline void tlb_unwire_entry(void)
152{
153 BUG();
154}
155#endif /* CONFIG_CPU_SH4 */
156
100#else /* CONFIG_MMU */ 157#else /* CONFIG_MMU */
101 158
102#define tlb_start_vma(tlb, vma) do { } while (0) 159#define tlb_start_vma(tlb, vma) do { } while (0)
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
index 3ce7ef6c2978..03ea75c5315d 100644
--- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h
+++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
@@ -25,6 +25,10 @@
25 25
26#define MMUCR_TI (1<<2) 26#define MMUCR_TI (1<<2)
27 27
28#define MMUCR_URB 0x00FC0000
29#define MMUCR_URB_SHIFT 18
30#define MMUCR_URB_NENTRIES 64
31
28#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) 32#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
29#define MMUCR_SE (1 << 4) 33#define MMUCR_SE (1 << 4)
30#else 34#else