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-rw-r--r--arch/sh/drivers/pci/Makefile1
-rw-r--r--arch/sh/drivers/pci/ops-bigsur.c83
-rw-r--r--arch/sh/drivers/pci/pci-sh7751.c9
3 files changed, 0 insertions, 93 deletions
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index 9e00cb8a39e9..cc8d0d0b1427 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o
12obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ 12obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \
13 dma-dreamcast.o 13 dma-dreamcast.o
14obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o 14obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o
15obj-$(CONFIG_SH_BIGSUR) += ops-bigsur.o
16obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o 15obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o
17obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o 16obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
18obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o 17obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o
diff --git a/arch/sh/drivers/pci/ops-bigsur.c b/arch/sh/drivers/pci/ops-bigsur.c
deleted file mode 100644
index eb31be751524..000000000000
--- a/arch/sh/drivers/pci/ops-bigsur.c
+++ /dev/null
@@ -1,83 +0,0 @@
1/*
2 * linux/arch/sh/drivers/pci/ops-bigsur.c
3 *
4 * By Dustin McIntire (dustin@sensoria.com) (c)2001
5 *
6 * Ported to new API by Paul Mundt <lethal@linux-sh.org>.
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * PCI initialization for the Hitachi Big Sur Evaluation Board
12 */
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/pci.h>
17#include <asm/io.h>
18#include "pci-sh4.h"
19#include <asm/bigsur/bigsur.h>
20
21#define BIGSUR_PCI_IO 0x4000
22#define BIGSUR_PCI_MEM 0xfd000000
23
24static struct resource sh7751_io_resource = {
25 .name = "SH7751 IO",
26 .start = BIGSUR_PCI_IO,
27 .end = BIGSUR_PCI_IO + (64*1024) - 1,
28 .flags = IORESOURCE_IO,
29};
30
31static struct resource sh7751_mem_resource = {
32 .name = "SH7751 mem",
33 .start = BIGSUR_PCI_MEM,
34 .end = BIGSUR_PCI_MEM + (64*1024*1024) - 1,
35 .flags = IORESOURCE_MEM,
36};
37
38extern struct pci_ops sh7751_pci_ops;
39
40struct pci_channel board_pci_channels[] = {
41 { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
42 { 0, }
43};
44
45static struct sh4_pci_address_map sh7751_pci_map = {
46 .window0 = {
47 .base = SH7751_CS3_BASE_ADDR,
48 .size = BIGSUR_LSR0_SIZE,
49 },
50
51 .window1 = {
52 .base = SH7751_CS3_BASE_ADDR,
53 .size = BIGSUR_LSR1_SIZE,
54 },
55};
56
57/*
58 * Initialize the Big Sur PCI interface
59 * Setup hardware to be Central Funtion
60 * Copy the BSR regs to the PCI interface
61 * Setup PCI windows into local RAM
62 */
63int __init pcibios_init_platform(void)
64{
65 return sh7751_pcic_init(&sh7751_pci_map);
66}
67
68int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
69{
70 /*
71 * The Big Sur can be used in a CPCI chassis, but the SH7751 PCI
72 * interface is on the wrong end of the board so that it can also
73 * support a V320 CPI interface chip... Therefor the IRQ mapping is
74 * somewhat use dependent... I'l assume a linear map for now, i.e.
75 * INTA=slot0,pin0... INTD=slot3,pin0...
76 */
77 int irq = (slot + pin-1) % 4 + BIGSUR_SH7751_PCI_IRQ_BASE;
78
79 PCIDBG(2, "PCI: Mapping Big Sur IRQ for slot %d, pin %c to irq %d\n",
80 slot, pin-1+'A', irq);
81
82 return irq;
83}
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index 85e1ee2e2e7b..9ddff760d3c6 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -157,15 +157,6 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
157 PCIBIOS_MIN_IO, (64 << 10), 157 PCIBIOS_MIN_IO, (64 << 10),
158 SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO); 158 SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO);
159 159
160 /*
161 * XXX: For now, leave this board-specific. In the event we have other
162 * boards that need to do similar work, this can be wrapped.
163 */
164#ifdef CONFIG_SH_BIGSUR
165 bigsur_port_map(PCIBIOS_MIN_IO, (64 << 10),
166 SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO, 0);
167#endif
168
169 /* Make sure the MSB's of IO window are set to access PCI space 160 /* Make sure the MSB's of IO window are set to access PCI space
170 * correctly */ 161 * correctly */
171 word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK; 162 word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK;