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-rw-r--r--arch/sh/drivers/pci/ops-dreamcast.c2
-rw-r--r--arch/sh/drivers/pci/pci-st40.c6
-rw-r--r--arch/sh/drivers/pci/pci-st40.h2
3 files changed, 5 insertions, 5 deletions
diff --git a/arch/sh/drivers/pci/ops-dreamcast.c b/arch/sh/drivers/pci/ops-dreamcast.c
index 381306cf5425..e1284fc69361 100644
--- a/arch/sh/drivers/pci/ops-dreamcast.c
+++ b/arch/sh/drivers/pci/ops-dreamcast.c
@@ -57,7 +57,7 @@ struct pci_channel board_pci_channels[] = {
57 * 57 *
58 * Also, we could very easily support both Type 0 and Type 1 configurations 58 * Also, we could very easily support both Type 0 and Type 1 configurations
59 * here, but since it doesn't seem that there is any such implementation in 59 * here, but since it doesn't seem that there is any such implementation in
60 * existance, we don't bother. 60 * existence, we don't bother.
61 * 61 *
62 * I suppose if someone actually gets around to ripping the chip out of 62 * I suppose if someone actually gets around to ripping the chip out of
63 * the BBA and hanging some more devices off of it, then this might be 63 * the BBA and hanging some more devices off of it, then this might be
diff --git a/arch/sh/drivers/pci/pci-st40.c b/arch/sh/drivers/pci/pci-st40.c
index d67656a44b15..543417ff8314 100644
--- a/arch/sh/drivers/pci/pci-st40.c
+++ b/arch/sh/drivers/pci/pci-st40.c
@@ -292,7 +292,7 @@ int __init st40pci_init(unsigned memStart, unsigned memSize)
292 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | 292 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
293 PCI_COMMAND_IO); 293 PCI_COMMAND_IO);
294 294
295 /* Accesse to the 0xb0000000 -> 0xb6000000 area will go through to 0x10000000 -> 0x16000000 295 /* Access to the 0xb0000000 -> 0xb6000000 area will go through to 0x10000000 -> 0x16000000
296 * on the PCI bus. This allows a nice 1-1 bus to phys mapping. 296 * on the PCI bus. This allows a nice 1-1 bus to phys mapping.
297 */ 297 */
298 298
@@ -315,7 +315,7 @@ int __init st40pci_init(unsigned memStart, unsigned memSize)
315 ST40PCI_WRITE(CSR_MBAR0, 0); 315 ST40PCI_WRITE(CSR_MBAR0, 0);
316 ST40PCI_WRITE(LSR0, 0x0fff0001); 316 ST40PCI_WRITE(LSR0, 0x0fff0001);
317 317
318 /* ... and set up the initial incomming window to expose all of RAM */ 318 /* ... and set up the initial incoming window to expose all of RAM */
319 pci_set_rbar_region(7, memStart, memStart, memSize); 319 pci_set_rbar_region(7, memStart, memStart, memSize);
320 320
321 /* Maximise timeout values */ 321 /* Maximise timeout values */
@@ -473,7 +473,7 @@ static void pci_set_rbar_region(unsigned int region, unsigned long localAddr
473 473
474 mask = r2p2(regionSize) - 0x10000; 474 mask = r2p2(regionSize) - 0x10000;
475 475
476 /* Diable the region (in case currently in use, should never happen) */ 476 /* Disable the region (in case currently in use, should never happen) */
477 ST40PCI_WRITE_INDEXED(RSR, region, 0); 477 ST40PCI_WRITE_INDEXED(RSR, region, 0);
478 478
479 /* Start of local address space to publish */ 479 /* Start of local address space to publish */
diff --git a/arch/sh/drivers/pci/pci-st40.h b/arch/sh/drivers/pci/pci-st40.h
index d729e0c2d5fe..cf0d35bd135c 100644
--- a/arch/sh/drivers/pci/pci-st40.h
+++ b/arch/sh/drivers/pci/pci-st40.h
@@ -4,7 +4,7 @@
4 * May be copied or modified under the terms of the GNU General Public 4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information. 5 * License. See linux/COPYING for more information.
6 * 6 *
7 * Defintions for the ST40 PCI hardware. 7 * Definitions for the ST40 PCI hardware.
8 */ 8 */
9 9
10#ifndef __PCI_ST40_H__ 10#ifndef __PCI_ST40_H__