aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/boards/renesas/systemh/io.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/sh/boards/renesas/systemh/io.c')
-rw-r--r--arch/sh/boards/renesas/systemh/io.c163
1 files changed, 27 insertions, 136 deletions
diff --git a/arch/sh/boards/renesas/systemh/io.c b/arch/sh/boards/renesas/systemh/io.c
index cf979011aa94..cde6e5d192c4 100644
--- a/arch/sh/boards/renesas/systemh/io.c
+++ b/arch/sh/boards/renesas/systemh/io.c
@@ -5,66 +5,25 @@
5 * Based largely on io_se.c. 5 * Based largely on io_se.c.
6 * 6 *
7 * I/O routine for Hitachi 7751 Systemh. 7 * I/O routine for Hitachi 7751 Systemh.
8 *
9 */ 8 */
10
11#include <linux/kernel.h> 9#include <linux/kernel.h>
12#include <linux/types.h> 10#include <linux/types.h>
13#include <asm/systemh/7751systemh.h> 11#include <linux/pci.h>
12#include <asm/systemh7751.h>
14#include <asm/addrspace.h> 13#include <asm/addrspace.h>
15#include <asm/io.h> 14#include <asm/io.h>
16 15
17#include <linux/pci.h>
18#include "../../drivers/pci/pci-sh7751.h"
19
20/*
21 * The 7751 SystemH Engine uses the built-in PCI controller (PCIC)
22 * of the 7751 processor, and has a SuperIO accessible on its memory
23 * bus.
24 */
25
26#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
27#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
28#define PCI_IO_AREA SH7751_PCI_IO_BASE
29#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
30
31#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
32#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area 16#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area
33 of smc lan chip*/ 17 of smc lan chip*/
34
35#define maybebadio(name,port) \
36 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
37 #name, (port), (__u32) __builtin_return_address(0))
38
39static inline void delay(void)
40{
41 ctrl_inw(0xa0000000);
42}
43
44static inline volatile __u16 * 18static inline volatile __u16 *
45port2adr(unsigned int port) 19port2adr(unsigned int port)
46{ 20{
47 if (port >= 0x2000) 21 if (port >= 0x2000)
48 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 22 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
49#if 0 23 maybebadio((unsigned long)port);
50 else
51 return (volatile __u16 *) (PA_SUPERIO + (port << 1));
52#endif
53 maybebadio(name,(unsigned long)port);
54 return (volatile __u16*)port; 24 return (volatile __u16*)port;
55} 25}
56 26
57/* In case someone configures the kernel w/o PCI support: in that */
58/* scenario, don't ever bother to check for PCI-window addresses */
59
60/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
61#if defined(CONFIG_PCI)
62#define CHECK_SH7751_PCIIO(port) \
63 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
64#else
65#define CHECK_SH7751_PCIIO(port) (0)
66#endif
67
68/* 27/*
69 * General outline: remap really low stuff [eventually] to SuperIO, 28 * General outline: remap really low stuff [eventually] to SuperIO,
70 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 29 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -76,8 +35,8 @@ unsigned char sh7751systemh_inb(unsigned long port)
76{ 35{
77 if (PXSEG(port)) 36 if (PXSEG(port))
78 return *(volatile unsigned char *)port; 37 return *(volatile unsigned char *)port;
79 else if (CHECK_SH7751_PCIIO(port)) 38 else if (is_pci_ioaddr(port))
80 return *(volatile unsigned char *)PCI_IOMAP(port); 39 return *(volatile unsigned char *)pci_ioaddr(port);
81 else if (port <= 0x3F1) 40 else if (port <= 0x3F1)
82 return *(volatile unsigned char *)ETHER_IOMAP(port); 41 return *(volatile unsigned char *)ETHER_IOMAP(port);
83 else 42 else
@@ -90,13 +49,13 @@ unsigned char sh7751systemh_inb_p(unsigned long port)
90 49
91 if (PXSEG(port)) 50 if (PXSEG(port))
92 v = *(volatile unsigned char *)port; 51 v = *(volatile unsigned char *)port;
93 else if (CHECK_SH7751_PCIIO(port)) 52 else if (is_pci_ioaddr(port))
94 v = *(volatile unsigned char *)PCI_IOMAP(port); 53 v = *(volatile unsigned char *)pci_ioaddr(port);
95 else if (port <= 0x3F1) 54 else if (port <= 0x3F1)
96 v = *(volatile unsigned char *)ETHER_IOMAP(port); 55 v = *(volatile unsigned char *)ETHER_IOMAP(port);
97 else 56 else
98 v = (*port2adr(port))&0xff; 57 v = (*port2adr(port))&0xff;
99 delay(); 58 ctrl_delay();
100 return v; 59 return v;
101} 60}
102 61
@@ -104,14 +63,14 @@ unsigned short sh7751systemh_inw(unsigned long port)
104{ 63{
105 if (PXSEG(port)) 64 if (PXSEG(port))
106 return *(volatile unsigned short *)port; 65 return *(volatile unsigned short *)port;
107 else if (CHECK_SH7751_PCIIO(port)) 66 else if (is_pci_ioaddr(port))
108 return *(volatile unsigned short *)PCI_IOMAP(port); 67 return *(volatile unsigned short *)pci_ioaddr(port);
109 else if (port >= 0x2000) 68 else if (port >= 0x2000)
110 return *port2adr(port); 69 return *port2adr(port);
111 else if (port <= 0x3F1) 70 else if (port <= 0x3F1)
112 return *(volatile unsigned int *)ETHER_IOMAP(port); 71 return *(volatile unsigned int *)ETHER_IOMAP(port);
113 else 72 else
114 maybebadio(inw, port); 73 maybebadio(port);
115 return 0; 74 return 0;
116} 75}
117 76
@@ -119,14 +78,14 @@ unsigned int sh7751systemh_inl(unsigned long port)
119{ 78{
120 if (PXSEG(port)) 79 if (PXSEG(port))
121 return *(volatile unsigned long *)port; 80 return *(volatile unsigned long *)port;
122 else if (CHECK_SH7751_PCIIO(port)) 81 else if (is_pci_ioaddr(port))
123 return *(volatile unsigned int *)PCI_IOMAP(port); 82 return *(volatile unsigned int *)pci_ioaddr(port);
124 else if (port >= 0x2000) 83 else if (port >= 0x2000)
125 return *port2adr(port); 84 return *port2adr(port);
126 else if (port <= 0x3F1) 85 else if (port <= 0x3F1)
127 return *(volatile unsigned int *)ETHER_IOMAP(port); 86 return *(volatile unsigned int *)ETHER_IOMAP(port);
128 else 87 else
129 maybebadio(inl, port); 88 maybebadio(port);
130 return 0; 89 return 0;
131} 90}
132 91
@@ -135,8 +94,8 @@ void sh7751systemh_outb(unsigned char value, unsigned long port)
135 94
136 if (PXSEG(port)) 95 if (PXSEG(port))
137 *(volatile unsigned char *)port = value; 96 *(volatile unsigned char *)port = value;
138 else if (CHECK_SH7751_PCIIO(port)) 97 else if (is_pci_ioaddr(port))
139 *((unsigned char*)PCI_IOMAP(port)) = value; 98 *((unsigned char*)pci_ioaddr(port)) = value;
140 else if (port <= 0x3F1) 99 else if (port <= 0x3F1)
141 *(volatile unsigned char *)ETHER_IOMAP(port) = value; 100 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
142 else 101 else
@@ -147,37 +106,37 @@ void sh7751systemh_outb_p(unsigned char value, unsigned long port)
147{ 106{
148 if (PXSEG(port)) 107 if (PXSEG(port))
149 *(volatile unsigned char *)port = value; 108 *(volatile unsigned char *)port = value;
150 else if (CHECK_SH7751_PCIIO(port)) 109 else if (is_pci_ioaddr(port))
151 *((unsigned char*)PCI_IOMAP(port)) = value; 110 *((unsigned char*)pci_ioaddr(port)) = value;
152 else if (port <= 0x3F1) 111 else if (port <= 0x3F1)
153 *(volatile unsigned char *)ETHER_IOMAP(port) = value; 112 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
154 else 113 else
155 *(port2adr(port)) = value; 114 *(port2adr(port)) = value;
156 delay(); 115 ctrl_delay();
157} 116}
158 117
159void sh7751systemh_outw(unsigned short value, unsigned long port) 118void sh7751systemh_outw(unsigned short value, unsigned long port)
160{ 119{
161 if (PXSEG(port)) 120 if (PXSEG(port))
162 *(volatile unsigned short *)port = value; 121 *(volatile unsigned short *)port = value;
163 else if (CHECK_SH7751_PCIIO(port)) 122 else if (is_pci_ioaddr(port))
164 *((unsigned short *)PCI_IOMAP(port)) = value; 123 *((unsigned short *)pci_ioaddr(port)) = value;
165 else if (port >= 0x2000) 124 else if (port >= 0x2000)
166 *port2adr(port) = value; 125 *port2adr(port) = value;
167 else if (port <= 0x3F1) 126 else if (port <= 0x3F1)
168 *(volatile unsigned short *)ETHER_IOMAP(port) = value; 127 *(volatile unsigned short *)ETHER_IOMAP(port) = value;
169 else 128 else
170 maybebadio(outw, port); 129 maybebadio(port);
171} 130}
172 131
173void sh7751systemh_outl(unsigned int value, unsigned long port) 132void sh7751systemh_outl(unsigned int value, unsigned long port)
174{ 133{
175 if (PXSEG(port)) 134 if (PXSEG(port))
176 *(volatile unsigned long *)port = value; 135 *(volatile unsigned long *)port = value;
177 else if (CHECK_SH7751_PCIIO(port)) 136 else if (is_pci_ioaddr(port))
178 *((unsigned long*)PCI_IOMAP(port)) = value; 137 *((unsigned long*)pci_ioaddr(port)) = value;
179 else 138 else
180 maybebadio(outl, port); 139 maybebadio(port);
181} 140}
182 141
183void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count) 142void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count)
@@ -194,7 +153,7 @@ void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count)
194 153
195void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count) 154void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count)
196{ 155{
197 maybebadio(insl, port); 156 maybebadio(port);
198} 157}
199 158
200void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count) 159void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count)
@@ -211,73 +170,5 @@ void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long cou
211 170
212void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count) 171void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count)
213{ 172{
214 maybebadio(outsw, port); 173 maybebadio(port);
215}
216
217/* For read/write calls, just copy generic (pass-thru); PCIMBR is */
218/* already set up. For a larger memory space, these would need to */
219/* reset PCIMBR as needed on a per-call basis... */
220
221unsigned char sh7751systemh_readb(unsigned long addr)
222{
223 return *(volatile unsigned char*)addr;
224}
225
226unsigned short sh7751systemh_readw(unsigned long addr)
227{
228 return *(volatile unsigned short*)addr;
229}
230
231unsigned int sh7751systemh_readl(unsigned long addr)
232{
233 return *(volatile unsigned long*)addr;
234}
235
236void sh7751systemh_writeb(unsigned char b, unsigned long addr)
237{
238 *(volatile unsigned char*)addr = b;
239}
240
241void sh7751systemh_writew(unsigned short b, unsigned long addr)
242{
243 *(volatile unsigned short*)addr = b;
244}
245
246void sh7751systemh_writel(unsigned int b, unsigned long addr)
247{
248 *(volatile unsigned long*)addr = b;
249}
250
251
252
253/* Map ISA bus address to the real address. Only for PCMCIA. */
254
255/* ISA page descriptor. */
256static __u32 sh_isa_memmap[256];
257
258#if 0
259static int
260sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
261{
262 int idx;
263
264 if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
265 return -1;
266
267 idx = start >> 12;
268 sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
269 printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
270 start, length, offset, idx, sh_isa_memmap[idx]);
271 return 0;
272}
273#endif
274
275unsigned long
276sh7751systemh_isa_port2addr(unsigned long offset)
277{
278 int idx;
279
280 idx = (offset >> 12) & 0xff;
281 offset &= 0xfff;
282 return sh_isa_memmap[idx] + offset;
283} 174}