diff options
Diffstat (limited to 'arch/s390/kernel/uprobes.c')
-rw-r--r-- | arch/s390/kernel/uprobes.c | 69 |
1 files changed, 60 insertions, 9 deletions
diff --git a/arch/s390/kernel/uprobes.c b/arch/s390/kernel/uprobes.c index f6b3cd056ec2..cc7328080b60 100644 --- a/arch/s390/kernel/uprobes.c +++ b/arch/s390/kernel/uprobes.c | |||
@@ -48,6 +48,30 @@ bool arch_uprobe_xol_was_trapped(struct task_struct *tsk) | |||
48 | return false; | 48 | return false; |
49 | } | 49 | } |
50 | 50 | ||
51 | static int check_per_event(unsigned short cause, unsigned long control, | ||
52 | struct pt_regs *regs) | ||
53 | { | ||
54 | if (!(regs->psw.mask & PSW_MASK_PER)) | ||
55 | return 0; | ||
56 | /* user space single step */ | ||
57 | if (control == 0) | ||
58 | return 1; | ||
59 | /* over indication for storage alteration */ | ||
60 | if ((control & 0x20200000) && (cause & 0x2000)) | ||
61 | return 1; | ||
62 | if (cause & 0x8000) { | ||
63 | /* all branches */ | ||
64 | if ((control & 0x80800000) == 0x80000000) | ||
65 | return 1; | ||
66 | /* branch into selected range */ | ||
67 | if (((control & 0x80800000) == 0x80800000) && | ||
68 | regs->psw.addr >= current->thread.per_user.start && | ||
69 | regs->psw.addr <= current->thread.per_user.end) | ||
70 | return 1; | ||
71 | } | ||
72 | return 0; | ||
73 | } | ||
74 | |||
51 | int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) | 75 | int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) |
52 | { | 76 | { |
53 | int fixup = probe_get_fixup_type(auprobe->insn); | 77 | int fixup = probe_get_fixup_type(auprobe->insn); |
@@ -71,9 +95,13 @@ int arch_uprobe_post_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) | |||
71 | if (regs->psw.addr - utask->xol_vaddr == ilen) | 95 | if (regs->psw.addr - utask->xol_vaddr == ilen) |
72 | regs->psw.addr = utask->vaddr + ilen; | 96 | regs->psw.addr = utask->vaddr + ilen; |
73 | } | 97 | } |
74 | /* If per tracing was active generate trap */ | 98 | if (check_per_event(current->thread.per_event.cause, |
75 | if (regs->psw.mask & PSW_MASK_PER) | 99 | current->thread.per_user.control, regs)) { |
76 | do_per_trap(regs); | 100 | /* fix per address */ |
101 | current->thread.per_event.address = utask->vaddr; | ||
102 | /* trigger per event */ | ||
103 | set_pt_regs_flag(regs, PIF_PER_TRAP); | ||
104 | } | ||
77 | return 0; | 105 | return 0; |
78 | } | 106 | } |
79 | 107 | ||
@@ -106,6 +134,7 @@ void arch_uprobe_abort_xol(struct arch_uprobe *auprobe, struct pt_regs *regs) | |||
106 | clear_thread_flag(TIF_UPROBE_SINGLESTEP); | 134 | clear_thread_flag(TIF_UPROBE_SINGLESTEP); |
107 | regs->int_code = auprobe->saved_int_code; | 135 | regs->int_code = auprobe->saved_int_code; |
108 | regs->psw.addr = current->utask->vaddr; | 136 | regs->psw.addr = current->utask->vaddr; |
137 | current->thread.per_event.address = current->utask->vaddr; | ||
109 | } | 138 | } |
110 | 139 | ||
111 | unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline, | 140 | unsigned long arch_uretprobe_hijack_return_addr(unsigned long trampoline, |
@@ -146,17 +175,20 @@ static void adjust_psw_addr(psw_t *psw, unsigned long len) | |||
146 | __rc; \ | 175 | __rc; \ |
147 | }) | 176 | }) |
148 | 177 | ||
149 | #define emu_store_ril(ptr, input) \ | 178 | #define emu_store_ril(regs, ptr, input) \ |
150 | ({ \ | 179 | ({ \ |
151 | unsigned int mask = sizeof(*(ptr)) - 1; \ | 180 | unsigned int mask = sizeof(*(ptr)) - 1; \ |
181 | __typeof__(ptr) __ptr = (ptr); \ | ||
152 | int __rc = 0; \ | 182 | int __rc = 0; \ |
153 | \ | 183 | \ |
154 | if (!test_facility(34)) \ | 184 | if (!test_facility(34)) \ |
155 | __rc = EMU_ILLEGAL_OP; \ | 185 | __rc = EMU_ILLEGAL_OP; \ |
156 | else if ((u64 __force)ptr & mask) \ | 186 | else if ((u64 __force)__ptr & mask) \ |
157 | __rc = EMU_SPECIFICATION; \ | 187 | __rc = EMU_SPECIFICATION; \ |
158 | else if (put_user(*(input), ptr)) \ | 188 | else if (put_user(*(input), __ptr)) \ |
159 | __rc = EMU_ADDRESSING; \ | 189 | __rc = EMU_ADDRESSING; \ |
190 | if (__rc == 0) \ | ||
191 | sim_stor_event(regs, __ptr, mask + 1); \ | ||
160 | __rc; \ | 192 | __rc; \ |
161 | }) | 193 | }) |
162 | 194 | ||
@@ -198,6 +230,25 @@ union split_register { | |||
198 | }; | 230 | }; |
199 | 231 | ||
200 | /* | 232 | /* |
233 | * If user per registers are setup to trace storage alterations and an | ||
234 | * emulated store took place on a fitting address a user trap is generated. | ||
235 | */ | ||
236 | static void sim_stor_event(struct pt_regs *regs, void *addr, int len) | ||
237 | { | ||
238 | if (!(regs->psw.mask & PSW_MASK_PER)) | ||
239 | return; | ||
240 | if (!(current->thread.per_user.control & PER_EVENT_STORE)) | ||
241 | return; | ||
242 | if ((void *)current->thread.per_user.start > (addr + len)) | ||
243 | return; | ||
244 | if ((void *)current->thread.per_user.end < addr) | ||
245 | return; | ||
246 | current->thread.per_event.address = regs->psw.addr; | ||
247 | current->thread.per_event.cause = PER_EVENT_STORE >> 16; | ||
248 | set_pt_regs_flag(regs, PIF_PER_TRAP); | ||
249 | } | ||
250 | |||
251 | /* | ||
201 | * pc relative instructions are emulated, since parameters may not be | 252 | * pc relative instructions are emulated, since parameters may not be |
202 | * accessible from the xol area due to range limitations. | 253 | * accessible from the xol area due to range limitations. |
203 | */ | 254 | */ |
@@ -249,13 +300,13 @@ static void handle_insn_ril(struct arch_uprobe *auprobe, struct pt_regs *regs) | |||
249 | rc = emu_load_ril((u32 __user *)uptr, &rx->u64); | 300 | rc = emu_load_ril((u32 __user *)uptr, &rx->u64); |
250 | break; | 301 | break; |
251 | case 0x07: /* sthrl */ | 302 | case 0x07: /* sthrl */ |
252 | rc = emu_store_ril((u16 __user *)uptr, &rx->u16[3]); | 303 | rc = emu_store_ril(regs, (u16 __user *)uptr, &rx->u16[3]); |
253 | break; | 304 | break; |
254 | case 0x0b: /* stgrl */ | 305 | case 0x0b: /* stgrl */ |
255 | rc = emu_store_ril((u64 __user *)uptr, &rx->u64); | 306 | rc = emu_store_ril(regs, (u64 __user *)uptr, &rx->u64); |
256 | break; | 307 | break; |
257 | case 0x0f: /* strl */ | 308 | case 0x0f: /* strl */ |
258 | rc = emu_store_ril((u32 __user *)uptr, &rx->u32[1]); | 309 | rc = emu_store_ril(regs, (u32 __user *)uptr, &rx->u32[1]); |
259 | break; | 310 | break; |
260 | } | 311 | } |
261 | break; | 312 | break; |