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1/*
2 * arch/s390/kernel/head31.S
3 *
4 * (C) Copyright IBM Corp. 2005
5 *
6 * Author(s): Hartmut Penner <hp@de.ibm.com>
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>
8 * Rob van der Heij <rvdhei@iae.nl>
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 *
11 */
12
13#
14# startup-code at 0x10000, running in absolute addressing mode
15# this is called either by the ipl loader or directly by PSW restart
16# or linload or SALIPL
17#
18 .org 0x10000
19startup:basr %r13,0 # get base
20.LPG1: l %r1, .Lget_ipl_device_addr-.LPG1(%r13)
21 basr %r14, %r1
22 lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
23 la %r12,_pstart-.LPG1(%r13) # pointer to parameter area
24 # move IPL device to lowcore
25 mvc __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
26
27#
28# clear bss memory
29#
30 l %r2,.Lbss_bgn-.LPG1(%r13) # start of bss
31 l %r3,.Lbss_end-.LPG1(%r13) # end of bss
32 sr %r3,%r2 # length of bss
33 sr %r4,%r4
34 sr %r5,%r5 # set src,length and pad to zero
35 sr %r0,%r0
36 mvcle %r2,%r4,0 # clear mem
37 jo .-4 # branch back, if not finish
38
39 l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word
40.Lservicecall:
41 stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts
42
43 stctl %r0, %r0,.Lcr-.LPG1(%r13) # get cr0
44 la %r1,0x200 # set bit 22
45 o %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1
46 st %r1,.Lcr-.LPG1(%r13)
47 lctl %r0, %r0,.Lcr-.LPG1(%r13) # load modified cr0
48
49 mvc __LC_EXT_NEW_PSW(8),.Lpcext-.LPG1(%r13) # set postcall psw
50 la %r1, .Lsclph-.LPG1(%r13)
51 a %r1,__LC_EXT_NEW_PSW+4 # set handler
52 st %r1,__LC_EXT_NEW_PSW+4
53
54 la %r4,_pstart-.LPG1(%r13) # %r4 is our index for sccb stuff
55 la %r1, .Lsccb-PARMAREA(%r4) # our sccb
56 .insn rre,0xb2200000,%r2,%r1 # service call
57 ipm %r1
58 srl %r1,28 # get cc code
59 xr %r3, %r3
60 chi %r1,3
61 be .Lfchunk-.LPG1(%r13) # leave
62 chi %r1,2
63 be .Lservicecall-.LPG1(%r13)
64 lpsw .Lwaitsclp-.LPG1(%r13)
65.Lsclph:
66 lh %r1,.Lsccbr-PARMAREA(%r4)
67 chi %r1,0x10 # 0x0010 is the sucess code
68 je .Lprocsccb # let's process the sccb
69 chi %r1,0x1f0
70 bne .Lfchunk-.LPG1(%r13) # unhandled error code
71 c %r2, .Lrcp-.LPG1(%r13) # Did we try Read SCP forced
72 bne .Lfchunk-.LPG1(%r13) # if no, give up
73 l %r2, .Lrcp2-.LPG1(%r13) # try with Read SCP
74 b .Lservicecall-.LPG1(%r13)
75.Lprocsccb:
76 lhi %r1,0
77 icm %r1,3,.Lscpincr1-PARMAREA(%r4) # use this one if != 0
78 jnz .Lscnd
79 lhi %r1,0x800 # otherwise report 2GB
80.Lscnd:
81 lhi %r3,0x800 # limit reported memory size to 2GB
82 cr %r1,%r3
83 jl .Lno2gb
84 lr %r1,%r3
85.Lno2gb:
86 xr %r3,%r3 # same logic
87 ic %r3,.Lscpa1-PARMAREA(%r4)
88 chi %r3,0x00
89 jne .Lcompmem
90 l %r3,.Lscpa2-PARMAREA(%r13)
91.Lcompmem:
92 mr %r2,%r1 # mem in MB on 128-bit
93 l %r1,.Lonemb-.LPG1(%r13)
94 mr %r2,%r1 # mem size in bytes in %r3
95 b .Lfchunk-.LPG1(%r13)
96
97 .align 4
98.Lget_ipl_device_addr:
99 .long .Lget_ipl_device
100.Lpmask:
101 .byte 0
102.align 8
103.Lpcext:.long 0x00080000,0x80000000
104.Lcr:
105 .long 0x00 # place holder for cr0
106.Lwaitsclp:
107 .long 0x010a0000,0x80000000 + .Lsclph
108.Lrcp:
109 .int 0x00120001 # Read SCP forced code
110.Lrcp2:
111 .int 0x00020001 # Read SCP code
112.Lonemb:
113 .int 0x100000
114.Lfchunk:
115
116#
117# find memory chunks.
118#
119 lr %r9,%r3 # end of mem
120 mvc __LC_PGM_NEW_PSW(8),.Lpcmem-.LPG1(%r13)
121 la %r1,1 # test in increments of 128KB
122 sll %r1,17
123 l %r3,.Lmchunk-.LPG1(%r13) # get pointer to memory_chunk array
124 slr %r4,%r4 # set start of chunk to zero
125 slr %r5,%r5 # set end of chunk to zero
126 slr %r6,%r6 # set access code to zero
127 la %r10, MEMORY_CHUNKS # number of chunks
128.Lloop:
129 tprot 0(%r5),0 # test protection of first byte
130 ipm %r7
131 srl %r7,28
132 clr %r6,%r7 # compare cc with last access code
133 be .Lsame-.LPG1(%r13)
134 b .Lchkmem-.LPG1(%r13)
135.Lsame:
136 ar %r5,%r1 # add 128KB to end of chunk
137 bno .Lloop-.LPG1(%r13) # r1 < 0x80000000 -> loop
138.Lchkmem: # > 2GB or tprot got a program check
139 clr %r4,%r5 # chunk size > 0?
140 be .Lchkloop-.LPG1(%r13)
141 st %r4,0(%r3) # store start address of chunk
142 lr %r0,%r5
143 slr %r0,%r4
144 st %r0,4(%r3) # store size of chunk
145 st %r6,8(%r3) # store type of chunk
146 la %r3,12(%r3)
147 l %r4,.Lmemsize-.LPG1(%r13) # address of variable memory_size
148 st %r5,0(%r4) # store last end to memory size
149 ahi %r10,-1 # update chunk number
150.Lchkloop:
151 lr %r6,%r7 # set access code to last cc
152 # we got an exception or we're starting a new
153 # chunk , we must check if we should
154 # still try to find valid memory (if we detected
155 # the amount of available storage), and if we
156 # have chunks left
157 xr %r0,%r0
158 clr %r0,%r9 # did we detect memory?
159 je .Ldonemem # if not, leave
160 chi %r10,0 # do we have chunks left?
161 je .Ldonemem
162 alr %r5,%r1 # add 128KB to end of chunk
163 lr %r4,%r5 # potential new chunk
164 clr %r5,%r9 # should we go on?
165 jl .Lloop
166.Ldonemem:
167 l %r12,.Lmflags-.LPG1(%r13) # get address of machine_flags
168#
169# find out if we are running under VM
170#
171 stidp __LC_CPUID # store cpuid
172 tm __LC_CPUID,0xff # running under VM ?
173 bno .Lnovm-.LPG1(%r13)
174 oi 3(%r12),1 # set VM flag
175.Lnovm:
176 lh %r0,__LC_CPUID+4 # get cpu version
177 chi %r0,0x7490 # running on a P/390 ?
178 bne .Lnop390-.LPG1(%r13)
179 oi 3(%r12),4 # set P/390 flag
180.Lnop390:
181
182#
183# find out if we have an IEEE fpu
184#
185 mvc __LC_PGM_NEW_PSW(8),.Lpcfpu-.LPG1(%r13)
186 efpc %r0,0 # test IEEE extract fpc instruction
187 oi 3(%r12),2 # set IEEE fpu flag
188.Lchkfpu:
189
190#
191# find out if we have the CSP instruction
192#
193 mvc __LC_PGM_NEW_PSW(8),.Lpccsp-.LPG1(%r13)
194 la %r0,0
195 lr %r1,%r0
196 la %r2,4
197 csp %r0,%r2 # Test CSP instruction
198 oi 3(%r12),8 # set CSP flag
199.Lchkcsp:
200
201#
202# find out if we have the MVPG instruction
203#
204 mvc __LC_PGM_NEW_PSW(8),.Lpcmvpg-.LPG1(%r13)
205 sr %r0,%r0
206 la %r1,0
207 la %r2,0
208 mvpg %r1,%r2 # Test CSP instruction
209 oi 3(%r12),16 # set MVPG flag
210.Lchkmvpg:
211
212#
213# find out if we have the IDTE instruction
214#
215 mvc __LC_PGM_NEW_PSW(8),.Lpcidte-.LPG1(%r13)
216 .long 0xb2b10000 # store facility list
217 tm 0xc8,0x08 # check bit for clearing-by-ASCE
218 bno .Lchkidte-.LPG1(%r13)
219 lhi %r1,2094
220 lhi %r2,0
221 .long 0xb98e2001
222 oi 3(%r12),0x80 # set IDTE flag
223.Lchkidte:
224
225 lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space,
226 # virtual and never return ...
227 .align 8
228.Lentry:.long 0x00080000,0x80000000 + _stext
229.Lctl: .long 0x04b50002 # cr0: various things
230 .long 0 # cr1: primary space segment table
231 .long .Lduct # cr2: dispatchable unit control table
232 .long 0 # cr3: instruction authorization
233 .long 0 # cr4: instruction authorization
234 .long 0xffffffff # cr5: primary-aste origin
235 .long 0 # cr6: I/O interrupts
236 .long 0 # cr7: secondary space segment table
237 .long 0 # cr8: access registers translation
238 .long 0 # cr9: tracing off
239 .long 0 # cr10: tracing off
240 .long 0 # cr11: tracing off
241 .long 0 # cr12: tracing off
242 .long 0 # cr13: home space segment table
243 .long 0xc0000000 # cr14: machine check handling off
244 .long 0 # cr15: linkage stack operations
245.Lpcmem:.long 0x00080000,0x80000000 + .Lchkmem
246.Lpcfpu:.long 0x00080000,0x80000000 + .Lchkfpu
247.Lpccsp:.long 0x00080000,0x80000000 + .Lchkcsp
248.Lpcmvpg:.long 0x00080000,0x80000000 + .Lchkmvpg
249.Lpcidte:.long 0x00080000,0x80000000 + .Lchkidte
250.Lmemsize:.long memory_size
251.Lmchunk:.long memory_chunk
252.Lmflags:.long machine_flags
253.Lbss_bgn: .long __bss_start
254.Lbss_end: .long _end
255
256 .org PARMAREA-64
257.Lduct: .long 0,0,0,0,0,0,0,0
258 .long 0,0,0,0,0,0,0,0
259
260#
261# params at 10400 (setup.h)
262#
263 .org PARMAREA
264 .global _pstart
265_pstart:
266 .long 0,0 # IPL_DEVICE
267 .long 0,RAMDISK_ORIGIN # INITRD_START
268 .long 0,RAMDISK_SIZE # INITRD_SIZE
269
270 .org COMMAND_LINE
271 .byte "root=/dev/ram0 ro"
272 .byte 0
273 .org 0x11000
274.Lsccb:
275 .hword 0x1000 # length, one page
276 .byte 0x00,0x00,0x00
277 .byte 0x80 # variable response bit set
278.Lsccbr:
279 .hword 0x00 # response code
280.Lscpincr1:
281 .hword 0x00
282.Lscpa1:
283 .byte 0x00
284 .fill 89,1,0
285.Lscpa2:
286 .int 0x00
287.Lscpincr2:
288 .quad 0x00
289 .fill 3984,1,0
290 .org 0x12000
291 .global _pend
292_pend:
293
294 GET_IPL_DEVICE
295
296#ifdef CONFIG_SHARED_KERNEL
297 .org 0x100000
298#endif
299
300#
301# startup-code, running in virtual mode
302#
303 .globl _stext
304_stext: basr %r13,0 # get base
305.LPG3:
306#
307# Setup stack
308#
309 l %r15,.Linittu-.LPG3(%r13)
310 mvc __LC_CURRENT(4),__TI_task(%r15)
311 ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
312 st %r15,__LC_KERNEL_STACK # set end of kernel stack
313 ahi %r15,-96
314 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
315
316# check control registers
317 stctl %c0,%c15,0(%r15)
318 oi 2(%r15),0x40 # enable sigp emergency signal
319 oi 0(%r15),0x10 # switch on low address protection
320 lctl %c0,%c15,0(%r15)
321
322#
323 lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
324 l %r14,.Lstart-.LPG3(%r13)
325 basr %r14,%r14 # call start_kernel
326#
327# We returned from start_kernel ?!? PANIK
328#
329 basr %r13,0
330 lpsw .Ldw-.(%r13) # load disabled wait psw
331#
332 .align 8
333.Ldw: .long 0x000a0000,0x00000000
334.Linittu:.long init_thread_union
335.Lstart:.long start_kernel
336.Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
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