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-rw-r--r--arch/s390/kernel/dis.c48
1 files changed, 1 insertions, 47 deletions
diff --git a/arch/s390/kernel/dis.c b/arch/s390/kernel/dis.c
index 533430307da8..8140d10c6785 100644
--- a/arch/s390/kernel/dis.c
+++ b/arch/s390/kernel/dis.c
@@ -32,12 +32,6 @@
32#include <asm/debug.h> 32#include <asm/debug.h>
33#include <asm/irq.h> 33#include <asm/irq.h>
34 34
35#ifndef CONFIG_64BIT
36#define ONELONG "%08lx: "
37#else /* CONFIG_64BIT */
38#define ONELONG "%016lx: "
39#endif /* CONFIG_64BIT */
40
41enum { 35enum {
42 UNUSED, /* Indicates the end of the operand list */ 36 UNUSED, /* Indicates the end of the operand list */
43 R_8, /* GPR starting at position 8 */ 37 R_8, /* GPR starting at position 8 */
@@ -536,12 +530,10 @@ static char *long_insn_name[] = {
536}; 530};
537 531
538static struct s390_insn opcode[] = { 532static struct s390_insn opcode[] = {
539#ifdef CONFIG_64BIT
540 { "bprp", 0xc5, INSTR_MII_UPI }, 533 { "bprp", 0xc5, INSTR_MII_UPI },
541 { "bpp", 0xc7, INSTR_SMI_U0RDP }, 534 { "bpp", 0xc7, INSTR_SMI_U0RDP },
542 { "trtr", 0xd0, INSTR_SS_L0RDRD }, 535 { "trtr", 0xd0, INSTR_SS_L0RDRD },
543 { "lmd", 0xef, INSTR_SS_RRRDRD3 }, 536 { "lmd", 0xef, INSTR_SS_RRRDRD3 },
544#endif
545 { "spm", 0x04, INSTR_RR_R0 }, 537 { "spm", 0x04, INSTR_RR_R0 },
546 { "balr", 0x05, INSTR_RR_RR }, 538 { "balr", 0x05, INSTR_RR_RR },
547 { "bctr", 0x06, INSTR_RR_RR }, 539 { "bctr", 0x06, INSTR_RR_RR },
@@ -725,11 +717,9 @@ static struct s390_insn opcode[] = {
725}; 717};
726 718
727static struct s390_insn opcode_01[] = { 719static struct s390_insn opcode_01[] = {
728#ifdef CONFIG_64BIT
729 { "ptff", 0x04, INSTR_E }, 720 { "ptff", 0x04, INSTR_E },
730 { "pfpo", 0x0a, INSTR_E }, 721 { "pfpo", 0x0a, INSTR_E },
731 { "sam64", 0x0e, INSTR_E }, 722 { "sam64", 0x0e, INSTR_E },
732#endif
733 { "pr", 0x01, INSTR_E }, 723 { "pr", 0x01, INSTR_E },
734 { "upt", 0x02, INSTR_E }, 724 { "upt", 0x02, INSTR_E },
735 { "sckpf", 0x07, INSTR_E }, 725 { "sckpf", 0x07, INSTR_E },
@@ -741,7 +731,6 @@ static struct s390_insn opcode_01[] = {
741}; 731};
742 732
743static struct s390_insn opcode_a5[] = { 733static struct s390_insn opcode_a5[] = {
744#ifdef CONFIG_64BIT
745 { "iihh", 0x00, INSTR_RI_RU }, 734 { "iihh", 0x00, INSTR_RI_RU },
746 { "iihl", 0x01, INSTR_RI_RU }, 735 { "iihl", 0x01, INSTR_RI_RU },
747 { "iilh", 0x02, INSTR_RI_RU }, 736 { "iilh", 0x02, INSTR_RI_RU },
@@ -758,12 +747,10 @@ static struct s390_insn opcode_a5[] = {
758 { "llihl", 0x0d, INSTR_RI_RU }, 747 { "llihl", 0x0d, INSTR_RI_RU },
759 { "llilh", 0x0e, INSTR_RI_RU }, 748 { "llilh", 0x0e, INSTR_RI_RU },
760 { "llill", 0x0f, INSTR_RI_RU }, 749 { "llill", 0x0f, INSTR_RI_RU },
761#endif
762 { "", 0, INSTR_INVALID } 750 { "", 0, INSTR_INVALID }
763}; 751};
764 752
765static struct s390_insn opcode_a7[] = { 753static struct s390_insn opcode_a7[] = {
766#ifdef CONFIG_64BIT
767 { "tmhh", 0x02, INSTR_RI_RU }, 754 { "tmhh", 0x02, INSTR_RI_RU },
768 { "tmhl", 0x03, INSTR_RI_RU }, 755 { "tmhl", 0x03, INSTR_RI_RU },
769 { "brctg", 0x07, INSTR_RI_RP }, 756 { "brctg", 0x07, INSTR_RI_RP },
@@ -771,7 +758,6 @@ static struct s390_insn opcode_a7[] = {
771 { "aghi", 0x0b, INSTR_RI_RI }, 758 { "aghi", 0x0b, INSTR_RI_RI },
772 { "mghi", 0x0d, INSTR_RI_RI }, 759 { "mghi", 0x0d, INSTR_RI_RI },
773 { "cghi", 0x0f, INSTR_RI_RI }, 760 { "cghi", 0x0f, INSTR_RI_RI },
774#endif
775 { "tmlh", 0x00, INSTR_RI_RU }, 761 { "tmlh", 0x00, INSTR_RI_RU },
776 { "tmll", 0x01, INSTR_RI_RU }, 762 { "tmll", 0x01, INSTR_RI_RU },
777 { "brc", 0x04, INSTR_RI_UP }, 763 { "brc", 0x04, INSTR_RI_UP },
@@ -785,18 +771,15 @@ static struct s390_insn opcode_a7[] = {
785}; 771};
786 772
787static struct s390_insn opcode_aa[] = { 773static struct s390_insn opcode_aa[] = {
788#ifdef CONFIG_64BIT
789 { { 0, LONG_INSN_RINEXT }, 0x00, INSTR_RI_RI }, 774 { { 0, LONG_INSN_RINEXT }, 0x00, INSTR_RI_RI },
790 { "rion", 0x01, INSTR_RI_RI }, 775 { "rion", 0x01, INSTR_RI_RI },
791 { "tric", 0x02, INSTR_RI_RI }, 776 { "tric", 0x02, INSTR_RI_RI },
792 { "rioff", 0x03, INSTR_RI_RI }, 777 { "rioff", 0x03, INSTR_RI_RI },
793 { { 0, LONG_INSN_RIEMIT }, 0x04, INSTR_RI_RI }, 778 { { 0, LONG_INSN_RIEMIT }, 0x04, INSTR_RI_RI },
794#endif
795 { "", 0, INSTR_INVALID } 779 { "", 0, INSTR_INVALID }
796}; 780};
797 781
798static struct s390_insn opcode_b2[] = { 782static struct s390_insn opcode_b2[] = {
799#ifdef CONFIG_64BIT
800 { "stckf", 0x7c, INSTR_S_RD }, 783 { "stckf", 0x7c, INSTR_S_RD },
801 { "lpp", 0x80, INSTR_S_RD }, 784 { "lpp", 0x80, INSTR_S_RD },
802 { "lcctl", 0x84, INSTR_S_RD }, 785 { "lcctl", 0x84, INSTR_S_RD },
@@ -819,7 +802,6 @@ static struct s390_insn opcode_b2[] = {
819 { "tend", 0xf8, INSTR_S_00 }, 802 { "tend", 0xf8, INSTR_S_00 },
820 { "niai", 0xfa, INSTR_IE_UU }, 803 { "niai", 0xfa, INSTR_IE_UU },
821 { { 0, LONG_INSN_TABORT }, 0xfc, INSTR_S_RD }, 804 { { 0, LONG_INSN_TABORT }, 0xfc, INSTR_S_RD },
822#endif
823 { "stidp", 0x02, INSTR_S_RD }, 805 { "stidp", 0x02, INSTR_S_RD },
824 { "sck", 0x04, INSTR_S_RD }, 806 { "sck", 0x04, INSTR_S_RD },
825 { "stck", 0x05, INSTR_S_RD }, 807 { "stck", 0x05, INSTR_S_RD },
@@ -908,7 +890,6 @@ static struct s390_insn opcode_b2[] = {
908}; 890};
909 891
910static struct s390_insn opcode_b3[] = { 892static struct s390_insn opcode_b3[] = {
911#ifdef CONFIG_64BIT
912 { "maylr", 0x38, INSTR_RRF_F0FF }, 893 { "maylr", 0x38, INSTR_RRF_F0FF },
913 { "mylr", 0x39, INSTR_RRF_F0FF }, 894 { "mylr", 0x39, INSTR_RRF_F0FF },
914 { "mayr", 0x3a, INSTR_RRF_F0FF }, 895 { "mayr", 0x3a, INSTR_RRF_F0FF },
@@ -996,7 +977,6 @@ static struct s390_insn opcode_b3[] = {
996 { "qaxtr", 0xfd, INSTR_RRF_FUFF }, 977 { "qaxtr", 0xfd, INSTR_RRF_FUFF },
997 { "iextr", 0xfe, INSTR_RRF_F0FR }, 978 { "iextr", 0xfe, INSTR_RRF_F0FR },
998 { "rrxtr", 0xff, INSTR_RRF_FFRU }, 979 { "rrxtr", 0xff, INSTR_RRF_FFRU },
999#endif
1000 { "lpebr", 0x00, INSTR_RRE_FF }, 980 { "lpebr", 0x00, INSTR_RRE_FF },
1001 { "lnebr", 0x01, INSTR_RRE_FF }, 981 { "lnebr", 0x01, INSTR_RRE_FF },
1002 { "ltebr", 0x02, INSTR_RRE_FF }, 982 { "ltebr", 0x02, INSTR_RRE_FF },
@@ -1091,7 +1071,6 @@ static struct s390_insn opcode_b3[] = {
1091}; 1071};
1092 1072
1093static struct s390_insn opcode_b9[] = { 1073static struct s390_insn opcode_b9[] = {
1094#ifdef CONFIG_64BIT
1095 { "lpgr", 0x00, INSTR_RRE_RR }, 1074 { "lpgr", 0x00, INSTR_RRE_RR },
1096 { "lngr", 0x01, INSTR_RRE_RR }, 1075 { "lngr", 0x01, INSTR_RRE_RR },
1097 { "ltgr", 0x02, INSTR_RRE_RR }, 1076 { "ltgr", 0x02, INSTR_RRE_RR },
@@ -1204,7 +1183,6 @@ static struct s390_insn opcode_b9[] = {
1204 { "srk", 0xf9, INSTR_RRF_R0RR2 }, 1183 { "srk", 0xf9, INSTR_RRF_R0RR2 },
1205 { "alrk", 0xfa, INSTR_RRF_R0RR2 }, 1184 { "alrk", 0xfa, INSTR_RRF_R0RR2 },
1206 { "slrk", 0xfb, INSTR_RRF_R0RR2 }, 1185 { "slrk", 0xfb, INSTR_RRF_R0RR2 },
1207#endif
1208 { "kmac", 0x1e, INSTR_RRE_RR }, 1186 { "kmac", 0x1e, INSTR_RRE_RR },
1209 { "lrvr", 0x1f, INSTR_RRE_RR }, 1187 { "lrvr", 0x1f, INSTR_RRE_RR },
1210 { "km", 0x2e, INSTR_RRE_RR }, 1188 { "km", 0x2e, INSTR_RRE_RR },
@@ -1224,7 +1202,6 @@ static struct s390_insn opcode_b9[] = {
1224}; 1202};
1225 1203
1226static struct s390_insn opcode_c0[] = { 1204static struct s390_insn opcode_c0[] = {
1227#ifdef CONFIG_64BIT
1228 { "lgfi", 0x01, INSTR_RIL_RI }, 1205 { "lgfi", 0x01, INSTR_RIL_RI },
1229 { "xihf", 0x06, INSTR_RIL_RU }, 1206 { "xihf", 0x06, INSTR_RIL_RU },
1230 { "xilf", 0x07, INSTR_RIL_RU }, 1207 { "xilf", 0x07, INSTR_RIL_RU },
@@ -1236,7 +1213,6 @@ static struct s390_insn opcode_c0[] = {
1236 { "oilf", 0x0d, INSTR_RIL_RU }, 1213 { "oilf", 0x0d, INSTR_RIL_RU },
1237 { "llihf", 0x0e, INSTR_RIL_RU }, 1214 { "llihf", 0x0e, INSTR_RIL_RU },
1238 { "llilf", 0x0f, INSTR_RIL_RU }, 1215 { "llilf", 0x0f, INSTR_RIL_RU },
1239#endif
1240 { "larl", 0x00, INSTR_RIL_RP }, 1216 { "larl", 0x00, INSTR_RIL_RP },
1241 { "brcl", 0x04, INSTR_RIL_UP }, 1217 { "brcl", 0x04, INSTR_RIL_UP },
1242 { "brasl", 0x05, INSTR_RIL_RP }, 1218 { "brasl", 0x05, INSTR_RIL_RP },
@@ -1244,7 +1220,6 @@ static struct s390_insn opcode_c0[] = {
1244}; 1220};
1245 1221
1246static struct s390_insn opcode_c2[] = { 1222static struct s390_insn opcode_c2[] = {
1247#ifdef CONFIG_64BIT
1248 { "msgfi", 0x00, INSTR_RIL_RI }, 1223 { "msgfi", 0x00, INSTR_RIL_RI },
1249 { "msfi", 0x01, INSTR_RIL_RI }, 1224 { "msfi", 0x01, INSTR_RIL_RI },
1250 { "slgfi", 0x04, INSTR_RIL_RU }, 1225 { "slgfi", 0x04, INSTR_RIL_RU },
@@ -1257,12 +1232,10 @@ static struct s390_insn opcode_c2[] = {
1257 { "cfi", 0x0d, INSTR_RIL_RI }, 1232 { "cfi", 0x0d, INSTR_RIL_RI },
1258 { "clgfi", 0x0e, INSTR_RIL_RU }, 1233 { "clgfi", 0x0e, INSTR_RIL_RU },
1259 { "clfi", 0x0f, INSTR_RIL_RU }, 1234 { "clfi", 0x0f, INSTR_RIL_RU },
1260#endif
1261 { "", 0, INSTR_INVALID } 1235 { "", 0, INSTR_INVALID }
1262}; 1236};
1263 1237
1264static struct s390_insn opcode_c4[] = { 1238static struct s390_insn opcode_c4[] = {
1265#ifdef CONFIG_64BIT
1266 { "llhrl", 0x02, INSTR_RIL_RP }, 1239 { "llhrl", 0x02, INSTR_RIL_RP },
1267 { "lghrl", 0x04, INSTR_RIL_RP }, 1240 { "lghrl", 0x04, INSTR_RIL_RP },
1268 { "lhrl", 0x05, INSTR_RIL_RP }, 1241 { "lhrl", 0x05, INSTR_RIL_RP },
@@ -1274,12 +1247,10 @@ static struct s390_insn opcode_c4[] = {
1274 { "lrl", 0x0d, INSTR_RIL_RP }, 1247 { "lrl", 0x0d, INSTR_RIL_RP },
1275 { { 0, LONG_INSN_LLGFRL }, 0x0e, INSTR_RIL_RP }, 1248 { { 0, LONG_INSN_LLGFRL }, 0x0e, INSTR_RIL_RP },
1276 { "strl", 0x0f, INSTR_RIL_RP }, 1249 { "strl", 0x0f, INSTR_RIL_RP },
1277#endif
1278 { "", 0, INSTR_INVALID } 1250 { "", 0, INSTR_INVALID }
1279}; 1251};
1280 1252
1281static struct s390_insn opcode_c6[] = { 1253static struct s390_insn opcode_c6[] = {
1282#ifdef CONFIG_64BIT
1283 { "exrl", 0x00, INSTR_RIL_RP }, 1254 { "exrl", 0x00, INSTR_RIL_RP },
1284 { "pfdrl", 0x02, INSTR_RIL_UP }, 1255 { "pfdrl", 0x02, INSTR_RIL_UP },
1285 { "cghrl", 0x04, INSTR_RIL_RP }, 1256 { "cghrl", 0x04, INSTR_RIL_RP },
@@ -1292,35 +1263,29 @@ static struct s390_insn opcode_c6[] = {
1292 { "crl", 0x0d, INSTR_RIL_RP }, 1263 { "crl", 0x0d, INSTR_RIL_RP },
1293 { { 0, LONG_INSN_CLGFRL }, 0x0e, INSTR_RIL_RP }, 1264 { { 0, LONG_INSN_CLGFRL }, 0x0e, INSTR_RIL_RP },
1294 { "clrl", 0x0f, INSTR_RIL_RP }, 1265 { "clrl", 0x0f, INSTR_RIL_RP },
1295#endif
1296 { "", 0, INSTR_INVALID } 1266 { "", 0, INSTR_INVALID }
1297}; 1267};
1298 1268
1299static struct s390_insn opcode_c8[] = { 1269static struct s390_insn opcode_c8[] = {
1300#ifdef CONFIG_64BIT
1301 { "mvcos", 0x00, INSTR_SSF_RRDRD }, 1270 { "mvcos", 0x00, INSTR_SSF_RRDRD },
1302 { "ectg", 0x01, INSTR_SSF_RRDRD }, 1271 { "ectg", 0x01, INSTR_SSF_RRDRD },
1303 { "csst", 0x02, INSTR_SSF_RRDRD }, 1272 { "csst", 0x02, INSTR_SSF_RRDRD },
1304 { "lpd", 0x04, INSTR_SSF_RRDRD2 }, 1273 { "lpd", 0x04, INSTR_SSF_RRDRD2 },
1305 { "lpdg", 0x05, INSTR_SSF_RRDRD2 }, 1274 { "lpdg", 0x05, INSTR_SSF_RRDRD2 },
1306#endif
1307 { "", 0, INSTR_INVALID } 1275 { "", 0, INSTR_INVALID }
1308}; 1276};
1309 1277
1310static struct s390_insn opcode_cc[] = { 1278static struct s390_insn opcode_cc[] = {
1311#ifdef CONFIG_64BIT
1312 { "brcth", 0x06, INSTR_RIL_RP }, 1279 { "brcth", 0x06, INSTR_RIL_RP },
1313 { "aih", 0x08, INSTR_RIL_RI }, 1280 { "aih", 0x08, INSTR_RIL_RI },
1314 { "alsih", 0x0a, INSTR_RIL_RI }, 1281 { "alsih", 0x0a, INSTR_RIL_RI },
1315 { { 0, LONG_INSN_ALSIHN }, 0x0b, INSTR_RIL_RI }, 1282 { { 0, LONG_INSN_ALSIHN }, 0x0b, INSTR_RIL_RI },
1316 { "cih", 0x0d, INSTR_RIL_RI }, 1283 { "cih", 0x0d, INSTR_RIL_RI },
1317 { "clih", 0x0f, INSTR_RIL_RI }, 1284 { "clih", 0x0f, INSTR_RIL_RI },
1318#endif
1319 { "", 0, INSTR_INVALID } 1285 { "", 0, INSTR_INVALID }
1320}; 1286};
1321 1287
1322static struct s390_insn opcode_e3[] = { 1288static struct s390_insn opcode_e3[] = {
1323#ifdef CONFIG_64BIT
1324 { "ltg", 0x02, INSTR_RXY_RRRD }, 1289 { "ltg", 0x02, INSTR_RXY_RRRD },
1325 { "lrag", 0x03, INSTR_RXY_RRRD }, 1290 { "lrag", 0x03, INSTR_RXY_RRRD },
1326 { "lg", 0x04, INSTR_RXY_RRRD }, 1291 { "lg", 0x04, INSTR_RXY_RRRD },
@@ -1414,7 +1379,6 @@ static struct s390_insn opcode_e3[] = {
1414 { "clhf", 0xcf, INSTR_RXY_RRRD }, 1379 { "clhf", 0xcf, INSTR_RXY_RRRD },
1415 { { 0, LONG_INSN_MPCIFC }, 0xd0, INSTR_RXY_RRRD }, 1380 { { 0, LONG_INSN_MPCIFC }, 0xd0, INSTR_RXY_RRRD },
1416 { { 0, LONG_INSN_STPCIFC }, 0xd4, INSTR_RXY_RRRD }, 1381 { { 0, LONG_INSN_STPCIFC }, 0xd4, INSTR_RXY_RRRD },
1417#endif
1418 { "lrv", 0x1e, INSTR_RXY_RRRD }, 1382 { "lrv", 0x1e, INSTR_RXY_RRRD },
1419 { "lrvh", 0x1f, INSTR_RXY_RRRD }, 1383 { "lrvh", 0x1f, INSTR_RXY_RRRD },
1420 { "strv", 0x3e, INSTR_RXY_RRRD }, 1384 { "strv", 0x3e, INSTR_RXY_RRRD },
@@ -1426,7 +1390,6 @@ static struct s390_insn opcode_e3[] = {
1426}; 1390};
1427 1391
1428static struct s390_insn opcode_e5[] = { 1392static struct s390_insn opcode_e5[] = {
1429#ifdef CONFIG_64BIT
1430 { "strag", 0x02, INSTR_SSE_RDRD }, 1393 { "strag", 0x02, INSTR_SSE_RDRD },
1431 { "mvhhi", 0x44, INSTR_SIL_RDI }, 1394 { "mvhhi", 0x44, INSTR_SIL_RDI },
1432 { "mvghi", 0x48, INSTR_SIL_RDI }, 1395 { "mvghi", 0x48, INSTR_SIL_RDI },
@@ -1439,7 +1402,6 @@ static struct s390_insn opcode_e5[] = {
1439 { { 0, LONG_INSN_CLFHSI }, 0x5d, INSTR_SIL_RDU }, 1402 { { 0, LONG_INSN_CLFHSI }, 0x5d, INSTR_SIL_RDU },
1440 { { 0, LONG_INSN_TBEGIN }, 0x60, INSTR_SIL_RDU }, 1403 { { 0, LONG_INSN_TBEGIN }, 0x60, INSTR_SIL_RDU },
1441 { { 0, LONG_INSN_TBEGINC }, 0x61, INSTR_SIL_RDU }, 1404 { { 0, LONG_INSN_TBEGINC }, 0x61, INSTR_SIL_RDU },
1442#endif
1443 { "lasp", 0x00, INSTR_SSE_RDRD }, 1405 { "lasp", 0x00, INSTR_SSE_RDRD },
1444 { "tprot", 0x01, INSTR_SSE_RDRD }, 1406 { "tprot", 0x01, INSTR_SSE_RDRD },
1445 { "mvcsk", 0x0e, INSTR_SSE_RDRD }, 1407 { "mvcsk", 0x0e, INSTR_SSE_RDRD },
@@ -1448,7 +1410,6 @@ static struct s390_insn opcode_e5[] = {
1448}; 1410};
1449 1411
1450static struct s390_insn opcode_e7[] = { 1412static struct s390_insn opcode_e7[] = {
1451#ifdef CONFIG_64BIT
1452 { "lcbb", 0x27, INSTR_RXE_RRRDM }, 1413 { "lcbb", 0x27, INSTR_RXE_RRRDM },
1453 { "vgef", 0x13, INSTR_VRV_VVRDM }, 1414 { "vgef", 0x13, INSTR_VRV_VVRDM },
1454 { "vgeg", 0x12, INSTR_VRV_VVRDM }, 1415 { "vgeg", 0x12, INSTR_VRV_VVRDM },
@@ -1588,11 +1549,9 @@ static struct s390_insn opcode_e7[] = {
1588 { "vfsq", 0xce, INSTR_VRR_VV000MM }, 1549 { "vfsq", 0xce, INSTR_VRR_VV000MM },
1589 { "vfs", 0xe2, INSTR_VRR_VVV00MM }, 1550 { "vfs", 0xe2, INSTR_VRR_VVV00MM },
1590 { "vftci", 0x4a, INSTR_VRI_VVIMM }, 1551 { "vftci", 0x4a, INSTR_VRI_VVIMM },
1591#endif
1592}; 1552};
1593 1553
1594static struct s390_insn opcode_eb[] = { 1554static struct s390_insn opcode_eb[] = {
1595#ifdef CONFIG_64BIT
1596 { "lmg", 0x04, INSTR_RSY_RRRD }, 1555 { "lmg", 0x04, INSTR_RSY_RRRD },
1597 { "srag", 0x0a, INSTR_RSY_RRRD }, 1556 { "srag", 0x0a, INSTR_RSY_RRRD },
1598 { "slag", 0x0b, INSTR_RSY_RRRD }, 1557 { "slag", 0x0b, INSTR_RSY_RRRD },
@@ -1659,7 +1618,6 @@ static struct s390_insn opcode_eb[] = {
1659 { "stric", 0x61, INSTR_RSY_RDRM }, 1618 { "stric", 0x61, INSTR_RSY_RDRM },
1660 { "mric", 0x62, INSTR_RSY_RDRM }, 1619 { "mric", 0x62, INSTR_RSY_RDRM },
1661 { { 0, LONG_INSN_STCCTM }, 0x17, INSTR_RSY_RMRD }, 1620 { { 0, LONG_INSN_STCCTM }, 0x17, INSTR_RSY_RMRD },
1662#endif
1663 { "rll", 0x1d, INSTR_RSY_RRRD }, 1621 { "rll", 0x1d, INSTR_RSY_RRRD },
1664 { "mvclu", 0x8e, INSTR_RSY_RRRD }, 1622 { "mvclu", 0x8e, INSTR_RSY_RRRD },
1665 { "tp", 0xc0, INSTR_RSL_R0RD }, 1623 { "tp", 0xc0, INSTR_RSL_R0RD },
@@ -1667,7 +1625,6 @@ static struct s390_insn opcode_eb[] = {
1667}; 1625};
1668 1626
1669static struct s390_insn opcode_ec[] = { 1627static struct s390_insn opcode_ec[] = {
1670#ifdef CONFIG_64BIT
1671 { "brxhg", 0x44, INSTR_RIE_RRP }, 1628 { "brxhg", 0x44, INSTR_RIE_RRP },
1672 { "brxlg", 0x45, INSTR_RIE_RRP }, 1629 { "brxlg", 0x45, INSTR_RIE_RRP },
1673 { { 0, LONG_INSN_RISBLG }, 0x51, INSTR_RIE_RRUUU }, 1630 { { 0, LONG_INSN_RISBLG }, 0x51, INSTR_RIE_RRUUU },
@@ -1701,12 +1658,10 @@ static struct s390_insn opcode_ec[] = {
1701 { "clgib", 0xfd, INSTR_RIS_RURDU }, 1658 { "clgib", 0xfd, INSTR_RIS_RURDU },
1702 { "cib", 0xfe, INSTR_RIS_RURDI }, 1659 { "cib", 0xfe, INSTR_RIS_RURDI },
1703 { "clib", 0xff, INSTR_RIS_RURDU }, 1660 { "clib", 0xff, INSTR_RIS_RURDU },
1704#endif
1705 { "", 0, INSTR_INVALID } 1661 { "", 0, INSTR_INVALID }
1706}; 1662};
1707 1663
1708static struct s390_insn opcode_ed[] = { 1664static struct s390_insn opcode_ed[] = {
1709#ifdef CONFIG_64BIT
1710 { "mayl", 0x38, INSTR_RXF_FRRDF }, 1665 { "mayl", 0x38, INSTR_RXF_FRRDF },
1711 { "myl", 0x39, INSTR_RXF_FRRDF }, 1666 { "myl", 0x39, INSTR_RXF_FRRDF },
1712 { "may", 0x3a, INSTR_RXF_FRRDF }, 1667 { "may", 0x3a, INSTR_RXF_FRRDF },
@@ -1731,7 +1686,6 @@ static struct s390_insn opcode_ed[] = {
1731 { "czxt", 0xa9, INSTR_RSL_LRDFU }, 1686 { "czxt", 0xa9, INSTR_RSL_LRDFU },
1732 { "cdzt", 0xaa, INSTR_RSL_LRDFU }, 1687 { "cdzt", 0xaa, INSTR_RSL_LRDFU },
1733 { "cxzt", 0xab, INSTR_RSL_LRDFU }, 1688 { "cxzt", 0xab, INSTR_RSL_LRDFU },
1734#endif
1735 { "ldeb", 0x04, INSTR_RXE_FRRD }, 1689 { "ldeb", 0x04, INSTR_RXE_FRRD },
1736 { "lxdb", 0x05, INSTR_RXE_FRRD }, 1690 { "lxdb", 0x05, INSTR_RXE_FRRD },
1737 { "lxeb", 0x06, INSTR_RXE_FRRD }, 1691 { "lxeb", 0x06, INSTR_RXE_FRRD },
@@ -2051,7 +2005,7 @@ void show_code(struct pt_regs *regs)
2051 else 2005 else
2052 *ptr++ = ' '; 2006 *ptr++ = ' ';
2053 addr = regs->psw.addr + start - 32; 2007 addr = regs->psw.addr + start - 32;
2054 ptr += sprintf(ptr, ONELONG, addr); 2008 ptr += sprintf(ptr, "%016lx: ", addr);
2055 if (start + opsize >= end) 2009 if (start + opsize >= end)
2056 break; 2010 break;
2057 for (i = 0; i < opsize; i++) 2011 for (i = 0; i < opsize; i++)