diff options
Diffstat (limited to 'arch/s390/include/asm/rwsem.h')
-rw-r--r-- | arch/s390/include/asm/rwsem.h | 63 |
1 files changed, 30 insertions, 33 deletions
diff --git a/arch/s390/include/asm/rwsem.h b/arch/s390/include/asm/rwsem.h index d0eb4653cebd..1ceee10264c3 100644 --- a/arch/s390/include/asm/rwsem.h +++ b/arch/s390/include/asm/rwsem.h | |||
@@ -41,19 +41,17 @@ | |||
41 | #error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead" | 41 | #error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead" |
42 | #endif | 42 | #endif |
43 | 43 | ||
44 | #ifdef __KERNEL__ | 44 | #ifndef CONFIG_64BIT |
45 | |||
46 | #ifndef __s390x__ | ||
47 | #define RWSEM_UNLOCKED_VALUE 0x00000000 | 45 | #define RWSEM_UNLOCKED_VALUE 0x00000000 |
48 | #define RWSEM_ACTIVE_BIAS 0x00000001 | 46 | #define RWSEM_ACTIVE_BIAS 0x00000001 |
49 | #define RWSEM_ACTIVE_MASK 0x0000ffff | 47 | #define RWSEM_ACTIVE_MASK 0x0000ffff |
50 | #define RWSEM_WAITING_BIAS (-0x00010000) | 48 | #define RWSEM_WAITING_BIAS (-0x00010000) |
51 | #else /* __s390x__ */ | 49 | #else /* CONFIG_64BIT */ |
52 | #define RWSEM_UNLOCKED_VALUE 0x0000000000000000L | 50 | #define RWSEM_UNLOCKED_VALUE 0x0000000000000000L |
53 | #define RWSEM_ACTIVE_BIAS 0x0000000000000001L | 51 | #define RWSEM_ACTIVE_BIAS 0x0000000000000001L |
54 | #define RWSEM_ACTIVE_MASK 0x00000000ffffffffL | 52 | #define RWSEM_ACTIVE_MASK 0x00000000ffffffffL |
55 | #define RWSEM_WAITING_BIAS (-0x0000000100000000L) | 53 | #define RWSEM_WAITING_BIAS (-0x0000000100000000L) |
56 | #endif /* __s390x__ */ | 54 | #endif /* CONFIG_64BIT */ |
57 | #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS | 55 | #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS |
58 | #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) | 56 | #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) |
59 | 57 | ||
@@ -65,19 +63,19 @@ static inline void __down_read(struct rw_semaphore *sem) | |||
65 | signed long old, new; | 63 | signed long old, new; |
66 | 64 | ||
67 | asm volatile( | 65 | asm volatile( |
68 | #ifndef __s390x__ | 66 | #ifndef CONFIG_64BIT |
69 | " l %0,%2\n" | 67 | " l %0,%2\n" |
70 | "0: lr %1,%0\n" | 68 | "0: lr %1,%0\n" |
71 | " ahi %1,%4\n" | 69 | " ahi %1,%4\n" |
72 | " cs %0,%1,%2\n" | 70 | " cs %0,%1,%2\n" |
73 | " jl 0b" | 71 | " jl 0b" |
74 | #else /* __s390x__ */ | 72 | #else /* CONFIG_64BIT */ |
75 | " lg %0,%2\n" | 73 | " lg %0,%2\n" |
76 | "0: lgr %1,%0\n" | 74 | "0: lgr %1,%0\n" |
77 | " aghi %1,%4\n" | 75 | " aghi %1,%4\n" |
78 | " csg %0,%1,%2\n" | 76 | " csg %0,%1,%2\n" |
79 | " jl 0b" | 77 | " jl 0b" |
80 | #endif /* __s390x__ */ | 78 | #endif /* CONFIG_64BIT */ |
81 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) | 79 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) |
82 | : "Q" (sem->count), "i" (RWSEM_ACTIVE_READ_BIAS) | 80 | : "Q" (sem->count), "i" (RWSEM_ACTIVE_READ_BIAS) |
83 | : "cc", "memory"); | 81 | : "cc", "memory"); |
@@ -93,7 +91,7 @@ static inline int __down_read_trylock(struct rw_semaphore *sem) | |||
93 | signed long old, new; | 91 | signed long old, new; |
94 | 92 | ||
95 | asm volatile( | 93 | asm volatile( |
96 | #ifndef __s390x__ | 94 | #ifndef CONFIG_64BIT |
97 | " l %0,%2\n" | 95 | " l %0,%2\n" |
98 | "0: ltr %1,%0\n" | 96 | "0: ltr %1,%0\n" |
99 | " jm 1f\n" | 97 | " jm 1f\n" |
@@ -101,7 +99,7 @@ static inline int __down_read_trylock(struct rw_semaphore *sem) | |||
101 | " cs %0,%1,%2\n" | 99 | " cs %0,%1,%2\n" |
102 | " jl 0b\n" | 100 | " jl 0b\n" |
103 | "1:" | 101 | "1:" |
104 | #else /* __s390x__ */ | 102 | #else /* CONFIG_64BIT */ |
105 | " lg %0,%2\n" | 103 | " lg %0,%2\n" |
106 | "0: ltgr %1,%0\n" | 104 | "0: ltgr %1,%0\n" |
107 | " jm 1f\n" | 105 | " jm 1f\n" |
@@ -109,7 +107,7 @@ static inline int __down_read_trylock(struct rw_semaphore *sem) | |||
109 | " csg %0,%1,%2\n" | 107 | " csg %0,%1,%2\n" |
110 | " jl 0b\n" | 108 | " jl 0b\n" |
111 | "1:" | 109 | "1:" |
112 | #endif /* __s390x__ */ | 110 | #endif /* CONFIG_64BIT */ |
113 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) | 111 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) |
114 | : "Q" (sem->count), "i" (RWSEM_ACTIVE_READ_BIAS) | 112 | : "Q" (sem->count), "i" (RWSEM_ACTIVE_READ_BIAS) |
115 | : "cc", "memory"); | 113 | : "cc", "memory"); |
@@ -125,19 +123,19 @@ static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) | |||
125 | 123 | ||
126 | tmp = RWSEM_ACTIVE_WRITE_BIAS; | 124 | tmp = RWSEM_ACTIVE_WRITE_BIAS; |
127 | asm volatile( | 125 | asm volatile( |
128 | #ifndef __s390x__ | 126 | #ifndef CONFIG_64BIT |
129 | " l %0,%2\n" | 127 | " l %0,%2\n" |
130 | "0: lr %1,%0\n" | 128 | "0: lr %1,%0\n" |
131 | " a %1,%4\n" | 129 | " a %1,%4\n" |
132 | " cs %0,%1,%2\n" | 130 | " cs %0,%1,%2\n" |
133 | " jl 0b" | 131 | " jl 0b" |
134 | #else /* __s390x__ */ | 132 | #else /* CONFIG_64BIT */ |
135 | " lg %0,%2\n" | 133 | " lg %0,%2\n" |
136 | "0: lgr %1,%0\n" | 134 | "0: lgr %1,%0\n" |
137 | " ag %1,%4\n" | 135 | " ag %1,%4\n" |
138 | " csg %0,%1,%2\n" | 136 | " csg %0,%1,%2\n" |
139 | " jl 0b" | 137 | " jl 0b" |
140 | #endif /* __s390x__ */ | 138 | #endif /* CONFIG_64BIT */ |
141 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) | 139 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) |
142 | : "Q" (sem->count), "m" (tmp) | 140 | : "Q" (sem->count), "m" (tmp) |
143 | : "cc", "memory"); | 141 | : "cc", "memory"); |
@@ -158,19 +156,19 @@ static inline int __down_write_trylock(struct rw_semaphore *sem) | |||
158 | signed long old; | 156 | signed long old; |
159 | 157 | ||
160 | asm volatile( | 158 | asm volatile( |
161 | #ifndef __s390x__ | 159 | #ifndef CONFIG_64BIT |
162 | " l %0,%1\n" | 160 | " l %0,%1\n" |
163 | "0: ltr %0,%0\n" | 161 | "0: ltr %0,%0\n" |
164 | " jnz 1f\n" | 162 | " jnz 1f\n" |
165 | " cs %0,%3,%1\n" | 163 | " cs %0,%3,%1\n" |
166 | " jl 0b\n" | 164 | " jl 0b\n" |
167 | #else /* __s390x__ */ | 165 | #else /* CONFIG_64BIT */ |
168 | " lg %0,%1\n" | 166 | " lg %0,%1\n" |
169 | "0: ltgr %0,%0\n" | 167 | "0: ltgr %0,%0\n" |
170 | " jnz 1f\n" | 168 | " jnz 1f\n" |
171 | " csg %0,%3,%1\n" | 169 | " csg %0,%3,%1\n" |
172 | " jl 0b\n" | 170 | " jl 0b\n" |
173 | #endif /* __s390x__ */ | 171 | #endif /* CONFIG_64BIT */ |
174 | "1:" | 172 | "1:" |
175 | : "=&d" (old), "=Q" (sem->count) | 173 | : "=&d" (old), "=Q" (sem->count) |
176 | : "Q" (sem->count), "d" (RWSEM_ACTIVE_WRITE_BIAS) | 174 | : "Q" (sem->count), "d" (RWSEM_ACTIVE_WRITE_BIAS) |
@@ -186,19 +184,19 @@ static inline void __up_read(struct rw_semaphore *sem) | |||
186 | signed long old, new; | 184 | signed long old, new; |
187 | 185 | ||
188 | asm volatile( | 186 | asm volatile( |
189 | #ifndef __s390x__ | 187 | #ifndef CONFIG_64BIT |
190 | " l %0,%2\n" | 188 | " l %0,%2\n" |
191 | "0: lr %1,%0\n" | 189 | "0: lr %1,%0\n" |
192 | " ahi %1,%4\n" | 190 | " ahi %1,%4\n" |
193 | " cs %0,%1,%2\n" | 191 | " cs %0,%1,%2\n" |
194 | " jl 0b" | 192 | " jl 0b" |
195 | #else /* __s390x__ */ | 193 | #else /* CONFIG_64BIT */ |
196 | " lg %0,%2\n" | 194 | " lg %0,%2\n" |
197 | "0: lgr %1,%0\n" | 195 | "0: lgr %1,%0\n" |
198 | " aghi %1,%4\n" | 196 | " aghi %1,%4\n" |
199 | " csg %0,%1,%2\n" | 197 | " csg %0,%1,%2\n" |
200 | " jl 0b" | 198 | " jl 0b" |
201 | #endif /* __s390x__ */ | 199 | #endif /* CONFIG_64BIT */ |
202 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) | 200 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) |
203 | : "Q" (sem->count), "i" (-RWSEM_ACTIVE_READ_BIAS) | 201 | : "Q" (sem->count), "i" (-RWSEM_ACTIVE_READ_BIAS) |
204 | : "cc", "memory"); | 202 | : "cc", "memory"); |
@@ -216,19 +214,19 @@ static inline void __up_write(struct rw_semaphore *sem) | |||
216 | 214 | ||
217 | tmp = -RWSEM_ACTIVE_WRITE_BIAS; | 215 | tmp = -RWSEM_ACTIVE_WRITE_BIAS; |
218 | asm volatile( | 216 | asm volatile( |
219 | #ifndef __s390x__ | 217 | #ifndef CONFIG_64BIT |
220 | " l %0,%2\n" | 218 | " l %0,%2\n" |
221 | "0: lr %1,%0\n" | 219 | "0: lr %1,%0\n" |
222 | " a %1,%4\n" | 220 | " a %1,%4\n" |
223 | " cs %0,%1,%2\n" | 221 | " cs %0,%1,%2\n" |
224 | " jl 0b" | 222 | " jl 0b" |
225 | #else /* __s390x__ */ | 223 | #else /* CONFIG_64BIT */ |
226 | " lg %0,%2\n" | 224 | " lg %0,%2\n" |
227 | "0: lgr %1,%0\n" | 225 | "0: lgr %1,%0\n" |
228 | " ag %1,%4\n" | 226 | " ag %1,%4\n" |
229 | " csg %0,%1,%2\n" | 227 | " csg %0,%1,%2\n" |
230 | " jl 0b" | 228 | " jl 0b" |
231 | #endif /* __s390x__ */ | 229 | #endif /* CONFIG_64BIT */ |
232 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) | 230 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) |
233 | : "Q" (sem->count), "m" (tmp) | 231 | : "Q" (sem->count), "m" (tmp) |
234 | : "cc", "memory"); | 232 | : "cc", "memory"); |
@@ -246,19 +244,19 @@ static inline void __downgrade_write(struct rw_semaphore *sem) | |||
246 | 244 | ||
247 | tmp = -RWSEM_WAITING_BIAS; | 245 | tmp = -RWSEM_WAITING_BIAS; |
248 | asm volatile( | 246 | asm volatile( |
249 | #ifndef __s390x__ | 247 | #ifndef CONFIG_64BIT |
250 | " l %0,%2\n" | 248 | " l %0,%2\n" |
251 | "0: lr %1,%0\n" | 249 | "0: lr %1,%0\n" |
252 | " a %1,%4\n" | 250 | " a %1,%4\n" |
253 | " cs %0,%1,%2\n" | 251 | " cs %0,%1,%2\n" |
254 | " jl 0b" | 252 | " jl 0b" |
255 | #else /* __s390x__ */ | 253 | #else /* CONFIG_64BIT */ |
256 | " lg %0,%2\n" | 254 | " lg %0,%2\n" |
257 | "0: lgr %1,%0\n" | 255 | "0: lgr %1,%0\n" |
258 | " ag %1,%4\n" | 256 | " ag %1,%4\n" |
259 | " csg %0,%1,%2\n" | 257 | " csg %0,%1,%2\n" |
260 | " jl 0b" | 258 | " jl 0b" |
261 | #endif /* __s390x__ */ | 259 | #endif /* CONFIG_64BIT */ |
262 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) | 260 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) |
263 | : "Q" (sem->count), "m" (tmp) | 261 | : "Q" (sem->count), "m" (tmp) |
264 | : "cc", "memory"); | 262 | : "cc", "memory"); |
@@ -274,19 +272,19 @@ static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem) | |||
274 | signed long old, new; | 272 | signed long old, new; |
275 | 273 | ||
276 | asm volatile( | 274 | asm volatile( |
277 | #ifndef __s390x__ | 275 | #ifndef CONFIG_64BIT |
278 | " l %0,%2\n" | 276 | " l %0,%2\n" |
279 | "0: lr %1,%0\n" | 277 | "0: lr %1,%0\n" |
280 | " ar %1,%4\n" | 278 | " ar %1,%4\n" |
281 | " cs %0,%1,%2\n" | 279 | " cs %0,%1,%2\n" |
282 | " jl 0b" | 280 | " jl 0b" |
283 | #else /* __s390x__ */ | 281 | #else /* CONFIG_64BIT */ |
284 | " lg %0,%2\n" | 282 | " lg %0,%2\n" |
285 | "0: lgr %1,%0\n" | 283 | "0: lgr %1,%0\n" |
286 | " agr %1,%4\n" | 284 | " agr %1,%4\n" |
287 | " csg %0,%1,%2\n" | 285 | " csg %0,%1,%2\n" |
288 | " jl 0b" | 286 | " jl 0b" |
289 | #endif /* __s390x__ */ | 287 | #endif /* CONFIG_64BIT */ |
290 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) | 288 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) |
291 | : "Q" (sem->count), "d" (delta) | 289 | : "Q" (sem->count), "d" (delta) |
292 | : "cc", "memory"); | 290 | : "cc", "memory"); |
@@ -300,24 +298,23 @@ static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem) | |||
300 | signed long old, new; | 298 | signed long old, new; |
301 | 299 | ||
302 | asm volatile( | 300 | asm volatile( |
303 | #ifndef __s390x__ | 301 | #ifndef CONFIG_64BIT |
304 | " l %0,%2\n" | 302 | " l %0,%2\n" |
305 | "0: lr %1,%0\n" | 303 | "0: lr %1,%0\n" |
306 | " ar %1,%4\n" | 304 | " ar %1,%4\n" |
307 | " cs %0,%1,%2\n" | 305 | " cs %0,%1,%2\n" |
308 | " jl 0b" | 306 | " jl 0b" |
309 | #else /* __s390x__ */ | 307 | #else /* CONFIG_64BIT */ |
310 | " lg %0,%2\n" | 308 | " lg %0,%2\n" |
311 | "0: lgr %1,%0\n" | 309 | "0: lgr %1,%0\n" |
312 | " agr %1,%4\n" | 310 | " agr %1,%4\n" |
313 | " csg %0,%1,%2\n" | 311 | " csg %0,%1,%2\n" |
314 | " jl 0b" | 312 | " jl 0b" |
315 | #endif /* __s390x__ */ | 313 | #endif /* CONFIG_64BIT */ |
316 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) | 314 | : "=&d" (old), "=&d" (new), "=Q" (sem->count) |
317 | : "Q" (sem->count), "d" (delta) | 315 | : "Q" (sem->count), "d" (delta) |
318 | : "cc", "memory"); | 316 | : "cc", "memory"); |
319 | return new; | 317 | return new; |
320 | } | 318 | } |
321 | 319 | ||
322 | #endif /* __KERNEL__ */ | ||
323 | #endif /* _S390_RWSEM_H */ | 320 | #endif /* _S390_RWSEM_H */ |