diff options
Diffstat (limited to 'arch/s390/include/asm/lowcore.h')
-rw-r--r-- | arch/s390/include/asm/lowcore.h | 241 |
1 files changed, 55 insertions, 186 deletions
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h index a9eb6834d921..05527c040b7a 100644 --- a/arch/s390/include/asm/lowcore.h +++ b/arch/s390/include/asm/lowcore.h | |||
@@ -1,144 +1,16 @@ | |||
1 | /* | 1 | /* |
2 | * include/asm-s390/lowcore.h | 2 | * Copyright IBM Corp. 1999,2010 |
3 | * | 3 | * Author(s): Hartmut Penner <hp@de.ibm.com>, |
4 | * S390 version | 4 | * Martin Schwidefsky <schwidefsky@de.ibm.com>, |
5 | * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation | 5 | * Denis Joseph Barrow, |
6 | * Author(s): Hartmut Penner (hp@de.ibm.com), | ||
7 | * Martin Schwidefsky (schwidefsky@de.ibm.com), | ||
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) | ||
9 | */ | 6 | */ |
10 | 7 | ||
11 | #ifndef _ASM_S390_LOWCORE_H | 8 | #ifndef _ASM_S390_LOWCORE_H |
12 | #define _ASM_S390_LOWCORE_H | 9 | #define _ASM_S390_LOWCORE_H |
13 | 10 | ||
14 | #define __LC_IPL_PARMBLOCK_PTR 0x0014 | ||
15 | #define __LC_EXT_PARAMS 0x0080 | ||
16 | #define __LC_CPU_ADDRESS 0x0084 | ||
17 | #define __LC_EXT_INT_CODE 0x0086 | ||
18 | |||
19 | #define __LC_SVC_ILC 0x0088 | ||
20 | #define __LC_SVC_INT_CODE 0x008a | ||
21 | #define __LC_PGM_ILC 0x008c | ||
22 | #define __LC_PGM_INT_CODE 0x008e | ||
23 | |||
24 | #define __LC_PER_ATMID 0x0096 | ||
25 | #define __LC_PER_ADDRESS 0x0098 | ||
26 | #define __LC_PER_ACCESS_ID 0x00a1 | ||
27 | #define __LC_AR_MODE_ID 0x00a3 | ||
28 | |||
29 | #define __LC_SUBCHANNEL_ID 0x00b8 | ||
30 | #define __LC_SUBCHANNEL_NR 0x00ba | ||
31 | #define __LC_IO_INT_PARM 0x00bc | ||
32 | #define __LC_IO_INT_WORD 0x00c0 | ||
33 | #define __LC_STFL_FAC_LIST 0x00c8 | ||
34 | #define __LC_MCCK_CODE 0x00e8 | ||
35 | |||
36 | #define __LC_DUMP_REIPL 0x0e00 | ||
37 | |||
38 | #ifndef __s390x__ | ||
39 | #define __LC_RST_NEW_PSW 0x0000 | ||
40 | #define __LC_RST_OLD_PSW 0x0008 | ||
41 | #define __LC_EXT_OLD_PSW 0x0018 | ||
42 | #define __LC_SVC_OLD_PSW 0x0020 | ||
43 | #define __LC_PGM_OLD_PSW 0x0028 | ||
44 | #define __LC_MCK_OLD_PSW 0x0030 | ||
45 | #define __LC_IO_OLD_PSW 0x0038 | ||
46 | #define __LC_EXT_NEW_PSW 0x0058 | ||
47 | #define __LC_SVC_NEW_PSW 0x0060 | ||
48 | #define __LC_PGM_NEW_PSW 0x0068 | ||
49 | #define __LC_MCK_NEW_PSW 0x0070 | ||
50 | #define __LC_IO_NEW_PSW 0x0078 | ||
51 | #define __LC_SAVE_AREA 0x0200 | ||
52 | #define __LC_RETURN_PSW 0x0240 | ||
53 | #define __LC_RETURN_MCCK_PSW 0x0248 | ||
54 | #define __LC_SYNC_ENTER_TIMER 0x0250 | ||
55 | #define __LC_ASYNC_ENTER_TIMER 0x0258 | ||
56 | #define __LC_EXIT_TIMER 0x0260 | ||
57 | #define __LC_USER_TIMER 0x0268 | ||
58 | #define __LC_SYSTEM_TIMER 0x0270 | ||
59 | #define __LC_STEAL_TIMER 0x0278 | ||
60 | #define __LC_LAST_UPDATE_TIMER 0x0280 | ||
61 | #define __LC_LAST_UPDATE_CLOCK 0x0288 | ||
62 | #define __LC_CURRENT 0x0290 | ||
63 | #define __LC_THREAD_INFO 0x0294 | ||
64 | #define __LC_KERNEL_STACK 0x0298 | ||
65 | #define __LC_ASYNC_STACK 0x029c | ||
66 | #define __LC_PANIC_STACK 0x02a0 | ||
67 | #define __LC_KERNEL_ASCE 0x02a4 | ||
68 | #define __LC_USER_ASCE 0x02a8 | ||
69 | #define __LC_USER_EXEC_ASCE 0x02ac | ||
70 | #define __LC_CPUID 0x02b0 | ||
71 | #define __LC_INT_CLOCK 0x02c8 | ||
72 | #define __LC_MACHINE_FLAGS 0x02d8 | ||
73 | #define __LC_FTRACE_FUNC 0x02dc | ||
74 | #define __LC_IRB 0x0300 | ||
75 | #define __LC_PFAULT_INTPARM 0x0080 | ||
76 | #define __LC_CPU_TIMER_SAVE_AREA 0x00d8 | ||
77 | #define __LC_CLOCK_COMP_SAVE_AREA 0x00e0 | ||
78 | #define __LC_PSW_SAVE_AREA 0x0100 | ||
79 | #define __LC_PREFIX_SAVE_AREA 0x0108 | ||
80 | #define __LC_AREGS_SAVE_AREA 0x0120 | ||
81 | #define __LC_FPREGS_SAVE_AREA 0x0160 | ||
82 | #define __LC_GPREGS_SAVE_AREA 0x0180 | ||
83 | #define __LC_CREGS_SAVE_AREA 0x01c0 | ||
84 | #else /* __s390x__ */ | ||
85 | #define __LC_LAST_BREAK 0x0110 | ||
86 | #define __LC_RST_OLD_PSW 0x0120 | ||
87 | #define __LC_EXT_OLD_PSW 0x0130 | ||
88 | #define __LC_SVC_OLD_PSW 0x0140 | ||
89 | #define __LC_PGM_OLD_PSW 0x0150 | ||
90 | #define __LC_MCK_OLD_PSW 0x0160 | ||
91 | #define __LC_IO_OLD_PSW 0x0170 | ||
92 | #define __LC_RST_NEW_PSW 0x01a0 | ||
93 | #define __LC_EXT_NEW_PSW 0x01b0 | ||
94 | #define __LC_SVC_NEW_PSW 0x01c0 | ||
95 | #define __LC_PGM_NEW_PSW 0x01d0 | ||
96 | #define __LC_MCK_NEW_PSW 0x01e0 | ||
97 | #define __LC_IO_NEW_PSW 0x01f0 | ||
98 | #define __LC_SAVE_AREA 0x0200 | ||
99 | #define __LC_RETURN_PSW 0x0280 | ||
100 | #define __LC_RETURN_MCCK_PSW 0x0290 | ||
101 | #define __LC_SYNC_ENTER_TIMER 0x02a0 | ||
102 | #define __LC_ASYNC_ENTER_TIMER 0x02a8 | ||
103 | #define __LC_EXIT_TIMER 0x02b0 | ||
104 | #define __LC_USER_TIMER 0x02b8 | ||
105 | #define __LC_SYSTEM_TIMER 0x02c0 | ||
106 | #define __LC_STEAL_TIMER 0x02c8 | ||
107 | #define __LC_LAST_UPDATE_TIMER 0x02d0 | ||
108 | #define __LC_LAST_UPDATE_CLOCK 0x02d8 | ||
109 | #define __LC_CURRENT 0x02e0 | ||
110 | #define __LC_THREAD_INFO 0x02e8 | ||
111 | #define __LC_KERNEL_STACK 0x02f0 | ||
112 | #define __LC_ASYNC_STACK 0x02f8 | ||
113 | #define __LC_PANIC_STACK 0x0300 | ||
114 | #define __LC_KERNEL_ASCE 0x0308 | ||
115 | #define __LC_USER_ASCE 0x0310 | ||
116 | #define __LC_USER_EXEC_ASCE 0x0318 | ||
117 | #define __LC_CPUID 0x0320 | ||
118 | #define __LC_INT_CLOCK 0x0340 | ||
119 | #define __LC_VDSO_PER_CPU 0x0350 | ||
120 | #define __LC_MACHINE_FLAGS 0x0358 | ||
121 | #define __LC_FTRACE_FUNC 0x0360 | ||
122 | #define __LC_IRB 0x0380 | ||
123 | #define __LC_PASTE 0x03c0 | ||
124 | #define __LC_PFAULT_INTPARM 0x11b8 | ||
125 | #define __LC_FPREGS_SAVE_AREA 0x1200 | ||
126 | #define __LC_GPREGS_SAVE_AREA 0x1280 | ||
127 | #define __LC_PSW_SAVE_AREA 0x1300 | ||
128 | #define __LC_PREFIX_SAVE_AREA 0x1318 | ||
129 | #define __LC_FP_CREG_SAVE_AREA 0x131c | ||
130 | #define __LC_TODREG_SAVE_AREA 0x1324 | ||
131 | #define __LC_CPU_TIMER_SAVE_AREA 0x1328 | ||
132 | #define __LC_CLOCK_COMP_SAVE_AREA 0x1331 | ||
133 | #define __LC_AREGS_SAVE_AREA 0x1340 | ||
134 | #define __LC_CREGS_SAVE_AREA 0x1380 | ||
135 | #endif /* __s390x__ */ | ||
136 | |||
137 | #ifndef __ASSEMBLY__ | ||
138 | |||
139 | #include <asm/cpu.h> | ||
140 | #include <asm/ptrace.h> | ||
141 | #include <linux/types.h> | 11 | #include <linux/types.h> |
12 | #include <asm/ptrace.h> | ||
13 | #include <asm/cpu.h> | ||
142 | 14 | ||
143 | void restart_int_handler(void); | 15 | void restart_int_handler(void); |
144 | void ext_int_handler(void); | 16 | void ext_int_handler(void); |
@@ -149,6 +21,9 @@ void io_int_handler(void); | |||
149 | 21 | ||
150 | #ifdef CONFIG_32BIT | 22 | #ifdef CONFIG_32BIT |
151 | 23 | ||
24 | #define LC_ORDER 0 | ||
25 | #define LC_PAGES 1 | ||
26 | |||
152 | struct save_area { | 27 | struct save_area { |
153 | u32 ext_save; | 28 | u32 ext_save; |
154 | u64 timer; | 29 | u64 timer; |
@@ -161,46 +36,13 @@ struct save_area { | |||
161 | u64 fp_regs[4]; | 36 | u64 fp_regs[4]; |
162 | u32 gp_regs[16]; | 37 | u32 gp_regs[16]; |
163 | u32 ctrl_regs[16]; | 38 | u32 ctrl_regs[16]; |
164 | } __attribute__((packed)); | 39 | } __packed; |
165 | |||
166 | #define SAVE_AREA_BASE offsetof(struct _lowcore, extended_save_area_addr) | ||
167 | |||
168 | #else /* CONFIG_32BIT */ | ||
169 | |||
170 | struct save_area { | ||
171 | u64 fp_regs[16]; | ||
172 | u64 gp_regs[16]; | ||
173 | u8 psw[16]; | ||
174 | u8 pad1[8]; | ||
175 | u32 pref_reg; | ||
176 | u32 fp_ctrl_reg; | ||
177 | u8 pad2[4]; | ||
178 | u32 tod_reg; | ||
179 | u64 timer; | ||
180 | u64 clk_cmp; | ||
181 | u8 pad3[8]; | ||
182 | u32 acc_regs[16]; | ||
183 | u64 ctrl_regs[16]; | ||
184 | } __attribute__((packed)); | ||
185 | 40 | ||
186 | #define SAVE_AREA_BASE offsetof(struct _lowcore, floating_pt_save_area) | 41 | struct _lowcore { |
187 | |||
188 | #endif /* CONFIG_32BIT */ | ||
189 | |||
190 | #ifndef __s390x__ | ||
191 | #define LC_ORDER 0 | ||
192 | #else | ||
193 | #define LC_ORDER 1 | ||
194 | #endif | ||
195 | |||
196 | #define LC_PAGES (1UL << LC_ORDER) | ||
197 | |||
198 | struct _lowcore | ||
199 | { | ||
200 | #ifndef __s390x__ | ||
201 | /* 0x0000 - 0x01ff: defined by architecture */ | ||
202 | psw_t restart_psw; /* 0x0000 */ | 42 | psw_t restart_psw; /* 0x0000 */ |
203 | __u32 ccw2[4]; /* 0x0008 */ | 43 | psw_t restart_old_psw; /* 0x0008 */ |
44 | __u8 pad_0x0010[0x0014-0x0010]; /* 0x0010 */ | ||
45 | __u32 ipl_parmblock_ptr; /* 0x0014 */ | ||
204 | psw_t external_old_psw; /* 0x0018 */ | 46 | psw_t external_old_psw; /* 0x0018 */ |
205 | psw_t svc_old_psw; /* 0x0020 */ | 47 | psw_t svc_old_psw; /* 0x0020 */ |
206 | psw_t program_old_psw; /* 0x0028 */ | 48 | psw_t program_old_psw; /* 0x0028 */ |
@@ -226,7 +68,9 @@ struct _lowcore | |||
226 | __u32 monitor_code; /* 0x009c */ | 68 | __u32 monitor_code; /* 0x009c */ |
227 | __u8 exc_access_id; /* 0x00a0 */ | 69 | __u8 exc_access_id; /* 0x00a0 */ |
228 | __u8 per_access_id; /* 0x00a1 */ | 70 | __u8 per_access_id; /* 0x00a1 */ |
229 | __u8 pad_0x00a2[0x00b8-0x00a2]; /* 0x00a2 */ | 71 | __u8 op_access_id; /* 0x00a2 */ |
72 | __u8 ar_access_id; /* 0x00a3 */ | ||
73 | __u8 pad_0x00a4[0x00b8-0x00a4]; /* 0x00a4 */ | ||
230 | __u16 subchannel_id; /* 0x00b8 */ | 74 | __u16 subchannel_id; /* 0x00b8 */ |
231 | __u16 subchannel_nr; /* 0x00ba */ | 75 | __u16 subchannel_nr; /* 0x00ba */ |
232 | __u32 io_int_parm; /* 0x00bc */ | 76 | __u32 io_int_parm; /* 0x00bc */ |
@@ -242,8 +86,9 @@ struct _lowcore | |||
242 | __u32 external_damage_code; /* 0x00f4 */ | 86 | __u32 external_damage_code; /* 0x00f4 */ |
243 | __u32 failing_storage_address; /* 0x00f8 */ | 87 | __u32 failing_storage_address; /* 0x00f8 */ |
244 | __u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */ | 88 | __u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */ |
245 | __u32 st_status_fixed_logout[4]; /* 0x0100 */ | 89 | psw_t psw_save_area; /* 0x0100 */ |
246 | __u8 pad_0x0110[0x0120-0x0110]; /* 0x0110 */ | 90 | __u32 prefixreg_save_area; /* 0x0108 */ |
91 | __u8 pad_0x010c[0x0120-0x010c]; /* 0x010c */ | ||
247 | 92 | ||
248 | /* CPU register save area: defined by architecture */ | 93 | /* CPU register save area: defined by architecture */ |
249 | __u32 access_regs_save_area[16]; /* 0x0120 */ | 94 | __u32 access_regs_save_area[16]; /* 0x0120 */ |
@@ -307,10 +152,32 @@ struct _lowcore | |||
307 | 152 | ||
308 | /* Align to the top 1k of prefix area */ | 153 | /* Align to the top 1k of prefix area */ |
309 | __u8 pad_0x0e08[0x1000-0x0e08]; /* 0x0e08 */ | 154 | __u8 pad_0x0e08[0x1000-0x0e08]; /* 0x0e08 */ |
310 | #else /* !__s390x__ */ | 155 | } __packed; |
311 | /* 0x0000 - 0x01ff: defined by architecture */ | 156 | |
312 | __u32 ccw1[2]; /* 0x0000 */ | 157 | #else /* CONFIG_32BIT */ |
313 | __u32 ccw2[4]; /* 0x0008 */ | 158 | |
159 | #define LC_ORDER 1 | ||
160 | #define LC_PAGES 2 | ||
161 | |||
162 | struct save_area { | ||
163 | u64 fp_regs[16]; | ||
164 | u64 gp_regs[16]; | ||
165 | u8 psw[16]; | ||
166 | u8 pad1[8]; | ||
167 | u32 pref_reg; | ||
168 | u32 fp_ctrl_reg; | ||
169 | u8 pad2[4]; | ||
170 | u32 tod_reg; | ||
171 | u64 timer; | ||
172 | u64 clk_cmp; | ||
173 | u8 pad3[8]; | ||
174 | u32 acc_regs[16]; | ||
175 | u64 ctrl_regs[16]; | ||
176 | } __packed; | ||
177 | |||
178 | struct _lowcore { | ||
179 | __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */ | ||
180 | __u32 ipl_parmblock_ptr; /* 0x0014 */ | ||
314 | __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */ | 181 | __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */ |
315 | __u32 ext_params; /* 0x0080 */ | 182 | __u32 ext_params; /* 0x0080 */ |
316 | __u16 cpu_addr; /* 0x0084 */ | 183 | __u16 cpu_addr; /* 0x0084 */ |
@@ -341,7 +208,9 @@ struct _lowcore | |||
341 | __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ | 208 | __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ |
342 | __u32 external_damage_code; /* 0x00f4 */ | 209 | __u32 external_damage_code; /* 0x00f4 */ |
343 | addr_t failing_storage_address; /* 0x00f8 */ | 210 | addr_t failing_storage_address; /* 0x00f8 */ |
344 | __u8 pad_0x0100[0x0120-0x0100]; /* 0x0100 */ | 211 | __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */ |
212 | __u64 breaking_event_addr; /* 0x0110 */ | ||
213 | __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */ | ||
345 | psw_t restart_old_psw; /* 0x0120 */ | 214 | psw_t restart_old_psw; /* 0x0120 */ |
346 | psw_t external_old_psw; /* 0x0130 */ | 215 | psw_t external_old_psw; /* 0x0130 */ |
347 | psw_t svc_old_psw; /* 0x0140 */ | 216 | psw_t svc_old_psw; /* 0x0140 */ |
@@ -422,7 +291,7 @@ struct _lowcore | |||
422 | /* CPU register save area: defined by architecture */ | 291 | /* CPU register save area: defined by architecture */ |
423 | __u64 floating_pt_save_area[16]; /* 0x1200 */ | 292 | __u64 floating_pt_save_area[16]; /* 0x1200 */ |
424 | __u64 gpregs_save_area[16]; /* 0x1280 */ | 293 | __u64 gpregs_save_area[16]; /* 0x1280 */ |
425 | __u32 st_status_fixed_logout[4]; /* 0x1300 */ | 294 | psw_t psw_save_area; /* 0x1300 */ |
426 | __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */ | 295 | __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */ |
427 | __u32 prefixreg_save_area; /* 0x1318 */ | 296 | __u32 prefixreg_save_area; /* 0x1318 */ |
428 | __u32 fpt_creg_save_area; /* 0x131c */ | 297 | __u32 fpt_creg_save_area; /* 0x131c */ |
@@ -436,10 +305,12 @@ struct _lowcore | |||
436 | 305 | ||
437 | /* align to the top of the prefix area */ | 306 | /* align to the top of the prefix area */ |
438 | __u8 pad_0x1400[0x2000-0x1400]; /* 0x1400 */ | 307 | __u8 pad_0x1400[0x2000-0x1400]; /* 0x1400 */ |
439 | #endif /* !__s390x__ */ | 308 | } __packed; |
440 | } __attribute__((packed)); /* End structure*/ | 309 | |
310 | #endif /* CONFIG_32BIT */ | ||
441 | 311 | ||
442 | #define S390_lowcore (*((struct _lowcore *) 0)) | 312 | #define S390_lowcore (*((struct _lowcore *) 0)) |
313 | |||
443 | extern struct _lowcore *lowcore_ptr[]; | 314 | extern struct _lowcore *lowcore_ptr[]; |
444 | 315 | ||
445 | static inline void set_prefix(__u32 address) | 316 | static inline void set_prefix(__u32 address) |
@@ -455,6 +326,4 @@ static inline __u32 store_prefix(void) | |||
455 | return address; | 326 | return address; |
456 | } | 327 | } |
457 | 328 | ||
458 | #endif | 329 | #endif /* _ASM_S390_LOWCORE_H */ |
459 | |||
460 | #endif | ||