11 files changed, 458 insertions, 18 deletions

diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index ec53c7d65f2b..7a2f20583be4 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -355,9 +355,7 @@ InstructionTLBMiss:
 
         . = 0x1200
 DataStoreTLBMiss:
-#ifdef CONFIG_8xx_CPU6
         stw     r3, 8(r0)
-#endif
         DO_8xx_CPU6(0x3f80, r3)
         mtspr   SPRN_M_TW, r10  /* Save a couple of working registers */
         mfcr    r10
@@ -417,9 +415,7 @@ DataStoreTLBMiss:
         lwz     r11, 0(r0)
         mtcr    r11
         lwz     r11, 4(r0)
-#ifdef CONFIG_8xx_CPU6
         lwz     r3, 8(r0)
-#endif
         rfi
 
 /* This is an instruction TLB error on the MPC8xx.  This could be due
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c
index f841972f1fa9..554776d4b8ac 100644
--- a/arch/ppc/platforms/4xx/ocotea.c
+++ b/arch/ppc/platforms/4xx/ocotea.c
@@ -331,7 +331,7 @@ static void __init ocotea_init(void)
 void __init platform_init(unsigned long r3, unsigned long r4,
                 unsigned long r5, unsigned long r6, unsigned long r7)
 {
-        ibm44x_platform_init(r3, r4, r5, r6, r7);
+        ibm440gx_platform_init(r3, r4, r5, r6, r7);
 
         ppc_md.setup_arch = ocotea_setup_arch;
         ppc_md.show_cpuinfo = ocotea_show_cpuinfo;
diff --git a/arch/ppc/platforms/mpc8272ads_setup.c b/arch/ppc/platforms/mpc8272ads_setup.c
index bc9b94f77e39..e62b75707f7a 100644
--- a/arch/ppc/platforms/mpc8272ads_setup.c
+++ b/arch/ppc/platforms/mpc8272ads_setup.c
@@ -26,11 +26,35 @@
 #include <asm/irq.h>
 #include <asm/ppc_sys.h>
 #include <asm/ppcboot.h>
+#include <linux/fs_uart_pd.h>
 
 #include "pq2ads_pd.h"
 
 static void init_fcc1_ioports(void);
 static void init_fcc2_ioports(void);
+static void init_scc1_uart_ioports(void);
+static void init_scc4_uart_ioports(void);
+
+static struct fs_uart_platform_info mpc8272_uart_pdata[] = {
+        [fsid_scc1_uart] = {
+                .init_ioports   = init_scc1_uart_ioports,
+                .fs_no          = fsid_scc1_uart,
+                .brg            = 1,
+                .tx_num_fifo    = 4,
+                .tx_buf_size    = 32,
+                .rx_num_fifo    = 4,
+                .rx_buf_size    = 32,
+        },
+        [fsid_scc4_uart] = {
+                .init_ioports   = init_scc4_uart_ioports,
+                .fs_no          = fsid_scc4_uart,
+                .brg            = 4,
+                .tx_num_fifo    = 4,
+                .tx_buf_size    = 32,
+                .rx_num_fifo    = 4,
+                .rx_buf_size    = 32,
+        },
+};
 
 static struct fs_mii_bus_info mii_bus_info = {
         .method                 = fsmii_bitbang,
@@ -201,6 +225,55 @@ static void __init mpc8272ads_fixup_enet_pdata(struct platform_device *pdev,
         }
 }
 
+static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev,
+                                              int idx)
+{
+        bd_t *bd = (bd_t *) __res;
+        struct fs_uart_platform_info *pinfo;
+        int num = ARRAY_SIZE(mpc8272_uart_pdata);
+        int id = fs_uart_id_scc2fsid(idx);
+
+        /* no need to alter anything if console */
+        if ((id <= num) && (!pdev->dev.platform_data)) {
+                pinfo = &mpc8272_uart_pdata[id];
+                pinfo->uart_clk = bd->bi_intfreq;
+                pdev->dev.platform_data = pinfo;
+        }
+}
+
+static void init_scc1_uart_ioports(void)
+{
+        cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
+
+        /* SCC1 is only on port D */
+        setbits32(&immap->im_ioport.iop_ppard,0x00000003);
+        clrbits32(&immap->im_ioport.iop_psord,0x00000001);
+        setbits32(&immap->im_ioport.iop_psord,0x00000002);
+        clrbits32(&immap->im_ioport.iop_pdird,0x00000001);
+        setbits32(&immap->im_ioport.iop_pdird,0x00000002);
+
+        /* Wire BRG1 to SCC1 */
+        clrbits32(&immap->im_cpmux.cmx_scr,0x00ffffff);
+
+        iounmap(immap);
+}
+
+static void init_scc4_uart_ioports(void)
+{
+        cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
+
+        setbits32(&immap->im_ioport.iop_ppard,0x00000600);
+        clrbits32(&immap->im_ioport.iop_psord,0x00000600);
+        clrbits32(&immap->im_ioport.iop_pdird,0x00000200);
+        setbits32(&immap->im_ioport.iop_pdird,0x00000400);
+
+        /* Wire BRG4 to SCC4 */
+        clrbits32(&immap->im_cpmux.cmx_scr,0x000000ff);
+        setbits32(&immap->im_cpmux.cmx_scr,0x0000001b);
+
+        iounmap(immap);
+}
+
 static int mpc8272ads_platform_notify(struct device *dev)
 {
         static const struct platform_notify_dev_map dev_map[] = {
@@ -209,6 +282,10 @@ static int mpc8272ads_platform_notify(struct device *dev)
                         .rtn = mpc8272ads_fixup_enet_pdata
                 },
                 {
+                        .bus_id = "fsl-cpm-scc:uart",
+                        .rtn = mpc
+                },
+                {
                         .bus_id = NULL
                 }
         };
@@ -230,7 +307,44 @@ int __init mpc8272ads_init(void)
         ppc_sys_device_enable(MPC82xx_CPM_FCC1);
         ppc_sys_device_enable(MPC82xx_CPM_FCC2);
 
+        /* to be ready for console, let's attach pdata here */
+#ifdef CONFIG_SERIAL_CPM_SCC1
+        ppc_sys_device_setfunc(MPC82xx_CPM_SCC1, PPC_SYS_FUNC_UART);
+        ppc_sys_device_enable(MPC82xx_CPM_SCC1);
+
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC4
+        ppc_sys_device_setfunc(MPC82xx_CPM_SCC4, PPC_SYS_FUNC_UART);
+        ppc_sys_device_enable(MPC82xx_CPM_SCC4);
+#endif
+
+
         return 0;
 }
 
+/*
+   To prevent confusion, console selection is gross:
+   by 0 assumed SCC1 and by 1 assumed SCC4
+ */
+struct platform_device* early_uart_get_pdev(int index)
+{
+        bd_t *bd = (bd_t *) __res;
+        struct fs_uart_platform_info *pinfo;
+
+        struct platform_device* pdev = NULL;
+        if(index) { /*assume SCC4 here*/
+                pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
+                pinfo = &mpc8272<F12>_uart_pdata[1];
+        } else { /*over SCC1*/
+                pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
+                pinfo = &mpc8272_uart_pdata[0];
+        }
+
+        pinfo->uart_clk = bd->bi_intfreq;
+        pdev->dev.platform_data = pinfo;
+        ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
+        return NULL;
+}
+
 arch_initcall(mpc8272ads_init);
diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c
index ac8fcc68afeb..d919dab61347 100644
--- a/arch/ppc/platforms/mpc866ads_setup.c
+++ b/arch/ppc/platforms/mpc866ads_setup.c
@@ -20,6 +20,7 @@
 #include <linux/device.h>
 
 #include <linux/fs_enet_pd.h>
+#include <linux/fs_uart_pd.h>
 #include <linux/mii.h>
 
 #include <asm/delay.h>
@@ -37,6 +38,11 @@
 
 extern unsigned char __res[];
 
+static void setup_fec1_ioports(void);
+static void setup_scc1_ioports(void);
+static void setup_smc1_ioports(void);
+static void setup_smc2_ioports(void);
+
 static struct fs_mii_bus_info fec_mii_bus_info = {
         .method = fsmii_fec,
         .id = 0,
@@ -79,6 +85,28 @@ static struct fs_platform_info mpc8xx_scc_pdata = {
         .phy_irq = -1,
 
         .bus_info = &scc_mii_bus_info,
+
+};
+
+static struct fs_uart_platform_info mpc866_uart_pdata[] = {
+        [fsid_smc1_uart] = {
+                .brg            = 1,
+                .fs_no          = fsid_smc1_uart,
+                .init_ioports   = setup_smc1_ioports,
+                .tx_num_fifo    = 4,
+                .tx_buf_size    = 32,
+                .rx_num_fifo    = 4,
+                .rx_buf_size    = 32,
+        },
+        [fsid_smc2_uart] = {
+                .brg            = 2,
+                .fs_no          = fsid_smc2_uart,
+                .init_ioports   = setup_smc2_ioports,
+                .tx_num_fifo    = 4,
+                .tx_buf_size    = 32,
+                .rx_num_fifo    = 4,
+                .rx_buf_size    = 32,
+        },
 };
 
 void __init board_init(void)
@@ -92,9 +120,12 @@ void __init board_init(void)
                 printk(KERN_CRIT "Could not remap BCSR1\n");
                 return;
         }
+
 #ifdef CONFIG_SERIAL_CPM_SMC1
         cp->cp_simode &= ~(0xe0000000 >> 17);   /* brg1 */
         clrbits32(bcsr_io,(0x80000000 >> 7));
+        cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
+        cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
 #else
         setbits32(bcsr_io,(0x80000000 >> 7));
 
@@ -108,6 +139,8 @@ void __init board_init(void)
         cp->cp_simode &= ~(0xe0000000 >> 1);
         cp->cp_simode |= (0x20000000 >> 1);     /* brg2 */
         clrbits32(bcsr_io,(0x80000000 >> 13));
+        cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
+        cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
 #else
         clrbits32(bcsr_io,(0x80000000 >> 13));
         cp->cp_pbpar &= ~(0x00000c00);
@@ -232,6 +265,74 @@ static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev,
         mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
 }
 
+static void setup_smc1_ioports(void)
+{
+        immap_t *immap = (immap_t *) IMAP_ADDR;
+        unsigned *bcsr_io;
+        unsigned int iobits = 0x000000c0;
+
+        bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
+
+        if (bcsr_io == NULL) {
+                printk(KERN_CRIT "Could not remap BCSR1\n");
+                return;
+        }
+
+        clrbits32(bcsr_io,BCSR1_RS232EN_1);
+        iounmap(bcsr_io);
+
+        setbits32(&immap->im_cpm.cp_pbpar, iobits);
+        clrbits32(&immap->im_cpm.cp_pbdir, iobits);
+        clrbits16(&immap->im_cpm.cp_pbodr, iobits);
+
+}
+
+static void setup_smc2_ioports(void)
+{
+        immap_t *immap = (immap_t *) IMAP_ADDR;
+        unsigned *bcsr_io;
+        unsigned int iobits = 0x00000c00;
+
+        bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
+
+        if (bcsr_io == NULL) {
+                printk(KERN_CRIT "Could not remap BCSR1\n");
+                return;
+        }
+
+        clrbits32(bcsr_io,BCSR1_RS232EN_2);
+
+        iounmap(bcsr_io);
+
+#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
+        setbits32(&immap->im_cpm.cp_pbpar, iobits);
+        clrbits32(&immap->im_cpm.cp_pbdir, iobits);
+        clrbits16(&immap->im_cpm.cp_pbodr, iobits);
+#else
+        setbits16(&immap->im_ioport.iop_papar, iobits);
+        clrbits16(&immap->im_ioport.iop_padir, iobits);
+        clrbits16(&immap->im_ioport.iop_paodr, iobits);
+#endif
+
+}
+
+static void __init mpc866ads_fixup_uart_pdata(struct platform_device *pdev,
+                                              int idx)
+{
+        bd_t *bd = (bd_t *) __res;
+        struct fs_uart_platform_info *pinfo;
+        int num = ARRAY_SIZE(mpc866_uart_pdata);
+
+        int id = fs_uart_id_smc2fsid(idx);
+
+        /* no need to alter anything if console */
+        if ((id <= num) && (!pdev->dev.platform_data)) {
+                pinfo = &mpc866_uart_pdata[id];
+                pinfo->uart_clk = bd->bi_intfreq;
+                pdev->dev.platform_data = pinfo;
+        }
+}
+
 static int mpc866ads_platform_notify(struct device *dev)
 {
         static const struct platform_notify_dev_map dev_map[] = {
@@ -244,6 +345,10 @@ static int mpc866ads_platform_notify(struct device *dev)
                         .rtn = mpc866ads_fixup_scc_enet_pdata,
                 },
                 {
+                        .bus_id = "fsl-cpm-smc:uart",
+                        .rtn = mpc866ads_fixup_uart_pdata
+                },
+                {
                         .bus_id = NULL
                 }
         };
@@ -267,7 +372,42 @@ int __init mpc866ads_init(void)
 #endif
         ppc_sys_device_enable(MPC8xx_CPM_FEC1);
 
+/* Since either of the uarts could be used as console, they need to ready */
+#ifdef CONFIG_SERIAL_CPM_SMC1
+        ppc_sys_device_enable(MPC8xx_CPM_SMC1);
+        ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SMC
+        ppc_sys_device_enable(MPC8xx_CPM_SMC2);
+        ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
+#endif
+
         return 0;
 }
 
+/*
+   To prevent confusion, console selection is gross:
+   by 0 assumed SMC1 and by 1 assumed SMC2
+ */
+struct platform_device* early_uart_get_pdev(int index)
+{
+        bd_t *bd = (bd_t *) __res;
+        struct fs_uart_platform_info *pinfo;
+
+        struct platform_device* pdev = NULL;
+        if(index) { /*assume SMC2 here*/
+                pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
+                pinfo = &mpc866_uart_pdata[1];
+        } else { /*over SMC1*/
+                pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
+                pinfo = &mpc866_uart_pdata[0];
+        }
+
+        pinfo->uart_clk = bd->bi_intfreq;
+        pdev->dev.platform_data = pinfo;
+        ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
+        return NULL;
+}
+
 arch_initcall(mpc866ads_init);
diff --git a/arch/ppc/platforms/mpc885ads_setup.c b/arch/ppc/platforms/mpc885ads_setup.c
index 50a99e5f7c68..4b88679cd31c 100644
--- a/arch/ppc/platforms/mpc885ads_setup.c
+++ b/arch/ppc/platforms/mpc885ads_setup.c
@@ -20,6 +20,7 @@
 #include <linux/device.h>
 
 #include <linux/fs_enet_pd.h>
+#include <linux/fs_uart_pd.h>
 #include <linux/mii.h>
 
 #include <asm/delay.h>
@@ -35,9 +36,32 @@
 #include <asm/ppc_sys.h>
 
 extern unsigned char __res[];
+static void setup_smc1_ioports(void);
+static void setup_smc2_ioports(void);
 
 static void __init mpc885ads_scc_phy_init(char);
 
+static struct fs_uart_platform_info mpc885_uart_pdata[] = {
+        [fsid_smc1_uart] = {
+                .brg            = 1,
+                .fs_no          = fsid_smc1_uart,
+                .init_ioports   = setup_smc1_ioports,
+                .tx_num_fifo    = 4,
+                .tx_buf_size    = 32,
+                .rx_num_fifo    = 4,
+                .rx_buf_size    = 32,
+        },
+        [fsid_smc2_uart] = {
+                .brg            = 2,
+                .fs_no          = fsid_smc2_uart,
+                .init_ioports   = setup_smc2_ioports,
+                .tx_num_fifo    = 4,
+                .tx_buf_size    = 32,
+                .rx_num_fifo    = 4,
+                .rx_buf_size    = 32,
+        },
+};
+
 static struct fs_mii_bus_info fec_mii_bus_info = {
         .method = fsmii_fec,
         .id = 0,
@@ -116,6 +140,8 @@ void __init board_init(void)
 #ifdef CONFIG_SERIAL_CPM_SMC1
         cp->cp_simode &= ~(0xe0000000 >> 17);   /* brg1 */
         clrbits32(bcsr_io, BCSR1_RS232EN_1);
+        cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
+        cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
 #else
         setbits32(bcsr_io,BCSR1_RS232EN_1);
         cp->cp_smc[0].smc_smcmr = 0;
@@ -126,6 +152,8 @@ void __init board_init(void)
         cp->cp_simode &= ~(0xe0000000 >> 1);
         cp->cp_simode |= (0x20000000 >> 1);     /* brg2 */
         clrbits32(bcsr_io,BCSR1_RS232EN_2);
+        cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
+        cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
 #else
         setbits32(bcsr_io,BCSR1_RS232EN_2);
         cp->cp_smc[1].smc_smcmr = 0;
@@ -343,6 +371,70 @@ static void mpc885ads_scc_phy_init(char phy_addr)
         out_be32(&fecp->fec_mii_speed, 0);
 }
 
+static void setup_smc1_ioports(void)
+{
+        immap_t *immap = (immap_t *) IMAP_ADDR;
+        unsigned *bcsr_io;
+        unsigned int iobits = 0x000000c0;
+
+        bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
+
+        if (bcsr_io == NULL) {
+                printk(KERN_CRIT "Could not remap BCSR1\n");
+                return;
+        }
+        clrbits32(bcsr_io,BCSR1_RS232EN_1);
+        iounmap(bcsr_io);
+
+        setbits32(&immap->im_cpm.cp_pbpar, iobits);
+        clrbits32(&immap->im_cpm.cp_pbdir, iobits);
+        clrbits16(&immap->im_cpm.cp_pbodr, iobits);
+}
+
+static void setup_smc2_ioports(void)
+{
+        immap_t *immap = (immap_t *) IMAP_ADDR;
+        unsigned *bcsr_io;
+        unsigned int iobits = 0x00000c00;
+
+        bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
+
+        if (bcsr_io == NULL) {
+                printk(KERN_CRIT "Could not remap BCSR1\n");
+                return;
+        }
+        clrbits32(bcsr_io,BCSR1_RS232EN_2);
+        iounmap(bcsr_io);
+
+#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
+        setbits32(&immap->im_cpm.cp_pbpar, iobits);
+        clrbits32(&immap->im_cpm.cp_pbdir, iobits);
+        clrbits16(&immap->im_cpm.cp_pbodr, iobits);
+#else
+        setbits16(&immap->im_ioport.iop_papar, iobits);
+        clrbits16(&immap->im_ioport.iop_padir, iobits);
+        clrbits16(&immap->im_ioport.iop_paodr, iobits);
+#endif
+}
+
+static void __init mpc885ads_fixup_uart_pdata(struct platform_device *pdev,
+                                              int idx)
+{
+        bd_t *bd = (bd_t *) __res;
+        struct fs_uart_platform_info *pinfo;
+        int num = ARRAY_SIZE(mpc885_uart_pdata);
+
+        int id = fs_uart_id_smc2fsid(idx);
+
+        /* no need to alter anything if console */
+        if ((id <= num) && (!pdev->dev.platform_data)) {
+                pinfo = &mpc885_uart_pdata[id];
+                pinfo->uart_clk = bd->bi_intfreq;
+                pdev->dev.platform_data = pinfo;
+        }
+}
+
+
 static int mpc885ads_platform_notify(struct device *dev)
 {
 
@@ -356,12 +448,17 @@ static int mpc885ads_platform_notify(struct device *dev)
                         .rtn = mpc885ads_fixup_scc_enet_pdata,
                 },
                 {
+                        .bus_id = "fsl-cpm-smc:uart",
+                        .rtn = mpc885ads_fixup_uart_pdata
+                },
+                {
                         .bus_id = NULL
                 }
         };
 
         platform_notify_map(dev_map,dev);
 
+        return 0;
 }
 
 int __init mpc885ads_init(void)
@@ -383,7 +480,41 @@ int __init mpc885ads_init(void)
         ppc_sys_device_enable(MPC8xx_CPM_FEC2);
 #endif
 
+#ifdef CONFIG_SERIAL_CPM_SMC1
+        ppc_sys_device_enable(MPC8xx_CPM_SMC1);
+        ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SMC2
+        ppc_sys_device_enable(MPC8xx_CPM_SMC2);
+        ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
+#endif
         return 0;
 }
 
 arch_initcall(mpc885ads_init);
+
+/*
+   To prevent confusion, console selection is gross:
+   by 0 assumed SMC1 and by 1 assumed SMC2
+ */
+struct platform_device* early_uart_get_pdev(int index)
+{
+        bd_t *bd = (bd_t *) __res;
+        struct fs_uart_platform_info *pinfo;
+
+        struct platform_device* pdev = NULL;
+        if(index) { /*assume SMC2 here*/
+                pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
+                pinfo = &mpc885_uart_pdata[1];
+        } else { /*over SMC1*/
+                pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
+                pinfo = &mpc885_uart_pdata[0];
+        }
+
+        pinfo->uart_clk = bd->bi_intfreq;
+        pdev->dev.platform_data = pinfo;
+        ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
+        return NULL;
+}
+
diff --git a/arch/ppc/platforms/pq2ads.c b/arch/ppc/platforms/pq2ads.c
index 3365fd788a7a..7fc2e02f5246 100644
--- a/arch/ppc/platforms/pq2ads.c
+++ b/arch/ppc/platforms/pq2ads.c
@@ -14,11 +14,40 @@
 
 #include <linux/init.h>
 
+#include <asm/io.h>
 #include <asm/mpc8260.h>
+#include <asm/cpm2.h>
+#include <asm/immap_cpm2.h>
 
 void __init
 m82xx_board_setup(void)
 {
+        cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
+        u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
+
         /* Enable the 2nd UART port */
-        *(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_RS232_EN2;
+        clrbits32(bcsr, BCSR1_RS232_EN2);
+
+#ifdef CONFIG_SERIAL_CPM_SCC1
+        clrbits32((u32*)&immap->im_scc[0].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
+        clrbits32((u32*)&immap->im_scc[0].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC2
+        clrbits32((u32*)&immap->im_scc[1].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
+        clrbits32((u32*)&immap->im_scc[1].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC3
+        clrbits32((u32*)&immap->im_scc[2].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
+        clrbits32((u32*)&immap->im_scc[2].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC4
+        clrbits32((u32*)&immap->im_scc[3].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
+        clrbits32((u32*)&immap->im_scc[3].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+        iounmap(bcsr);
+        iounmap(immap);
 }
diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c
index a7dd55f1c63e..f6cc16888527 100644
--- a/arch/ppc/syslib/ibm440gx_common.c
+++ b/arch/ppc/syslib/ibm440gx_common.c
@@ -2,7 +2,7 @@
  * PPC440GX system library
  *
  * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
+ * Copyright (c) 2003 - 2006 Zultys Technologies
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -282,3 +282,14 @@ int ibm440gx_show_cpuinfo(struct seq_file *m){
         return 0;
 }
 
+void __init ibm440gx_platform_init(unsigned long r3, unsigned long r4,
+                                   unsigned long r5, unsigned long r6,
+                                   unsigned long r7)
+{
+        /* Erratum 440_43 workaround, disable L1 cache parity checking */
+        if (!strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C") ||
+            !strcmp(cur_cpu_spec->cpu_name, "440GX Rev. F"))
+                mtspr(SPRN_CCR1, mfspr(SPRN_CCR1) | CCR1_DPC);
+
+        ibm44x_platform_init(r3, r4, r5, r6, r7);
+}
diff --git a/arch/ppc/syslib/ibm440gx_common.h b/arch/ppc/syslib/ibm440gx_common.h
index a2ab9fab8e34..a03ec6022e8f 100644
--- a/arch/ppc/syslib/ibm440gx_common.h
+++ b/arch/ppc/syslib/ibm440gx_common.h
@@ -29,6 +29,10 @@
 void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk,
         unsigned int ser_clk) __init;
 
+/* common 440GX platform init */
+void ibm440gx_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                            unsigned long r6, unsigned long r7) __init;
+
 /* Enable L2 cache */
 void ibm440gx_l2c_enable(void) __init;
 
diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c
index bd41ed83beb3..6f536383866e 100644
--- a/arch/ppc/syslib/mpc8xx_devices.c
+++ b/arch/ppc/syslib/mpc8xx_devices.c
@@ -170,12 +170,18 @@ struct platform_device ppc_sys_platform_devices[] = {
         [MPC8xx_CPM_SMC1] = {
                 .name = "fsl-cpm-smc",
                 .id     = 1,
-                .num_resources  = 2,
+                .num_resources  = 3,
                 .resource = (struct resource[]) {
                         {
                                 .name   = "regs",
-                                .start  = 0xa82,
-                                .end    = 0xa91,
+                                .start  = 0xa80,
+                                .end    = 0xa8f,
+                                .flags  = IORESOURCE_MEM,
+                        },
+                        {
+                                .name   = "pram",
+                                .start  = 0x3e80,
+                                .end    = 0x3ebf,
                                 .flags  = IORESOURCE_MEM,
                         },
                         {
@@ -189,15 +195,22 @@ struct platform_device ppc_sys_platform_devices[] = {
         [MPC8xx_CPM_SMC2] = {
                 .name = "fsl-cpm-smc",
                 .id     = 2,
-                .num_resources  = 2,
+                .num_resources  = 3,
                 .resource = (struct resource[]) {
                         {
                                 .name   = "regs",
-                                .start  = 0xa92,
-                                .end    = 0xaa1,
+                                .start  = 0xa90,
+                                .end    = 0xa9f,
                                 .flags  = IORESOURCE_MEM,
                         },
                         {
+                                .name   = "pram",
+                                .start  = 0x3f80,
+                                .end    = 0x3fbf,
+                                .flags  = IORESOURCE_MEM,
+
+                        },
+                        {
                                 .name   = "interrupt",
                                 .start  = MPC8xx_INT_SMC2,
                                 .end    = MPC8xx_INT_SMC2,
diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c
index 7662c4e6e7d6..2d48018b71d9 100644
--- a/arch/ppc/syslib/ppc_sys.c
+++ b/arch/ppc/syslib/ppc_sys.c
@@ -109,9 +109,11 @@ ppc_sys_fixup_mem_resource(struct platform_device *pdev, phys_addr_t paddr)
         int i;
         for (i = 0; i < pdev->num_resources; i++) {
                 struct resource *r = &pdev->resource[i];
-                if ((r->flags & IORESOURCE_MEM) == IORESOURCE_MEM) {
+                if (((r->flags & IORESOURCE_MEM) == IORESOURCE_MEM) && 
+                        ((r->flags & PPC_SYS_IORESOURCE_FIXUPPED) != PPC_SYS_IORESOURCE_FIXUPPED)) {
                         r->start += paddr;
                         r->end += paddr;
+                        r->flags |= PPC_SYS_IORESOURCE_FIXUPPED;
                 }
         }
 }
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c
index 75e64f1c144d..433b0fa203e1 100644
--- a/arch/ppc/syslib/pq2_sys.c
+++ b/arch/ppc/syslib/pq2_sys.c
@@ -113,13 +113,13 @@ struct ppc_sys_spec ppc_sys_specs[] = {
                 .ppc_sys_name   = "8248",
                 .mask           = 0x0000ff00,
                 .value          = 0x00000c00,
-                .num_devices    = 11,
+                .num_devices    = 12,
                 .device_list = (enum ppc_sys_devices[])
                 {
                         MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
-                        MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
-                        MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
-                        MPC82xx_CPM_USB, MPC82xx_SEC1,
+                        MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
+                        MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
+                        MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1,
                 },
         },
         {