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-rw-r--r--arch/ppc/platforms/pmac_feature.c3023
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diff --git a/arch/ppc/platforms/pmac_feature.c b/arch/ppc/platforms/pmac_feature.c
deleted file mode 100644
index 6b7b3a150631..000000000000
--- a/arch/ppc/platforms/pmac_feature.c
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@@ -1,3023 +0,0 @@
1/*
2 * arch/ppc/platforms/pmac_feature.c
3 *
4 * Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
5 * Ben. Herrenschmidt (benh@kernel.crashing.org)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 *
12 * TODO:
13 *
14 * - Replace mdelay with some schedule loop if possible
15 * - Shorten some obfuscated delays on some routines (like modem
16 * power)
17 * - Refcount some clocks (see darwin)
18 * - Split split split...
19 *
20 */
21#include <linux/config.h>
22#include <linux/types.h>
23#include <linux/init.h>
24#include <linux/delay.h>
25#include <linux/kernel.h>
26#include <linux/sched.h>
27#include <linux/spinlock.h>
28#include <linux/adb.h>
29#include <linux/pmu.h>
30#include <linux/ioport.h>
31#include <linux/pci.h>
32#include <asm/sections.h>
33#include <asm/errno.h>
34#include <asm/ohare.h>
35#include <asm/heathrow.h>
36#include <asm/keylargo.h>
37#include <asm/uninorth.h>
38#include <asm/io.h>
39#include <asm/prom.h>
40#include <asm/machdep.h>
41#include <asm/pmac_feature.h>
42#include <asm/dbdma.h>
43#include <asm/pci-bridge.h>
44#include <asm/pmac_low_i2c.h>
45
46#undef DEBUG_FEATURE
47
48#ifdef DEBUG_FEATURE
49#define DBG(fmt,...) printk(KERN_DEBUG fmt)
50#else
51#define DBG(fmt,...)
52#endif
53
54#ifdef CONFIG_6xx
55extern int powersave_lowspeed;
56#endif
57
58extern int powersave_nap;
59extern struct device_node *k2_skiplist[2];
60
61
62/*
63 * We use a single global lock to protect accesses. Each driver has
64 * to take care of its own locking
65 */
66static DEFINE_SPINLOCK(feature_lock);
67
68#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
69#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
70
71
72/*
73 * Instance of some macio stuffs
74 */
75struct macio_chip macio_chips[MAX_MACIO_CHIPS];
76
77struct macio_chip* macio_find(struct device_node* child, int type)
78{
79 while(child) {
80 int i;
81
82 for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
83 if (child == macio_chips[i].of_node &&
84 (!type || macio_chips[i].type == type))
85 return &macio_chips[i];
86 child = child->parent;
87 }
88 return NULL;
89}
90EXPORT_SYMBOL_GPL(macio_find);
91
92static const char* macio_names[] =
93{
94 "Unknown",
95 "Grand Central",
96 "OHare",
97 "OHareII",
98 "Heathrow",
99 "Gatwick",
100 "Paddington",
101 "Keylargo",
102 "Pangea",
103 "Intrepid",
104 "K2"
105};
106
107
108
109/*
110 * Uninorth reg. access. Note that Uni-N regs are big endian
111 */
112
113#define UN_REG(r) (uninorth_base + ((r) >> 2))
114#define UN_IN(r) (in_be32(UN_REG(r)))
115#define UN_OUT(r,v) (out_be32(UN_REG(r), (v)))
116#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
117#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
118
119static struct device_node* uninorth_node;
120static u32 __iomem * uninorth_base;
121static u32 uninorth_rev;
122static int uninorth_u3;
123static void __iomem *u3_ht;
124
125/*
126 * For each motherboard family, we have a table of functions pointers
127 * that handle the various features.
128 */
129
130typedef long (*feature_call)(struct device_node* node, long param, long value);
131
132struct feature_table_entry {
133 unsigned int selector;
134 feature_call function;
135};
136
137struct pmac_mb_def
138{
139 const char* model_string;
140 const char* model_name;
141 int model_id;
142 struct feature_table_entry* features;
143 unsigned long board_flags;
144};
145static struct pmac_mb_def pmac_mb;
146
147/*
148 * Here are the chip specific feature functions
149 */
150
151static inline int
152simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value)
153{
154 struct macio_chip* macio;
155 unsigned long flags;
156
157 macio = macio_find(node, type);
158 if (!macio)
159 return -ENODEV;
160 LOCK(flags);
161 if (value)
162 MACIO_BIS(reg, mask);
163 else
164 MACIO_BIC(reg, mask);
165 (void)MACIO_IN32(reg);
166 UNLOCK(flags);
167
168 return 0;
169}
170
171#ifndef CONFIG_POWER4
172
173static long
174ohare_htw_scc_enable(struct device_node* node, long param, long value)
175{
176 struct macio_chip* macio;
177 unsigned long chan_mask;
178 unsigned long fcr;
179 unsigned long flags;
180 int htw, trans;
181 unsigned long rmask;
182
183 macio = macio_find(node, 0);
184 if (!macio)
185 return -ENODEV;
186 if (!strcmp(node->name, "ch-a"))
187 chan_mask = MACIO_FLAG_SCCA_ON;
188 else if (!strcmp(node->name, "ch-b"))
189 chan_mask = MACIO_FLAG_SCCB_ON;
190 else
191 return -ENODEV;
192
193 htw = (macio->type == macio_heathrow || macio->type == macio_paddington
194 || macio->type == macio_gatwick);
195 /* On these machines, the HRW_SCC_TRANS_EN_N bit mustn't be touched */
196 trans = (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
197 pmac_mb.model_id != PMAC_TYPE_YIKES);
198 if (value) {
199#ifdef CONFIG_ADB_PMU
200 if ((param & 0xfff) == PMAC_SCC_IRDA)
201 pmu_enable_irled(1);
202#endif /* CONFIG_ADB_PMU */
203 LOCK(flags);
204 fcr = MACIO_IN32(OHARE_FCR);
205 /* Check if scc cell need enabling */
206 if (!(fcr & OH_SCC_ENABLE)) {
207 fcr |= OH_SCC_ENABLE;
208 if (htw) {
209 /* Side effect: this will also power up the
210 * modem, but it's too messy to figure out on which
211 * ports this controls the tranceiver and on which
212 * it controls the modem
213 */
214 if (trans)
215 fcr &= ~HRW_SCC_TRANS_EN_N;
216 MACIO_OUT32(OHARE_FCR, fcr);
217 fcr |= (rmask = HRW_RESET_SCC);
218 MACIO_OUT32(OHARE_FCR, fcr);
219 } else {
220 fcr |= (rmask = OH_SCC_RESET);
221 MACIO_OUT32(OHARE_FCR, fcr);
222 }
223 UNLOCK(flags);
224 (void)MACIO_IN32(OHARE_FCR);
225 mdelay(15);
226 LOCK(flags);
227 fcr &= ~rmask;
228 MACIO_OUT32(OHARE_FCR, fcr);
229 }
230 if (chan_mask & MACIO_FLAG_SCCA_ON)
231 fcr |= OH_SCCA_IO;
232 if (chan_mask & MACIO_FLAG_SCCB_ON)
233 fcr |= OH_SCCB_IO;
234 MACIO_OUT32(OHARE_FCR, fcr);
235 macio->flags |= chan_mask;
236 UNLOCK(flags);
237 if (param & PMAC_SCC_FLAG_XMON)
238 macio->flags |= MACIO_FLAG_SCC_LOCKED;
239 } else {
240 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
241 return -EPERM;
242 LOCK(flags);
243 fcr = MACIO_IN32(OHARE_FCR);
244 if (chan_mask & MACIO_FLAG_SCCA_ON)
245 fcr &= ~OH_SCCA_IO;
246 if (chan_mask & MACIO_FLAG_SCCB_ON)
247 fcr &= ~OH_SCCB_IO;
248 MACIO_OUT32(OHARE_FCR, fcr);
249 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
250 fcr &= ~OH_SCC_ENABLE;
251 if (htw && trans)
252 fcr |= HRW_SCC_TRANS_EN_N;
253 MACIO_OUT32(OHARE_FCR, fcr);
254 }
255 macio->flags &= ~(chan_mask);
256 UNLOCK(flags);
257 mdelay(10);
258#ifdef CONFIG_ADB_PMU
259 if ((param & 0xfff) == PMAC_SCC_IRDA)
260 pmu_enable_irled(0);
261#endif /* CONFIG_ADB_PMU */
262 }
263 return 0;
264}
265
266static long
267ohare_floppy_enable(struct device_node* node, long param, long value)
268{
269 return simple_feature_tweak(node, macio_ohare,
270 OHARE_FCR, OH_FLOPPY_ENABLE, value);
271}
272
273static long
274ohare_mesh_enable(struct device_node* node, long param, long value)
275{
276 return simple_feature_tweak(node, macio_ohare,
277 OHARE_FCR, OH_MESH_ENABLE, value);
278}
279
280static long
281ohare_ide_enable(struct device_node* node, long param, long value)
282{
283 switch(param) {
284 case 0:
285 /* For some reason, setting the bit in set_initial_features()
286 * doesn't stick. I'm still investigating... --BenH.
287 */
288 if (value)
289 simple_feature_tweak(node, macio_ohare,
290 OHARE_FCR, OH_IOBUS_ENABLE, 1);
291 return simple_feature_tweak(node, macio_ohare,
292 OHARE_FCR, OH_IDE0_ENABLE, value);
293 case 1:
294 return simple_feature_tweak(node, macio_ohare,
295 OHARE_FCR, OH_BAY_IDE_ENABLE, value);
296 default:
297 return -ENODEV;
298 }
299}
300
301static long
302ohare_ide_reset(struct device_node* node, long param, long value)
303{
304 switch(param) {
305 case 0:
306 return simple_feature_tweak(node, macio_ohare,
307 OHARE_FCR, OH_IDE0_RESET_N, !value);
308 case 1:
309 return simple_feature_tweak(node, macio_ohare,
310 OHARE_FCR, OH_IDE1_RESET_N, !value);
311 default:
312 return -ENODEV;
313 }
314}
315
316static long
317ohare_sleep_state(struct device_node* node, long param, long value)
318{
319 struct macio_chip* macio = &macio_chips[0];
320
321 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
322 return -EPERM;
323 if (value == 1) {
324 MACIO_BIC(OHARE_FCR, OH_IOBUS_ENABLE);
325 } else if (value == 0) {
326 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
327 }
328
329 return 0;
330}
331
332static long
333heathrow_modem_enable(struct device_node* node, long param, long value)
334{
335 struct macio_chip* macio;
336 u8 gpio;
337 unsigned long flags;
338
339 macio = macio_find(node, macio_unknown);
340 if (!macio)
341 return -ENODEV;
342 gpio = MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1;
343 if (!value) {
344 LOCK(flags);
345 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
346 UNLOCK(flags);
347 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
348 mdelay(250);
349 }
350 if (pmac_mb.model_id != PMAC_TYPE_YOSEMITE &&
351 pmac_mb.model_id != PMAC_TYPE_YIKES) {
352 LOCK(flags);
353 if (value)
354 MACIO_BIC(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
355 else
356 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
357 UNLOCK(flags);
358 (void)MACIO_IN32(HEATHROW_FCR);
359 mdelay(250);
360 }
361 if (value) {
362 LOCK(flags);
363 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
364 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
365 UNLOCK(flags); mdelay(250); LOCK(flags);
366 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio);
367 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
368 UNLOCK(flags); mdelay(250); LOCK(flags);
369 MACIO_OUT8(HRW_GPIO_MODEM_RESET, gpio | 1);
370 (void)MACIO_IN8(HRW_GPIO_MODEM_RESET);
371 UNLOCK(flags); mdelay(250);
372 }
373 return 0;
374}
375
376static long
377heathrow_floppy_enable(struct device_node* node, long param, long value)
378{
379 return simple_feature_tweak(node, macio_unknown,
380 HEATHROW_FCR,
381 HRW_SWIM_ENABLE|HRW_BAY_FLOPPY_ENABLE,
382 value);
383}
384
385static long
386heathrow_mesh_enable(struct device_node* node, long param, long value)
387{
388 struct macio_chip* macio;
389 unsigned long flags;
390
391 macio = macio_find(node, macio_unknown);
392 if (!macio)
393 return -ENODEV;
394 LOCK(flags);
395 /* Set clear mesh cell enable */
396 if (value)
397 MACIO_BIS(HEATHROW_FCR, HRW_MESH_ENABLE);
398 else
399 MACIO_BIC(HEATHROW_FCR, HRW_MESH_ENABLE);
400 (void)MACIO_IN32(HEATHROW_FCR);
401 udelay(10);
402 /* Set/Clear termination power */
403 if (value)
404 MACIO_BIC(HEATHROW_MBCR, 0x04000000);
405 else
406 MACIO_BIS(HEATHROW_MBCR, 0x04000000);
407 (void)MACIO_IN32(HEATHROW_MBCR);
408 udelay(10);
409 UNLOCK(flags);
410
411 return 0;
412}
413
414static long
415heathrow_ide_enable(struct device_node* node, long param, long value)
416{
417 switch(param) {
418 case 0:
419 return simple_feature_tweak(node, macio_unknown,
420 HEATHROW_FCR, HRW_IDE0_ENABLE, value);
421 case 1:
422 return simple_feature_tweak(node, macio_unknown,
423 HEATHROW_FCR, HRW_BAY_IDE_ENABLE, value);
424 default:
425 return -ENODEV;
426 }
427}
428
429static long
430heathrow_ide_reset(struct device_node* node, long param, long value)
431{
432 switch(param) {
433 case 0:
434 return simple_feature_tweak(node, macio_unknown,
435 HEATHROW_FCR, HRW_IDE0_RESET_N, !value);
436 case 1:
437 return simple_feature_tweak(node, macio_unknown,
438 HEATHROW_FCR, HRW_IDE1_RESET_N, !value);
439 default:
440 return -ENODEV;
441 }
442}
443
444static long
445heathrow_bmac_enable(struct device_node* node, long param, long value)
446{
447 struct macio_chip* macio;
448 unsigned long flags;
449
450 macio = macio_find(node, 0);
451 if (!macio)
452 return -ENODEV;
453 if (value) {
454 LOCK(flags);
455 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
456 MACIO_BIS(HEATHROW_FCR, HRW_BMAC_RESET);
457 UNLOCK(flags);
458 (void)MACIO_IN32(HEATHROW_FCR);
459 mdelay(10);
460 LOCK(flags);
461 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_RESET);
462 UNLOCK(flags);
463 (void)MACIO_IN32(HEATHROW_FCR);
464 mdelay(10);
465 } else {
466 LOCK(flags);
467 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE);
468 UNLOCK(flags);
469 }
470 return 0;
471}
472
473static long
474heathrow_sound_enable(struct device_node* node, long param, long value)
475{
476 struct macio_chip* macio;
477 unsigned long flags;
478
479 /* B&W G3 and Yikes don't support that properly (the
480 * sound appear to never come back after beeing shut down).
481 */
482 if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
483 pmac_mb.model_id == PMAC_TYPE_YIKES)
484 return 0;
485
486 macio = macio_find(node, 0);
487 if (!macio)
488 return -ENODEV;
489 if (value) {
490 LOCK(flags);
491 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
492 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
493 UNLOCK(flags);
494 (void)MACIO_IN32(HEATHROW_FCR);
495 } else {
496 LOCK(flags);
497 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
498 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
499 UNLOCK(flags);
500 }
501 return 0;
502}
503
504static u32 save_fcr[6];
505static u32 save_mbcr;
506static u32 save_gpio_levels[2];
507static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
508static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
509static u32 save_unin_clock_ctl;
510static struct dbdma_regs save_dbdma[13];
511static struct dbdma_regs save_alt_dbdma[13];
512
513static void
514dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
515{
516 int i;
517
518 /* Save state & config of DBDMA channels */
519 for (i=0; i<13; i++) {
520 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
521 (macio->base + ((0x8000+i*0x100)>>2));
522 save[i].cmdptr_hi = in_le32(&chan->cmdptr_hi);
523 save[i].cmdptr = in_le32(&chan->cmdptr);
524 save[i].intr_sel = in_le32(&chan->intr_sel);
525 save[i].br_sel = in_le32(&chan->br_sel);
526 save[i].wait_sel = in_le32(&chan->wait_sel);
527 }
528}
529
530static void
531dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
532{
533 int i;
534
535 /* Save state & config of DBDMA channels */
536 for (i=0; i<13; i++) {
537 volatile struct dbdma_regs __iomem * chan = (void __iomem *)
538 (macio->base + ((0x8000+i*0x100)>>2));
539 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
540 while (in_le32(&chan->status) & ACTIVE)
541 mb();
542 out_le32(&chan->cmdptr_hi, save[i].cmdptr_hi);
543 out_le32(&chan->cmdptr, save[i].cmdptr);
544 out_le32(&chan->intr_sel, save[i].intr_sel);
545 out_le32(&chan->br_sel, save[i].br_sel);
546 out_le32(&chan->wait_sel, save[i].wait_sel);
547 }
548}
549
550static void
551heathrow_sleep(struct macio_chip* macio, int secondary)
552{
553 if (secondary) {
554 dbdma_save(macio, save_alt_dbdma);
555 save_fcr[2] = MACIO_IN32(0x38);
556 save_fcr[3] = MACIO_IN32(0x3c);
557 } else {
558 dbdma_save(macio, save_dbdma);
559 save_fcr[0] = MACIO_IN32(0x38);
560 save_fcr[1] = MACIO_IN32(0x3c);
561 save_mbcr = MACIO_IN32(0x34);
562 /* Make sure sound is shut down */
563 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_POWER_N);
564 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
565 /* This seems to be necessary as well or the fan
566 * keeps coming up and battery drains fast */
567 MACIO_BIC(HEATHROW_FCR, HRW_IOBUS_ENABLE);
568 MACIO_BIC(HEATHROW_FCR, HRW_IDE0_RESET_N);
569 /* Make sure eth is down even if module or sleep
570 * won't work properly */
571 MACIO_BIC(HEATHROW_FCR, HRW_BMAC_IO_ENABLE | HRW_BMAC_RESET);
572 }
573 /* Make sure modem is shut down */
574 MACIO_OUT8(HRW_GPIO_MODEM_RESET,
575 MACIO_IN8(HRW_GPIO_MODEM_RESET) & ~1);
576 MACIO_BIS(HEATHROW_FCR, HRW_SCC_TRANS_EN_N);
577 MACIO_BIC(HEATHROW_FCR, OH_SCCA_IO|OH_SCCB_IO|HRW_SCC_ENABLE);
578
579 /* Let things settle */
580 (void)MACIO_IN32(HEATHROW_FCR);
581}
582
583static void
584heathrow_wakeup(struct macio_chip* macio, int secondary)
585{
586 if (secondary) {
587 MACIO_OUT32(0x38, save_fcr[2]);
588 (void)MACIO_IN32(0x38);
589 mdelay(1);
590 MACIO_OUT32(0x3c, save_fcr[3]);
591 (void)MACIO_IN32(0x38);
592 mdelay(10);
593 dbdma_restore(macio, save_alt_dbdma);
594 } else {
595 MACIO_OUT32(0x38, save_fcr[0] | HRW_IOBUS_ENABLE);
596 (void)MACIO_IN32(0x38);
597 mdelay(1);
598 MACIO_OUT32(0x3c, save_fcr[1]);
599 (void)MACIO_IN32(0x38);
600 mdelay(1);
601 MACIO_OUT32(0x34, save_mbcr);
602 (void)MACIO_IN32(0x38);
603 mdelay(10);
604 dbdma_restore(macio, save_dbdma);
605 }
606}
607
608static long
609heathrow_sleep_state(struct device_node* node, long param, long value)
610{
611 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
612 return -EPERM;
613 if (value == 1) {
614 if (macio_chips[1].type == macio_gatwick)
615 heathrow_sleep(&macio_chips[0], 1);
616 heathrow_sleep(&macio_chips[0], 0);
617 } else if (value == 0) {
618 heathrow_wakeup(&macio_chips[0], 0);
619 if (macio_chips[1].type == macio_gatwick)
620 heathrow_wakeup(&macio_chips[0], 1);
621 }
622 return 0;
623}
624
625static long
626core99_scc_enable(struct device_node* node, long param, long value)
627{
628 struct macio_chip* macio;
629 unsigned long flags;
630 unsigned long chan_mask;
631 u32 fcr;
632
633 macio = macio_find(node, 0);
634 if (!macio)
635 return -ENODEV;
636 if (!strcmp(node->name, "ch-a"))
637 chan_mask = MACIO_FLAG_SCCA_ON;
638 else if (!strcmp(node->name, "ch-b"))
639 chan_mask = MACIO_FLAG_SCCB_ON;
640 else
641 return -ENODEV;
642
643 if (value) {
644 int need_reset_scc = 0;
645 int need_reset_irda = 0;
646
647 LOCK(flags);
648 fcr = MACIO_IN32(KEYLARGO_FCR0);
649 /* Check if scc cell need enabling */
650 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
651 fcr |= KL0_SCC_CELL_ENABLE;
652 need_reset_scc = 1;
653 }
654 if (chan_mask & MACIO_FLAG_SCCA_ON) {
655 fcr |= KL0_SCCA_ENABLE;
656 /* Don't enable line drivers for I2S modem */
657 if ((param & 0xfff) == PMAC_SCC_I2S1)
658 fcr &= ~KL0_SCC_A_INTF_ENABLE;
659 else
660 fcr |= KL0_SCC_A_INTF_ENABLE;
661 }
662 if (chan_mask & MACIO_FLAG_SCCB_ON) {
663 fcr |= KL0_SCCB_ENABLE;
664 /* Perform irda specific inits */
665 if ((param & 0xfff) == PMAC_SCC_IRDA) {
666 fcr &= ~KL0_SCC_B_INTF_ENABLE;
667 fcr |= KL0_IRDA_ENABLE;
668 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
669 fcr |= KL0_IRDA_SOURCE1_SEL;
670 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
671 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
672 need_reset_irda = 1;
673 } else
674 fcr |= KL0_SCC_B_INTF_ENABLE;
675 }
676 MACIO_OUT32(KEYLARGO_FCR0, fcr);
677 macio->flags |= chan_mask;
678 if (need_reset_scc) {
679 MACIO_BIS(KEYLARGO_FCR0, KL0_SCC_RESET);
680 (void)MACIO_IN32(KEYLARGO_FCR0);
681 UNLOCK(flags);
682 mdelay(15);
683 LOCK(flags);
684 MACIO_BIC(KEYLARGO_FCR0, KL0_SCC_RESET);
685 }
686 if (need_reset_irda) {
687 MACIO_BIS(KEYLARGO_FCR0, KL0_IRDA_RESET);
688 (void)MACIO_IN32(KEYLARGO_FCR0);
689 UNLOCK(flags);
690 mdelay(15);
691 LOCK(flags);
692 MACIO_BIC(KEYLARGO_FCR0, KL0_IRDA_RESET);
693 }
694 UNLOCK(flags);
695 if (param & PMAC_SCC_FLAG_XMON)
696 macio->flags |= MACIO_FLAG_SCC_LOCKED;
697 } else {
698 if (macio->flags & MACIO_FLAG_SCC_LOCKED)
699 return -EPERM;
700 LOCK(flags);
701 fcr = MACIO_IN32(KEYLARGO_FCR0);
702 if (chan_mask & MACIO_FLAG_SCCA_ON)
703 fcr &= ~KL0_SCCA_ENABLE;
704 if (chan_mask & MACIO_FLAG_SCCB_ON) {
705 fcr &= ~KL0_SCCB_ENABLE;
706 /* Perform irda specific clears */
707 if ((param & 0xfff) == PMAC_SCC_IRDA) {
708 fcr &= ~KL0_IRDA_ENABLE;
709 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
710 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
711 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
712 }
713 }
714 MACIO_OUT32(KEYLARGO_FCR0, fcr);
715 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
716 fcr &= ~KL0_SCC_CELL_ENABLE;
717 MACIO_OUT32(KEYLARGO_FCR0, fcr);
718 }
719 macio->flags &= ~(chan_mask);
720 UNLOCK(flags);
721 mdelay(10);
722 }
723 return 0;
724}
725
726static long
727core99_modem_enable(struct device_node* node, long param, long value)
728{
729 struct macio_chip* macio;
730 u8 gpio;
731 unsigned long flags;
732
733 /* Hack for internal USB modem */
734 if (node == NULL) {
735 if (macio_chips[0].type != macio_keylargo)
736 return -ENODEV;
737 node = macio_chips[0].of_node;
738 }
739 macio = macio_find(node, 0);
740 if (!macio)
741 return -ENODEV;
742 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
743 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
744 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
745
746 if (!value) {
747 LOCK(flags);
748 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
749 UNLOCK(flags);
750 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
751 mdelay(250);
752 }
753 LOCK(flags);
754 if (value) {
755 MACIO_BIC(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
756 UNLOCK(flags);
757 (void)MACIO_IN32(KEYLARGO_FCR2);
758 mdelay(250);
759 } else {
760 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
761 UNLOCK(flags);
762 }
763 if (value) {
764 LOCK(flags);
765 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
766 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
767 UNLOCK(flags); mdelay(250); LOCK(flags);
768 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
769 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
770 UNLOCK(flags); mdelay(250); LOCK(flags);
771 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
772 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
773 UNLOCK(flags); mdelay(250);
774 }
775 return 0;
776}
777
778static long
779pangea_modem_enable(struct device_node* node, long param, long value)
780{
781 struct macio_chip* macio;
782 u8 gpio;
783 unsigned long flags;
784
785 /* Hack for internal USB modem */
786 if (node == NULL) {
787 if (macio_chips[0].type != macio_pangea &&
788 macio_chips[0].type != macio_intrepid)
789 return -ENODEV;
790 node = macio_chips[0].of_node;
791 }
792 macio = macio_find(node, 0);
793 if (!macio)
794 return -ENODEV;
795 gpio = MACIO_IN8(KL_GPIO_MODEM_RESET);
796 gpio |= KEYLARGO_GPIO_OUTPUT_ENABLE;
797 gpio &= ~KEYLARGO_GPIO_OUTOUT_DATA;
798
799 if (!value) {
800 LOCK(flags);
801 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
802 UNLOCK(flags);
803 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
804 mdelay(250);
805 }
806 LOCK(flags);
807 if (value) {
808 MACIO_OUT8(KL_GPIO_MODEM_POWER,
809 KEYLARGO_GPIO_OUTPUT_ENABLE);
810 UNLOCK(flags);
811 (void)MACIO_IN32(KEYLARGO_FCR2);
812 mdelay(250);
813 } else {
814 MACIO_OUT8(KL_GPIO_MODEM_POWER,
815 KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
816 UNLOCK(flags);
817 }
818 if (value) {
819 LOCK(flags);
820 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
821 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
822 UNLOCK(flags); mdelay(250); LOCK(flags);
823 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio);
824 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
825 UNLOCK(flags); mdelay(250); LOCK(flags);
826 MACIO_OUT8(KL_GPIO_MODEM_RESET, gpio | KEYLARGO_GPIO_OUTOUT_DATA);
827 (void)MACIO_IN8(KL_GPIO_MODEM_RESET);
828 UNLOCK(flags); mdelay(250);
829 }
830 return 0;
831}
832
833static long
834core99_ata100_enable(struct device_node* node, long value)
835{
836 unsigned long flags;
837 struct pci_dev *pdev = NULL;
838 u8 pbus, pid;
839
840 if (uninorth_rev < 0x24)
841 return -ENODEV;
842
843 LOCK(flags);
844 if (value)
845 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
846 else
847 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_ATA100);
848 (void)UN_IN(UNI_N_CLOCK_CNTL);
849 UNLOCK(flags);
850 udelay(20);
851
852 if (value) {
853 if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
854 pdev = pci_find_slot(pbus, pid);
855 if (pdev == NULL)
856 return 0;
857 pci_enable_device(pdev);
858 pci_set_master(pdev);
859 }
860 return 0;
861}
862
863static long
864core99_ide_enable(struct device_node* node, long param, long value)
865{
866 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
867 * based ata-100
868 */
869 switch(param) {
870 case 0:
871 return simple_feature_tweak(node, macio_unknown,
872 KEYLARGO_FCR1, KL1_EIDE0_ENABLE, value);
873 case 1:
874 return simple_feature_tweak(node, macio_unknown,
875 KEYLARGO_FCR1, KL1_EIDE1_ENABLE, value);
876 case 2:
877 return simple_feature_tweak(node, macio_unknown,
878 KEYLARGO_FCR1, KL1_UIDE_ENABLE, value);
879 case 3:
880 return core99_ata100_enable(node, value);
881 default:
882 return -ENODEV;
883 }
884}
885
886static long
887core99_ide_reset(struct device_node* node, long param, long value)
888{
889 switch(param) {
890 case 0:
891 return simple_feature_tweak(node, macio_unknown,
892 KEYLARGO_FCR1, KL1_EIDE0_RESET_N, !value);
893 case 1:
894 return simple_feature_tweak(node, macio_unknown,
895 KEYLARGO_FCR1, KL1_EIDE1_RESET_N, !value);
896 case 2:
897 return simple_feature_tweak(node, macio_unknown,
898 KEYLARGO_FCR1, KL1_UIDE_RESET_N, !value);
899 default:
900 return -ENODEV;
901 }
902}
903
904static long
905core99_gmac_enable(struct device_node* node, long param, long value)
906{
907 unsigned long flags;
908
909 LOCK(flags);
910 if (value)
911 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
912 else
913 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_GMAC);
914 (void)UN_IN(UNI_N_CLOCK_CNTL);
915 UNLOCK(flags);
916 udelay(20);
917
918 return 0;
919}
920
921static long
922core99_gmac_phy_reset(struct device_node* node, long param, long value)
923{
924 unsigned long flags;
925 struct macio_chip* macio;
926
927 macio = &macio_chips[0];
928 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
929 macio->type != macio_intrepid)
930 return -ENODEV;
931
932 LOCK(flags);
933 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, KEYLARGO_GPIO_OUTPUT_ENABLE);
934 (void)MACIO_IN8(KL_GPIO_ETH_PHY_RESET);
935 UNLOCK(flags);
936 mdelay(10);
937 LOCK(flags);
938 MACIO_OUT8(KL_GPIO_ETH_PHY_RESET, /*KEYLARGO_GPIO_OUTPUT_ENABLE | */
939 KEYLARGO_GPIO_OUTOUT_DATA);
940 UNLOCK(flags);
941 mdelay(10);
942
943 return 0;
944}
945
946static long
947core99_sound_chip_enable(struct device_node* node, long param, long value)
948{
949 struct macio_chip* macio;
950 unsigned long flags;
951
952 macio = macio_find(node, 0);
953 if (!macio)
954 return -ENODEV;
955
956 /* Do a better probe code, screamer G4 desktops &
957 * iMacs can do that too, add a recalibrate in
958 * the driver as well
959 */
960 if (pmac_mb.model_id == PMAC_TYPE_PISMO ||
961 pmac_mb.model_id == PMAC_TYPE_TITANIUM) {
962 LOCK(flags);
963 if (value)
964 MACIO_OUT8(KL_GPIO_SOUND_POWER,
965 KEYLARGO_GPIO_OUTPUT_ENABLE |
966 KEYLARGO_GPIO_OUTOUT_DATA);
967 else
968 MACIO_OUT8(KL_GPIO_SOUND_POWER,
969 KEYLARGO_GPIO_OUTPUT_ENABLE);
970 (void)MACIO_IN8(KL_GPIO_SOUND_POWER);
971 UNLOCK(flags);
972 }
973 return 0;
974}
975
976static long
977core99_airport_enable(struct device_node* node, long param, long value)
978{
979 struct macio_chip* macio;
980 unsigned long flags;
981 int state;
982
983 macio = macio_find(node, 0);
984 if (!macio)
985 return -ENODEV;
986
987 /* Hint: we allow passing of macio itself for the sake of the
988 * sleep code
989 */
990 if (node != macio->of_node &&
991 (!node->parent || node->parent != macio->of_node))
992 return -ENODEV;
993 state = (macio->flags & MACIO_FLAG_AIRPORT_ON) != 0;
994 if (value == state)
995 return 0;
996 if (value) {
997 /* This code is a reproduction of OF enable-cardslot
998 * and init-wireless methods, slightly hacked until
999 * I got it working.
1000 */
1001 LOCK(flags);
1002 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 5);
1003 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
1004 UNLOCK(flags);
1005 mdelay(10);
1006 LOCK(flags);
1007 MACIO_OUT8(KEYLARGO_GPIO_0+0xf, 4);
1008 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xf);
1009 UNLOCK(flags);
1010
1011 mdelay(10);
1012
1013 LOCK(flags);
1014 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1015 (void)MACIO_IN32(KEYLARGO_FCR2);
1016 udelay(10);
1017 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xb, 0);
1018 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xb);
1019 udelay(10);
1020 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xa, 0x28);
1021 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xa);
1022 udelay(10);
1023 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+0xd, 0x28);
1024 (void)MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+0xd);
1025 udelay(10);
1026 MACIO_OUT8(KEYLARGO_GPIO_0+0xd, 0x28);
1027 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xd);
1028 udelay(10);
1029 MACIO_OUT8(KEYLARGO_GPIO_0+0xe, 0x28);
1030 (void)MACIO_IN8(KEYLARGO_GPIO_0+0xe);
1031 UNLOCK(flags);
1032 udelay(10);
1033 MACIO_OUT32(0x1c000, 0);
1034 mdelay(1);
1035 MACIO_OUT8(0x1a3e0, 0x41);
1036 (void)MACIO_IN8(0x1a3e0);
1037 udelay(10);
1038 LOCK(flags);
1039 MACIO_BIS(KEYLARGO_FCR2, KL2_CARDSEL_16);
1040 (void)MACIO_IN32(KEYLARGO_FCR2);
1041 UNLOCK(flags);
1042 mdelay(100);
1043
1044 macio->flags |= MACIO_FLAG_AIRPORT_ON;
1045 } else {
1046 LOCK(flags);
1047 MACIO_BIC(KEYLARGO_FCR2, KL2_CARDSEL_16);
1048 (void)MACIO_IN32(KEYLARGO_FCR2);
1049 MACIO_OUT8(KL_GPIO_AIRPORT_0, 0);
1050 MACIO_OUT8(KL_GPIO_AIRPORT_1, 0);
1051 MACIO_OUT8(KL_GPIO_AIRPORT_2, 0);
1052 MACIO_OUT8(KL_GPIO_AIRPORT_3, 0);
1053 MACIO_OUT8(KL_GPIO_AIRPORT_4, 0);
1054 (void)MACIO_IN8(KL_GPIO_AIRPORT_4);
1055 UNLOCK(flags);
1056
1057 macio->flags &= ~MACIO_FLAG_AIRPORT_ON;
1058 }
1059 return 0;
1060}
1061
1062#ifdef CONFIG_SMP
1063static long
1064core99_reset_cpu(struct device_node* node, long param, long value)
1065{
1066 unsigned int reset_io = 0;
1067 unsigned long flags;
1068 struct macio_chip* macio;
1069 struct device_node* np;
1070 const int dflt_reset_lines[] = { KL_GPIO_RESET_CPU0,
1071 KL_GPIO_RESET_CPU1,
1072 KL_GPIO_RESET_CPU2,
1073 KL_GPIO_RESET_CPU3 };
1074
1075 macio = &macio_chips[0];
1076 if (macio->type != macio_keylargo)
1077 return -ENODEV;
1078
1079 np = find_path_device("/cpus");
1080 if (np == NULL)
1081 return -ENODEV;
1082 for (np = np->child; np != NULL; np = np->sibling) {
1083 u32* num = (u32 *)get_property(np, "reg", NULL);
1084 u32* rst = (u32 *)get_property(np, "soft-reset", NULL);
1085 if (num == NULL || rst == NULL)
1086 continue;
1087 if (param == *num) {
1088 reset_io = *rst;
1089 break;
1090 }
1091 }
1092 if (np == NULL || reset_io == 0)
1093 reset_io = dflt_reset_lines[param];
1094
1095 LOCK(flags);
1096 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1097 (void)MACIO_IN8(reset_io);
1098 udelay(1);
1099 MACIO_OUT8(reset_io, 0);
1100 (void)MACIO_IN8(reset_io);
1101 UNLOCK(flags);
1102
1103 return 0;
1104}
1105#endif /* CONFIG_SMP */
1106
1107static long
1108core99_usb_enable(struct device_node* node, long param, long value)
1109{
1110 struct macio_chip* macio;
1111 unsigned long flags;
1112 char* prop;
1113 int number;
1114 u32 reg;
1115
1116 macio = &macio_chips[0];
1117 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1118 macio->type != macio_intrepid)
1119 return -ENODEV;
1120
1121 prop = (char *)get_property(node, "AAPL,clock-id", NULL);
1122 if (!prop)
1123 return -ENODEV;
1124 if (strncmp(prop, "usb0u048", 8) == 0)
1125 number = 0;
1126 else if (strncmp(prop, "usb1u148", 8) == 0)
1127 number = 2;
1128 else if (strncmp(prop, "usb2u248", 8) == 0)
1129 number = 4;
1130 else
1131 return -ENODEV;
1132
1133 /* Sorry for the brute-force locking, but this is only used during
1134 * sleep and the timing seem to be critical
1135 */
1136 LOCK(flags);
1137 if (value) {
1138 /* Turn ON */
1139 if (number == 0) {
1140 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1141 (void)MACIO_IN32(KEYLARGO_FCR0);
1142 UNLOCK(flags);
1143 mdelay(1);
1144 LOCK(flags);
1145 MACIO_BIS(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1146 } else if (number == 2) {
1147 MACIO_BIC(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1148 UNLOCK(flags);
1149 (void)MACIO_IN32(KEYLARGO_FCR0);
1150 mdelay(1);
1151 LOCK(flags);
1152 MACIO_BIS(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1153 } else if (number == 4) {
1154 MACIO_BIC(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1155 UNLOCK(flags);
1156 (void)MACIO_IN32(KEYLARGO_FCR1);
1157 mdelay(1);
1158 LOCK(flags);
1159 MACIO_BIS(KEYLARGO_FCR1, KL1_USB2_CELL_ENABLE);
1160 }
1161 if (number < 4) {
1162 reg = MACIO_IN32(KEYLARGO_FCR4);
1163 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1164 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number));
1165 reg &= ~(KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1166 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1));
1167 MACIO_OUT32(KEYLARGO_FCR4, reg);
1168 (void)MACIO_IN32(KEYLARGO_FCR4);
1169 udelay(10);
1170 } else {
1171 reg = MACIO_IN32(KEYLARGO_FCR3);
1172 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1173 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0));
1174 reg &= ~(KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1175 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1));
1176 MACIO_OUT32(KEYLARGO_FCR3, reg);
1177 (void)MACIO_IN32(KEYLARGO_FCR3);
1178 udelay(10);
1179 }
1180 if (macio->type == macio_intrepid) {
1181 /* wait for clock stopped bits to clear */
1182 u32 test0 = 0, test1 = 0;
1183 u32 status0, status1;
1184 int timeout = 1000;
1185
1186 UNLOCK(flags);
1187 switch (number) {
1188 case 0:
1189 test0 = UNI_N_CLOCK_STOPPED_USB0;
1190 test1 = UNI_N_CLOCK_STOPPED_USB0PCI;
1191 break;
1192 case 2:
1193 test0 = UNI_N_CLOCK_STOPPED_USB1;
1194 test1 = UNI_N_CLOCK_STOPPED_USB1PCI;
1195 break;
1196 case 4:
1197 test0 = UNI_N_CLOCK_STOPPED_USB2;
1198 test1 = UNI_N_CLOCK_STOPPED_USB2PCI;
1199 break;
1200 }
1201 do {
1202 if (--timeout <= 0) {
1203 printk(KERN_ERR "core99_usb_enable: "
1204 "Timeout waiting for clocks\n");
1205 break;
1206 }
1207 mdelay(1);
1208 status0 = UN_IN(UNI_N_CLOCK_STOP_STATUS0);
1209 status1 = UN_IN(UNI_N_CLOCK_STOP_STATUS1);
1210 } while ((status0 & test0) | (status1 & test1));
1211 LOCK(flags);
1212 }
1213 } else {
1214 /* Turn OFF */
1215 if (number < 4) {
1216 reg = MACIO_IN32(KEYLARGO_FCR4);
1217 reg |= KL4_PORT_WAKEUP_ENABLE(number) | KL4_PORT_RESUME_WAKE_EN(number) |
1218 KL4_PORT_CONNECT_WAKE_EN(number) | KL4_PORT_DISCONNECT_WAKE_EN(number);
1219 reg |= KL4_PORT_WAKEUP_ENABLE(number+1) | KL4_PORT_RESUME_WAKE_EN(number+1) |
1220 KL4_PORT_CONNECT_WAKE_EN(number+1) | KL4_PORT_DISCONNECT_WAKE_EN(number+1);
1221 MACIO_OUT32(KEYLARGO_FCR4, reg);
1222 (void)MACIO_IN32(KEYLARGO_FCR4);
1223 udelay(1);
1224 } else {
1225 reg = MACIO_IN32(KEYLARGO_FCR3);
1226 reg |= KL3_IT_PORT_WAKEUP_ENABLE(0) | KL3_IT_PORT_RESUME_WAKE_EN(0) |
1227 KL3_IT_PORT_CONNECT_WAKE_EN(0) | KL3_IT_PORT_DISCONNECT_WAKE_EN(0);
1228 reg |= KL3_IT_PORT_WAKEUP_ENABLE(1) | KL3_IT_PORT_RESUME_WAKE_EN(1) |
1229 KL3_IT_PORT_CONNECT_WAKE_EN(1) | KL3_IT_PORT_DISCONNECT_WAKE_EN(1);
1230 MACIO_OUT32(KEYLARGO_FCR3, reg);
1231 (void)MACIO_IN32(KEYLARGO_FCR3);
1232 udelay(1);
1233 }
1234 if (number == 0) {
1235 if (macio->type != macio_intrepid)
1236 MACIO_BIC(KEYLARGO_FCR0, KL0_USB0_CELL_ENABLE);
1237 (void)MACIO_IN32(KEYLARGO_FCR0);
1238 udelay(1);
1239 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB0_PAD_SUSPEND0 | KL0_USB0_PAD_SUSPEND1));
1240 (void)MACIO_IN32(KEYLARGO_FCR0);
1241 } else if (number == 2) {
1242 if (macio->type != macio_intrepid)
1243 MACIO_BIC(KEYLARGO_FCR0, KL0_USB1_CELL_ENABLE);
1244 (void)MACIO_IN32(KEYLARGO_FCR0);
1245 udelay(1);
1246 MACIO_BIS(KEYLARGO_FCR0, (KL0_USB1_PAD_SUSPEND0 | KL0_USB1_PAD_SUSPEND1));
1247 (void)MACIO_IN32(KEYLARGO_FCR0);
1248 } else if (number == 4) {
1249 udelay(1);
1250 MACIO_BIS(KEYLARGO_FCR1, (KL1_USB2_PAD_SUSPEND0 | KL1_USB2_PAD_SUSPEND1));
1251 (void)MACIO_IN32(KEYLARGO_FCR1);
1252 }
1253 udelay(1);
1254 }
1255 UNLOCK(flags);
1256
1257 return 0;
1258}
1259
1260static long
1261core99_firewire_enable(struct device_node* node, long param, long value)
1262{
1263 unsigned long flags;
1264 struct macio_chip* macio;
1265
1266 macio = &macio_chips[0];
1267 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1268 macio->type != macio_intrepid)
1269 return -ENODEV;
1270 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1271 return -ENODEV;
1272
1273 LOCK(flags);
1274 if (value) {
1275 UN_BIS(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1276 (void)UN_IN(UNI_N_CLOCK_CNTL);
1277 } else {
1278 UN_BIC(UNI_N_CLOCK_CNTL, UNI_N_CLOCK_CNTL_FW);
1279 (void)UN_IN(UNI_N_CLOCK_CNTL);
1280 }
1281 UNLOCK(flags);
1282 mdelay(1);
1283
1284 return 0;
1285}
1286
1287static long
1288core99_firewire_cable_power(struct device_node* node, long param, long value)
1289{
1290 unsigned long flags;
1291 struct macio_chip* macio;
1292
1293 /* Trick: we allow NULL node */
1294 if ((pmac_mb.board_flags & PMAC_MB_HAS_FW_POWER) == 0)
1295 return -ENODEV;
1296 macio = &macio_chips[0];
1297 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1298 macio->type != macio_intrepid)
1299 return -ENODEV;
1300 if (!(macio->flags & MACIO_FLAG_FW_SUPPORTED))
1301 return -ENODEV;
1302
1303 LOCK(flags);
1304 if (value) {
1305 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 0);
1306 MACIO_IN8(KL_GPIO_FW_CABLE_POWER);
1307 udelay(10);
1308 } else {
1309 MACIO_OUT8(KL_GPIO_FW_CABLE_POWER , 4);
1310 MACIO_IN8(KL_GPIO_FW_CABLE_POWER); udelay(10);
1311 }
1312 UNLOCK(flags);
1313 mdelay(1);
1314
1315 return 0;
1316}
1317
1318static long
1319intrepid_aack_delay_enable(struct device_node* node, long param, long value)
1320{
1321 unsigned long flags;
1322
1323 if (uninorth_rev < 0xd2)
1324 return -ENODEV;
1325
1326 LOCK(flags);
1327 if (param)
1328 UN_BIS(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1329 else
1330 UN_BIC(UNI_N_AACK_DELAY, UNI_N_AACK_DELAY_ENABLE);
1331 UNLOCK(flags);
1332
1333 return 0;
1334}
1335
1336
1337#endif /* CONFIG_POWER4 */
1338
1339static long
1340core99_read_gpio(struct device_node* node, long param, long value)
1341{
1342 struct macio_chip* macio = &macio_chips[0];
1343
1344 return MACIO_IN8(param);
1345}
1346
1347
1348static long
1349core99_write_gpio(struct device_node* node, long param, long value)
1350{
1351 struct macio_chip* macio = &macio_chips[0];
1352
1353 MACIO_OUT8(param, (u8)(value & 0xff));
1354 return 0;
1355}
1356
1357#ifdef CONFIG_POWER4
1358
1359static long
1360g5_gmac_enable(struct device_node* node, long param, long value)
1361{
1362 struct macio_chip* macio = &macio_chips[0];
1363 unsigned long flags;
1364 u8 pbus, pid;
1365
1366 LOCK(flags);
1367 if (value) {
1368 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1369 mb();
1370 k2_skiplist[0] = NULL;
1371 } else {
1372 k2_skiplist[0] = node;
1373 mb();
1374 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
1375 }
1376
1377 UNLOCK(flags);
1378 mdelay(1);
1379
1380 return 0;
1381}
1382
1383static long
1384g5_fw_enable(struct device_node* node, long param, long value)
1385{
1386 struct macio_chip* macio = &macio_chips[0];
1387 unsigned long flags;
1388
1389 LOCK(flags);
1390 if (value) {
1391 MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1392 mb();
1393 k2_skiplist[1] = NULL;
1394 } else {
1395 k2_skiplist[1] = node;
1396 mb();
1397 MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
1398 }
1399
1400 UNLOCK(flags);
1401 mdelay(1);
1402
1403 return 0;
1404}
1405
1406static long
1407g5_mpic_enable(struct device_node* node, long param, long value)
1408{
1409 unsigned long flags;
1410
1411 if (node->parent == NULL || strcmp(node->parent->name, "u3"))
1412 return 0;
1413
1414 LOCK(flags);
1415 UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
1416 UNLOCK(flags);
1417
1418 return 0;
1419}
1420
1421#ifdef CONFIG_SMP
1422static long
1423g5_reset_cpu(struct device_node* node, long param, long value)
1424{
1425 unsigned int reset_io = 0;
1426 unsigned long flags;
1427 struct macio_chip* macio;
1428 struct device_node* np;
1429
1430 macio = &macio_chips[0];
1431 if (macio->type != macio_keylargo2)
1432 return -ENODEV;
1433
1434 np = find_path_device("/cpus");
1435 if (np == NULL)
1436 return -ENODEV;
1437 for (np = np->child; np != NULL; np = np->sibling) {
1438 u32* num = (u32 *)get_property(np, "reg", NULL);
1439 u32* rst = (u32 *)get_property(np, "soft-reset", NULL);
1440 if (num == NULL || rst == NULL)
1441 continue;
1442 if (param == *num) {
1443 reset_io = *rst;
1444 break;
1445 }
1446 }
1447 if (np == NULL || reset_io == 0)
1448 return -ENODEV;
1449
1450 LOCK(flags);
1451 MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
1452 (void)MACIO_IN8(reset_io);
1453 udelay(1);
1454 MACIO_OUT8(reset_io, 0);
1455 (void)MACIO_IN8(reset_io);
1456 UNLOCK(flags);
1457
1458 return 0;
1459}
1460#endif /* CONFIG_SMP */
1461
1462/*
1463 * This can be called from pmac_smp so isn't static
1464 *
1465 * This takes the second CPU off the bus on dual CPU machines
1466 * running UP
1467 */
1468void g5_phy_disable_cpu1(void)
1469{
1470 UN_OUT(U3_API_PHY_CONFIG_1, 0);
1471}
1472
1473#endif /* CONFIG_POWER4 */
1474
1475#ifndef CONFIG_POWER4
1476
1477static void
1478keylargo_shutdown(struct macio_chip* macio, int sleep_mode)
1479{
1480 u32 temp;
1481
1482 if (sleep_mode) {
1483 mdelay(1);
1484 MACIO_BIS(KEYLARGO_FCR0, KL0_USB_REF_SUSPEND);
1485 (void)MACIO_IN32(KEYLARGO_FCR0);
1486 mdelay(1);
1487 }
1488
1489 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1490 KL0_SCC_CELL_ENABLE |
1491 KL0_IRDA_ENABLE | KL0_IRDA_CLK32_ENABLE |
1492 KL0_IRDA_CLK19_ENABLE);
1493
1494 MACIO_BIC(KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
1495 MACIO_BIS(KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
1496
1497 MACIO_BIC(KEYLARGO_FCR1,
1498 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1499 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1500 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1501 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1502 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1503 KL1_EIDE0_ENABLE | KL1_EIDE0_RESET_N |
1504 KL1_EIDE1_ENABLE | KL1_EIDE1_RESET_N |
1505 KL1_UIDE_ENABLE);
1506
1507 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1508 MACIO_BIC(KEYLARGO_FCR2, KL2_IOBUS_ENABLE);
1509
1510 temp = MACIO_IN32(KEYLARGO_FCR3);
1511 if (macio->rev >= 2) {
1512 temp |= KL3_SHUTDOWN_PLL2X;
1513 if (sleep_mode)
1514 temp |= KL3_SHUTDOWN_PLL_TOTAL;
1515 }
1516
1517 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1518 KL3_SHUTDOWN_PLLKW35;
1519 if (sleep_mode)
1520 temp |= KL3_SHUTDOWN_PLLKW12;
1521 temp &= ~(KL3_CLK66_ENABLE | KL3_CLK49_ENABLE | KL3_CLK45_ENABLE
1522 | KL3_CLK31_ENABLE | KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1523 if (sleep_mode)
1524 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_VIA_CLK16_ENABLE);
1525 MACIO_OUT32(KEYLARGO_FCR3, temp);
1526
1527 /* Flush posted writes & wait a bit */
1528 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1529}
1530
1531static void
1532pangea_shutdown(struct macio_chip* macio, int sleep_mode)
1533{
1534 u32 temp;
1535
1536 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1537 KL0_SCC_CELL_ENABLE |
1538 KL0_USB0_CELL_ENABLE | KL0_USB1_CELL_ENABLE);
1539
1540 MACIO_BIC(KEYLARGO_FCR1,
1541 KL1_AUDIO_SEL_22MCLK | KL1_AUDIO_CLK_ENABLE_BIT |
1542 KL1_AUDIO_CLK_OUT_ENABLE | KL1_AUDIO_CELL_ENABLE |
1543 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1544 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1545 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE |
1546 KL1_UIDE_ENABLE);
1547 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1548 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1549
1550 MACIO_BIS(KEYLARGO_FCR2, KL2_ALT_DATA_OUT);
1551
1552 temp = MACIO_IN32(KEYLARGO_FCR3);
1553 temp |= KL3_SHUTDOWN_PLLKW6 | KL3_SHUTDOWN_PLLKW4 |
1554 KL3_SHUTDOWN_PLLKW35;
1555 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE | KL3_CLK31_ENABLE
1556 | KL3_I2S0_CLK18_ENABLE | KL3_I2S1_CLK18_ENABLE);
1557 if (sleep_mode)
1558 temp &= ~(KL3_VIA_CLK16_ENABLE | KL3_TIMER_CLK18_ENABLE);
1559 MACIO_OUT32(KEYLARGO_FCR3, temp);
1560
1561 /* Flush posted writes & wait a bit */
1562 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1563}
1564
1565static void
1566intrepid_shutdown(struct macio_chip* macio, int sleep_mode)
1567{
1568 u32 temp;
1569
1570 MACIO_BIC(KEYLARGO_FCR0,KL0_SCCA_ENABLE | KL0_SCCB_ENABLE |
1571 KL0_SCC_CELL_ENABLE);
1572
1573 MACIO_BIC(KEYLARGO_FCR1,
1574 /*KL1_USB2_CELL_ENABLE |*/
1575 KL1_I2S0_CELL_ENABLE | KL1_I2S0_CLK_ENABLE_BIT |
1576 KL1_I2S0_ENABLE | KL1_I2S1_CELL_ENABLE |
1577 KL1_I2S1_CLK_ENABLE_BIT | KL1_I2S1_ENABLE);
1578 if (pmac_mb.board_flags & PMAC_MB_MOBILE)
1579 MACIO_BIC(KEYLARGO_FCR1, KL1_UIDE_RESET_N);
1580
1581 temp = MACIO_IN32(KEYLARGO_FCR3);
1582 temp &= ~(KL3_CLK49_ENABLE | KL3_CLK45_ENABLE |
1583 KL3_I2S1_CLK18_ENABLE | KL3_I2S0_CLK18_ENABLE);
1584 if (sleep_mode)
1585 temp &= ~(KL3_TIMER_CLK18_ENABLE | KL3_IT_VIA_CLK32_ENABLE);
1586 MACIO_OUT32(KEYLARGO_FCR3, temp);
1587
1588 /* Flush posted writes & wait a bit */
1589 (void)MACIO_IN32(KEYLARGO_FCR0);
1590 mdelay(10);
1591}
1592
1593
1594void pmac_tweak_clock_spreading(int enable)
1595{
1596 struct macio_chip* macio = &macio_chips[0];
1597
1598 /* Hack for doing clock spreading on some machines PowerBooks and
1599 * iBooks. This implements the "platform-do-clockspreading" OF
1600 * property as decoded manually on various models. For safety, we also
1601 * check the product ID in the device-tree in cases we'll whack the i2c
1602 * chip to make reasonably sure we won't set wrong values in there
1603 *
1604 * Of course, ultimately, we have to implement a real parser for
1605 * the platform-do-* stuff...
1606 */
1607
1608 if (macio->type == macio_intrepid) {
1609 struct device_node *clock =
1610 of_find_node_by_path("/uni-n@f8000000/hw-clock");
1611 if (clock && get_property(clock, "platform-do-clockspreading",
1612 NULL)) {
1613 printk(KERN_INFO "%sabling clock spreading on Intrepid"
1614 " ASIC\n", enable ? "En" : "Dis");
1615 if (enable)
1616 UN_OUT(UNI_N_CLOCK_SPREADING, 2);
1617 else
1618 UN_OUT(UNI_N_CLOCK_SPREADING, 0);
1619 mdelay(40);
1620 }
1621 of_node_put(clock);
1622 }
1623
1624 while (machine_is_compatible("PowerBook5,2") ||
1625 machine_is_compatible("PowerBook5,3") ||
1626 machine_is_compatible("PowerBook6,2") ||
1627 machine_is_compatible("PowerBook6,3")) {
1628 struct device_node *ui2c = of_find_node_by_type(NULL, "i2c");
1629 struct device_node *dt = of_find_node_by_name(NULL, "device-tree");
1630 u8 buffer[9];
1631 u32 *productID;
1632 int i, rc, changed = 0;
1633
1634 if (dt == NULL)
1635 break;
1636 productID = (u32 *)get_property(dt, "pid#", NULL);
1637 if (productID == NULL)
1638 break;
1639 while(ui2c) {
1640 struct device_node *p = of_get_parent(ui2c);
1641 if (p && !strcmp(p->name, "uni-n"))
1642 break;
1643 ui2c = of_find_node_by_type(ui2c, "i2c");
1644 }
1645 if (ui2c == NULL)
1646 break;
1647 DBG("Trying to bump clock speed for PID: %08x...\n", *productID);
1648 rc = pmac_low_i2c_open(ui2c, 1);
1649 if (rc != 0)
1650 break;
1651 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined);
1652 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9);
1653 DBG("read result: %d,", rc);
1654 if (rc != 0) {
1655 pmac_low_i2c_close(ui2c);
1656 break;
1657 }
1658 for (i=0; i<9; i++)
1659 DBG(" %02x", buffer[i]);
1660 DBG("\n");
1661
1662 switch(*productID) {
1663 case 0x1182: /* AlBook 12" rev 2 */
1664 case 0x1183: /* iBook G4 12" */
1665 buffer[0] = (buffer[0] & 0x8f) | 0x70;
1666 buffer[2] = (buffer[2] & 0x7f) | 0x00;
1667 buffer[5] = (buffer[5] & 0x80) | 0x31;
1668 buffer[6] = (buffer[6] & 0x40) | 0xb0;
1669 buffer[7] = (buffer[7] & 0x00) | (enable ? 0xc0 : 0xba);
1670 buffer[8] = (buffer[8] & 0x00) | 0x30;
1671 changed = 1;
1672 break;
1673 case 0x3142: /* AlBook 15" (ATI M10) */
1674 case 0x3143: /* AlBook 17" (ATI M10) */
1675 buffer[0] = (buffer[0] & 0xaf) | 0x50;
1676 buffer[2] = (buffer[2] & 0x7f) | 0x00;
1677 buffer[5] = (buffer[5] & 0x80) | 0x31;
1678 buffer[6] = (buffer[6] & 0x40) | 0xb0;
1679 buffer[7] = (buffer[7] & 0x00) | (enable ? 0xd0 : 0xc0);
1680 buffer[8] = (buffer[8] & 0x00) | 0x30;
1681 changed = 1;
1682 break;
1683 default:
1684 DBG("i2c-hwclock: Machine model not handled\n");
1685 break;
1686 }
1687 if (!changed) {
1688 pmac_low_i2c_close(ui2c);
1689 break;
1690 }
1691 printk(KERN_INFO "%sabling clock spreading on i2c clock chip\n",
1692 enable ? "En" : "Dis");
1693 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_stdsub);
1694 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_write, 0x80, buffer, 9);
1695 DBG("write result: %d,", rc);
1696 pmac_low_i2c_setmode(ui2c, pmac_low_i2c_mode_combined);
1697 rc = pmac_low_i2c_xfer(ui2c, 0xd2 | pmac_low_i2c_read, 0x80, buffer, 9);
1698 DBG("read result: %d,", rc);
1699 if (rc != 0) {
1700 pmac_low_i2c_close(ui2c);
1701 break;
1702 }
1703 for (i=0; i<9; i++)
1704 DBG(" %02x", buffer[i]);
1705 pmac_low_i2c_close(ui2c);
1706 break;
1707 }
1708}
1709
1710
1711static int
1712core99_sleep(void)
1713{
1714 struct macio_chip* macio;
1715 int i;
1716
1717 macio = &macio_chips[0];
1718 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1719 macio->type != macio_intrepid)
1720 return -ENODEV;
1721
1722 /* We power off the wireless slot in case it was not done
1723 * by the driver. We don't power it on automatically however
1724 */
1725 if (macio->flags & MACIO_FLAG_AIRPORT_ON)
1726 core99_airport_enable(macio->of_node, 0, 0);
1727
1728 /* We power off the FW cable. Should be done by the driver... */
1729 if (macio->flags & MACIO_FLAG_FW_SUPPORTED) {
1730 core99_firewire_enable(NULL, 0, 0);
1731 core99_firewire_cable_power(NULL, 0, 0);
1732 }
1733
1734 /* We make sure int. modem is off (in case driver lost it) */
1735 if (macio->type == macio_keylargo)
1736 core99_modem_enable(macio->of_node, 0, 0);
1737 else
1738 pangea_modem_enable(macio->of_node, 0, 0);
1739
1740 /* We make sure the sound is off as well */
1741 core99_sound_chip_enable(macio->of_node, 0, 0);
1742
1743 /*
1744 * Save various bits of KeyLargo
1745 */
1746
1747 /* Save the state of the various GPIOs */
1748 save_gpio_levels[0] = MACIO_IN32(KEYLARGO_GPIO_LEVELS0);
1749 save_gpio_levels[1] = MACIO_IN32(KEYLARGO_GPIO_LEVELS1);
1750 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1751 save_gpio_extint[i] = MACIO_IN8(KEYLARGO_GPIO_EXTINT_0+i);
1752 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1753 save_gpio_normal[i] = MACIO_IN8(KEYLARGO_GPIO_0+i);
1754
1755 /* Save the FCRs */
1756 if (macio->type == macio_keylargo)
1757 save_mbcr = MACIO_IN32(KEYLARGO_MBCR);
1758 save_fcr[0] = MACIO_IN32(KEYLARGO_FCR0);
1759 save_fcr[1] = MACIO_IN32(KEYLARGO_FCR1);
1760 save_fcr[2] = MACIO_IN32(KEYLARGO_FCR2);
1761 save_fcr[3] = MACIO_IN32(KEYLARGO_FCR3);
1762 save_fcr[4] = MACIO_IN32(KEYLARGO_FCR4);
1763 if (macio->type == macio_pangea || macio->type == macio_intrepid)
1764 save_fcr[5] = MACIO_IN32(KEYLARGO_FCR5);
1765
1766 /* Save state & config of DBDMA channels */
1767 dbdma_save(macio, save_dbdma);
1768
1769 /*
1770 * Turn off as much as we can
1771 */
1772 if (macio->type == macio_pangea)
1773 pangea_shutdown(macio, 1);
1774 else if (macio->type == macio_intrepid)
1775 intrepid_shutdown(macio, 1);
1776 else if (macio->type == macio_keylargo)
1777 keylargo_shutdown(macio, 1);
1778
1779 /*
1780 * Put the host bridge to sleep
1781 */
1782
1783 save_unin_clock_ctl = UN_IN(UNI_N_CLOCK_CNTL);
1784 /* Note: do not switch GMAC off, driver does it when necessary, WOL must keep it
1785 * enabled !
1786 */
1787 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl &
1788 ~(/*UNI_N_CLOCK_CNTL_GMAC|*/UNI_N_CLOCK_CNTL_FW/*|UNI_N_CLOCK_CNTL_PCI*/));
1789 udelay(100);
1790 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1791 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_SLEEP);
1792 mdelay(10);
1793
1794 /*
1795 * FIXME: A bit of black magic with OpenPIC (don't ask me why)
1796 */
1797 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1798 MACIO_BIS(0x506e0, 0x00400000);
1799 MACIO_BIS(0x506e0, 0x80000000);
1800 }
1801 return 0;
1802}
1803
1804static int
1805core99_wake_up(void)
1806{
1807 struct macio_chip* macio;
1808 int i;
1809
1810 macio = &macio_chips[0];
1811 if (macio->type != macio_keylargo && macio->type != macio_pangea &&
1812 macio->type != macio_intrepid)
1813 return -ENODEV;
1814
1815 /*
1816 * Wakeup the host bridge
1817 */
1818 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1819 udelay(10);
1820 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1821 udelay(10);
1822
1823 /*
1824 * Restore KeyLargo
1825 */
1826
1827 if (macio->type == macio_keylargo) {
1828 MACIO_OUT32(KEYLARGO_MBCR, save_mbcr);
1829 (void)MACIO_IN32(KEYLARGO_MBCR); udelay(10);
1830 }
1831 MACIO_OUT32(KEYLARGO_FCR0, save_fcr[0]);
1832 (void)MACIO_IN32(KEYLARGO_FCR0); udelay(10);
1833 MACIO_OUT32(KEYLARGO_FCR1, save_fcr[1]);
1834 (void)MACIO_IN32(KEYLARGO_FCR1); udelay(10);
1835 MACIO_OUT32(KEYLARGO_FCR2, save_fcr[2]);
1836 (void)MACIO_IN32(KEYLARGO_FCR2); udelay(10);
1837 MACIO_OUT32(KEYLARGO_FCR3, save_fcr[3]);
1838 (void)MACIO_IN32(KEYLARGO_FCR3); udelay(10);
1839 MACIO_OUT32(KEYLARGO_FCR4, save_fcr[4]);
1840 (void)MACIO_IN32(KEYLARGO_FCR4); udelay(10);
1841 if (macio->type == macio_pangea || macio->type == macio_intrepid) {
1842 MACIO_OUT32(KEYLARGO_FCR5, save_fcr[5]);
1843 (void)MACIO_IN32(KEYLARGO_FCR5); udelay(10);
1844 }
1845
1846 dbdma_restore(macio, save_dbdma);
1847
1848 MACIO_OUT32(KEYLARGO_GPIO_LEVELS0, save_gpio_levels[0]);
1849 MACIO_OUT32(KEYLARGO_GPIO_LEVELS1, save_gpio_levels[1]);
1850 for (i=0; i<KEYLARGO_GPIO_EXTINT_CNT; i++)
1851 MACIO_OUT8(KEYLARGO_GPIO_EXTINT_0+i, save_gpio_extint[i]);
1852 for (i=0; i<KEYLARGO_GPIO_CNT; i++)
1853 MACIO_OUT8(KEYLARGO_GPIO_0+i, save_gpio_normal[i]);
1854
1855 /* FIXME more black magic with OpenPIC ... */
1856 if (pmac_mb.model_id == PMAC_TYPE_SAWTOOTH) {
1857 MACIO_BIC(0x506e0, 0x00400000);
1858 MACIO_BIC(0x506e0, 0x80000000);
1859 }
1860
1861 UN_OUT(UNI_N_CLOCK_CNTL, save_unin_clock_ctl);
1862 udelay(100);
1863
1864 return 0;
1865}
1866
1867static long
1868core99_sleep_state(struct device_node* node, long param, long value)
1869{
1870 /* Param == 1 means to enter the "fake sleep" mode that is
1871 * used for CPU speed switch
1872 */
1873 if (param == 1) {
1874 if (value == 1) {
1875 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_SLEEPING);
1876 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_IDLE2);
1877 } else {
1878 UN_OUT(UNI_N_POWER_MGT, UNI_N_POWER_MGT_NORMAL);
1879 udelay(10);
1880 UN_OUT(UNI_N_HWINIT_STATE, UNI_N_HWINIT_STATE_RUNNING);
1881 udelay(10);
1882 }
1883 return 0;
1884 }
1885 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
1886 return -EPERM;
1887
1888 if (value == 1)
1889 return core99_sleep();
1890 else if (value == 0)
1891 return core99_wake_up();
1892 return 0;
1893}
1894
1895#endif /* CONFIG_POWER4 */
1896
1897static long
1898generic_dev_can_wake(struct device_node* node, long param, long value)
1899{
1900 /* Todo: eventually check we are really dealing with on-board
1901 * video device ...
1902 */
1903
1904 if (pmac_mb.board_flags & PMAC_MB_MAY_SLEEP)
1905 pmac_mb.board_flags |= PMAC_MB_CAN_SLEEP;
1906 return 0;
1907}
1908
1909static long
1910generic_get_mb_info(struct device_node* node, long param, long value)
1911{
1912 switch(param) {
1913 case PMAC_MB_INFO_MODEL:
1914 return pmac_mb.model_id;
1915 case PMAC_MB_INFO_FLAGS:
1916 return pmac_mb.board_flags;
1917 case PMAC_MB_INFO_NAME:
1918 /* hack hack hack... but should work */
1919 *((const char **)value) = pmac_mb.model_name;
1920 return 0;
1921 }
1922 return -EINVAL;
1923}
1924
1925
1926/*
1927 * Table definitions
1928 */
1929
1930/* Used on any machine
1931 */
1932static struct feature_table_entry any_features[] = {
1933 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
1934 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake },
1935 { 0, NULL }
1936};
1937
1938#ifndef CONFIG_POWER4
1939
1940/* OHare based motherboards. Currently, we only use these on the
1941 * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1942 * to have issues with turning on/off those asic cells
1943 */
1944static struct feature_table_entry ohare_features[] = {
1945 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1946 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable },
1947 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable },
1948 { PMAC_FTR_IDE_ENABLE, ohare_ide_enable},
1949 { PMAC_FTR_IDE_RESET, ohare_ide_reset},
1950 { PMAC_FTR_SLEEP_STATE, ohare_sleep_state },
1951 { 0, NULL }
1952};
1953
1954/* Heathrow desktop machines (Beige G3).
1955 * Separated as some features couldn't be properly tested
1956 * and the serial port control bits appear to confuse it.
1957 */
1958static struct feature_table_entry heathrow_desktop_features[] = {
1959 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1960 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1961 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1962 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1963 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1964 { 0, NULL }
1965};
1966
1967/* Heathrow based laptop, that is the Wallstreet and mainstreet
1968 * powerbooks.
1969 */
1970static struct feature_table_entry heathrow_laptop_features[] = {
1971 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1972 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1973 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1974 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1975 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1976 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1977 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1978 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1979 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1980 { 0, NULL }
1981};
1982
1983/* Paddington based machines
1984 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1985 */
1986static struct feature_table_entry paddington_features[] = {
1987 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1988 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1989 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1990 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1991 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
1992 { PMAC_FTR_IDE_RESET, heathrow_ide_reset },
1993 { PMAC_FTR_BMAC_ENABLE, heathrow_bmac_enable },
1994 { PMAC_FTR_SOUND_CHIP_ENABLE, heathrow_sound_enable },
1995 { PMAC_FTR_SLEEP_STATE, heathrow_sleep_state },
1996 { 0, NULL }
1997};
1998
1999/* Core99 & MacRISC 2 machines (all machines released since the
2000 * iBook (included), that is all AGP machines, except pangea
2001 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
2002 * used on iBook2 & iMac "flow power".
2003 */
2004static struct feature_table_entry core99_features[] = {
2005 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2006 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable },
2007 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2008 { PMAC_FTR_IDE_RESET, core99_ide_reset },
2009 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2010 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2011 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
2012 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
2013 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2014 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2015 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2016 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2017#ifdef CONFIG_SMP
2018 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
2019#endif /* CONFIG_SMP */
2020 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2021 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2022 { 0, NULL }
2023};
2024
2025/* RackMac
2026 */
2027static struct feature_table_entry rackmac_features[] = {
2028 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2029 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2030 { PMAC_FTR_IDE_RESET, core99_ide_reset },
2031 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2032 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2033 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2034 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2035 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2036 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2037#ifdef CONFIG_SMP
2038 { PMAC_FTR_RESET_CPU, core99_reset_cpu },
2039#endif /* CONFIG_SMP */
2040 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2041 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2042 { 0, NULL }
2043};
2044
2045/* Pangea features
2046 */
2047static struct feature_table_entry pangea_features[] = {
2048 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2049 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2050 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2051 { PMAC_FTR_IDE_RESET, core99_ide_reset },
2052 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2053 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2054 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
2055 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
2056 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2057 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2058 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2059 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2060 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2061 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2062 { 0, NULL }
2063};
2064
2065/* Intrepid features
2066 */
2067static struct feature_table_entry intrepid_features[] = {
2068 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2069 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2070 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2071 { PMAC_FTR_IDE_RESET, core99_ide_reset },
2072 { PMAC_FTR_GMAC_ENABLE, core99_gmac_enable },
2073 { PMAC_FTR_GMAC_PHY_RESET, core99_gmac_phy_reset },
2074 { PMAC_FTR_SOUND_CHIP_ENABLE, core99_sound_chip_enable },
2075 { PMAC_FTR_AIRPORT_ENABLE, core99_airport_enable },
2076 { PMAC_FTR_USB_ENABLE, core99_usb_enable },
2077 { PMAC_FTR_1394_ENABLE, core99_firewire_enable },
2078 { PMAC_FTR_1394_CABLE_POWER, core99_firewire_cable_power },
2079 { PMAC_FTR_SLEEP_STATE, core99_sleep_state },
2080 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2081 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2082 { PMAC_FTR_AACK_DELAY_ENABLE, intrepid_aack_delay_enable },
2083 { 0, NULL }
2084};
2085
2086#else /* CONFIG_POWER4 */
2087
2088/* G5 features
2089 */
2090static struct feature_table_entry g5_features[] = {
2091 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
2092 { PMAC_FTR_1394_ENABLE, g5_fw_enable },
2093 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
2094#ifdef CONFIG_SMP
2095 { PMAC_FTR_RESET_CPU, g5_reset_cpu },
2096#endif /* CONFIG_SMP */
2097 { PMAC_FTR_READ_GPIO, core99_read_gpio },
2098 { PMAC_FTR_WRITE_GPIO, core99_write_gpio },
2099 { 0, NULL }
2100};
2101
2102#endif /* CONFIG_POWER4 */
2103
2104static struct pmac_mb_def pmac_mb_defs[] = {
2105#ifndef CONFIG_POWER4
2106 /*
2107 * Desktops
2108 */
2109
2110 { "AAPL,8500", "PowerMac 8500/8600",
2111 PMAC_TYPE_PSURGE, NULL,
2112 0
2113 },
2114 { "AAPL,9500", "PowerMac 9500/9600",
2115 PMAC_TYPE_PSURGE, NULL,
2116 0
2117 },
2118 { "AAPL,7200", "PowerMac 7200",
2119 PMAC_TYPE_PSURGE, NULL,
2120 0
2121 },
2122 { "AAPL,7300", "PowerMac 7200/7300",
2123 PMAC_TYPE_PSURGE, NULL,
2124 0
2125 },
2126 { "AAPL,7500", "PowerMac 7500",
2127 PMAC_TYPE_PSURGE, NULL,
2128 0
2129 },
2130 { "AAPL,ShinerESB", "Apple Network Server",
2131 PMAC_TYPE_ANS, NULL,
2132 0
2133 },
2134 { "AAPL,e407", "Alchemy",
2135 PMAC_TYPE_ALCHEMY, NULL,
2136 0
2137 },
2138 { "AAPL,e411", "Gazelle",
2139 PMAC_TYPE_GAZELLE, NULL,
2140 0
2141 },
2142 { "AAPL,Gossamer", "PowerMac G3 (Gossamer)",
2143 PMAC_TYPE_GOSSAMER, heathrow_desktop_features,
2144 0
2145 },
2146 { "AAPL,PowerMac G3", "PowerMac G3 (Silk)",
2147 PMAC_TYPE_SILK, heathrow_desktop_features,
2148 0
2149 },
2150 { "PowerMac1,1", "Blue&White G3",
2151 PMAC_TYPE_YOSEMITE, paddington_features,
2152 0
2153 },
2154 { "PowerMac1,2", "PowerMac G4 PCI Graphics",
2155 PMAC_TYPE_YIKES, paddington_features,
2156 0
2157 },
2158 { "PowerMac2,1", "iMac FireWire",
2159 PMAC_TYPE_FW_IMAC, core99_features,
2160 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2161 },
2162 { "PowerMac2,2", "iMac FireWire",
2163 PMAC_TYPE_FW_IMAC, core99_features,
2164 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2165 },
2166 { "PowerMac3,1", "PowerMac G4 AGP Graphics",
2167 PMAC_TYPE_SAWTOOTH, core99_features,
2168 PMAC_MB_OLD_CORE99
2169 },
2170 { "PowerMac3,2", "PowerMac G4 AGP Graphics",
2171 PMAC_TYPE_SAWTOOTH, core99_features,
2172 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2173 },
2174 { "PowerMac3,3", "PowerMac G4 AGP Graphics",
2175 PMAC_TYPE_SAWTOOTH, core99_features,
2176 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2177 },
2178 { "PowerMac3,4", "PowerMac G4 Silver",
2179 PMAC_TYPE_QUICKSILVER, core99_features,
2180 PMAC_MB_MAY_SLEEP
2181 },
2182 { "PowerMac3,5", "PowerMac G4 Silver",
2183 PMAC_TYPE_QUICKSILVER, core99_features,
2184 PMAC_MB_MAY_SLEEP
2185 },
2186 { "PowerMac3,6", "PowerMac G4 Windtunnel",
2187 PMAC_TYPE_WINDTUNNEL, core99_features,
2188 PMAC_MB_MAY_SLEEP,
2189 },
2190 { "PowerMac4,1", "iMac \"Flower Power\"",
2191 PMAC_TYPE_PANGEA_IMAC, pangea_features,
2192 PMAC_MB_MAY_SLEEP
2193 },
2194 { "PowerMac4,2", "Flat panel iMac",
2195 PMAC_TYPE_FLAT_PANEL_IMAC, pangea_features,
2196 PMAC_MB_CAN_SLEEP
2197 },
2198 { "PowerMac4,4", "eMac",
2199 PMAC_TYPE_EMAC, core99_features,
2200 PMAC_MB_MAY_SLEEP
2201 },
2202 { "PowerMac5,1", "PowerMac G4 Cube",
2203 PMAC_TYPE_CUBE, core99_features,
2204 PMAC_MB_MAY_SLEEP | PMAC_MB_OLD_CORE99
2205 },
2206 { "PowerMac6,1", "Flat panel iMac",
2207 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2208 PMAC_MB_MAY_SLEEP,
2209 },
2210 { "PowerMac6,3", "Flat panel iMac",
2211 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2212 PMAC_MB_MAY_SLEEP,
2213 },
2214 { "PowerMac6,4", "eMac",
2215 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2216 PMAC_MB_MAY_SLEEP,
2217 },
2218 { "PowerMac10,1", "Mac mini",
2219 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2220 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER,
2221 },
2222 { "iMac,1", "iMac (first generation)",
2223 PMAC_TYPE_ORIG_IMAC, paddington_features,
2224 0
2225 },
2226
2227 /*
2228 * Xserve's
2229 */
2230
2231 { "RackMac1,1", "XServe",
2232 PMAC_TYPE_RACKMAC, rackmac_features,
2233 0,
2234 },
2235 { "RackMac1,2", "XServe rev. 2",
2236 PMAC_TYPE_RACKMAC, rackmac_features,
2237 0,
2238 },
2239
2240 /*
2241 * Laptops
2242 */
2243
2244 { "AAPL,3400/2400", "PowerBook 3400",
2245 PMAC_TYPE_HOOPER, ohare_features,
2246 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2247 },
2248 { "AAPL,3500", "PowerBook 3500",
2249 PMAC_TYPE_KANGA, ohare_features,
2250 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2251 },
2252 { "AAPL,PowerBook1998", "PowerBook Wallstreet",
2253 PMAC_TYPE_WALLSTREET, heathrow_laptop_features,
2254 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2255 },
2256 { "PowerBook1,1", "PowerBook 101 (Lombard)",
2257 PMAC_TYPE_101_PBOOK, paddington_features,
2258 PMAC_MB_CAN_SLEEP | PMAC_MB_MOBILE
2259 },
2260 { "PowerBook2,1", "iBook (first generation)",
2261 PMAC_TYPE_ORIG_IBOOK, core99_features,
2262 PMAC_MB_CAN_SLEEP | PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2263 },
2264 { "PowerBook2,2", "iBook FireWire",
2265 PMAC_TYPE_FW_IBOOK, core99_features,
2266 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2267 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2268 },
2269 { "PowerBook3,1", "PowerBook Pismo",
2270 PMAC_TYPE_PISMO, core99_features,
2271 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER |
2272 PMAC_MB_OLD_CORE99 | PMAC_MB_MOBILE
2273 },
2274 { "PowerBook3,2", "PowerBook Titanium",
2275 PMAC_TYPE_TITANIUM, core99_features,
2276 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2277 },
2278 { "PowerBook3,3", "PowerBook Titanium II",
2279 PMAC_TYPE_TITANIUM2, core99_features,
2280 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2281 },
2282 { "PowerBook3,4", "PowerBook Titanium III",
2283 PMAC_TYPE_TITANIUM3, core99_features,
2284 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2285 },
2286 { "PowerBook3,5", "PowerBook Titanium IV",
2287 PMAC_TYPE_TITANIUM4, core99_features,
2288 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2289 },
2290 { "PowerBook4,1", "iBook 2",
2291 PMAC_TYPE_IBOOK2, pangea_features,
2292 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2293 },
2294 { "PowerBook4,2", "iBook 2",
2295 PMAC_TYPE_IBOOK2, pangea_features,
2296 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2297 },
2298 { "PowerBook4,3", "iBook 2 rev. 2",
2299 PMAC_TYPE_IBOOK2, pangea_features,
2300 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE
2301 },
2302 { "PowerBook5,1", "PowerBook G4 17\"",
2303 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2304 PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2305 },
2306 { "PowerBook5,2", "PowerBook G4 15\"",
2307 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2308 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2309 },
2310 { "PowerBook5,3", "PowerBook G4 17\"",
2311 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2312 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2313 },
2314 { "PowerBook5,4", "PowerBook G4 15\"",
2315 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2316 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2317 },
2318 { "PowerBook5,5", "PowerBook G4 17\"",
2319 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2320 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2321 },
2322 { "PowerBook5,6", "PowerBook G4 15\"",
2323 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2324 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2325 },
2326 { "PowerBook5,7", "PowerBook G4 17\"",
2327 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2328 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2329 },
2330 { "PowerBook5,8", "PowerBook G4 15\"",
2331 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2332 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2333 },
2334 { "PowerBook5,9", "PowerBook G4 17\"",
2335 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2336 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2337 },
2338 { "PowerBook6,1", "PowerBook G4 12\"",
2339 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2340 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2341 },
2342 { "PowerBook6,2", "PowerBook G4",
2343 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2344 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2345 },
2346 { "PowerBook6,3", "iBook G4",
2347 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2348 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2349 },
2350 { "PowerBook6,4", "PowerBook G4 12\"",
2351 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2352 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2353 },
2354 { "PowerBook6,5", "iBook G4",
2355 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2356 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2357 },
2358 { "PowerBook6,7", "iBook G4",
2359 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2360 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2361 },
2362 { "PowerBook6,8", "PowerBook G4 12\"",
2363 PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features,
2364 PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE,
2365 },
2366#else /* CONFIG_POWER4 */
2367 { "PowerMac7,2", "PowerMac G5",
2368 PMAC_TYPE_POWERMAC_G5, g5_features,
2369 0,
2370 },
2371#endif /* CONFIG_POWER4 */
2372};
2373
2374/*
2375 * The toplevel feature_call callback
2376 */
2377long
2378pmac_do_feature_call(unsigned int selector, ...)
2379{
2380 struct device_node* node;
2381 long param, value;
2382 int i;
2383 feature_call func = NULL;
2384 va_list args;
2385
2386 if (pmac_mb.features)
2387 for (i=0; pmac_mb.features[i].function; i++)
2388 if (pmac_mb.features[i].selector == selector) {
2389 func = pmac_mb.features[i].function;
2390 break;
2391 }
2392 if (!func)
2393 for (i=0; any_features[i].function; i++)
2394 if (any_features[i].selector == selector) {
2395 func = any_features[i].function;
2396 break;
2397 }
2398 if (!func)
2399 return -ENODEV;
2400
2401 va_start(args, selector);
2402 node = (struct device_node*)va_arg(args, void*);
2403 param = va_arg(args, long);
2404 value = va_arg(args, long);
2405 va_end(args);
2406
2407 return func(node, param, value);
2408}
2409
2410static int __init
2411probe_motherboard(void)
2412{
2413 int i;
2414 struct macio_chip* macio = &macio_chips[0];
2415 const char* model = NULL;
2416 struct device_node *dt;
2417
2418 /* Lookup known motherboard type in device-tree. First try an
2419 * exact match on the "model" property, then try a "compatible"
2420 * match is none is found.
2421 */
2422 dt = find_devices("device-tree");
2423 if (dt != NULL)
2424 model = (const char *) get_property(dt, "model", NULL);
2425 for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2426 if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
2427 pmac_mb = pmac_mb_defs[i];
2428 goto found;
2429 }
2430 }
2431 for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
2432 if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
2433 pmac_mb = pmac_mb_defs[i];
2434 goto found;
2435 }
2436 }
2437
2438 /* Fallback to selection depending on mac-io chip type */
2439 switch(macio->type) {
2440#ifndef CONFIG_POWER4
2441 case macio_grand_central:
2442 pmac_mb.model_id = PMAC_TYPE_PSURGE;
2443 pmac_mb.model_name = "Unknown PowerSurge";
2444 break;
2445 case macio_ohare:
2446 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_OHARE;
2447 pmac_mb.model_name = "Unknown OHare-based";
2448 break;
2449 case macio_heathrow:
2450 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_HEATHROW;
2451 pmac_mb.model_name = "Unknown Heathrow-based";
2452 pmac_mb.features = heathrow_desktop_features;
2453 break;
2454 case macio_paddington:
2455 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PADDINGTON;
2456 pmac_mb.model_name = "Unknown Paddington-based";
2457 pmac_mb.features = paddington_features;
2458 break;
2459 case macio_keylargo:
2460 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_CORE99;
2461 pmac_mb.model_name = "Unknown Keylargo-based";
2462 pmac_mb.features = core99_features;
2463 break;
2464 case macio_pangea:
2465 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_PANGEA;
2466 pmac_mb.model_name = "Unknown Pangea-based";
2467 pmac_mb.features = pangea_features;
2468 break;
2469 case macio_intrepid:
2470 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_INTREPID;
2471 pmac_mb.model_name = "Unknown Intrepid-based";
2472 pmac_mb.features = intrepid_features;
2473 break;
2474#else /* CONFIG_POWER4 */
2475 case macio_keylargo2:
2476 pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
2477 pmac_mb.model_name = "Unknown G5";
2478 pmac_mb.features = g5_features;
2479 break;
2480#endif /* CONFIG_POWER4 */
2481 default:
2482 return -ENODEV;
2483 }
2484found:
2485#ifndef CONFIG_POWER4
2486 /* Fixup Hooper vs. Comet */
2487 if (pmac_mb.model_id == PMAC_TYPE_HOOPER) {
2488 u32 __iomem * mach_id_ptr = ioremap(0xf3000034, 4);
2489 if (!mach_id_ptr)
2490 return -ENODEV;
2491 /* Here, I used to disable the media-bay on comet. It
2492 * appears this is wrong, the floppy connector is actually
2493 * a kind of media-bay and works with the current driver.
2494 */
2495 if (__raw_readl(mach_id_ptr) & 0x20000000UL)
2496 pmac_mb.model_id = PMAC_TYPE_COMET;
2497 iounmap(mach_id_ptr);
2498 }
2499#endif /* CONFIG_POWER4 */
2500
2501#ifdef CONFIG_6xx
2502 /* Set default value of powersave_nap on machines that support it.
2503 * It appears that uninorth rev 3 has a problem with it, we don't
2504 * enable it on those. In theory, the flush-on-lock property is
2505 * supposed to be set when not supported, but I'm not very confident
2506 * that all Apple OF revs did it properly, I do it the paranoid way.
2507 */
2508 while (uninorth_base && uninorth_rev > 3) {
2509 struct device_node* np = find_path_device("/cpus");
2510 if (!np || !np->child) {
2511 printk(KERN_WARNING "Can't find CPU(s) in device tree !\n");
2512 break;
2513 }
2514 np = np->child;
2515 /* Nap mode not supported on SMP */
2516 if (np->sibling)
2517 break;
2518 /* Nap mode not supported if flush-on-lock property is present */
2519 if (get_property(np, "flush-on-lock", NULL))
2520 break;
2521 powersave_nap = 1;
2522 printk(KERN_INFO "Processor NAP mode on idle enabled.\n");
2523 break;
2524 }
2525
2526 /* On CPUs that support it (750FX), lowspeed by default during
2527 * NAP mode
2528 */
2529 powersave_lowspeed = 1;
2530#endif /* CONFIG_6xx */
2531#ifdef CONFIG_POWER4
2532 powersave_nap = 1;
2533#endif
2534 /* Check for "mobile" machine */
2535 if (model && (strncmp(model, "PowerBook", 9) == 0
2536 || strncmp(model, "iBook", 5) == 0))
2537 pmac_mb.board_flags |= PMAC_MB_MOBILE;
2538
2539
2540 printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
2541 return 0;
2542}
2543
2544/* Initialize the Core99 UniNorth host bridge and memory controller
2545 */
2546static void __init
2547probe_uninorth(void)
2548{
2549 unsigned long actrl;
2550
2551 /* Locate core99 Uni-N */
2552 uninorth_node = of_find_node_by_name(NULL, "uni-n");
2553 /* Locate G5 u3 */
2554 if (uninorth_node == NULL) {
2555 uninorth_node = of_find_node_by_name(NULL, "u3");
2556 uninorth_u3 = 1;
2557 }
2558 if (uninorth_node && uninorth_node->n_addrs > 0) {
2559 unsigned long address = uninorth_node->addrs[0].address;
2560 uninorth_base = ioremap(address, 0x40000);
2561 uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
2562 if (uninorth_u3)
2563 u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
2564 } else
2565 uninorth_node = NULL;
2566
2567 if (!uninorth_node)
2568 return;
2569
2570 printk(KERN_INFO "Found %s memory controller & host bridge, revision: %d\n",
2571 uninorth_u3 ? "U3" : "UniNorth", uninorth_rev);
2572 printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
2573
2574 /* Set the arbitrer QAck delay according to what Apple does
2575 */
2576 if (uninorth_rev < 0x11) {
2577 actrl = UN_IN(UNI_N_ARB_CTRL) & ~UNI_N_ARB_CTRL_QACK_DELAY_MASK;
2578 actrl |= ((uninorth_rev < 3) ? UNI_N_ARB_CTRL_QACK_DELAY105 :
2579 UNI_N_ARB_CTRL_QACK_DELAY) << UNI_N_ARB_CTRL_QACK_DELAY_SHIFT;
2580 UN_OUT(UNI_N_ARB_CTRL, actrl);
2581 }
2582
2583 /* Some more magic as done by them in recent MacOS X on UniNorth
2584 * revs 1.5 to 2.O and Pangea. Seem to toggle the UniN Maxbus/PCI
2585 * memory timeout
2586 */
2587 if ((uninorth_rev >= 0x11 && uninorth_rev <= 0x24) || uninorth_rev == 0xc0)
2588 UN_OUT(0x2160, UN_IN(0x2160) & 0x00ffffff);
2589}
2590
2591static void __init
2592probe_one_macio(const char* name, const char* compat, int type)
2593{
2594 struct device_node* node;
2595 int i;
2596 volatile u32 __iomem * base;
2597 u32* revp;
2598
2599 node = find_devices(name);
2600 if (!node || !node->n_addrs)
2601 return;
2602 if (compat)
2603 do {
2604 if (device_is_compatible(node, compat))
2605 break;
2606 node = node->next;
2607 } while (node);
2608 if (!node)
2609 return;
2610 for(i=0; i<MAX_MACIO_CHIPS; i++) {
2611 if (!macio_chips[i].of_node)
2612 break;
2613 if (macio_chips[i].of_node == node)
2614 return;
2615 }
2616 if (i >= MAX_MACIO_CHIPS) {
2617 printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
2618 printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
2619 return;
2620 }
2621 base = ioremap(node->addrs[0].address, node->addrs[0].size);
2622 if (!base) {
2623 printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n");
2624 return;
2625 }
2626 if (type == macio_keylargo) {
2627 u32* did = (u32 *)get_property(node, "device-id", NULL);
2628 if (*did == 0x00000025)
2629 type = macio_pangea;
2630 if (*did == 0x0000003e)
2631 type = macio_intrepid;
2632 }
2633 macio_chips[i].of_node = node;
2634 macio_chips[i].type = type;
2635 macio_chips[i].base = base;
2636 macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
2637 macio_chips[i].name = macio_names[type];
2638 revp = (u32 *)get_property(node, "revision-id", NULL);
2639 if (revp)
2640 macio_chips[i].rev = *revp;
2641 printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
2642 macio_names[type], macio_chips[i].rev, macio_chips[i].base);
2643}
2644
2645static int __init
2646probe_macios(void)
2647{
2648 /* Warning, ordering is important */
2649 probe_one_macio("gc", NULL, macio_grand_central);
2650 probe_one_macio("ohare", NULL, macio_ohare);
2651 probe_one_macio("pci106b,7", NULL, macio_ohareII);
2652 probe_one_macio("mac-io", "keylargo", macio_keylargo);
2653 probe_one_macio("mac-io", "paddington", macio_paddington);
2654 probe_one_macio("mac-io", "gatwick", macio_gatwick);
2655 probe_one_macio("mac-io", "heathrow", macio_heathrow);
2656 probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
2657
2658 /* Make sure the "main" macio chip appear first */
2659 if (macio_chips[0].type == macio_gatwick
2660 && macio_chips[1].type == macio_heathrow) {
2661 struct macio_chip temp = macio_chips[0];
2662 macio_chips[0] = macio_chips[1];
2663 macio_chips[1] = temp;
2664 }
2665 if (macio_chips[0].type == macio_ohareII
2666 && macio_chips[1].type == macio_ohare) {
2667 struct macio_chip temp = macio_chips[0];
2668 macio_chips[0] = macio_chips[1];
2669 macio_chips[1] = temp;
2670 }
2671 macio_chips[0].lbus.index = 0;
2672 macio_chips[1].lbus.index = 1;
2673
2674 return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
2675}
2676
2677static void __init
2678initial_serial_shutdown(struct device_node* np)
2679{
2680 int len;
2681 struct slot_names_prop {
2682 int count;
2683 char name[1];
2684 } *slots;
2685 char *conn;
2686 int port_type = PMAC_SCC_ASYNC;
2687 int modem = 0;
2688
2689 slots = (struct slot_names_prop *)get_property(np, "slot-names", &len);
2690 conn = get_property(np, "AAPL,connector", &len);
2691 if (conn && (strcmp(conn, "infrared") == 0))
2692 port_type = PMAC_SCC_IRDA;
2693 else if (device_is_compatible(np, "cobalt"))
2694 modem = 1;
2695 else if (slots && slots->count > 0) {
2696 if (strcmp(slots->name, "IrDA") == 0)
2697 port_type = PMAC_SCC_IRDA;
2698 else if (strcmp(slots->name, "Modem") == 0)
2699 modem = 1;
2700 }
2701 if (modem)
2702 pmac_call_feature(PMAC_FTR_MODEM_ENABLE, np, 0, 0);
2703 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np, port_type, 0);
2704}
2705
2706static void __init
2707set_initial_features(void)
2708{
2709 struct device_node* np;
2710
2711 /* That hack appears to be necessary for some StarMax motherboards
2712 * but I'm not too sure it was audited for side-effects on other
2713 * ohare based machines...
2714 * Since I still have difficulties figuring the right way to
2715 * differenciate them all and since that hack was there for a long
2716 * time, I'll keep it around
2717 */
2718 if (macio_chips[0].type == macio_ohare && !find_devices("via-pmu")) {
2719 struct macio_chip* macio = &macio_chips[0];
2720 MACIO_OUT32(OHARE_FCR, STARMAX_FEATURES);
2721 } else if (macio_chips[0].type == macio_ohare) {
2722 struct macio_chip* macio = &macio_chips[0];
2723 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2724 } else if (macio_chips[1].type == macio_ohare) {
2725 struct macio_chip* macio = &macio_chips[1];
2726 MACIO_BIS(OHARE_FCR, OH_IOBUS_ENABLE);
2727 }
2728
2729#ifdef CONFIG_POWER4
2730 if (macio_chips[0].type == macio_keylargo2) {
2731#ifndef CONFIG_SMP
2732 /* On SMP machines running UP, we have the second CPU eating
2733 * bus cycles. We need to take it off the bus. This is done
2734 * from pmac_smp for SMP kernels running on one CPU
2735 */
2736 np = of_find_node_by_type(NULL, "cpu");
2737 if (np != NULL)
2738 np = of_find_node_by_type(np, "cpu");
2739 if (np != NULL) {
2740 g5_phy_disable_cpu1();
2741 of_node_put(np);
2742 }
2743#endif /* CONFIG_SMP */
2744 /* Enable GMAC for now for PCI probing. It will be disabled
2745 * later on after PCI probe
2746 */
2747 np = of_find_node_by_name(NULL, "ethernet");
2748 while(np) {
2749 if (device_is_compatible(np, "K2-GMAC"))
2750 g5_gmac_enable(np, 0, 1);
2751 np = of_find_node_by_name(np, "ethernet");
2752 }
2753
2754 /* Enable FW before PCI probe. Will be disabled later on
2755 * Note: We should have a batter way to check that we are
2756 * dealing with uninorth internal cell and not a PCI cell
2757 * on the external PCI. The code below works though.
2758 */
2759 np = of_find_node_by_name(NULL, "firewire");
2760 while(np) {
2761 if (device_is_compatible(np, "pci106b,5811")) {
2762 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2763 g5_fw_enable(np, 0, 1);
2764 }
2765 np = of_find_node_by_name(np, "firewire");
2766 }
2767 }
2768#else /* CONFIG_POWER4 */
2769
2770 if (macio_chips[0].type == macio_keylargo ||
2771 macio_chips[0].type == macio_pangea ||
2772 macio_chips[0].type == macio_intrepid) {
2773 /* Enable GMAC for now for PCI probing. It will be disabled
2774 * later on after PCI probe
2775 */
2776 np = of_find_node_by_name(NULL, "ethernet");
2777 while(np) {
2778 if (np->parent
2779 && device_is_compatible(np->parent, "uni-north")
2780 && device_is_compatible(np, "gmac"))
2781 core99_gmac_enable(np, 0, 1);
2782 np = of_find_node_by_name(np, "ethernet");
2783 }
2784
2785 /* Enable FW before PCI probe. Will be disabled later on
2786 * Note: We should have a batter way to check that we are
2787 * dealing with uninorth internal cell and not a PCI cell
2788 * on the external PCI. The code below works though.
2789 */
2790 np = of_find_node_by_name(NULL, "firewire");
2791 while(np) {
2792 if (np->parent
2793 && device_is_compatible(np->parent, "uni-north")
2794 && (device_is_compatible(np, "pci106b,18") ||
2795 device_is_compatible(np, "pci106b,30") ||
2796 device_is_compatible(np, "pci11c1,5811"))) {
2797 macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
2798 core99_firewire_enable(np, 0, 1);
2799 }
2800 np = of_find_node_by_name(np, "firewire");
2801 }
2802
2803 /* Enable ATA-100 before PCI probe. */
2804 np = of_find_node_by_name(NULL, "ata-6");
2805 while(np) {
2806 if (np->parent
2807 && device_is_compatible(np->parent, "uni-north")
2808 && device_is_compatible(np, "kauai-ata")) {
2809 core99_ata100_enable(np, 1);
2810 }
2811 np = of_find_node_by_name(np, "ata-6");
2812 }
2813
2814 /* Switch airport off */
2815 np = find_devices("radio");
2816 while(np) {
2817 if (np && np->parent == macio_chips[0].of_node) {
2818 macio_chips[0].flags |= MACIO_FLAG_AIRPORT_ON;
2819 core99_airport_enable(np, 0, 0);
2820 }
2821 np = np->next;
2822 }
2823 }
2824
2825 /* On all machines that support sound PM, switch sound off */
2826 if (macio_chips[0].of_node)
2827 pmac_do_feature_call(PMAC_FTR_SOUND_CHIP_ENABLE,
2828 macio_chips[0].of_node, 0, 0);
2829
2830 /* While on some desktop G3s, we turn it back on */
2831 if (macio_chips[0].of_node && macio_chips[0].type == macio_heathrow
2832 && (pmac_mb.model_id == PMAC_TYPE_GOSSAMER ||
2833 pmac_mb.model_id == PMAC_TYPE_SILK)) {
2834 struct macio_chip* macio = &macio_chips[0];
2835 MACIO_BIS(HEATHROW_FCR, HRW_SOUND_CLK_ENABLE);
2836 MACIO_BIC(HEATHROW_FCR, HRW_SOUND_POWER_N);
2837 }
2838
2839 /* Some machine models need the clock chip to be properly setup for
2840 * clock spreading now. This should be a platform function but we
2841 * don't do these at the moment
2842 */
2843 pmac_tweak_clock_spreading(1);
2844
2845#endif /* CONFIG_POWER4 */
2846
2847 /* On all machines, switch modem & serial ports off */
2848 np = find_devices("ch-a");
2849 while(np) {
2850 initial_serial_shutdown(np);
2851 np = np->next;
2852 }
2853 np = find_devices("ch-b");
2854 while(np) {
2855 initial_serial_shutdown(np);
2856 np = np->next;
2857 }
2858}
2859
2860void __init
2861pmac_feature_init(void)
2862{
2863 /* Detect the UniNorth memory controller */
2864 probe_uninorth();
2865
2866 /* Probe mac-io controllers */
2867 if (probe_macios()) {
2868 printk(KERN_WARNING "No mac-io chip found\n");
2869 return;
2870 }
2871
2872 /* Setup low-level i2c stuffs */
2873 pmac_init_low_i2c();
2874
2875 /* Probe machine type */
2876 if (probe_motherboard())
2877 printk(KERN_WARNING "Unknown PowerMac !\n");
2878
2879 /* Set some initial features (turn off some chips that will
2880 * be later turned on)
2881 */
2882 set_initial_features();
2883}
2884
2885int __init
2886pmac_feature_late_init(void)
2887{
2888 struct device_node* np;
2889
2890 /* Request some resources late */
2891 if (uninorth_node)
2892 request_OF_resource(uninorth_node, 0, NULL);
2893 np = find_devices("hammerhead");
2894 if (np)
2895 request_OF_resource(np, 0, NULL);
2896 np = find_devices("interrupt-controller");
2897 if (np)
2898 request_OF_resource(np, 0, NULL);
2899 return 0;
2900}
2901
2902device_initcall(pmac_feature_late_init);
2903
2904#ifdef CONFIG_POWER4
2905
2906static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
2907{
2908 int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
2909 int bits[8] = { 8,16,0,32,2,4,0,0 };
2910 int freq = (frq >> 8) & 0xf;
2911
2912 if (freqs[freq] == 0)
2913 printk("%s: Unknown HT link frequency %x\n", name, freq);
2914 else
2915 printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
2916 name, freqs[freq],
2917 bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
2918}
2919
2920void __init pmac_check_ht_link(void)
2921{
2922 u32 ufreq, freq, ucfg, cfg;
2923 struct device_node *pcix_node;
2924 u8 px_bus, px_devfn;
2925 struct pci_controller *px_hose;
2926
2927 (void)in_be32(u3_ht + U3_HT_LINK_COMMAND);
2928 ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG);
2929 ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ);
2930 dump_HT_speeds("U3 HyperTransport", cfg, freq);
2931
2932 pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
2933 if (pcix_node == NULL) {
2934 printk("No PCI-X bridge found\n");
2935 return;
2936 }
2937 if (pci_device_from_OF_node(pcix_node, &px_bus, &px_devfn) != 0) {
2938 printk("PCI-X bridge found but not matched to pci\n");
2939 return;
2940 }
2941 px_hose = pci_find_hose_for_OF_device(pcix_node);
2942 if (px_hose == NULL) {
2943 printk("PCI-X bridge found but not matched to host\n");
2944 return;
2945 }
2946 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
2947 early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
2948 dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
2949 early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
2950 early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
2951 dump_HT_speeds("PCI-X HT Downlink", cfg, freq);
2952}
2953
2954#endif /* CONFIG_POWER4 */
2955
2956/*
2957 * Early video resume hook
2958 */
2959
2960static void (*pmac_early_vresume_proc)(void *data);
2961static void *pmac_early_vresume_data;
2962
2963void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2964{
2965 if (_machine != _MACH_Pmac)
2966 return;
2967 preempt_disable();
2968 pmac_early_vresume_proc = proc;
2969 pmac_early_vresume_data = data;
2970 preempt_enable();
2971}
2972EXPORT_SYMBOL(pmac_set_early_video_resume);
2973
2974void pmac_call_early_video_resume(void)
2975{
2976 if (pmac_early_vresume_proc)
2977 pmac_early_vresume_proc(pmac_early_vresume_data);
2978}
2979
2980/*
2981 * AGP related suspend/resume code
2982 */
2983
2984static struct pci_dev *pmac_agp_bridge;
2985static int (*pmac_agp_suspend)(struct pci_dev *bridge);
2986static int (*pmac_agp_resume)(struct pci_dev *bridge);
2987
2988void pmac_register_agp_pm(struct pci_dev *bridge,
2989 int (*suspend)(struct pci_dev *bridge),
2990 int (*resume)(struct pci_dev *bridge))
2991{
2992 if (suspend || resume) {
2993 pmac_agp_bridge = bridge;
2994 pmac_agp_suspend = suspend;
2995 pmac_agp_resume = resume;
2996 return;
2997 }
2998 if (bridge != pmac_agp_bridge)
2999 return;
3000 pmac_agp_suspend = pmac_agp_resume = NULL;
3001 return;
3002}
3003EXPORT_SYMBOL(pmac_register_agp_pm);
3004
3005void pmac_suspend_agp_for_card(struct pci_dev *dev)
3006{
3007 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
3008 return;
3009 if (pmac_agp_bridge->bus != dev->bus)
3010 return;
3011 pmac_agp_suspend(pmac_agp_bridge);
3012}
3013EXPORT_SYMBOL(pmac_suspend_agp_for_card);
3014
3015void pmac_resume_agp_for_card(struct pci_dev *dev)
3016{
3017 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
3018 return;
3019 if (pmac_agp_bridge->bus != dev->bus)
3020 return;
3021 pmac_agp_resume(pmac_agp_bridge);
3022}
3023EXPORT_SYMBOL(pmac_resume_agp_for_card);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 00:23:53 -0500