diff options
Diffstat (limited to 'arch/ppc/platforms/4xx/ibm440ep.h')
-rw-r--r-- | arch/ppc/platforms/4xx/ibm440ep.h | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/arch/ppc/platforms/4xx/ibm440ep.h b/arch/ppc/platforms/4xx/ibm440ep.h new file mode 100644 index 000000000000..97c80b8e3e10 --- /dev/null +++ b/arch/ppc/platforms/4xx/ibm440ep.h | |||
@@ -0,0 +1,76 @@ | |||
1 | /* | ||
2 | * arch/ppc/platforms/4xx/ibm440ep.h | ||
3 | * | ||
4 | * PPC440EP definitions | ||
5 | * | ||
6 | * Wade Farnsworth <wfarnsworth@mvista.com> | ||
7 | * | ||
8 | * Copyright 2002 Roland Dreier | ||
9 | * Copyright 2004 MontaVista Software, Inc. | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify it | ||
12 | * under the terms of the GNU General Public License as published by the | ||
13 | * Free Software Foundation; either version 2 of the License, or (at your | ||
14 | * option) any later version. | ||
15 | * | ||
16 | */ | ||
17 | |||
18 | #ifdef __KERNEL__ | ||
19 | #ifndef __PPC_PLATFORMS_IBM440EP_H | ||
20 | #define __PPC_PLATFORMS_IBM440EP_H | ||
21 | |||
22 | #include <linux/config.h> | ||
23 | #include <asm/ibm44x.h> | ||
24 | |||
25 | /* UART */ | ||
26 | #define PPC440EP_UART0_ADDR 0x0EF600300 | ||
27 | #define PPC440EP_UART1_ADDR 0x0EF600400 | ||
28 | #define PPC440EP_UART2_ADDR 0x0EF600500 | ||
29 | #define PPC440EP_UART3_ADDR 0x0EF600600 | ||
30 | #define UART0_INT 0 | ||
31 | #define UART1_INT 1 | ||
32 | #define UART2_INT 3 | ||
33 | #define UART3_INT 4 | ||
34 | |||
35 | /* Clock and Power Management */ | ||
36 | #define IBM_CPM_IIC0 0x80000000 /* IIC interface */ | ||
37 | #define IBM_CPM_IIC1 0x40000000 /* IIC interface */ | ||
38 | #define IBM_CPM_PCI 0x20000000 /* PCI bridge */ | ||
39 | #define IBM_CPM_USB1H 0x08000000 /* USB 1.1 Host */ | ||
40 | #define IBM_CPM_FPU 0x04000000 /* floating point unit */ | ||
41 | #define IBM_CPM_CPU 0x02000000 /* processor core */ | ||
42 | #define IBM_CPM_DMA 0x01000000 /* DMA controller */ | ||
43 | #define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */ | ||
44 | #define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */ | ||
45 | #define IBM_CPM_EBC 0x00200000 /* External Bus Controller */ | ||
46 | #define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */ | ||
47 | #define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */ | ||
48 | #define IBM_CPM_PLB4 0x00040000 /* PLB4 bus arbiter */ | ||
49 | #define IBM_CPM_PLB4x3 0x00020000 /* PLB4 to PLB3 bridge controller */ | ||
50 | #define IBM_CPM_PLB3x4 0x00010000 /* PLB3 to PLB4 bridge controller */ | ||
51 | #define IBM_CPM_PLB3 0x00008000 /* PLB3 bus arbiter */ | ||
52 | #define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */ | ||
53 | #define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */ | ||
54 | #define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */ | ||
55 | #define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */ | ||
56 | #define IBM_CPM_UART0 0x00000200 /* serial port 0 */ | ||
57 | #define IBM_CPM_UART1 0x00000100 /* serial port 1 */ | ||
58 | #define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */ | ||
59 | #define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */ | ||
60 | #define IBM_CPM_EMAC0 0x00000020 /* ethernet port 0 */ | ||
61 | #define IBM_CPM_EMAC1 0x00000010 /* ethernet port 1 */ | ||
62 | #define IBM_CPM_UART2 0x00000008 /* serial port 2 */ | ||
63 | #define IBM_CPM_UART3 0x00000004 /* serial port 3 */ | ||
64 | #define IBM_CPM_USB2D 0x00000002 /* USB 2.0 Device */ | ||
65 | #define IBM_CPM_USB2H 0x00000001 /* USB 2.0 Host */ | ||
66 | |||
67 | #define DFLT_IBM4xx_PM ~(IBM_CPM_UIC0 | IBM_CPM_UIC1 | IBM_CPM_CPU \ | ||
68 | | IBM_CPM_EBC | IBM_CPM_BGO | IBM_CPM_FPU \ | ||
69 | | IBM_CPM_EBM | IBM_CPM_PLB4 | IBM_CPM_3x4 \ | ||
70 | | IBM_CPM_PLB3 | IBM_CPM_PLB4x3 \ | ||
71 | | IBM_CPM_EMAC0 | IBM_CPM_TMRCLK \ | ||
72 | | IBM_CPM_DMA | IBM_CPM_PCI | IBM_CPM_EMAC1) | ||
73 | |||
74 | |||
75 | #endif /* __PPC_PLATFORMS_IBM440EP_H */ | ||
76 | #endif /* __KERNEL__ */ | ||