diff options
Diffstat (limited to 'arch/ppc/platforms/4xx/bubinga.c')
-rw-r--r-- | arch/ppc/platforms/4xx/bubinga.c | 265 |
1 files changed, 0 insertions, 265 deletions
diff --git a/arch/ppc/platforms/4xx/bubinga.c b/arch/ppc/platforms/4xx/bubinga.c deleted file mode 100644 index cd696be55aca..000000000000 --- a/arch/ppc/platforms/4xx/bubinga.c +++ /dev/null | |||
@@ -1,265 +0,0 @@ | |||
1 | /* | ||
2 | * Support for IBM PPC 405EP evaluation board (Bubinga). | ||
3 | * | ||
4 | * Author: SAW (IBM), derived from walnut.c. | ||
5 | * Maintained by MontaVista Software <source@mvista.com> | ||
6 | * | ||
7 | * 2003 (c) MontaVista Softare Inc. This file is licensed under the | ||
8 | * terms of the GNU General Public License version 2. This program is | ||
9 | * licensed "as is" without any warranty of any kind, whether express | ||
10 | * or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/smp.h> | ||
15 | #include <linux/threads.h> | ||
16 | #include <linux/param.h> | ||
17 | #include <linux/string.h> | ||
18 | #include <linux/blkdev.h> | ||
19 | #include <linux/pci.h> | ||
20 | #include <linux/rtc.h> | ||
21 | #include <linux/tty.h> | ||
22 | #include <linux/serial.h> | ||
23 | #include <linux/serial_core.h> | ||
24 | #include <linux/serial_8250.h> | ||
25 | |||
26 | #include <asm/system.h> | ||
27 | #include <asm/pci-bridge.h> | ||
28 | #include <asm/processor.h> | ||
29 | #include <asm/machdep.h> | ||
30 | #include <asm/page.h> | ||
31 | #include <asm/time.h> | ||
32 | #include <asm/io.h> | ||
33 | #include <asm/todc.h> | ||
34 | #include <asm/kgdb.h> | ||
35 | #include <asm/ocp.h> | ||
36 | #include <asm/ibm_ocp_pci.h> | ||
37 | |||
38 | #include <platforms/4xx/ibm405ep.h> | ||
39 | |||
40 | #undef DEBUG | ||
41 | |||
42 | #ifdef DEBUG | ||
43 | #define DBG(x...) printk(x) | ||
44 | #else | ||
45 | #define DBG(x...) | ||
46 | #endif | ||
47 | |||
48 | extern bd_t __res; | ||
49 | |||
50 | void *bubinga_rtc_base; | ||
51 | |||
52 | /* Some IRQs unique to the board | ||
53 | * Used by the generic 405 PCI setup functions in ppc4xx_pci.c | ||
54 | */ | ||
55 | int __init | ||
56 | ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | ||
57 | { | ||
58 | static char pci_irq_table[][4] = | ||
59 | /* | ||
60 | * PCI IDSEL/INTPIN->INTLINE | ||
61 | * A B C D | ||
62 | */ | ||
63 | { | ||
64 | {28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */ | ||
65 | {29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */ | ||
66 | {30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */ | ||
67 | {31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */ | ||
68 | }; | ||
69 | |||
70 | const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; | ||
71 | return PCI_IRQ_TABLE_LOOKUP; | ||
72 | }; | ||
73 | |||
74 | /* The serial clock for the chip is an internal clock determined by | ||
75 | * different clock speeds/dividers. | ||
76 | * Calculate the proper input baud rate and setup the serial driver. | ||
77 | */ | ||
78 | static void __init | ||
79 | bubinga_early_serial_map(void) | ||
80 | { | ||
81 | u32 uart_div; | ||
82 | int uart_clock; | ||
83 | struct uart_port port; | ||
84 | |||
85 | /* Calculate the serial clock input frequency | ||
86 | * | ||
87 | * The base baud is the PLL OUTA (provided in the board info | ||
88 | * structure) divided by the external UART Divisor, divided | ||
89 | * by 16. | ||
90 | */ | ||
91 | uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV); | ||
92 | uart_clock = __res.bi_procfreq / uart_div; | ||
93 | |||
94 | /* Setup serial port access */ | ||
95 | memset(&port, 0, sizeof(port)); | ||
96 | port.membase = (void*)ACTING_UART0_IO_BASE; | ||
97 | port.irq = ACTING_UART0_INT; | ||
98 | port.uartclk = uart_clock; | ||
99 | port.regshift = 0; | ||
100 | port.iotype = UPIO_MEM; | ||
101 | port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; | ||
102 | port.line = 0; | ||
103 | |||
104 | if (early_serial_setup(&port) != 0) { | ||
105 | printk("Early serial init of port 0 failed\n"); | ||
106 | } | ||
107 | |||
108 | port.membase = (void*)ACTING_UART1_IO_BASE; | ||
109 | port.irq = ACTING_UART1_INT; | ||
110 | port.line = 1; | ||
111 | |||
112 | if (early_serial_setup(&port) != 0) { | ||
113 | printk("Early serial init of port 1 failed\n"); | ||
114 | } | ||
115 | } | ||
116 | |||
117 | void __init | ||
118 | bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip) | ||
119 | { | ||
120 | #ifdef CONFIG_PCI | ||
121 | |||
122 | unsigned int bar_response, bar; | ||
123 | /* | ||
124 | * Expected PCI mapping: | ||
125 | * | ||
126 | * PLB addr PCI memory addr | ||
127 | * --------------------- --------------------- | ||
128 | * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff | ||
129 | * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff | ||
130 | * | ||
131 | * PLB addr PCI io addr | ||
132 | * --------------------- --------------------- | ||
133 | * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000 | ||
134 | * | ||
135 | * The following code is simplified by assuming that the bootrom | ||
136 | * has been well behaved in following this mapping. | ||
137 | */ | ||
138 | |||
139 | #ifdef DEBUG | ||
140 | int i; | ||
141 | |||
142 | printk("ioremap PCLIO_BASE = 0x%x\n", pcip); | ||
143 | printk("PCI bridge regs before fixup \n"); | ||
144 | for (i = 0; i <= 3; i++) { | ||
145 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); | ||
146 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); | ||
147 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); | ||
148 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); | ||
149 | } | ||
150 | printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); | ||
151 | printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); | ||
152 | printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); | ||
153 | printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); | ||
154 | |||
155 | #endif | ||
156 | |||
157 | /* added for IBM boot rom version 1.15 bios bar changes -AK */ | ||
158 | |||
159 | /* Disable region first */ | ||
160 | out_le32((void *) &(pcip->pmm[0].ma), 0x00000000); | ||
161 | /* PLB starting addr, PCI: 0x80000000 */ | ||
162 | out_le32((void *) &(pcip->pmm[0].la), 0x80000000); | ||
163 | /* PCI start addr, 0x80000000 */ | ||
164 | out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE); | ||
165 | /* 512MB range of PLB to PCI */ | ||
166 | out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000); | ||
167 | /* Enable no pre-fetch, enable region */ | ||
168 | out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff - | ||
169 | (PPC405_PCI_UPPER_MEM - | ||
170 | PPC405_PCI_MEM_BASE)) | 0x01)); | ||
171 | |||
172 | /* Disable region one */ | ||
173 | out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); | ||
174 | out_le32((void *) &(pcip->pmm[1].la), 0x00000000); | ||
175 | out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000); | ||
176 | out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000); | ||
177 | out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); | ||
178 | out_le32((void *) &(pcip->ptm1ms), 0x00000001); | ||
179 | |||
180 | /* Disable region two */ | ||
181 | out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); | ||
182 | out_le32((void *) &(pcip->pmm[2].la), 0x00000000); | ||
183 | out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000); | ||
184 | out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000); | ||
185 | out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); | ||
186 | out_le32((void *) &(pcip->ptm2ms), 0x00000000); | ||
187 | out_le32((void *) &(pcip->ptm2la), 0x00000000); | ||
188 | |||
189 | /* Zero config bars */ | ||
190 | for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) { | ||
191 | early_write_config_dword(hose, hose->first_busno, | ||
192 | PCI_FUNC(hose->first_busno), bar, | ||
193 | 0x00000000); | ||
194 | early_read_config_dword(hose, hose->first_busno, | ||
195 | PCI_FUNC(hose->first_busno), bar, | ||
196 | &bar_response); | ||
197 | DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n", | ||
198 | hose->first_busno, PCI_SLOT(hose->first_busno), | ||
199 | PCI_FUNC(hose->first_busno), bar, bar_response); | ||
200 | } | ||
201 | /* end workaround */ | ||
202 | |||
203 | #ifdef DEBUG | ||
204 | printk("PCI bridge regs after fixup \n"); | ||
205 | for (i = 0; i <= 3; i++) { | ||
206 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); | ||
207 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); | ||
208 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila))); | ||
209 | printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha))); | ||
210 | } | ||
211 | printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); | ||
212 | printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); | ||
213 | printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); | ||
214 | printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); | ||
215 | |||
216 | #endif | ||
217 | #endif | ||
218 | } | ||
219 | |||
220 | void __init | ||
221 | bubinga_setup_arch(void) | ||
222 | { | ||
223 | ppc4xx_setup_arch(); | ||
224 | |||
225 | ibm_ocp_set_emac(0, 1); | ||
226 | |||
227 | bubinga_early_serial_map(); | ||
228 | |||
229 | /* RTC step for the evb405ep */ | ||
230 | bubinga_rtc_base = (void *) BUBINGA_RTC_VADDR; | ||
231 | TODC_INIT(TODC_TYPE_DS1743, bubinga_rtc_base, bubinga_rtc_base, | ||
232 | bubinga_rtc_base, 8); | ||
233 | /* Identify the system */ | ||
234 | printk("IBM Bubinga port (MontaVista Software, Inc. <source@mvista.com>)\n"); | ||
235 | } | ||
236 | |||
237 | void __init | ||
238 | bubinga_map_io(void) | ||
239 | { | ||
240 | ppc4xx_map_io(); | ||
241 | io_block_mapping(BUBINGA_RTC_VADDR, | ||
242 | BUBINGA_RTC_PADDR, BUBINGA_RTC_SIZE, _PAGE_IO); | ||
243 | } | ||
244 | |||
245 | void __init | ||
246 | platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | ||
247 | unsigned long r6, unsigned long r7) | ||
248 | { | ||
249 | ppc4xx_init(r3, r4, r5, r6, r7); | ||
250 | |||
251 | ppc_md.setup_arch = bubinga_setup_arch; | ||
252 | ppc_md.setup_io_mappings = bubinga_map_io; | ||
253 | |||
254 | #ifdef CONFIG_GEN_RTC | ||
255 | ppc_md.time_init = todc_time_init; | ||
256 | ppc_md.set_rtc_time = todc_set_rtc_time; | ||
257 | ppc_md.get_rtc_time = todc_get_rtc_time; | ||
258 | ppc_md.nvram_read_val = todc_direct_read_val; | ||
259 | ppc_md.nvram_write_val = todc_direct_write_val; | ||
260 | #endif | ||
261 | #ifdef CONFIG_KGDB | ||
262 | ppc_md.early_serial_map = bubinga_early_serial_map; | ||
263 | #endif | ||
264 | } | ||
265 | |||