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-rw-r--r--arch/ppc/kernel/pci.c240
1 files changed, 2 insertions, 238 deletions
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
index 704c846b2b0f..04d04c5bfdd0 100644
--- a/arch/ppc/kernel/pci.c
+++ b/arch/ppc/kernel/pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Common pmac/prep/chrp pci routines. -- Cort 2 * Common prep/chrp pci routines. -- Cort
3 */ 3 */
4 4
5#include <linux/config.h> 5#include <linux/config.h>
@@ -50,8 +50,7 @@ static void fixup_cpc710_pci64(struct pci_dev* dev);
50static u8* pci_to_OF_bus_map; 50static u8* pci_to_OF_bus_map;
51#endif 51#endif
52 52
53/* By default, we don't re-assign bus numbers. We do this only on 53/* By default, we don't re-assign bus numbers.
54 * some pmacs
55 */ 54 */
56int pci_assign_all_buses; 55int pci_assign_all_buses;
57 56
@@ -780,17 +779,6 @@ pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
780 return NULL; 779 return NULL;
781 780
782 /* Fixup bus number according to what OF think it is. */ 781 /* Fixup bus number according to what OF think it is. */
783#ifdef CONFIG_PPC_PMAC
784 /* The G5 need a special case here. Basically, we don't remap all
785 * busses on it so we don't create the pci-OF-map. However, we do
786 * remap the AGP bus and so have to deal with it. A future better
787 * fix has to be done by making the remapping per-host and always
788 * filling the pci_to_OF map. --BenH
789 */
790 if (_machine == _MACH_Pmac && busnr >= 0xf0)
791 busnr -= 0xf0;
792 else
793#endif
794 if (pci_to_OF_bus_map) 782 if (pci_to_OF_bus_map)
795 busnr = pci_to_OF_bus_map[busnr]; 783 busnr = pci_to_OF_bus_map[busnr];
796 if (busnr == 0xff) 784 if (busnr == 0xff)
@@ -1040,216 +1028,6 @@ void pcibios_add_platform_entries(struct pci_dev *pdev)
1040} 1028}
1041 1029
1042 1030
1043#ifdef CONFIG_PPC_PMAC
1044/*
1045 * This set of routines checks for PCI<->PCI bridges that have closed
1046 * IO resources and have child devices. It tries to re-open an IO
1047 * window on them.
1048 *
1049 * This is a _temporary_ fix to workaround a problem with Apple's OF
1050 * closing IO windows on P2P bridges when the OF drivers of cards
1051 * below this bridge don't claim any IO range (typically ATI or
1052 * Adaptec).
1053 *
1054 * A more complete fix would be to use drivers/pci/setup-bus.c, which
1055 * involves a working pcibios_fixup_pbus_ranges(), some more care about
1056 * ordering when creating the host bus resources, and maybe a few more
1057 * minor tweaks
1058 */
1059
1060/* Initialize bridges with base/limit values we have collected */
1061static void __init
1062do_update_p2p_io_resource(struct pci_bus *bus, int enable_vga)
1063{
1064 struct pci_dev *bridge = bus->self;
1065 struct pci_controller* hose = (struct pci_controller *)bridge->sysdata;
1066 u32 l;
1067 u16 w;
1068 struct resource res;
1069
1070 if (bus->resource[0] == NULL)
1071 return;
1072 res = *(bus->resource[0]);
1073
1074 DBG("Remapping Bus %d, bridge: %s\n", bus->number, pci_name(bridge));
1075 res.start -= ((unsigned long) hose->io_base_virt - isa_io_base);
1076 res.end -= ((unsigned long) hose->io_base_virt - isa_io_base);
1077 DBG(" IO window: %08lx-%08lx\n", res.start, res.end);
1078
1079 /* Set up the top and bottom of the PCI I/O segment for this bus. */
1080 pci_read_config_dword(bridge, PCI_IO_BASE, &l);
1081 l &= 0xffff000f;
1082 l |= (res.start >> 8) & 0x00f0;
1083 l |= res.end & 0xf000;
1084 pci_write_config_dword(bridge, PCI_IO_BASE, l);
1085
1086 if ((l & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) {
1087 l = (res.start >> 16) | (res.end & 0xffff0000);
1088 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, l);
1089 }
1090
1091 pci_read_config_word(bridge, PCI_COMMAND, &w);
1092 w |= PCI_COMMAND_IO;
1093 pci_write_config_word(bridge, PCI_COMMAND, w);
1094
1095#if 0 /* Enabling this causes XFree 4.2.0 to hang during PCI probe */
1096 if (enable_vga) {
1097 pci_read_config_word(bridge, PCI_BRIDGE_CONTROL, &w);
1098 w |= PCI_BRIDGE_CTL_VGA;
1099 pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, w);
1100 }
1101#endif
1102}
1103
1104/* This function is pretty basic and actually quite broken for the
1105 * general case, it's enough for us right now though. It's supposed
1106 * to tell us if we need to open an IO range at all or not and what
1107 * size.
1108 */
1109static int __init
1110check_for_io_childs(struct pci_bus *bus, struct resource* res, int *found_vga)
1111{
1112 struct pci_dev *dev;
1113 int i;
1114 int rc = 0;
1115
1116#define push_end(res, size) do { unsigned long __sz = (size) ; \
1117 res->end = ((res->end + __sz) / (__sz + 1)) * (__sz + 1) + __sz; \
1118 } while (0)
1119
1120 list_for_each_entry(dev, &bus->devices, bus_list) {
1121 u16 class = dev->class >> 8;
1122
1123 if (class == PCI_CLASS_DISPLAY_VGA ||
1124 class == PCI_CLASS_NOT_DEFINED_VGA)
1125 *found_vga = 1;
1126 if (class >> 8 == PCI_BASE_CLASS_BRIDGE && dev->subordinate)
1127 rc |= check_for_io_childs(dev->subordinate, res, found_vga);
1128 if (class == PCI_CLASS_BRIDGE_CARDBUS)
1129 push_end(res, 0xfff);
1130
1131 for (i=0; i<PCI_NUM_RESOURCES; i++) {
1132 struct resource *r;
1133 unsigned long r_size;
1134
1135 if (dev->class >> 8 == PCI_CLASS_BRIDGE_PCI
1136 && i >= PCI_BRIDGE_RESOURCES)
1137 continue;
1138 r = &dev->resource[i];
1139 r_size = r->end - r->start;
1140 if (r_size < 0xfff)
1141 r_size = 0xfff;
1142 if (r->flags & IORESOURCE_IO && (r_size) != 0) {
1143 rc = 1;
1144 push_end(res, r_size);
1145 }
1146 }
1147 }
1148
1149 return rc;
1150}
1151
1152/* Here we scan all P2P bridges of a given level that have a closed
1153 * IO window. Note that the test for the presence of a VGA card should
1154 * be improved to take into account already configured P2P bridges,
1155 * currently, we don't see them and might end up configuring 2 bridges
1156 * with VGA pass through enabled
1157 */
1158static void __init
1159do_fixup_p2p_level(struct pci_bus *bus)
1160{
1161 struct pci_bus *b;
1162 int i, parent_io;
1163 int has_vga = 0;
1164
1165 for (parent_io=0; parent_io<4; parent_io++)
1166 if (bus->resource[parent_io]
1167 && bus->resource[parent_io]->flags & IORESOURCE_IO)
1168 break;
1169 if (parent_io >= 4)
1170 return;
1171
1172 list_for_each_entry(b, &bus->children, node) {
1173 struct pci_dev *d = b->self;
1174 struct pci_controller* hose = (struct pci_controller *)d->sysdata;
1175 struct resource *res = b->resource[0];
1176 struct resource tmp_res;
1177 unsigned long max;
1178 int found_vga = 0;
1179
1180 memset(&tmp_res, 0, sizeof(tmp_res));
1181 tmp_res.start = bus->resource[parent_io]->start;
1182
1183 /* We don't let low addresses go through that closed P2P bridge, well,
1184 * that may not be necessary but I feel safer that way
1185 */
1186 if (tmp_res.start == 0)
1187 tmp_res.start = 0x1000;
1188
1189 if (!list_empty(&b->devices) && res && res->flags == 0 &&
1190 res != bus->resource[parent_io] &&
1191 (d->class >> 8) == PCI_CLASS_BRIDGE_PCI &&
1192 check_for_io_childs(b, &tmp_res, &found_vga)) {
1193 u8 io_base_lo;
1194
1195 printk(KERN_INFO "Fixing up IO bus %s\n", b->name);
1196
1197 if (found_vga) {
1198 if (has_vga) {
1199 printk(KERN_WARNING "Skipping VGA, already active"
1200 " on bus segment\n");
1201 found_vga = 0;
1202 } else
1203 has_vga = 1;
1204 }
1205 pci_read_config_byte(d, PCI_IO_BASE, &io_base_lo);
1206
1207 if ((io_base_lo & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32)
1208 max = ((unsigned long) hose->io_base_virt
1209 - isa_io_base) + 0xffffffff;
1210 else
1211 max = ((unsigned long) hose->io_base_virt
1212 - isa_io_base) + 0xffff;
1213
1214 *res = tmp_res;
1215 res->flags = IORESOURCE_IO;
1216 res->name = b->name;
1217
1218 /* Find a resource in the parent where we can allocate */
1219 for (i = 0 ; i < 4; i++) {
1220 struct resource *r = bus->resource[i];
1221 if (!r)
1222 continue;
1223 if ((r->flags & IORESOURCE_IO) == 0)
1224 continue;
1225 DBG("Trying to allocate from %08lx, size %08lx from parent"
1226 " res %d: %08lx -> %08lx\n",
1227 res->start, res->end, i, r->start, r->end);
1228
1229 if (allocate_resource(r, res, res->end + 1, res->start, max,
1230 res->end + 1, NULL, NULL) < 0) {
1231 DBG("Failed !\n");
1232 continue;
1233 }
1234 do_update_p2p_io_resource(b, found_vga);
1235 break;
1236 }
1237 }
1238 do_fixup_p2p_level(b);
1239 }
1240}
1241
1242static void
1243pcibios_fixup_p2p_bridges(void)
1244{
1245 struct pci_bus *b;
1246
1247 list_for_each_entry(b, &pci_root_buses, node)
1248 do_fixup_p2p_level(b);
1249}
1250
1251#endif /* CONFIG_PPC_PMAC */
1252
1253static int __init 1031static int __init
1254pcibios_init(void) 1032pcibios_init(void)
1255{ 1033{
@@ -1290,9 +1068,6 @@ pcibios_init(void)
1290 pcibios_allocate_bus_resources(&pci_root_buses); 1068 pcibios_allocate_bus_resources(&pci_root_buses);
1291 pcibios_allocate_resources(0); 1069 pcibios_allocate_resources(0);
1292 pcibios_allocate_resources(1); 1070 pcibios_allocate_resources(1);
1293#ifdef CONFIG_PPC_PMAC
1294 pcibios_fixup_p2p_bridges();
1295#endif /* CONFIG_PPC_PMAC */
1296 pcibios_assign_resources(); 1071 pcibios_assign_resources();
1297 1072
1298 /* Call machine dependent post-init code */ 1073 /* Call machine dependent post-init code */
@@ -1722,17 +1497,6 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
1722 struct pci_controller* hose; 1497 struct pci_controller* hose;
1723 long result = -EOPNOTSUPP; 1498 long result = -EOPNOTSUPP;
1724 1499
1725 /* Argh ! Please forgive me for that hack, but that's the
1726 * simplest way to get existing XFree to not lockup on some
1727 * G5 machines... So when something asks for bus 0 io base
1728 * (bus 0 is HT root), we return the AGP one instead.
1729 */
1730#ifdef CONFIG_PPC_PMAC
1731 if (_machine == _MACH_Pmac && machine_is_compatible("MacRISC4"))
1732 if (bus == 0)
1733 bus = 0xf0;
1734#endif /* CONFIG_PPC_PMAC */
1735
1736 hose = pci_bus_to_hose(bus); 1500 hose = pci_bus_to_hose(bus);
1737 if (!hose) 1501 if (!hose)
1738 return -ENODEV; 1502 return -ENODEV;