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-rw-r--r--arch/ppc/kernel/align.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/ppc/kernel/align.c b/arch/ppc/kernel/align.c
index 79c929475037..ff81da9598d8 100644
--- a/arch/ppc/kernel/align.c
+++ b/arch/ppc/kernel/align.c
@@ -290,6 +290,10 @@ fix_alignment(struct pt_regs *regs)
290 /* lwm, stmw */ 290 /* lwm, stmw */
291 nb = (32 - reg) * 4; 291 nb = (32 - reg) * 4;
292 } 292 }
293
294 if (!access_ok((flags & ST? VERIFY_WRITE: VERIFY_READ), addr, nb+nb0))
295 return -EFAULT; /* bad address */
296
293 rptr = (unsigned char *) &regs->gpr[reg]; 297 rptr = (unsigned char *) &regs->gpr[reg];
294 if (flags & LD) { 298 if (flags & LD) {
295 for (i = 0; i < nb; ++i) 299 for (i = 0; i < nb; ++i)
@@ -368,16 +372,24 @@ fix_alignment(struct pt_regs *regs)
368 372
369 /* Single-precision FP load and store require conversions... */ 373 /* Single-precision FP load and store require conversions... */
370 case LD+F+S: 374 case LD+F+S:
375#ifdef CONFIG_PPC_FPU
371 preempt_disable(); 376 preempt_disable();
372 enable_kernel_fp(); 377 enable_kernel_fp();
373 cvt_fd(&data.f, &data.d, &current->thread.fpscr); 378 cvt_fd(&data.f, &data.d, &current->thread.fpscr);
374 preempt_enable(); 379 preempt_enable();
380#else
381 return 0;
382#endif
375 break; 383 break;
376 case ST+F+S: 384 case ST+F+S:
385#ifdef CONFIG_PPC_FPU
377 preempt_disable(); 386 preempt_disable();
378 enable_kernel_fp(); 387 enable_kernel_fp();
379 cvt_df(&data.d, &data.f, &current->thread.fpscr); 388 cvt_df(&data.d, &data.f, &current->thread.fpscr);
380 preempt_enable(); 389 preempt_enable();
390#else
391 return 0;
392#endif
381 break; 393 break;
382 } 394 }
383 395