13 files changed, 78 insertions, 78 deletions

diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 168fce726201..20de73c36682 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -58,7 +58,7 @@ struct rtas_t {
         unsigned long entry;            /* physical address pointer */
         unsigned long base;             /* physical address pointer */
         unsigned long size;
-        raw_spinlock_t lock;
+        arch_spinlock_t lock;
         struct rtas_args args;
         struct device_node *dev;        /* virtual address pointer */
 };
diff --git a/arch/powerpc/include/asm/spinlock.h b/arch/powerpc/include/asm/spinlock.h
index 198266cf9e2d..764094cff681 100644
--- a/arch/powerpc/include/asm/spinlock.h
+++ b/arch/powerpc/include/asm/spinlock.h
@@ -28,7 +28,7 @@
 #include <asm/asm-compat.h>
 #include <asm/synch.h>
 
-#define __raw_spin_is_locked(x)         ((x)->slock != 0)
+#define arch_spin_is_locked(x)          ((x)->slock != 0)
 
 #ifdef CONFIG_PPC64
 /* use 0x800000yy when locked, where yy == CPU number */
@@ -54,7 +54,7 @@
  * This returns the old value in the lock, so we succeeded
  * in getting the lock if the return value is 0.
  */
-static inline unsigned long arch_spin_trylock(raw_spinlock_t *lock)
+static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock)
 {
         unsigned long tmp, token;
 
@@ -73,10 +73,10 @@ static inline unsigned long arch_spin_trylock(raw_spinlock_t *lock)
         return tmp;
 }
 
-static inline int __raw_spin_trylock(raw_spinlock_t *lock)
+static inline int arch_spin_trylock(arch_spinlock_t *lock)
 {
         CLEAR_IO_SYNC;
-        return arch_spin_trylock(lock) == 0;
+        return __arch_spin_trylock(lock) == 0;
 }
 
 /*
@@ -96,19 +96,19 @@ static inline int __raw_spin_trylock(raw_spinlock_t *lock)
 #if defined(CONFIG_PPC_SPLPAR) || defined(CONFIG_PPC_ISERIES)
 /* We only yield to the hypervisor if we are in shared processor mode */
 #define SHARED_PROCESSOR (get_lppaca()->shared_proc)
-extern void __spin_yield(raw_spinlock_t *lock);
-extern void __rw_yield(raw_rwlock_t *lock);
+extern void __spin_yield(arch_spinlock_t *lock);
+extern void __rw_yield(arch_rwlock_t *lock);
 #else /* SPLPAR || ISERIES */
 #define __spin_yield(x) barrier()
 #define __rw_yield(x)   barrier()
 #define SHARED_PROCESSOR        0
 #endif
 
-static inline void __raw_spin_lock(raw_spinlock_t *lock)
+static inline void arch_spin_lock(arch_spinlock_t *lock)
 {
         CLEAR_IO_SYNC;
         while (1) {
-                if (likely(arch_spin_trylock(lock) == 0))
+                if (likely(__arch_spin_trylock(lock) == 0))
                         break;
                 do {
                         HMT_low();
@@ -120,13 +120,13 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock)
 }
 
 static inline
-void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags)
+void arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags)
 {
         unsigned long flags_dis;
 
         CLEAR_IO_SYNC;
         while (1) {
-                if (likely(arch_spin_trylock(lock) == 0))
+                if (likely(__arch_spin_trylock(lock) == 0))
                         break;
                 local_save_flags(flags_dis);
                 local_irq_restore(flags);
@@ -140,19 +140,19 @@ void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags)
         }
 }
 
-static inline void __raw_spin_unlock(raw_spinlock_t *lock)
+static inline void arch_spin_unlock(arch_spinlock_t *lock)
 {
         SYNC_IO;
-        __asm__ __volatile__("# __raw_spin_unlock\n\t"
+        __asm__ __volatile__("# arch_spin_unlock\n\t"
                                 LWSYNC_ON_SMP: : :"memory");
         lock->slock = 0;
 }
 
 #ifdef CONFIG_PPC64
-extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
+extern void arch_spin_unlock_wait(arch_spinlock_t *lock);
 #else
-#define __raw_spin_unlock_wait(lock) \
-        do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
+#define arch_spin_unlock_wait(lock) \
+        do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0)
 #endif
 
 /*
@@ -166,8 +166,8 @@ extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
  * read-locks.
  */
 
-#define __raw_read_can_lock(rw)         ((rw)->lock >= 0)
-#define __raw_write_can_lock(rw)        (!(rw)->lock)
+#define arch_read_can_lock(rw)          ((rw)->lock >= 0)
+#define arch_write_can_lock(rw) (!(rw)->lock)
 
 #ifdef CONFIG_PPC64
 #define __DO_SIGN_EXTEND        "extsw  %0,%0\n"
@@ -181,7 +181,7 @@ extern void __raw_spin_unlock_wait(raw_spinlock_t *lock);
  * This returns the old value in the lock + 1,
  * so we got a read lock if the return value is > 0.
  */
-static inline long arch_read_trylock(raw_rwlock_t *rw)
+static inline long __arch_read_trylock(arch_rwlock_t *rw)
 {
         long tmp;
 
@@ -205,7 +205,7 @@ static inline long arch_read_trylock(raw_rwlock_t *rw)
  * This returns the old value in the lock,
  * so we got the write lock if the return value is 0.
  */
-static inline long arch_write_trylock(raw_rwlock_t *rw)
+static inline long __arch_write_trylock(arch_rwlock_t *rw)
 {
         long tmp, token;
 
@@ -225,10 +225,10 @@ static inline long arch_write_trylock(raw_rwlock_t *rw)
         return tmp;
 }
 
-static inline void __raw_read_lock(raw_rwlock_t *rw)
+static inline void arch_read_lock(arch_rwlock_t *rw)
 {
         while (1) {
-                if (likely(arch_read_trylock(rw) > 0))
+                if (likely(__arch_read_trylock(rw) > 0))
                         break;
                 do {
                         HMT_low();
@@ -239,10 +239,10 @@ static inline void __raw_read_lock(raw_rwlock_t *rw)
         }
 }
 
-static inline void __raw_write_lock(raw_rwlock_t *rw)
+static inline void arch_write_lock(arch_rwlock_t *rw)
 {
         while (1) {
-                if (likely(arch_write_trylock(rw) == 0))
+                if (likely(__arch_write_trylock(rw) == 0))
                         break;
                 do {
                         HMT_low();
@@ -253,17 +253,17 @@ static inline void __raw_write_lock(raw_rwlock_t *rw)
         }
 }
 
-static inline int __raw_read_trylock(raw_rwlock_t *rw)
+static inline int arch_read_trylock(arch_rwlock_t *rw)
 {
-        return arch_read_trylock(rw) > 0;
+        return __arch_read_trylock(rw) > 0;
 }
 
-static inline int __raw_write_trylock(raw_rwlock_t *rw)
+static inline int arch_write_trylock(arch_rwlock_t *rw)
 {
-        return arch_write_trylock(rw) == 0;
+        return __arch_write_trylock(rw) == 0;
 }
 
-static inline void __raw_read_unlock(raw_rwlock_t *rw)
+static inline void arch_read_unlock(arch_rwlock_t *rw)
 {
         long tmp;
 
@@ -280,19 +280,19 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw)
         : "cr0", "xer", "memory");
 }
 
-static inline void __raw_write_unlock(raw_rwlock_t *rw)
+static inline void arch_write_unlock(arch_rwlock_t *rw)
 {
         __asm__ __volatile__("# write_unlock\n\t"
                                 LWSYNC_ON_SMP: : :"memory");
         rw->lock = 0;
 }
 
-#define __raw_read_lock_flags(lock, flags) __raw_read_lock(lock)
-#define __raw_write_lock_flags(lock, flags) __raw_write_lock(lock)
+#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
+#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
 
-#define _raw_spin_relax(lock)   __spin_yield(lock)
-#define _raw_read_relax(lock)   __rw_yield(lock)
-#define _raw_write_relax(lock)  __rw_yield(lock)
+#define arch_spin_relax(lock)   __spin_yield(lock)
+#define arch_read_relax(lock)   __rw_yield(lock)
+#define arch_write_relax(lock)  __rw_yield(lock)
 
 #endif /* __KERNEL__ */
 #endif /* __ASM_SPINLOCK_H */
diff --git a/arch/powerpc/include/asm/spinlock_types.h b/arch/powerpc/include/asm/spinlock_types.h
index 74236c9f05b1..2351adc4fdc4 100644
--- a/arch/powerpc/include/asm/spinlock_types.h
+++ b/arch/powerpc/include/asm/spinlock_types.h
@@ -7,14 +7,14 @@
 
 typedef struct {
         volatile unsigned int slock;
-} raw_spinlock_t;
+} arch_spinlock_t;
 
-#define __RAW_SPIN_LOCK_UNLOCKED        { 0 }
+#define __ARCH_SPIN_LOCK_UNLOCKED       { 0 }
 
 typedef struct {
         volatile signed int lock;
-} raw_rwlock_t;
+} arch_rwlock_t;
 
-#define __RAW_RW_LOCK_UNLOCKED          { 0 }
+#define __ARCH_RW_LOCK_UNLOCKED         { 0 }
 
 #endif
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index f6dca4f4b295..9040330b0530 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -210,7 +210,7 @@ int show_interrupts(struct seq_file *p, void *v)
         if (!desc)
                 return 0;
 
-        spin_lock_irqsave(&desc->lock, flags);
+        raw_spin_lock_irqsave(&desc->lock, flags);
 
         action = desc->action;
         if (!action || !action->handler)
@@ -237,7 +237,7 @@ int show_interrupts(struct seq_file *p, void *v)
         seq_putc(p, '\n');
 
 skip:
-        spin_unlock_irqrestore(&desc->lock, flags);
+        raw_spin_unlock_irqrestore(&desc->lock, flags);
 
         return 0;
 }
@@ -1112,7 +1112,7 @@ static int virq_debug_show(struct seq_file *m, void *private)
                 if (!desc)
                         continue;
 
-                spin_lock_irqsave(&desc->lock, flags);
+                raw_spin_lock_irqsave(&desc->lock, flags);
 
                 if (desc->action && desc->action->handler) {
                         seq_printf(m, "%5d  ", i);
@@ -1131,7 +1131,7 @@ static int virq_debug_show(struct seq_file *m, void *private)
                         seq_printf(m, "%s\n", p);
                 }
 
-                spin_unlock_irqrestore(&desc->lock, flags);
+                raw_spin_unlock_irqrestore(&desc->lock, flags);
         }
 
         return 0;
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index bf90361bb70f..fd0d29493fd6 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -42,7 +42,7 @@
 #include <asm/mmu.h>
 
 struct rtas_t rtas = {
-        .lock = __RAW_SPIN_LOCK_UNLOCKED
+        .lock = __ARCH_SPIN_LOCK_UNLOCKED
 };
 EXPORT_SYMBOL(rtas);
 
@@ -80,13 +80,13 @@ static unsigned long lock_rtas(void)
 
         local_irq_save(flags);
         preempt_disable();
-        __raw_spin_lock_flags(&rtas.lock, flags);
+        arch_spin_lock_flags(&rtas.lock, flags);
         return flags;
 }
 
 static void unlock_rtas(unsigned long flags)
 {
-        __raw_spin_unlock(&rtas.lock);
+        arch_spin_unlock(&rtas.lock);
         local_irq_restore(flags);
         preempt_enable();
 }
@@ -978,7 +978,7 @@ int __init early_init_dt_scan_rtas(unsigned long node,
         return 1;
 }
 
-static raw_spinlock_t timebase_lock;
+static arch_spinlock_t timebase_lock;
 static u64 timebase = 0;
 
 void __cpuinit rtas_give_timebase(void)
@@ -987,10 +987,10 @@ void __cpuinit rtas_give_timebase(void)
 
         local_irq_save(flags);
         hard_irq_disable();
-        __raw_spin_lock(&timebase_lock);
+        arch_spin_lock(&timebase_lock);
         rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL);
         timebase = get_tb();
-        __raw_spin_unlock(&timebase_lock);
+        arch_spin_unlock(&timebase_lock);
 
         while (timebase)
                 barrier();
@@ -1002,8 +1002,8 @@ void __cpuinit rtas_take_timebase(void)
 {
         while (!timebase)
                 barrier();
-        __raw_spin_lock(&timebase_lock);
+        arch_spin_lock(&timebase_lock);
         set_tb(timebase >> 32, timebase & 0xffffffff);
         timebase = 0;
-        __raw_spin_unlock(&timebase_lock);
+        arch_spin_unlock(&timebase_lock);
 }
diff --git a/arch/powerpc/lib/locks.c b/arch/powerpc/lib/locks.c
index 79d0fa3a470d..58e14fba11b1 100644
--- a/arch/powerpc/lib/locks.c
+++ b/arch/powerpc/lib/locks.c
@@ -25,7 +25,7 @@
 #include <asm/smp.h>
 #include <asm/firmware.h>
 
-void __spin_yield(raw_spinlock_t *lock)
+void __spin_yield(arch_spinlock_t *lock)
 {
         unsigned int lock_value, holder_cpu, yield_count;
 
@@ -55,7 +55,7 @@ void __spin_yield(raw_spinlock_t *lock)
  * This turns out to be the same for read and write locks, since
  * we only know the holder if it is write-locked.
  */
-void __rw_yield(raw_rwlock_t *rw)
+void __rw_yield(arch_rwlock_t *rw)
 {
         int lock_value;
         unsigned int holder_cpu, yield_count;
@@ -82,7 +82,7 @@ void __rw_yield(raw_rwlock_t *rw)
 }
 #endif
 
-void __raw_spin_unlock_wait(raw_spinlock_t *lock)
+void arch_spin_unlock_wait(arch_spinlock_t *lock)
 {
         while (lock->slock) {
                 HMT_low();
@@ -92,4 +92,4 @@ void __raw_spin_unlock_wait(raw_spinlock_t *lock)
         HMT_medium();
 }
 
-EXPORT_SYMBOL(__raw_spin_unlock_wait);
+EXPORT_SYMBOL(arch_spin_unlock_wait);
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c
index cc0c854291d7..0bac3a3dbecf 100644
--- a/arch/powerpc/platforms/52xx/media5200.c
+++ b/arch/powerpc/platforms/52xx/media5200.c
@@ -86,9 +86,9 @@ void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc)
         u32 status, enable;
 
         /* Mask off the cascaded IRQ */
-        spin_lock(&desc->lock);
+        raw_spin_lock(&desc->lock);
         desc->chip->mask(virq);
-        spin_unlock(&desc->lock);
+        raw_spin_unlock(&desc->lock);
 
         /* Ask the FPGA for IRQ status.  If 'val' is 0, then no irqs
          * are pending.  'ffs()' is 1 based */
@@ -104,11 +104,11 @@ void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc)
         }
 
         /* Processing done; can reenable the cascade now */
-        spin_lock(&desc->lock);
+        raw_spin_lock(&desc->lock);
         desc->chip->ack(virq);
         if (!(desc->status & IRQ_DISABLED))
                 desc->chip->unmask(virq);
-        spin_unlock(&desc->lock);
+        raw_spin_unlock(&desc->lock);
 }
 
 static int media5200_irq_map(struct irq_host *h, unsigned int virq,
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 7267effc8078..6829cf7e2bda 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -237,7 +237,7 @@ extern int noirqdebug;
 
 static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
 {
-        spin_lock(&desc->lock);
+        raw_spin_lock(&desc->lock);
 
         desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
 
@@ -265,18 +265,18 @@ static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
                         goto out_eoi;
 
                 desc->status &= ~IRQ_PENDING;
-                spin_unlock(&desc->lock);
+                raw_spin_unlock(&desc->lock);
                 action_ret = handle_IRQ_event(irq, action);
                 if (!noirqdebug)
                         note_interrupt(irq, desc, action_ret);
-                spin_lock(&desc->lock);
+                raw_spin_lock(&desc->lock);
 
         } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
 
         desc->status &= ~IRQ_INPROGRESS;
 out_eoi:
         desc->chip->eoi(irq);
-        spin_unlock(&desc->lock);
+        raw_spin_unlock(&desc->lock);
 }
 
 static int iic_host_map(struct irq_host *h, unsigned int virq,
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index 07762259c60a..86c4b29eea89 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -217,9 +217,9 @@ void __init iSeries_activate_IRQs()
                 struct irq_desc *desc = irq_to_desc(irq);
 
                 if (desc && desc->chip && desc->chip->startup) {
-                        spin_lock_irqsave(&desc->lock, flags);
+                        raw_spin_lock_irqsave(&desc->lock, flags);
                         desc->chip->startup(irq);
-                        spin_unlock_irqrestore(&desc->lock, flags);
+                        raw_spin_unlock_irqrestore(&desc->lock, flags);
                 }
         }
 }
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index a4619347aa7e..242f8095c2df 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -71,7 +71,7 @@ static void pas_restart(char *cmd)
 }
 
 #ifdef CONFIG_SMP
-static raw_spinlock_t timebase_lock;
+static arch_spinlock_t timebase_lock;
 static unsigned long timebase;
 
 static void __devinit pas_give_timebase(void)
@@ -80,11 +80,11 @@ static void __devinit pas_give_timebase(void)
 
         local_irq_save(flags);
         hard_irq_disable();
-        __raw_spin_lock(&timebase_lock);
+        arch_spin_lock(&timebase_lock);
         mtspr(SPRN_TBCTL, TBCTL_FREEZE);
         isync();
         timebase = get_tb();
-        __raw_spin_unlock(&timebase_lock);
+        arch_spin_unlock(&timebase_lock);
 
         while (timebase)
                 barrier();
@@ -97,10 +97,10 @@ static void __devinit pas_take_timebase(void)
         while (!timebase)
                 smp_rmb();
 
-        __raw_spin_lock(&timebase_lock);
+        arch_spin_lock(&timebase_lock);
         set_tb(timebase >> 32, timebase & 0xffffffff);
         timebase = 0;
-        __raw_spin_unlock(&timebase_lock);
+        arch_spin_unlock(&timebase_lock);
 }
 
 struct smp_ops_t pas_smp_ops = {
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 7d01b58f3989..b9b9e11609ec 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -906,7 +906,7 @@ void xics_migrate_irqs_away(void)
                     || desc->chip->set_affinity == NULL)
                         continue;
 
-                spin_lock_irqsave(&desc->lock, flags);
+                raw_spin_lock_irqsave(&desc->lock, flags);
 
                 status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
                 if (status) {
@@ -930,7 +930,7 @@ void xics_migrate_irqs_away(void)
                 cpumask_setall(irq_to_desc(virq)->affinity);
                 desc->chip->set_affinity(virq, cpu_all_mask);
 unlock:
-                spin_unlock_irqrestore(&desc->lock, flags);
+                raw_spin_unlock_irqrestore(&desc->lock, flags);
         }
 }
 #endif
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 62e50258cdef..c6e11b077108 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -173,7 +173,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
         u32 intr_index;
         u32 have_shift = 0;
 
-        spin_lock(&desc->lock);
+        raw_spin_lock(&desc->lock);
         if ((msi_data->feature &  FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
                 if (desc->chip->mask_ack)
                         desc->chip->mask_ack(irq);
@@ -225,7 +225,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
                 break;
         }
 unlock:
-        spin_unlock(&desc->lock);
+        raw_spin_unlock(&desc->lock);
 }
 
 static int __devinit fsl_of_msi_probe(struct of_device *dev,
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 7d10074b3304..6f220a913e42 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -225,12 +225,12 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
         int src;
         int subvirq;
 
-        spin_lock(&desc->lock);
+        raw_spin_lock(&desc->lock);
         if (desc->status & IRQ_LEVEL)
                 desc->chip->mask(virq);
         else
                 desc->chip->mask_ack(virq);
-        spin_unlock(&desc->lock);
+        raw_spin_unlock(&desc->lock);
 
         msr = mfdcr(uic->dcrbase + UIC_MSR);
         if (!msr) /* spurious interrupt */
@@ -242,12 +242,12 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
         generic_handle_irq(subvirq);
 
 uic_irq_ret:
-        spin_lock(&desc->lock);
+        raw_spin_lock(&desc->lock);
         if (desc->status & IRQ_LEVEL)
                 desc->chip->ack(virq);
         if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
                 desc->chip->unmask(virq);
-        spin_unlock(&desc->lock);
+        raw_spin_unlock(&desc->lock);
 }
 
 static struct uic * __init uic_init_one(struct device_node *node)