diff options
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/kernel/Makefile | 5 | ||||
-rw-r--r-- | arch/powerpc/kernel/fpu.S | 31 | ||||
-rw-r--r-- | arch/powerpc/kernel/misc_32.S | 27 | ||||
-rw-r--r-- | arch/powerpc/kernel/misc_64.S | 19 | ||||
-rw-r--r-- | arch/powerpc/kernel/process.c | 2 | ||||
-rw-r--r-- | arch/powerpc/kernel/signal_32.c | 2 | ||||
-rw-r--r-- | arch/powerpc/kernel/traps.c | 2 |
7 files changed, 33 insertions, 55 deletions
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index a733347964a0..94cf917b7854 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -29,7 +29,6 @@ extra-$(CONFIG_44x) := head_44x.o | |||
29 | extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o | 29 | extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o |
30 | extra-$(CONFIG_8xx) := head_8xx.o | 30 | extra-$(CONFIG_8xx) := head_8xx.o |
31 | extra-$(CONFIG_PPC64) += entry_64.o | 31 | extra-$(CONFIG_PPC64) += entry_64.o |
32 | extra-$(CONFIG_PPC_FPU) += fpu.o | ||
33 | extra-y += vmlinux.lds | 32 | extra-y += vmlinux.lds |
34 | 33 | ||
35 | obj-y += process.o init_task.o time.o \ | 34 | obj-y += process.o init_task.o time.o \ |
@@ -49,7 +48,7 @@ else | |||
49 | # stuff used from here for ARCH=ppc or ARCH=ppc64 | 48 | # stuff used from here for ARCH=ppc or ARCH=ppc64 |
50 | obj-$(CONFIG_PPC64) += traps.o process.o init_task.o time.o | 49 | obj-$(CONFIG_PPC64) += traps.o process.o init_task.o time.o |
51 | 50 | ||
52 | fpux-$(CONFIG_PPC32) += fpu.o | ||
53 | extra-$(CONFIG_PPC_FPU) += $(fpux-y) | ||
54 | 51 | ||
55 | endif | 52 | endif |
53 | |||
54 | extra-$(CONFIG_PPC_FPU) += fpu.o | ||
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S index 563d445ff584..51fd78da25b7 100644 --- a/arch/powerpc/kernel/fpu.S +++ b/arch/powerpc/kernel/fpu.S | |||
@@ -48,7 +48,7 @@ _GLOBAL(load_up_fpu) | |||
48 | addi r4,r4,THREAD /* want last_task_used_math->thread */ | 48 | addi r4,r4,THREAD /* want last_task_used_math->thread */ |
49 | SAVE_32FPRS(0, r4) | 49 | SAVE_32FPRS(0, r4) |
50 | mffs fr0 | 50 | mffs fr0 |
51 | stfd fr0,THREAD_FPSCR-4(r4) | 51 | stfd fr0,THREAD_FPSCR(r4) |
52 | LDL r5,PT_REGS(r4) | 52 | LDL r5,PT_REGS(r4) |
53 | tophys(r5,r5) | 53 | tophys(r5,r5) |
54 | LDL r4,_MSR-STACK_FRAME_OVERHEAD(r5) | 54 | LDL r4,_MSR-STACK_FRAME_OVERHEAD(r5) |
@@ -71,7 +71,7 @@ _GLOBAL(load_up_fpu) | |||
71 | or r12,r12,r4 | 71 | or r12,r12,r4 |
72 | std r12,_MSR(r1) | 72 | std r12,_MSR(r1) |
73 | #endif | 73 | #endif |
74 | lfd fr0,THREAD_FPSCR-4(r5) | 74 | lfd fr0,THREAD_FPSCR(r5) |
75 | mtfsf 0xff,fr0 | 75 | mtfsf 0xff,fr0 |
76 | REST_32FPRS(0, r5) | 76 | REST_32FPRS(0, r5) |
77 | #ifndef CONFIG_SMP | 77 | #ifndef CONFIG_SMP |
@@ -104,7 +104,7 @@ _GLOBAL(giveup_fpu) | |||
104 | CMPI 0,r5,0 | 104 | CMPI 0,r5,0 |
105 | SAVE_32FPRS(0, r3) | 105 | SAVE_32FPRS(0, r3) |
106 | mffs fr0 | 106 | mffs fr0 |
107 | stfd fr0,THREAD_FPSCR-4(r3) | 107 | stfd fr0,THREAD_FPSCR(r3) |
108 | beq 1f | 108 | beq 1f |
109 | LDL r4,_MSR-STACK_FRAME_OVERHEAD(r5) | 109 | LDL r4,_MSR-STACK_FRAME_OVERHEAD(r5) |
110 | li r3,MSR_FP|MSR_FE0|MSR_FE1 | 110 | li r3,MSR_FP|MSR_FE0|MSR_FE1 |
@@ -117,3 +117,28 @@ _GLOBAL(giveup_fpu) | |||
117 | STL r5,OFF(last_task_used_math)(r4) | 117 | STL r5,OFF(last_task_used_math)(r4) |
118 | #endif /* CONFIG_SMP */ | 118 | #endif /* CONFIG_SMP */ |
119 | blr | 119 | blr |
120 | |||
121 | /* | ||
122 | * These are used in the alignment trap handler when emulating | ||
123 | * single-precision loads and stores. | ||
124 | * We restore and save the fpscr so the task gets the same result | ||
125 | * and exceptions as if the cpu had performed the load or store. | ||
126 | */ | ||
127 | |||
128 | _GLOBAL(cvt_fd) | ||
129 | lfd 0,THREAD_FPSCR(r5) /* load up fpscr value */ | ||
130 | mtfsf 0xff,0 | ||
131 | lfs 0,0(r3) | ||
132 | stfd 0,0(r4) | ||
133 | mffs 0 | ||
134 | stfd 0,THREAD_FPSCR(r5) /* save new fpscr value */ | ||
135 | blr | ||
136 | |||
137 | _GLOBAL(cvt_df) | ||
138 | lfd 0,THREAD_FPSCR(r5) /* load up fpscr value */ | ||
139 | mtfsf 0xff,0 | ||
140 | lfd 0,0(r3) | ||
141 | stfs 0,0(r4) | ||
142 | mffs 0 | ||
143 | stfd 0,THREAD_FPSCR(r5) /* save new fpscr value */ | ||
144 | blr | ||
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index 303229b090b8..3bedb532aed9 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
@@ -993,33 +993,6 @@ _GLOBAL(_get_SP) | |||
993 | blr | 993 | blr |
994 | 994 | ||
995 | /* | 995 | /* |
996 | * These are used in the alignment trap handler when emulating | ||
997 | * single-precision loads and stores. | ||
998 | * We restore and save the fpscr so the task gets the same result | ||
999 | * and exceptions as if the cpu had performed the load or store. | ||
1000 | */ | ||
1001 | |||
1002 | #ifdef CONFIG_PPC_FPU | ||
1003 | _GLOBAL(cvt_fd) | ||
1004 | lfd 0,-4(r5) /* load up fpscr value */ | ||
1005 | mtfsf 0xff,0 | ||
1006 | lfs 0,0(r3) | ||
1007 | stfd 0,0(r4) | ||
1008 | mffs 0 /* save new fpscr value */ | ||
1009 | stfd 0,-4(r5) | ||
1010 | blr | ||
1011 | |||
1012 | _GLOBAL(cvt_df) | ||
1013 | lfd 0,-4(r5) /* load up fpscr value */ | ||
1014 | mtfsf 0xff,0 | ||
1015 | lfd 0,0(r3) | ||
1016 | stfs 0,0(r4) | ||
1017 | mffs 0 /* save new fpscr value */ | ||
1018 | stfd 0,-4(r5) | ||
1019 | blr | ||
1020 | #endif | ||
1021 | |||
1022 | /* | ||
1023 | * Create a kernel thread | 996 | * Create a kernel thread |
1024 | * kernel_thread(fn, arg, flags) | 997 | * kernel_thread(fn, arg, flags) |
1025 | */ | 998 | */ |
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index 4775bed42cac..b3e95ff0dba0 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S | |||
@@ -462,25 +462,6 @@ _GLOBAL(_outsl_ns) | |||
462 | sync | 462 | sync |
463 | blr | 463 | blr |
464 | 464 | ||
465 | |||
466 | _GLOBAL(cvt_fd) | ||
467 | lfd 0,0(r5) /* load up fpscr value */ | ||
468 | mtfsf 0xff,0 | ||
469 | lfs 0,0(r3) | ||
470 | stfd 0,0(r4) | ||
471 | mffs 0 /* save new fpscr value */ | ||
472 | stfd 0,0(r5) | ||
473 | blr | ||
474 | |||
475 | _GLOBAL(cvt_df) | ||
476 | lfd 0,0(r5) /* load up fpscr value */ | ||
477 | mtfsf 0xff,0 | ||
478 | lfd 0,0(r3) | ||
479 | stfs 0,0(r4) | ||
480 | mffs 0 /* save new fpscr value */ | ||
481 | stfd 0,0(r5) | ||
482 | blr | ||
483 | |||
484 | /* | 465 | /* |
485 | * identify_cpu and calls setup_cpu | 466 | * identify_cpu and calls setup_cpu |
486 | * In: r3 = base of the cpu_specs array | 467 | * In: r3 = base of the cpu_specs array |
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index 047da1ae21fe..8f85dabe4df3 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c | |||
@@ -665,7 +665,7 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp) | |||
665 | #endif | 665 | #endif |
666 | #endif /* CONFIG_SMP */ | 666 | #endif /* CONFIG_SMP */ |
667 | memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); | 667 | memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); |
668 | current->thread.fpscr = 0; | 668 | current->thread.fpscr.val = 0; |
669 | #ifdef CONFIG_ALTIVEC | 669 | #ifdef CONFIG_ALTIVEC |
670 | memset(current->thread.vr, 0, sizeof(current->thread.vr)); | 670 | memset(current->thread.vr, 0, sizeof(current->thread.vr)); |
671 | memset(¤t->thread.vscr, 0, sizeof(current->thread.vscr)); | 671 | memset(¤t->thread.vscr, 0, sizeof(current->thread.vscr)); |
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c index 92452b2db26a..444c3e81884c 100644 --- a/arch/powerpc/kernel/signal_32.c +++ b/arch/powerpc/kernel/signal_32.c | |||
@@ -403,7 +403,7 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, | |||
403 | ELF_NFPREG * sizeof(double))) | 403 | ELF_NFPREG * sizeof(double))) |
404 | return 1; | 404 | return 1; |
405 | 405 | ||
406 | current->thread.fpscr = 0; /* turn off all fp exceptions */ | 406 | current->thread.fpscr.val = 0; /* turn off all fp exceptions */ |
407 | 407 | ||
408 | #ifdef CONFIG_ALTIVEC | 408 | #ifdef CONFIG_ALTIVEC |
409 | /* save altivec registers */ | 409 | /* save altivec registers */ |
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index f87580382da4..5d638ecddbd0 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
@@ -549,7 +549,7 @@ static void parse_fpe(struct pt_regs *regs) | |||
549 | 549 | ||
550 | flush_fp_to_thread(current); | 550 | flush_fp_to_thread(current); |
551 | 551 | ||
552 | fpscr = current->thread.fpscr; | 552 | fpscr = current->thread.fpscr.val; |
553 | 553 | ||
554 | /* Invalid operation */ | 554 | /* Invalid operation */ |
555 | if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX)) | 555 | if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX)) |