diff options
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r-- | arch/powerpc/sysdev/cpm1.c | 2 | ||||
-rw-r--r-- | arch/powerpc/sysdev/cpm2_pic.c | 2 | ||||
-rw-r--r-- | arch/powerpc/sysdev/fsl_msi.c | 2 | ||||
-rw-r--r-- | arch/powerpc/sysdev/grackle.c | 4 | ||||
-rw-r--r-- | arch/powerpc/sysdev/i8259.c | 24 | ||||
-rw-r--r-- | arch/powerpc/sysdev/ipic.c | 22 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mpc8xx_pic.c | 2 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mpic.c | 40 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mpic_pasemi_msi.c | 2 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mv64x60_dev.c | 3 | ||||
-rw-r--r-- | arch/powerpc/sysdev/ppc4xx_soc.c | 3 | ||||
-rw-r--r-- | arch/powerpc/sysdev/qe_lib/qe_ic.c | 4 | ||||
-rw-r--r-- | arch/powerpc/sysdev/qe_lib/qe_io.c | 8 | ||||
-rw-r--r-- | arch/powerpc/sysdev/uic.c | 2 |
14 files changed, 62 insertions, 58 deletions
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index a4b41dbde128..ecad10d4e928 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c | |||
@@ -77,7 +77,7 @@ static void cpm_end_irq(unsigned int irq) | |||
77 | } | 77 | } |
78 | 78 | ||
79 | static struct irq_chip cpm_pic = { | 79 | static struct irq_chip cpm_pic = { |
80 | .name = " CPM PIC ", | 80 | .name = "CPM PIC", |
81 | .mask = cpm_mask_irq, | 81 | .mask = cpm_mask_irq, |
82 | .unmask = cpm_unmask_irq, | 82 | .unmask = cpm_unmask_irq, |
83 | .eoi = cpm_end_irq, | 83 | .eoi = cpm_end_irq, |
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index 1709ac5aac7c..fcea4ff825dd 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c | |||
@@ -198,7 +198,7 @@ err_sense: | |||
198 | } | 198 | } |
199 | 199 | ||
200 | static struct irq_chip cpm2_pic = { | 200 | static struct irq_chip cpm2_pic = { |
201 | .name = " CPM2 SIU ", | 201 | .name = "CPM2 SIU", |
202 | .mask = cpm2_mask_irq, | 202 | .mask = cpm2_mask_irq, |
203 | .unmask = cpm2_unmask_irq, | 203 | .unmask = cpm2_unmask_irq, |
204 | .ack = cpm2_ack, | 204 | .ack = cpm2_ack, |
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index c6e11b077108..e094367d7739 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c | |||
@@ -47,7 +47,7 @@ static struct irq_chip fsl_msi_chip = { | |||
47 | .mask = mask_msi_irq, | 47 | .mask = mask_msi_irq, |
48 | .unmask = unmask_msi_irq, | 48 | .unmask = unmask_msi_irq, |
49 | .ack = fsl_msi_end_irq, | 49 | .ack = fsl_msi_end_irq, |
50 | .name = " FSL-MSI ", | 50 | .name = "FSL-MSI", |
51 | }; | 51 | }; |
52 | 52 | ||
53 | static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, | 53 | static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, |
diff --git a/arch/powerpc/sysdev/grackle.c b/arch/powerpc/sysdev/grackle.c index 5da37c2f22ee..cf27df6e508b 100644 --- a/arch/powerpc/sysdev/grackle.c +++ b/arch/powerpc/sysdev/grackle.c | |||
@@ -56,9 +56,9 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable) | |||
56 | void __init setup_grackle(struct pci_controller *hose) | 56 | void __init setup_grackle(struct pci_controller *hose) |
57 | { | 57 | { |
58 | setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0); | 58 | setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0); |
59 | if (machine_is_compatible("PowerMac1,1")) | 59 | if (of_machine_is_compatible("PowerMac1,1")) |
60 | ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS); | 60 | ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS); |
61 | if (machine_is_compatible("AAPL,PowerBook1998")) | 61 | if (of_machine_is_compatible("AAPL,PowerBook1998")) |
62 | grackle_set_loop_snoop(hose, 1); | 62 | grackle_set_loop_snoop(hose, 1); |
63 | #if 0 /* Disabled for now, HW problems ??? */ | 63 | #if 0 /* Disabled for now, HW problems ??? */ |
64 | grackle_set_stg(hose, 1); | 64 | grackle_set_stg(hose, 1); |
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c index 0a55db8a5a29..6323e70e6bf4 100644 --- a/arch/powerpc/sysdev/i8259.c +++ b/arch/powerpc/sysdev/i8259.c | |||
@@ -23,7 +23,7 @@ static unsigned char cached_8259[2] = { 0xff, 0xff }; | |||
23 | #define cached_A1 (cached_8259[0]) | 23 | #define cached_A1 (cached_8259[0]) |
24 | #define cached_21 (cached_8259[1]) | 24 | #define cached_21 (cached_8259[1]) |
25 | 25 | ||
26 | static DEFINE_SPINLOCK(i8259_lock); | 26 | static DEFINE_RAW_SPINLOCK(i8259_lock); |
27 | 27 | ||
28 | static struct irq_host *i8259_host; | 28 | static struct irq_host *i8259_host; |
29 | 29 | ||
@@ -42,7 +42,7 @@ unsigned int i8259_irq(void) | |||
42 | if (pci_intack) | 42 | if (pci_intack) |
43 | irq = readb(pci_intack); | 43 | irq = readb(pci_intack); |
44 | else { | 44 | else { |
45 | spin_lock(&i8259_lock); | 45 | raw_spin_lock(&i8259_lock); |
46 | lock = 1; | 46 | lock = 1; |
47 | 47 | ||
48 | /* Perform an interrupt acknowledge cycle on controller 1. */ | 48 | /* Perform an interrupt acknowledge cycle on controller 1. */ |
@@ -74,7 +74,7 @@ unsigned int i8259_irq(void) | |||
74 | irq = NO_IRQ; | 74 | irq = NO_IRQ; |
75 | 75 | ||
76 | if (lock) | 76 | if (lock) |
77 | spin_unlock(&i8259_lock); | 77 | raw_spin_unlock(&i8259_lock); |
78 | return irq; | 78 | return irq; |
79 | } | 79 | } |
80 | 80 | ||
@@ -82,7 +82,7 @@ static void i8259_mask_and_ack_irq(unsigned int irq_nr) | |||
82 | { | 82 | { |
83 | unsigned long flags; | 83 | unsigned long flags; |
84 | 84 | ||
85 | spin_lock_irqsave(&i8259_lock, flags); | 85 | raw_spin_lock_irqsave(&i8259_lock, flags); |
86 | if (irq_nr > 7) { | 86 | if (irq_nr > 7) { |
87 | cached_A1 |= 1 << (irq_nr-8); | 87 | cached_A1 |= 1 << (irq_nr-8); |
88 | inb(0xA1); /* DUMMY */ | 88 | inb(0xA1); /* DUMMY */ |
@@ -95,7 +95,7 @@ static void i8259_mask_and_ack_irq(unsigned int irq_nr) | |||
95 | outb(cached_21, 0x21); | 95 | outb(cached_21, 0x21); |
96 | outb(0x20, 0x20); /* Non-specific EOI */ | 96 | outb(0x20, 0x20); /* Non-specific EOI */ |
97 | } | 97 | } |
98 | spin_unlock_irqrestore(&i8259_lock, flags); | 98 | raw_spin_unlock_irqrestore(&i8259_lock, flags); |
99 | } | 99 | } |
100 | 100 | ||
101 | static void i8259_set_irq_mask(int irq_nr) | 101 | static void i8259_set_irq_mask(int irq_nr) |
@@ -110,13 +110,13 @@ static void i8259_mask_irq(unsigned int irq_nr) | |||
110 | 110 | ||
111 | pr_debug("i8259_mask_irq(%d)\n", irq_nr); | 111 | pr_debug("i8259_mask_irq(%d)\n", irq_nr); |
112 | 112 | ||
113 | spin_lock_irqsave(&i8259_lock, flags); | 113 | raw_spin_lock_irqsave(&i8259_lock, flags); |
114 | if (irq_nr < 8) | 114 | if (irq_nr < 8) |
115 | cached_21 |= 1 << irq_nr; | 115 | cached_21 |= 1 << irq_nr; |
116 | else | 116 | else |
117 | cached_A1 |= 1 << (irq_nr-8); | 117 | cached_A1 |= 1 << (irq_nr-8); |
118 | i8259_set_irq_mask(irq_nr); | 118 | i8259_set_irq_mask(irq_nr); |
119 | spin_unlock_irqrestore(&i8259_lock, flags); | 119 | raw_spin_unlock_irqrestore(&i8259_lock, flags); |
120 | } | 120 | } |
121 | 121 | ||
122 | static void i8259_unmask_irq(unsigned int irq_nr) | 122 | static void i8259_unmask_irq(unsigned int irq_nr) |
@@ -125,17 +125,17 @@ static void i8259_unmask_irq(unsigned int irq_nr) | |||
125 | 125 | ||
126 | pr_debug("i8259_unmask_irq(%d)\n", irq_nr); | 126 | pr_debug("i8259_unmask_irq(%d)\n", irq_nr); |
127 | 127 | ||
128 | spin_lock_irqsave(&i8259_lock, flags); | 128 | raw_spin_lock_irqsave(&i8259_lock, flags); |
129 | if (irq_nr < 8) | 129 | if (irq_nr < 8) |
130 | cached_21 &= ~(1 << irq_nr); | 130 | cached_21 &= ~(1 << irq_nr); |
131 | else | 131 | else |
132 | cached_A1 &= ~(1 << (irq_nr-8)); | 132 | cached_A1 &= ~(1 << (irq_nr-8)); |
133 | i8259_set_irq_mask(irq_nr); | 133 | i8259_set_irq_mask(irq_nr); |
134 | spin_unlock_irqrestore(&i8259_lock, flags); | 134 | raw_spin_unlock_irqrestore(&i8259_lock, flags); |
135 | } | 135 | } |
136 | 136 | ||
137 | static struct irq_chip i8259_pic = { | 137 | static struct irq_chip i8259_pic = { |
138 | .name = " i8259 ", | 138 | .name = "i8259", |
139 | .mask = i8259_mask_irq, | 139 | .mask = i8259_mask_irq, |
140 | .disable = i8259_mask_irq, | 140 | .disable = i8259_mask_irq, |
141 | .unmask = i8259_unmask_irq, | 141 | .unmask = i8259_unmask_irq, |
@@ -241,7 +241,7 @@ void i8259_init(struct device_node *node, unsigned long intack_addr) | |||
241 | unsigned long flags; | 241 | unsigned long flags; |
242 | 242 | ||
243 | /* initialize the controller */ | 243 | /* initialize the controller */ |
244 | spin_lock_irqsave(&i8259_lock, flags); | 244 | raw_spin_lock_irqsave(&i8259_lock, flags); |
245 | 245 | ||
246 | /* Mask all first */ | 246 | /* Mask all first */ |
247 | outb(0xff, 0xA1); | 247 | outb(0xff, 0xA1); |
@@ -273,7 +273,7 @@ void i8259_init(struct device_node *node, unsigned long intack_addr) | |||
273 | outb(cached_A1, 0xA1); | 273 | outb(cached_A1, 0xA1); |
274 | outb(cached_21, 0x21); | 274 | outb(cached_21, 0x21); |
275 | 275 | ||
276 | spin_unlock_irqrestore(&i8259_lock, flags); | 276 | raw_spin_unlock_irqrestore(&i8259_lock, flags); |
277 | 277 | ||
278 | /* create a legacy host */ | 278 | /* create a legacy host */ |
279 | i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY, | 279 | i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY, |
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 28cdddd2f89e..d7b9b9c69287 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c | |||
@@ -32,7 +32,7 @@ | |||
32 | 32 | ||
33 | static struct ipic * primary_ipic; | 33 | static struct ipic * primary_ipic; |
34 | static struct irq_chip ipic_level_irq_chip, ipic_edge_irq_chip; | 34 | static struct irq_chip ipic_level_irq_chip, ipic_edge_irq_chip; |
35 | static DEFINE_SPINLOCK(ipic_lock); | 35 | static DEFINE_RAW_SPINLOCK(ipic_lock); |
36 | 36 | ||
37 | static struct ipic_info ipic_info[] = { | 37 | static struct ipic_info ipic_info[] = { |
38 | [1] = { | 38 | [1] = { |
@@ -530,13 +530,13 @@ static void ipic_unmask_irq(unsigned int virq) | |||
530 | unsigned long flags; | 530 | unsigned long flags; |
531 | u32 temp; | 531 | u32 temp; |
532 | 532 | ||
533 | spin_lock_irqsave(&ipic_lock, flags); | 533 | raw_spin_lock_irqsave(&ipic_lock, flags); |
534 | 534 | ||
535 | temp = ipic_read(ipic->regs, ipic_info[src].mask); | 535 | temp = ipic_read(ipic->regs, ipic_info[src].mask); |
536 | temp |= (1 << (31 - ipic_info[src].bit)); | 536 | temp |= (1 << (31 - ipic_info[src].bit)); |
537 | ipic_write(ipic->regs, ipic_info[src].mask, temp); | 537 | ipic_write(ipic->regs, ipic_info[src].mask, temp); |
538 | 538 | ||
539 | spin_unlock_irqrestore(&ipic_lock, flags); | 539 | raw_spin_unlock_irqrestore(&ipic_lock, flags); |
540 | } | 540 | } |
541 | 541 | ||
542 | static void ipic_mask_irq(unsigned int virq) | 542 | static void ipic_mask_irq(unsigned int virq) |
@@ -546,7 +546,7 @@ static void ipic_mask_irq(unsigned int virq) | |||
546 | unsigned long flags; | 546 | unsigned long flags; |
547 | u32 temp; | 547 | u32 temp; |
548 | 548 | ||
549 | spin_lock_irqsave(&ipic_lock, flags); | 549 | raw_spin_lock_irqsave(&ipic_lock, flags); |
550 | 550 | ||
551 | temp = ipic_read(ipic->regs, ipic_info[src].mask); | 551 | temp = ipic_read(ipic->regs, ipic_info[src].mask); |
552 | temp &= ~(1 << (31 - ipic_info[src].bit)); | 552 | temp &= ~(1 << (31 - ipic_info[src].bit)); |
@@ -556,7 +556,7 @@ static void ipic_mask_irq(unsigned int virq) | |||
556 | * for nearly all cases. */ | 556 | * for nearly all cases. */ |
557 | mb(); | 557 | mb(); |
558 | 558 | ||
559 | spin_unlock_irqrestore(&ipic_lock, flags); | 559 | raw_spin_unlock_irqrestore(&ipic_lock, flags); |
560 | } | 560 | } |
561 | 561 | ||
562 | static void ipic_ack_irq(unsigned int virq) | 562 | static void ipic_ack_irq(unsigned int virq) |
@@ -566,7 +566,7 @@ static void ipic_ack_irq(unsigned int virq) | |||
566 | unsigned long flags; | 566 | unsigned long flags; |
567 | u32 temp; | 567 | u32 temp; |
568 | 568 | ||
569 | spin_lock_irqsave(&ipic_lock, flags); | 569 | raw_spin_lock_irqsave(&ipic_lock, flags); |
570 | 570 | ||
571 | temp = 1 << (31 - ipic_info[src].bit); | 571 | temp = 1 << (31 - ipic_info[src].bit); |
572 | ipic_write(ipic->regs, ipic_info[src].ack, temp); | 572 | ipic_write(ipic->regs, ipic_info[src].ack, temp); |
@@ -575,7 +575,7 @@ static void ipic_ack_irq(unsigned int virq) | |||
575 | * for nearly all cases. */ | 575 | * for nearly all cases. */ |
576 | mb(); | 576 | mb(); |
577 | 577 | ||
578 | spin_unlock_irqrestore(&ipic_lock, flags); | 578 | raw_spin_unlock_irqrestore(&ipic_lock, flags); |
579 | } | 579 | } |
580 | 580 | ||
581 | static void ipic_mask_irq_and_ack(unsigned int virq) | 581 | static void ipic_mask_irq_and_ack(unsigned int virq) |
@@ -585,7 +585,7 @@ static void ipic_mask_irq_and_ack(unsigned int virq) | |||
585 | unsigned long flags; | 585 | unsigned long flags; |
586 | u32 temp; | 586 | u32 temp; |
587 | 587 | ||
588 | spin_lock_irqsave(&ipic_lock, flags); | 588 | raw_spin_lock_irqsave(&ipic_lock, flags); |
589 | 589 | ||
590 | temp = ipic_read(ipic->regs, ipic_info[src].mask); | 590 | temp = ipic_read(ipic->regs, ipic_info[src].mask); |
591 | temp &= ~(1 << (31 - ipic_info[src].bit)); | 591 | temp &= ~(1 << (31 - ipic_info[src].bit)); |
@@ -598,7 +598,7 @@ static void ipic_mask_irq_and_ack(unsigned int virq) | |||
598 | * for nearly all cases. */ | 598 | * for nearly all cases. */ |
599 | mb(); | 599 | mb(); |
600 | 600 | ||
601 | spin_unlock_irqrestore(&ipic_lock, flags); | 601 | raw_spin_unlock_irqrestore(&ipic_lock, flags); |
602 | } | 602 | } |
603 | 603 | ||
604 | static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type) | 604 | static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type) |
@@ -660,7 +660,7 @@ static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type) | |||
660 | 660 | ||
661 | /* level interrupts and edge interrupts have different ack operations */ | 661 | /* level interrupts and edge interrupts have different ack operations */ |
662 | static struct irq_chip ipic_level_irq_chip = { | 662 | static struct irq_chip ipic_level_irq_chip = { |
663 | .name = " IPIC ", | 663 | .name = "IPIC", |
664 | .unmask = ipic_unmask_irq, | 664 | .unmask = ipic_unmask_irq, |
665 | .mask = ipic_mask_irq, | 665 | .mask = ipic_mask_irq, |
666 | .mask_ack = ipic_mask_irq, | 666 | .mask_ack = ipic_mask_irq, |
@@ -668,7 +668,7 @@ static struct irq_chip ipic_level_irq_chip = { | |||
668 | }; | 668 | }; |
669 | 669 | ||
670 | static struct irq_chip ipic_edge_irq_chip = { | 670 | static struct irq_chip ipic_edge_irq_chip = { |
671 | .name = " IPIC ", | 671 | .name = "IPIC", |
672 | .unmask = ipic_unmask_irq, | 672 | .unmask = ipic_unmask_irq, |
673 | .mask = ipic_mask_irq, | 673 | .mask = ipic_mask_irq, |
674 | .mask_ack = ipic_mask_irq_and_ack, | 674 | .mask_ack = ipic_mask_irq_and_ack, |
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c index 69bd6f4dff83..8c27d261aba8 100644 --- a/arch/powerpc/sysdev/mpc8xx_pic.c +++ b/arch/powerpc/sysdev/mpc8xx_pic.c | |||
@@ -94,7 +94,7 @@ static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type) | |||
94 | } | 94 | } |
95 | 95 | ||
96 | static struct irq_chip mpc8xx_pic = { | 96 | static struct irq_chip mpc8xx_pic = { |
97 | .name = " MPC8XX SIU ", | 97 | .name = "MPC8XX SIU", |
98 | .unmask = mpc8xx_unmask_irq, | 98 | .unmask = mpc8xx_unmask_irq, |
99 | .mask = mpc8xx_mask_irq, | 99 | .mask = mpc8xx_mask_irq, |
100 | .ack = mpc8xx_ack, | 100 | .ack = mpc8xx_ack, |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 470dc6c11d57..339e8a3e26d2 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -46,7 +46,7 @@ | |||
46 | 46 | ||
47 | static struct mpic *mpics; | 47 | static struct mpic *mpics; |
48 | static struct mpic *mpic_primary; | 48 | static struct mpic *mpic_primary; |
49 | static DEFINE_SPINLOCK(mpic_lock); | 49 | static DEFINE_RAW_SPINLOCK(mpic_lock); |
50 | 50 | ||
51 | #ifdef CONFIG_PPC32 /* XXX for now */ | 51 | #ifdef CONFIG_PPC32 /* XXX for now */ |
52 | #ifdef CONFIG_IRQ_ALL_CPUS | 52 | #ifdef CONFIG_IRQ_ALL_CPUS |
@@ -347,10 +347,10 @@ static inline void mpic_ht_end_irq(struct mpic *mpic, unsigned int source) | |||
347 | unsigned int mask = 1U << (fixup->index & 0x1f); | 347 | unsigned int mask = 1U << (fixup->index & 0x1f); |
348 | writel(mask, fixup->applebase + soff); | 348 | writel(mask, fixup->applebase + soff); |
349 | } else { | 349 | } else { |
350 | spin_lock(&mpic->fixup_lock); | 350 | raw_spin_lock(&mpic->fixup_lock); |
351 | writeb(0x11 + 2 * fixup->index, fixup->base + 2); | 351 | writeb(0x11 + 2 * fixup->index, fixup->base + 2); |
352 | writel(fixup->data, fixup->base + 4); | 352 | writel(fixup->data, fixup->base + 4); |
353 | spin_unlock(&mpic->fixup_lock); | 353 | raw_spin_unlock(&mpic->fixup_lock); |
354 | } | 354 | } |
355 | } | 355 | } |
356 | 356 | ||
@@ -366,7 +366,7 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source, | |||
366 | 366 | ||
367 | DBG("startup_ht_interrupt(0x%x, 0x%x) index: %d\n", | 367 | DBG("startup_ht_interrupt(0x%x, 0x%x) index: %d\n", |
368 | source, irqflags, fixup->index); | 368 | source, irqflags, fixup->index); |
369 | spin_lock_irqsave(&mpic->fixup_lock, flags); | 369 | raw_spin_lock_irqsave(&mpic->fixup_lock, flags); |
370 | /* Enable and configure */ | 370 | /* Enable and configure */ |
371 | writeb(0x10 + 2 * fixup->index, fixup->base + 2); | 371 | writeb(0x10 + 2 * fixup->index, fixup->base + 2); |
372 | tmp = readl(fixup->base + 4); | 372 | tmp = readl(fixup->base + 4); |
@@ -374,7 +374,7 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source, | |||
374 | if (irqflags & IRQ_LEVEL) | 374 | if (irqflags & IRQ_LEVEL) |
375 | tmp |= 0x22; | 375 | tmp |= 0x22; |
376 | writel(tmp, fixup->base + 4); | 376 | writel(tmp, fixup->base + 4); |
377 | spin_unlock_irqrestore(&mpic->fixup_lock, flags); | 377 | raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags); |
378 | 378 | ||
379 | #ifdef CONFIG_PM | 379 | #ifdef CONFIG_PM |
380 | /* use the lowest bit inverted to the actual HW, | 380 | /* use the lowest bit inverted to the actual HW, |
@@ -396,12 +396,12 @@ static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source, | |||
396 | DBG("shutdown_ht_interrupt(0x%x, 0x%x)\n", source, irqflags); | 396 | DBG("shutdown_ht_interrupt(0x%x, 0x%x)\n", source, irqflags); |
397 | 397 | ||
398 | /* Disable */ | 398 | /* Disable */ |
399 | spin_lock_irqsave(&mpic->fixup_lock, flags); | 399 | raw_spin_lock_irqsave(&mpic->fixup_lock, flags); |
400 | writeb(0x10 + 2 * fixup->index, fixup->base + 2); | 400 | writeb(0x10 + 2 * fixup->index, fixup->base + 2); |
401 | tmp = readl(fixup->base + 4); | 401 | tmp = readl(fixup->base + 4); |
402 | tmp |= 1; | 402 | tmp |= 1; |
403 | writel(tmp, fixup->base + 4); | 403 | writel(tmp, fixup->base + 4); |
404 | spin_unlock_irqrestore(&mpic->fixup_lock, flags); | 404 | raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags); |
405 | 405 | ||
406 | #ifdef CONFIG_PM | 406 | #ifdef CONFIG_PM |
407 | /* use the lowest bit inverted to the actual HW, | 407 | /* use the lowest bit inverted to the actual HW, |
@@ -515,7 +515,7 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic) | |||
515 | BUG_ON(mpic->fixups == NULL); | 515 | BUG_ON(mpic->fixups == NULL); |
516 | 516 | ||
517 | /* Init spinlock */ | 517 | /* Init spinlock */ |
518 | spin_lock_init(&mpic->fixup_lock); | 518 | raw_spin_lock_init(&mpic->fixup_lock); |
519 | 519 | ||
520 | /* Map U3 config space. We assume all IO-APICs are on the primary bus | 520 | /* Map U3 config space. We assume all IO-APICs are on the primary bus |
521 | * so we only need to map 64kB. | 521 | * so we only need to map 64kB. |
@@ -573,12 +573,12 @@ static int irq_choose_cpu(const cpumask_t *mask) | |||
573 | 573 | ||
574 | if (cpumask_equal(mask, cpu_all_mask)) { | 574 | if (cpumask_equal(mask, cpu_all_mask)) { |
575 | static int irq_rover; | 575 | static int irq_rover; |
576 | static DEFINE_SPINLOCK(irq_rover_lock); | 576 | static DEFINE_RAW_SPINLOCK(irq_rover_lock); |
577 | unsigned long flags; | 577 | unsigned long flags; |
578 | 578 | ||
579 | /* Round-robin distribution... */ | 579 | /* Round-robin distribution... */ |
580 | do_round_robin: | 580 | do_round_robin: |
581 | spin_lock_irqsave(&irq_rover_lock, flags); | 581 | raw_spin_lock_irqsave(&irq_rover_lock, flags); |
582 | 582 | ||
583 | while (!cpu_online(irq_rover)) { | 583 | while (!cpu_online(irq_rover)) { |
584 | if (++irq_rover >= NR_CPUS) | 584 | if (++irq_rover >= NR_CPUS) |
@@ -590,7 +590,7 @@ static int irq_choose_cpu(const cpumask_t *mask) | |||
590 | irq_rover = 0; | 590 | irq_rover = 0; |
591 | } while (!cpu_online(irq_rover)); | 591 | } while (!cpu_online(irq_rover)); |
592 | 592 | ||
593 | spin_unlock_irqrestore(&irq_rover_lock, flags); | 593 | raw_spin_unlock_irqrestore(&irq_rover_lock, flags); |
594 | } else { | 594 | } else { |
595 | cpuid = cpumask_first_and(mask, cpu_online_mask); | 595 | cpuid = cpumask_first_and(mask, cpu_online_mask); |
596 | if (cpuid >= nr_cpu_ids) | 596 | if (cpuid >= nr_cpu_ids) |
@@ -1368,14 +1368,14 @@ void __init mpic_set_serial_int(struct mpic *mpic, int enable) | |||
1368 | unsigned long flags; | 1368 | unsigned long flags; |
1369 | u32 v; | 1369 | u32 v; |
1370 | 1370 | ||
1371 | spin_lock_irqsave(&mpic_lock, flags); | 1371 | raw_spin_lock_irqsave(&mpic_lock, flags); |
1372 | v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1); | 1372 | v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1); |
1373 | if (enable) | 1373 | if (enable) |
1374 | v |= MPIC_GREG_GLOBAL_CONF_1_SIE; | 1374 | v |= MPIC_GREG_GLOBAL_CONF_1_SIE; |
1375 | else | 1375 | else |
1376 | v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE; | 1376 | v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE; |
1377 | mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v); | 1377 | mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v); |
1378 | spin_unlock_irqrestore(&mpic_lock, flags); | 1378 | raw_spin_unlock_irqrestore(&mpic_lock, flags); |
1379 | } | 1379 | } |
1380 | 1380 | ||
1381 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | 1381 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) |
@@ -1388,7 +1388,7 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | |||
1388 | if (!mpic) | 1388 | if (!mpic) |
1389 | return; | 1389 | return; |
1390 | 1390 | ||
1391 | spin_lock_irqsave(&mpic_lock, flags); | 1391 | raw_spin_lock_irqsave(&mpic_lock, flags); |
1392 | if (mpic_is_ipi(mpic, irq)) { | 1392 | if (mpic_is_ipi(mpic, irq)) { |
1393 | reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & | 1393 | reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & |
1394 | ~MPIC_VECPRI_PRIORITY_MASK; | 1394 | ~MPIC_VECPRI_PRIORITY_MASK; |
@@ -1400,7 +1400,7 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | |||
1400 | mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), | 1400 | mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), |
1401 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); | 1401 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); |
1402 | } | 1402 | } |
1403 | spin_unlock_irqrestore(&mpic_lock, flags); | 1403 | raw_spin_unlock_irqrestore(&mpic_lock, flags); |
1404 | } | 1404 | } |
1405 | 1405 | ||
1406 | void mpic_setup_this_cpu(void) | 1406 | void mpic_setup_this_cpu(void) |
@@ -1415,7 +1415,7 @@ void mpic_setup_this_cpu(void) | |||
1415 | 1415 | ||
1416 | DBG("%s: setup_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); | 1416 | DBG("%s: setup_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); |
1417 | 1417 | ||
1418 | spin_lock_irqsave(&mpic_lock, flags); | 1418 | raw_spin_lock_irqsave(&mpic_lock, flags); |
1419 | 1419 | ||
1420 | /* let the mpic know we want intrs. default affinity is 0xffffffff | 1420 | /* let the mpic know we want intrs. default affinity is 0xffffffff |
1421 | * until changed via /proc. That's how it's done on x86. If we want | 1421 | * until changed via /proc. That's how it's done on x86. If we want |
@@ -1431,7 +1431,7 @@ void mpic_setup_this_cpu(void) | |||
1431 | /* Set current processor priority to 0 */ | 1431 | /* Set current processor priority to 0 */ |
1432 | mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0); | 1432 | mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0); |
1433 | 1433 | ||
1434 | spin_unlock_irqrestore(&mpic_lock, flags); | 1434 | raw_spin_unlock_irqrestore(&mpic_lock, flags); |
1435 | #endif /* CONFIG_SMP */ | 1435 | #endif /* CONFIG_SMP */ |
1436 | } | 1436 | } |
1437 | 1437 | ||
@@ -1460,7 +1460,7 @@ void mpic_teardown_this_cpu(int secondary) | |||
1460 | BUG_ON(mpic == NULL); | 1460 | BUG_ON(mpic == NULL); |
1461 | 1461 | ||
1462 | DBG("%s: teardown_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); | 1462 | DBG("%s: teardown_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); |
1463 | spin_lock_irqsave(&mpic_lock, flags); | 1463 | raw_spin_lock_irqsave(&mpic_lock, flags); |
1464 | 1464 | ||
1465 | /* let the mpic know we don't want intrs. */ | 1465 | /* let the mpic know we don't want intrs. */ |
1466 | for (i = 0; i < mpic->num_sources ; i++) | 1466 | for (i = 0; i < mpic->num_sources ; i++) |
@@ -1474,7 +1474,7 @@ void mpic_teardown_this_cpu(int secondary) | |||
1474 | */ | 1474 | */ |
1475 | mpic_eoi(mpic); | 1475 | mpic_eoi(mpic); |
1476 | 1476 | ||
1477 | spin_unlock_irqrestore(&mpic_lock, flags); | 1477 | raw_spin_unlock_irqrestore(&mpic_lock, flags); |
1478 | } | 1478 | } |
1479 | 1479 | ||
1480 | 1480 | ||
@@ -1575,7 +1575,7 @@ void mpic_request_ipis(void) | |||
1575 | int i; | 1575 | int i; |
1576 | BUG_ON(mpic == NULL); | 1576 | BUG_ON(mpic == NULL); |
1577 | 1577 | ||
1578 | printk(KERN_INFO "mpic: requesting IPIs ... \n"); | 1578 | printk(KERN_INFO "mpic: requesting IPIs...\n"); |
1579 | 1579 | ||
1580 | for (i = 0; i < 4; i++) { | 1580 | for (i = 0; i < 4; i++) { |
1581 | unsigned int vipi = irq_create_mapping(mpic->irqhost, | 1581 | unsigned int vipi = irq_create_mapping(mpic->irqhost, |
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c index 0f6ab06f8474..3b6a9a43718f 100644 --- a/arch/powerpc/sysdev/mpic_pasemi_msi.c +++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c | |||
@@ -60,7 +60,7 @@ static struct irq_chip mpic_pasemi_msi_chip = { | |||
60 | .eoi = mpic_end_irq, | 60 | .eoi = mpic_end_irq, |
61 | .set_type = mpic_set_irq_type, | 61 | .set_type = mpic_set_irq_type, |
62 | .set_affinity = mpic_set_affinity, | 62 | .set_affinity = mpic_set_affinity, |
63 | .name = "PASEMI-MSI ", | 63 | .name = "PASEMI-MSI", |
64 | }; | 64 | }; |
65 | 65 | ||
66 | static int pasemi_msi_check_device(struct pci_dev *pdev, int nvec, int type) | 66 | static int pasemi_msi_check_device(struct pci_dev *pdev, int nvec, int type) |
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c index b6bd775d2e22..31acd3b1718b 100644 --- a/arch/powerpc/sysdev/mv64x60_dev.c +++ b/arch/powerpc/sysdev/mv64x60_dev.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/mv643xx.h> | 16 | #include <linux/mv643xx.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/of_platform.h> | 18 | #include <linux/of_platform.h> |
19 | #include <linux/dma-mapping.h> | ||
19 | 20 | ||
20 | #include <asm/prom.h> | 21 | #include <asm/prom.h> |
21 | 22 | ||
@@ -189,6 +190,7 @@ static int __init mv64x60_mpsc_device_setup(struct device_node *np, int id) | |||
189 | pdev = platform_device_alloc(MPSC_CTLR_NAME, port_number); | 190 | pdev = platform_device_alloc(MPSC_CTLR_NAME, port_number); |
190 | if (!pdev) | 191 | if (!pdev) |
191 | return -ENOMEM; | 192 | return -ENOMEM; |
193 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | ||
192 | 194 | ||
193 | err = platform_device_add_resources(pdev, r, 5); | 195 | err = platform_device_add_resources(pdev, r, 5); |
194 | if (err) | 196 | if (err) |
@@ -302,6 +304,7 @@ static int __init mv64x60_eth_device_setup(struct device_node *np, int id, | |||
302 | if (!pdev) | 304 | if (!pdev) |
303 | return -ENOMEM; | 305 | return -ENOMEM; |
304 | 306 | ||
307 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | ||
305 | err = platform_device_add_resources(pdev, r, 1); | 308 | err = platform_device_add_resources(pdev, r, 1); |
306 | if (err) | 309 | if (err) |
307 | goto error; | 310 | goto error; |
diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c b/arch/powerpc/sysdev/ppc4xx_soc.c index 5b32adc9a9b2..5c014350bf16 100644 --- a/arch/powerpc/sysdev/ppc4xx_soc.c +++ b/arch/powerpc/sysdev/ppc4xx_soc.c | |||
@@ -174,7 +174,8 @@ static int __init ppc4xx_l2c_probe(void) | |||
174 | | L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM; | 174 | | L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM; |
175 | 175 | ||
176 | /* Check for 460EX/GT special handling */ | 176 | /* Check for 460EX/GT special handling */ |
177 | if (of_device_is_compatible(np, "ibm,l2-cache-460ex")) | 177 | if (of_device_is_compatible(np, "ibm,l2-cache-460ex") || |
178 | of_device_is_compatible(np, "ibm,l2-cache-460gt")) | ||
178 | r |= L2C_CFG_RDBW; | 179 | r |= L2C_CFG_RDBW; |
179 | 180 | ||
180 | mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r); | 181 | mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r); |
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index 2acc928d1920..d927da893ec4 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c | |||
@@ -237,7 +237,7 @@ static void qe_ic_mask_irq(unsigned int virq) | |||
237 | } | 237 | } |
238 | 238 | ||
239 | static struct irq_chip qe_ic_irq_chip = { | 239 | static struct irq_chip qe_ic_irq_chip = { |
240 | .name = " QEIC ", | 240 | .name = "QEIC", |
241 | .unmask = qe_ic_unmask_irq, | 241 | .unmask = qe_ic_unmask_irq, |
242 | .mask = qe_ic_mask_irq, | 242 | .mask = qe_ic_mask_irq, |
243 | .mask_ack = qe_ic_mask_irq, | 243 | .mask_ack = qe_ic_mask_irq, |
@@ -256,7 +256,7 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq, | |||
256 | struct irq_chip *chip; | 256 | struct irq_chip *chip; |
257 | 257 | ||
258 | if (qe_ic_info[hw].mask == 0) { | 258 | if (qe_ic_info[hw].mask == 0) { |
259 | printk(KERN_ERR "Can't map reserved IRQ \n"); | 259 | printk(KERN_ERR "Can't map reserved IRQ\n"); |
260 | return -EINVAL; | 260 | return -EINVAL; |
261 | } | 261 | } |
262 | /* Default chip */ | 262 | /* Default chip */ |
diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c index 7c87460179ef..77e4934b88c5 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_io.c +++ b/arch/powerpc/sysdev/qe_lib/qe_io.c | |||
@@ -157,13 +157,13 @@ int par_io_of_config(struct device_node *np) | |||
157 | const unsigned int *pio_map; | 157 | const unsigned int *pio_map; |
158 | 158 | ||
159 | if (par_io == NULL) { | 159 | if (par_io == NULL) { |
160 | printk(KERN_ERR "par_io not initialized \n"); | 160 | printk(KERN_ERR "par_io not initialized\n"); |
161 | return -1; | 161 | return -1; |
162 | } | 162 | } |
163 | 163 | ||
164 | ph = of_get_property(np, "pio-handle", NULL); | 164 | ph = of_get_property(np, "pio-handle", NULL); |
165 | if (ph == NULL) { | 165 | if (ph == NULL) { |
166 | printk(KERN_ERR "pio-handle not available \n"); | 166 | printk(KERN_ERR "pio-handle not available\n"); |
167 | return -1; | 167 | return -1; |
168 | } | 168 | } |
169 | 169 | ||
@@ -171,12 +171,12 @@ int par_io_of_config(struct device_node *np) | |||
171 | 171 | ||
172 | pio_map = of_get_property(pio, "pio-map", &pio_map_len); | 172 | pio_map = of_get_property(pio, "pio-map", &pio_map_len); |
173 | if (pio_map == NULL) { | 173 | if (pio_map == NULL) { |
174 | printk(KERN_ERR "pio-map is not set! \n"); | 174 | printk(KERN_ERR "pio-map is not set!\n"); |
175 | return -1; | 175 | return -1; |
176 | } | 176 | } |
177 | pio_map_len /= sizeof(unsigned int); | 177 | pio_map_len /= sizeof(unsigned int); |
178 | if ((pio_map_len % 6) != 0) { | 178 | if ((pio_map_len % 6) != 0) { |
179 | printk(KERN_ERR "pio-map format wrong! \n"); | 179 | printk(KERN_ERR "pio-map format wrong!\n"); |
180 | return -1; | 180 | return -1; |
181 | } | 181 | } |
182 | 182 | ||
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c index 6f220a913e42..0038fb78f094 100644 --- a/arch/powerpc/sysdev/uic.c +++ b/arch/powerpc/sysdev/uic.c | |||
@@ -177,7 +177,7 @@ static int uic_set_irq_type(unsigned int virq, unsigned int flow_type) | |||
177 | } | 177 | } |
178 | 178 | ||
179 | static struct irq_chip uic_irq_chip = { | 179 | static struct irq_chip uic_irq_chip = { |
180 | .name = " UIC ", | 180 | .name = "UIC", |
181 | .unmask = uic_unmask_irq, | 181 | .unmask = uic_unmask_irq, |
182 | .mask = uic_mask_irq, | 182 | .mask = uic_mask_irq, |
183 | .mask_ack = uic_mask_ack_irq, | 183 | .mask_ack = uic_mask_ack_irq, |