diff options
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r-- | arch/powerpc/sysdev/cpm1.c | 8 | ||||
-rw-r--r-- | arch/powerpc/sysdev/cpm2_pic.c | 10 | ||||
-rw-r--r-- | arch/powerpc/sysdev/ipic.c | 16 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mpc8xx_pic.c | 10 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mpc8xxx_gpio.c | 12 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mpic.c | 28 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mv64x60_pic.c | 14 | ||||
-rw-r--r-- | arch/powerpc/sysdev/qe_lib/qe_ic.c | 6 | ||||
-rw-r--r-- | arch/powerpc/sysdev/uic.c | 12 | ||||
-rw-r--r-- | arch/powerpc/sysdev/xics/icp-hv.c | 2 | ||||
-rw-r--r-- | arch/powerpc/sysdev/xics/icp-native.c | 2 | ||||
-rw-r--r-- | arch/powerpc/sysdev/xics/ics-rtas.c | 8 | ||||
-rw-r--r-- | arch/powerpc/sysdev/xics/xics-common.c | 4 | ||||
-rw-r--r-- | arch/powerpc/sysdev/xilinx_intc.c | 8 |
14 files changed, 66 insertions, 74 deletions
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index e0bc944eb23f..350787c83e22 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c | |||
@@ -58,21 +58,21 @@ static struct irq_host *cpm_pic_host; | |||
58 | 58 | ||
59 | static void cpm_mask_irq(struct irq_data *d) | 59 | static void cpm_mask_irq(struct irq_data *d) |
60 | { | 60 | { |
61 | unsigned int cpm_vec = (unsigned int)irq_map[d->irq].hwirq; | 61 | unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d); |
62 | 62 | ||
63 | clrbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); | 63 | clrbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); |
64 | } | 64 | } |
65 | 65 | ||
66 | static void cpm_unmask_irq(struct irq_data *d) | 66 | static void cpm_unmask_irq(struct irq_data *d) |
67 | { | 67 | { |
68 | unsigned int cpm_vec = (unsigned int)irq_map[d->irq].hwirq; | 68 | unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d); |
69 | 69 | ||
70 | setbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); | 70 | setbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); |
71 | } | 71 | } |
72 | 72 | ||
73 | static void cpm_end_irq(struct irq_data *d) | 73 | static void cpm_end_irq(struct irq_data *d) |
74 | { | 74 | { |
75 | unsigned int cpm_vec = (unsigned int)irq_map[d->irq].hwirq; | 75 | unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d); |
76 | 76 | ||
77 | out_be32(&cpic_reg->cpic_cisr, (1 << cpm_vec)); | 77 | out_be32(&cpic_reg->cpic_cisr, (1 << cpm_vec)); |
78 | } | 78 | } |
@@ -157,7 +157,7 @@ unsigned int cpm_pic_init(void) | |||
157 | goto end; | 157 | goto end; |
158 | 158 | ||
159 | /* Initialize the CPM interrupt controller. */ | 159 | /* Initialize the CPM interrupt controller. */ |
160 | hwirq = (unsigned int)irq_map[sirq].hwirq; | 160 | hwirq = (unsigned int)virq_to_hw(sirq); |
161 | out_be32(&cpic_reg->cpic_cicr, | 161 | out_be32(&cpic_reg->cpic_cicr, |
162 | (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | | 162 | (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | |
163 | ((hwirq/2) << 13) | CICR_HP_MASK); | 163 | ((hwirq/2) << 13) | CICR_HP_MASK); |
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index 5495c1be472b..bcab50e2a9eb 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c | |||
@@ -81,7 +81,7 @@ static const u_char irq_to_siubit[] = { | |||
81 | static void cpm2_mask_irq(struct irq_data *d) | 81 | static void cpm2_mask_irq(struct irq_data *d) |
82 | { | 82 | { |
83 | int bit, word; | 83 | int bit, word; |
84 | unsigned int irq_nr = virq_to_hw(d->irq); | 84 | unsigned int irq_nr = irqd_to_hwirq(d); |
85 | 85 | ||
86 | bit = irq_to_siubit[irq_nr]; | 86 | bit = irq_to_siubit[irq_nr]; |
87 | word = irq_to_siureg[irq_nr]; | 87 | word = irq_to_siureg[irq_nr]; |
@@ -93,7 +93,7 @@ static void cpm2_mask_irq(struct irq_data *d) | |||
93 | static void cpm2_unmask_irq(struct irq_data *d) | 93 | static void cpm2_unmask_irq(struct irq_data *d) |
94 | { | 94 | { |
95 | int bit, word; | 95 | int bit, word; |
96 | unsigned int irq_nr = virq_to_hw(d->irq); | 96 | unsigned int irq_nr = irqd_to_hwirq(d); |
97 | 97 | ||
98 | bit = irq_to_siubit[irq_nr]; | 98 | bit = irq_to_siubit[irq_nr]; |
99 | word = irq_to_siureg[irq_nr]; | 99 | word = irq_to_siureg[irq_nr]; |
@@ -105,7 +105,7 @@ static void cpm2_unmask_irq(struct irq_data *d) | |||
105 | static void cpm2_ack(struct irq_data *d) | 105 | static void cpm2_ack(struct irq_data *d) |
106 | { | 106 | { |
107 | int bit, word; | 107 | int bit, word; |
108 | unsigned int irq_nr = virq_to_hw(d->irq); | 108 | unsigned int irq_nr = irqd_to_hwirq(d); |
109 | 109 | ||
110 | bit = irq_to_siubit[irq_nr]; | 110 | bit = irq_to_siubit[irq_nr]; |
111 | word = irq_to_siureg[irq_nr]; | 111 | word = irq_to_siureg[irq_nr]; |
@@ -116,7 +116,7 @@ static void cpm2_ack(struct irq_data *d) | |||
116 | static void cpm2_end_irq(struct irq_data *d) | 116 | static void cpm2_end_irq(struct irq_data *d) |
117 | { | 117 | { |
118 | int bit, word; | 118 | int bit, word; |
119 | unsigned int irq_nr = virq_to_hw(d->irq); | 119 | unsigned int irq_nr = irqd_to_hwirq(d); |
120 | 120 | ||
121 | bit = irq_to_siubit[irq_nr]; | 121 | bit = irq_to_siubit[irq_nr]; |
122 | word = irq_to_siureg[irq_nr]; | 122 | word = irq_to_siureg[irq_nr]; |
@@ -133,7 +133,7 @@ static void cpm2_end_irq(struct irq_data *d) | |||
133 | 133 | ||
134 | static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type) | 134 | static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type) |
135 | { | 135 | { |
136 | unsigned int src = virq_to_hw(d->irq); | 136 | unsigned int src = irqd_to_hwirq(d); |
137 | unsigned int vold, vnew, edibit; | 137 | unsigned int vold, vnew, edibit; |
138 | 138 | ||
139 | /* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or | 139 | /* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or |
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index fa438be962b7..f0ece79f9be5 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c | |||
@@ -521,12 +521,10 @@ static inline struct ipic * ipic_from_irq(unsigned int virq) | |||
521 | return primary_ipic; | 521 | return primary_ipic; |
522 | } | 522 | } |
523 | 523 | ||
524 | #define ipic_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | ||
525 | |||
526 | static void ipic_unmask_irq(struct irq_data *d) | 524 | static void ipic_unmask_irq(struct irq_data *d) |
527 | { | 525 | { |
528 | struct ipic *ipic = ipic_from_irq(d->irq); | 526 | struct ipic *ipic = ipic_from_irq(d->irq); |
529 | unsigned int src = ipic_irq_to_hw(d->irq); | 527 | unsigned int src = irqd_to_hwirq(d); |
530 | unsigned long flags; | 528 | unsigned long flags; |
531 | u32 temp; | 529 | u32 temp; |
532 | 530 | ||
@@ -542,7 +540,7 @@ static void ipic_unmask_irq(struct irq_data *d) | |||
542 | static void ipic_mask_irq(struct irq_data *d) | 540 | static void ipic_mask_irq(struct irq_data *d) |
543 | { | 541 | { |
544 | struct ipic *ipic = ipic_from_irq(d->irq); | 542 | struct ipic *ipic = ipic_from_irq(d->irq); |
545 | unsigned int src = ipic_irq_to_hw(d->irq); | 543 | unsigned int src = irqd_to_hwirq(d); |
546 | unsigned long flags; | 544 | unsigned long flags; |
547 | u32 temp; | 545 | u32 temp; |
548 | 546 | ||
@@ -562,7 +560,7 @@ static void ipic_mask_irq(struct irq_data *d) | |||
562 | static void ipic_ack_irq(struct irq_data *d) | 560 | static void ipic_ack_irq(struct irq_data *d) |
563 | { | 561 | { |
564 | struct ipic *ipic = ipic_from_irq(d->irq); | 562 | struct ipic *ipic = ipic_from_irq(d->irq); |
565 | unsigned int src = ipic_irq_to_hw(d->irq); | 563 | unsigned int src = irqd_to_hwirq(d); |
566 | unsigned long flags; | 564 | unsigned long flags; |
567 | u32 temp; | 565 | u32 temp; |
568 | 566 | ||
@@ -581,7 +579,7 @@ static void ipic_ack_irq(struct irq_data *d) | |||
581 | static void ipic_mask_irq_and_ack(struct irq_data *d) | 579 | static void ipic_mask_irq_and_ack(struct irq_data *d) |
582 | { | 580 | { |
583 | struct ipic *ipic = ipic_from_irq(d->irq); | 581 | struct ipic *ipic = ipic_from_irq(d->irq); |
584 | unsigned int src = ipic_irq_to_hw(d->irq); | 582 | unsigned int src = irqd_to_hwirq(d); |
585 | unsigned long flags; | 583 | unsigned long flags; |
586 | u32 temp; | 584 | u32 temp; |
587 | 585 | ||
@@ -604,7 +602,7 @@ static void ipic_mask_irq_and_ack(struct irq_data *d) | |||
604 | static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type) | 602 | static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type) |
605 | { | 603 | { |
606 | struct ipic *ipic = ipic_from_irq(d->irq); | 604 | struct ipic *ipic = ipic_from_irq(d->irq); |
607 | unsigned int src = ipic_irq_to_hw(d->irq); | 605 | unsigned int src = irqd_to_hwirq(d); |
608 | unsigned int vold, vnew, edibit; | 606 | unsigned int vold, vnew, edibit; |
609 | 607 | ||
610 | if (flow_type == IRQ_TYPE_NONE) | 608 | if (flow_type == IRQ_TYPE_NONE) |
@@ -793,7 +791,7 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags) | |||
793 | int ipic_set_priority(unsigned int virq, unsigned int priority) | 791 | int ipic_set_priority(unsigned int virq, unsigned int priority) |
794 | { | 792 | { |
795 | struct ipic *ipic = ipic_from_irq(virq); | 793 | struct ipic *ipic = ipic_from_irq(virq); |
796 | unsigned int src = ipic_irq_to_hw(virq); | 794 | unsigned int src = virq_to_hw(virq); |
797 | u32 temp; | 795 | u32 temp; |
798 | 796 | ||
799 | if (priority > 7) | 797 | if (priority > 7) |
@@ -821,7 +819,7 @@ int ipic_set_priority(unsigned int virq, unsigned int priority) | |||
821 | void ipic_set_highest_priority(unsigned int virq) | 819 | void ipic_set_highest_priority(unsigned int virq) |
822 | { | 820 | { |
823 | struct ipic *ipic = ipic_from_irq(virq); | 821 | struct ipic *ipic = ipic_from_irq(virq); |
824 | unsigned int src = ipic_irq_to_hw(virq); | 822 | unsigned int src = virq_to_hw(virq); |
825 | u32 temp; | 823 | u32 temp; |
826 | 824 | ||
827 | temp = ipic_read(ipic->regs, IPIC_SICFR); | 825 | temp = ipic_read(ipic->regs, IPIC_SICFR); |
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c index a88800ff4d01..20924f2246f0 100644 --- a/arch/powerpc/sysdev/mpc8xx_pic.c +++ b/arch/powerpc/sysdev/mpc8xx_pic.c | |||
@@ -28,7 +28,7 @@ int cpm_get_irq(struct pt_regs *regs); | |||
28 | static void mpc8xx_unmask_irq(struct irq_data *d) | 28 | static void mpc8xx_unmask_irq(struct irq_data *d) |
29 | { | 29 | { |
30 | int bit, word; | 30 | int bit, word; |
31 | unsigned int irq_nr = (unsigned int)irq_map[d->irq].hwirq; | 31 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
32 | 32 | ||
33 | bit = irq_nr & 0x1f; | 33 | bit = irq_nr & 0x1f; |
34 | word = irq_nr >> 5; | 34 | word = irq_nr >> 5; |
@@ -40,7 +40,7 @@ static void mpc8xx_unmask_irq(struct irq_data *d) | |||
40 | static void mpc8xx_mask_irq(struct irq_data *d) | 40 | static void mpc8xx_mask_irq(struct irq_data *d) |
41 | { | 41 | { |
42 | int bit, word; | 42 | int bit, word; |
43 | unsigned int irq_nr = (unsigned int)irq_map[d->irq].hwirq; | 43 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
44 | 44 | ||
45 | bit = irq_nr & 0x1f; | 45 | bit = irq_nr & 0x1f; |
46 | word = irq_nr >> 5; | 46 | word = irq_nr >> 5; |
@@ -52,7 +52,7 @@ static void mpc8xx_mask_irq(struct irq_data *d) | |||
52 | static void mpc8xx_ack(struct irq_data *d) | 52 | static void mpc8xx_ack(struct irq_data *d) |
53 | { | 53 | { |
54 | int bit; | 54 | int bit; |
55 | unsigned int irq_nr = (unsigned int)irq_map[d->irq].hwirq; | 55 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
56 | 56 | ||
57 | bit = irq_nr & 0x1f; | 57 | bit = irq_nr & 0x1f; |
58 | out_be32(&siu_reg->sc_sipend, 1 << (31-bit)); | 58 | out_be32(&siu_reg->sc_sipend, 1 << (31-bit)); |
@@ -61,7 +61,7 @@ static void mpc8xx_ack(struct irq_data *d) | |||
61 | static void mpc8xx_end_irq(struct irq_data *d) | 61 | static void mpc8xx_end_irq(struct irq_data *d) |
62 | { | 62 | { |
63 | int bit, word; | 63 | int bit, word; |
64 | unsigned int irq_nr = (unsigned int)irq_map[d->irq].hwirq; | 64 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
65 | 65 | ||
66 | bit = irq_nr & 0x1f; | 66 | bit = irq_nr & 0x1f; |
67 | word = irq_nr >> 5; | 67 | word = irq_nr >> 5; |
@@ -73,7 +73,7 @@ static void mpc8xx_end_irq(struct irq_data *d) | |||
73 | static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) | 73 | static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) |
74 | { | 74 | { |
75 | if (flow_type & IRQ_TYPE_EDGE_FALLING) { | 75 | if (flow_type & IRQ_TYPE_EDGE_FALLING) { |
76 | irq_hw_number_t hw = (unsigned int)irq_map[d->irq].hwirq; | 76 | irq_hw_number_t hw = (unsigned int)irqd_to_hwirq(d); |
77 | unsigned int siel = in_be32(&siu_reg->sc_siel); | 77 | unsigned int siel = in_be32(&siu_reg->sc_siel); |
78 | 78 | ||
79 | /* only external IRQ senses are programmable */ | 79 | /* only external IRQ senses are programmable */ |
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c index 0892a2841c2b..fb4963abdf55 100644 --- a/arch/powerpc/sysdev/mpc8xxx_gpio.c +++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c | |||
@@ -163,7 +163,7 @@ static void mpc8xxx_irq_unmask(struct irq_data *d) | |||
163 | 163 | ||
164 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); | 164 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
165 | 165 | ||
166 | setbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(d->irq))); | 166 | setbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(irqd_to_hwirq(d))); |
167 | 167 | ||
168 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); | 168 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
169 | } | 169 | } |
@@ -176,7 +176,7 @@ static void mpc8xxx_irq_mask(struct irq_data *d) | |||
176 | 176 | ||
177 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); | 177 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
178 | 178 | ||
179 | clrbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(d->irq))); | 179 | clrbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(irqd_to_hwirq(d))); |
180 | 180 | ||
181 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); | 181 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
182 | } | 182 | } |
@@ -186,7 +186,7 @@ static void mpc8xxx_irq_ack(struct irq_data *d) | |||
186 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); | 186 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); |
187 | struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; | 187 | struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; |
188 | 188 | ||
189 | out_be32(mm->regs + GPIO_IER, mpc8xxx_gpio2mask(virq_to_hw(d->irq))); | 189 | out_be32(mm->regs + GPIO_IER, mpc8xxx_gpio2mask(irqd_to_hwirq(d))); |
190 | } | 190 | } |
191 | 191 | ||
192 | static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type) | 192 | static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type) |
@@ -199,14 +199,14 @@ static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type) | |||
199 | case IRQ_TYPE_EDGE_FALLING: | 199 | case IRQ_TYPE_EDGE_FALLING: |
200 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); | 200 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
201 | setbits32(mm->regs + GPIO_ICR, | 201 | setbits32(mm->regs + GPIO_ICR, |
202 | mpc8xxx_gpio2mask(virq_to_hw(d->irq))); | 202 | mpc8xxx_gpio2mask(irqd_to_hwirq(d))); |
203 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); | 203 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
204 | break; | 204 | break; |
205 | 205 | ||
206 | case IRQ_TYPE_EDGE_BOTH: | 206 | case IRQ_TYPE_EDGE_BOTH: |
207 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); | 207 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
208 | clrbits32(mm->regs + GPIO_ICR, | 208 | clrbits32(mm->regs + GPIO_ICR, |
209 | mpc8xxx_gpio2mask(virq_to_hw(d->irq))); | 209 | mpc8xxx_gpio2mask(irqd_to_hwirq(d))); |
210 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); | 210 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
211 | break; | 211 | break; |
212 | 212 | ||
@@ -221,7 +221,7 @@ static int mpc512x_irq_set_type(struct irq_data *d, unsigned int flow_type) | |||
221 | { | 221 | { |
222 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); | 222 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); |
223 | struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; | 223 | struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; |
224 | unsigned long gpio = virq_to_hw(d->irq); | 224 | unsigned long gpio = irqd_to_hwirq(d); |
225 | void __iomem *reg; | 225 | void __iomem *reg; |
226 | unsigned int shift; | 226 | unsigned int shift; |
227 | unsigned long flags; | 227 | unsigned long flags; |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index f91c065bed5a..824a94fc413b 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -607,8 +607,6 @@ static int irq_choose_cpu(const struct cpumask *mask) | |||
607 | } | 607 | } |
608 | #endif | 608 | #endif |
609 | 609 | ||
610 | #define mpic_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | ||
611 | |||
612 | /* Find an mpic associated with a given linux interrupt */ | 610 | /* Find an mpic associated with a given linux interrupt */ |
613 | static struct mpic *mpic_find(unsigned int irq) | 611 | static struct mpic *mpic_find(unsigned int irq) |
614 | { | 612 | { |
@@ -621,7 +619,7 @@ static struct mpic *mpic_find(unsigned int irq) | |||
621 | /* Determine if the linux irq is an IPI */ | 619 | /* Determine if the linux irq is an IPI */ |
622 | static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq) | 620 | static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq) |
623 | { | 621 | { |
624 | unsigned int src = mpic_irq_to_hw(irq); | 622 | unsigned int src = virq_to_hw(irq); |
625 | 623 | ||
626 | return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); | 624 | return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); |
627 | } | 625 | } |
@@ -674,7 +672,7 @@ void mpic_unmask_irq(struct irq_data *d) | |||
674 | { | 672 | { |
675 | unsigned int loops = 100000; | 673 | unsigned int loops = 100000; |
676 | struct mpic *mpic = mpic_from_irq_data(d); | 674 | struct mpic *mpic = mpic_from_irq_data(d); |
677 | unsigned int src = mpic_irq_to_hw(d->irq); | 675 | unsigned int src = irqd_to_hwirq(d); |
678 | 676 | ||
679 | DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, d->irq, src); | 677 | DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, d->irq, src); |
680 | 678 | ||
@@ -695,7 +693,7 @@ void mpic_mask_irq(struct irq_data *d) | |||
695 | { | 693 | { |
696 | unsigned int loops = 100000; | 694 | unsigned int loops = 100000; |
697 | struct mpic *mpic = mpic_from_irq_data(d); | 695 | struct mpic *mpic = mpic_from_irq_data(d); |
698 | unsigned int src = mpic_irq_to_hw(d->irq); | 696 | unsigned int src = irqd_to_hwirq(d); |
699 | 697 | ||
700 | DBG("%s: disable_irq: %d (src %d)\n", mpic->name, d->irq, src); | 698 | DBG("%s: disable_irq: %d (src %d)\n", mpic->name, d->irq, src); |
701 | 699 | ||
@@ -733,7 +731,7 @@ void mpic_end_irq(struct irq_data *d) | |||
733 | static void mpic_unmask_ht_irq(struct irq_data *d) | 731 | static void mpic_unmask_ht_irq(struct irq_data *d) |
734 | { | 732 | { |
735 | struct mpic *mpic = mpic_from_irq_data(d); | 733 | struct mpic *mpic = mpic_from_irq_data(d); |
736 | unsigned int src = mpic_irq_to_hw(d->irq); | 734 | unsigned int src = irqd_to_hwirq(d); |
737 | 735 | ||
738 | mpic_unmask_irq(d); | 736 | mpic_unmask_irq(d); |
739 | 737 | ||
@@ -744,7 +742,7 @@ static void mpic_unmask_ht_irq(struct irq_data *d) | |||
744 | static unsigned int mpic_startup_ht_irq(struct irq_data *d) | 742 | static unsigned int mpic_startup_ht_irq(struct irq_data *d) |
745 | { | 743 | { |
746 | struct mpic *mpic = mpic_from_irq_data(d); | 744 | struct mpic *mpic = mpic_from_irq_data(d); |
747 | unsigned int src = mpic_irq_to_hw(d->irq); | 745 | unsigned int src = irqd_to_hwirq(d); |
748 | 746 | ||
749 | mpic_unmask_irq(d); | 747 | mpic_unmask_irq(d); |
750 | mpic_startup_ht_interrupt(mpic, src, irqd_is_level_type(d)); | 748 | mpic_startup_ht_interrupt(mpic, src, irqd_is_level_type(d)); |
@@ -755,7 +753,7 @@ static unsigned int mpic_startup_ht_irq(struct irq_data *d) | |||
755 | static void mpic_shutdown_ht_irq(struct irq_data *d) | 753 | static void mpic_shutdown_ht_irq(struct irq_data *d) |
756 | { | 754 | { |
757 | struct mpic *mpic = mpic_from_irq_data(d); | 755 | struct mpic *mpic = mpic_from_irq_data(d); |
758 | unsigned int src = mpic_irq_to_hw(d->irq); | 756 | unsigned int src = irqd_to_hwirq(d); |
759 | 757 | ||
760 | mpic_shutdown_ht_interrupt(mpic, src); | 758 | mpic_shutdown_ht_interrupt(mpic, src); |
761 | mpic_mask_irq(d); | 759 | mpic_mask_irq(d); |
@@ -764,7 +762,7 @@ static void mpic_shutdown_ht_irq(struct irq_data *d) | |||
764 | static void mpic_end_ht_irq(struct irq_data *d) | 762 | static void mpic_end_ht_irq(struct irq_data *d) |
765 | { | 763 | { |
766 | struct mpic *mpic = mpic_from_irq_data(d); | 764 | struct mpic *mpic = mpic_from_irq_data(d); |
767 | unsigned int src = mpic_irq_to_hw(d->irq); | 765 | unsigned int src = irqd_to_hwirq(d); |
768 | 766 | ||
769 | #ifdef DEBUG_IRQ | 767 | #ifdef DEBUG_IRQ |
770 | DBG("%s: end_irq: %d\n", mpic->name, d->irq); | 768 | DBG("%s: end_irq: %d\n", mpic->name, d->irq); |
@@ -785,7 +783,7 @@ static void mpic_end_ht_irq(struct irq_data *d) | |||
785 | static void mpic_unmask_ipi(struct irq_data *d) | 783 | static void mpic_unmask_ipi(struct irq_data *d) |
786 | { | 784 | { |
787 | struct mpic *mpic = mpic_from_ipi(d); | 785 | struct mpic *mpic = mpic_from_ipi(d); |
788 | unsigned int src = mpic_irq_to_hw(d->irq) - mpic->ipi_vecs[0]; | 786 | unsigned int src = virq_to_hw(d->irq) - mpic->ipi_vecs[0]; |
789 | 787 | ||
790 | DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, d->irq, src); | 788 | DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, d->irq, src); |
791 | mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK); | 789 | mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK); |
@@ -816,7 +814,7 @@ int mpic_set_affinity(struct irq_data *d, const struct cpumask *cpumask, | |||
816 | bool force) | 814 | bool force) |
817 | { | 815 | { |
818 | struct mpic *mpic = mpic_from_irq_data(d); | 816 | struct mpic *mpic = mpic_from_irq_data(d); |
819 | unsigned int src = mpic_irq_to_hw(d->irq); | 817 | unsigned int src = irqd_to_hwirq(d); |
820 | 818 | ||
821 | if (mpic->flags & MPIC_SINGLE_DEST_CPU) { | 819 | if (mpic->flags & MPIC_SINGLE_DEST_CPU) { |
822 | int cpuid = irq_choose_cpu(cpumask); | 820 | int cpuid = irq_choose_cpu(cpumask); |
@@ -862,7 +860,7 @@ static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type) | |||
862 | int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type) | 860 | int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type) |
863 | { | 861 | { |
864 | struct mpic *mpic = mpic_from_irq_data(d); | 862 | struct mpic *mpic = mpic_from_irq_data(d); |
865 | unsigned int src = mpic_irq_to_hw(d->irq); | 863 | unsigned int src = irqd_to_hwirq(d); |
866 | unsigned int vecpri, vold, vnew; | 864 | unsigned int vecpri, vold, vnew; |
867 | 865 | ||
868 | DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", | 866 | DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", |
@@ -898,7 +896,7 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type) | |||
898 | void mpic_set_vector(unsigned int virq, unsigned int vector) | 896 | void mpic_set_vector(unsigned int virq, unsigned int vector) |
899 | { | 897 | { |
900 | struct mpic *mpic = mpic_from_irq(virq); | 898 | struct mpic *mpic = mpic_from_irq(virq); |
901 | unsigned int src = mpic_irq_to_hw(virq); | 899 | unsigned int src = virq_to_hw(virq); |
902 | unsigned int vecpri; | 900 | unsigned int vecpri; |
903 | 901 | ||
904 | DBG("mpic: set_vector(mpic:@%p,virq:%d,src:%d,vector:0x%x)\n", | 902 | DBG("mpic: set_vector(mpic:@%p,virq:%d,src:%d,vector:0x%x)\n", |
@@ -916,7 +914,7 @@ void mpic_set_vector(unsigned int virq, unsigned int vector) | |||
916 | void mpic_set_destination(unsigned int virq, unsigned int cpuid) | 914 | void mpic_set_destination(unsigned int virq, unsigned int cpuid) |
917 | { | 915 | { |
918 | struct mpic *mpic = mpic_from_irq(virq); | 916 | struct mpic *mpic = mpic_from_irq(virq); |
919 | unsigned int src = mpic_irq_to_hw(virq); | 917 | unsigned int src = virq_to_hw(virq); |
920 | 918 | ||
921 | DBG("mpic: set_destination(mpic:@%p,virq:%d,src:%d,cpuid:0x%x)\n", | 919 | DBG("mpic: set_destination(mpic:@%p,virq:%d,src:%d,cpuid:0x%x)\n", |
922 | mpic, virq, src, cpuid); | 920 | mpic, virq, src, cpuid); |
@@ -1427,7 +1425,7 @@ void __init mpic_set_serial_int(struct mpic *mpic, int enable) | |||
1427 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | 1425 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) |
1428 | { | 1426 | { |
1429 | struct mpic *mpic = mpic_find(irq); | 1427 | struct mpic *mpic = mpic_find(irq); |
1430 | unsigned int src = mpic_irq_to_hw(irq); | 1428 | unsigned int src = virq_to_hw(irq); |
1431 | unsigned long flags; | 1429 | unsigned long flags; |
1432 | u32 reg; | 1430 | u32 reg; |
1433 | 1431 | ||
diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c index e9c633c7c083..14d130268e7a 100644 --- a/arch/powerpc/sysdev/mv64x60_pic.c +++ b/arch/powerpc/sysdev/mv64x60_pic.c | |||
@@ -78,7 +78,7 @@ static struct irq_host *mv64x60_irq_host; | |||
78 | 78 | ||
79 | static void mv64x60_mask_low(struct irq_data *d) | 79 | static void mv64x60_mask_low(struct irq_data *d) |
80 | { | 80 | { |
81 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 81 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
82 | unsigned long flags; | 82 | unsigned long flags; |
83 | 83 | ||
84 | spin_lock_irqsave(&mv64x60_lock, flags); | 84 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -91,7 +91,7 @@ static void mv64x60_mask_low(struct irq_data *d) | |||
91 | 91 | ||
92 | static void mv64x60_unmask_low(struct irq_data *d) | 92 | static void mv64x60_unmask_low(struct irq_data *d) |
93 | { | 93 | { |
94 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 94 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
95 | unsigned long flags; | 95 | unsigned long flags; |
96 | 96 | ||
97 | spin_lock_irqsave(&mv64x60_lock, flags); | 97 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -115,7 +115,7 @@ static struct irq_chip mv64x60_chip_low = { | |||
115 | 115 | ||
116 | static void mv64x60_mask_high(struct irq_data *d) | 116 | static void mv64x60_mask_high(struct irq_data *d) |
117 | { | 117 | { |
118 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 118 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
119 | unsigned long flags; | 119 | unsigned long flags; |
120 | 120 | ||
121 | spin_lock_irqsave(&mv64x60_lock, flags); | 121 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -128,7 +128,7 @@ static void mv64x60_mask_high(struct irq_data *d) | |||
128 | 128 | ||
129 | static void mv64x60_unmask_high(struct irq_data *d) | 129 | static void mv64x60_unmask_high(struct irq_data *d) |
130 | { | 130 | { |
131 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 131 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
132 | unsigned long flags; | 132 | unsigned long flags; |
133 | 133 | ||
134 | spin_lock_irqsave(&mv64x60_lock, flags); | 134 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -152,7 +152,7 @@ static struct irq_chip mv64x60_chip_high = { | |||
152 | 152 | ||
153 | static void mv64x60_mask_gpp(struct irq_data *d) | 153 | static void mv64x60_mask_gpp(struct irq_data *d) |
154 | { | 154 | { |
155 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 155 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
156 | unsigned long flags; | 156 | unsigned long flags; |
157 | 157 | ||
158 | spin_lock_irqsave(&mv64x60_lock, flags); | 158 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -165,7 +165,7 @@ static void mv64x60_mask_gpp(struct irq_data *d) | |||
165 | 165 | ||
166 | static void mv64x60_mask_ack_gpp(struct irq_data *d) | 166 | static void mv64x60_mask_ack_gpp(struct irq_data *d) |
167 | { | 167 | { |
168 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 168 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
169 | unsigned long flags; | 169 | unsigned long flags; |
170 | 170 | ||
171 | spin_lock_irqsave(&mv64x60_lock, flags); | 171 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -180,7 +180,7 @@ static void mv64x60_mask_ack_gpp(struct irq_data *d) | |||
180 | 180 | ||
181 | static void mv64x60_unmask_gpp(struct irq_data *d) | 181 | static void mv64x60_unmask_gpp(struct irq_data *d) |
182 | { | 182 | { |
183 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 183 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
184 | unsigned long flags; | 184 | unsigned long flags; |
185 | 185 | ||
186 | spin_lock_irqsave(&mv64x60_lock, flags); | 186 | spin_lock_irqsave(&mv64x60_lock, flags); |
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index 832d6924ad1c..b2acda07220d 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c | |||
@@ -197,12 +197,10 @@ static inline struct qe_ic *qe_ic_from_irq_data(struct irq_data *d) | |||
197 | return irq_data_get_irq_chip_data(d); | 197 | return irq_data_get_irq_chip_data(d); |
198 | } | 198 | } |
199 | 199 | ||
200 | #define virq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | ||
201 | |||
202 | static void qe_ic_unmask_irq(struct irq_data *d) | 200 | static void qe_ic_unmask_irq(struct irq_data *d) |
203 | { | 201 | { |
204 | struct qe_ic *qe_ic = qe_ic_from_irq_data(d); | 202 | struct qe_ic *qe_ic = qe_ic_from_irq_data(d); |
205 | unsigned int src = virq_to_hw(d->irq); | 203 | unsigned int src = irqd_to_hwirq(d); |
206 | unsigned long flags; | 204 | unsigned long flags; |
207 | u32 temp; | 205 | u32 temp; |
208 | 206 | ||
@@ -218,7 +216,7 @@ static void qe_ic_unmask_irq(struct irq_data *d) | |||
218 | static void qe_ic_mask_irq(struct irq_data *d) | 216 | static void qe_ic_mask_irq(struct irq_data *d) |
219 | { | 217 | { |
220 | struct qe_ic *qe_ic = qe_ic_from_irq_data(d); | 218 | struct qe_ic *qe_ic = qe_ic_from_irq_data(d); |
221 | unsigned int src = virq_to_hw(d->irq); | 219 | unsigned int src = irqd_to_hwirq(d); |
222 | unsigned long flags; | 220 | unsigned long flags; |
223 | u32 temp; | 221 | u32 temp; |
224 | 222 | ||
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c index 5d9138516628..984cd2029158 100644 --- a/arch/powerpc/sysdev/uic.c +++ b/arch/powerpc/sysdev/uic.c | |||
@@ -41,8 +41,6 @@ | |||
41 | #define UIC_VR 0x7 | 41 | #define UIC_VR 0x7 |
42 | #define UIC_VCR 0x8 | 42 | #define UIC_VCR 0x8 |
43 | 43 | ||
44 | #define uic_irq_to_hw(virq) (irq_map[virq].hwirq) | ||
45 | |||
46 | struct uic *primary_uic; | 44 | struct uic *primary_uic; |
47 | 45 | ||
48 | struct uic { | 46 | struct uic { |
@@ -58,7 +56,7 @@ struct uic { | |||
58 | static void uic_unmask_irq(struct irq_data *d) | 56 | static void uic_unmask_irq(struct irq_data *d) |
59 | { | 57 | { |
60 | struct uic *uic = irq_data_get_irq_chip_data(d); | 58 | struct uic *uic = irq_data_get_irq_chip_data(d); |
61 | unsigned int src = uic_irq_to_hw(d->irq); | 59 | unsigned int src = irqd_to_hwirq(d); |
62 | unsigned long flags; | 60 | unsigned long flags; |
63 | u32 er, sr; | 61 | u32 er, sr; |
64 | 62 | ||
@@ -76,7 +74,7 @@ static void uic_unmask_irq(struct irq_data *d) | |||
76 | static void uic_mask_irq(struct irq_data *d) | 74 | static void uic_mask_irq(struct irq_data *d) |
77 | { | 75 | { |
78 | struct uic *uic = irq_data_get_irq_chip_data(d); | 76 | struct uic *uic = irq_data_get_irq_chip_data(d); |
79 | unsigned int src = uic_irq_to_hw(d->irq); | 77 | unsigned int src = irqd_to_hwirq(d); |
80 | unsigned long flags; | 78 | unsigned long flags; |
81 | u32 er; | 79 | u32 er; |
82 | 80 | ||
@@ -90,7 +88,7 @@ static void uic_mask_irq(struct irq_data *d) | |||
90 | static void uic_ack_irq(struct irq_data *d) | 88 | static void uic_ack_irq(struct irq_data *d) |
91 | { | 89 | { |
92 | struct uic *uic = irq_data_get_irq_chip_data(d); | 90 | struct uic *uic = irq_data_get_irq_chip_data(d); |
93 | unsigned int src = uic_irq_to_hw(d->irq); | 91 | unsigned int src = irqd_to_hwirq(d); |
94 | unsigned long flags; | 92 | unsigned long flags; |
95 | 93 | ||
96 | spin_lock_irqsave(&uic->lock, flags); | 94 | spin_lock_irqsave(&uic->lock, flags); |
@@ -101,7 +99,7 @@ static void uic_ack_irq(struct irq_data *d) | |||
101 | static void uic_mask_ack_irq(struct irq_data *d) | 99 | static void uic_mask_ack_irq(struct irq_data *d) |
102 | { | 100 | { |
103 | struct uic *uic = irq_data_get_irq_chip_data(d); | 101 | struct uic *uic = irq_data_get_irq_chip_data(d); |
104 | unsigned int src = uic_irq_to_hw(d->irq); | 102 | unsigned int src = irqd_to_hwirq(d); |
105 | unsigned long flags; | 103 | unsigned long flags; |
106 | u32 er, sr; | 104 | u32 er, sr; |
107 | 105 | ||
@@ -126,7 +124,7 @@ static void uic_mask_ack_irq(struct irq_data *d) | |||
126 | static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) | 124 | static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) |
127 | { | 125 | { |
128 | struct uic *uic = irq_data_get_irq_chip_data(d); | 126 | struct uic *uic = irq_data_get_irq_chip_data(d); |
129 | unsigned int src = uic_irq_to_hw(d->irq); | 127 | unsigned int src = irqd_to_hwirq(d); |
130 | unsigned long flags; | 128 | unsigned long flags; |
131 | int trigger, polarity; | 129 | int trigger, polarity; |
132 | u32 tr, pr, mask; | 130 | u32 tr, pr, mask; |
diff --git a/arch/powerpc/sysdev/xics/icp-hv.c b/arch/powerpc/sysdev/xics/icp-hv.c index b03d348b19a5..76e87245bbfe 100644 --- a/arch/powerpc/sysdev/xics/icp-hv.c +++ b/arch/powerpc/sysdev/xics/icp-hv.c | |||
@@ -58,7 +58,7 @@ static inline void icp_hv_set_qirr(int n_cpu , u8 value) | |||
58 | 58 | ||
59 | static void icp_hv_eoi(struct irq_data *d) | 59 | static void icp_hv_eoi(struct irq_data *d) |
60 | { | 60 | { |
61 | unsigned int hw_irq = (unsigned int)irq_data_to_hw(d); | 61 | unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); |
62 | 62 | ||
63 | iosync(); | 63 | iosync(); |
64 | icp_hv_set_xirr((xics_pop_cppr() << 24) | hw_irq); | 64 | icp_hv_set_xirr((xics_pop_cppr() << 24) | hw_irq); |
diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c index be5e3d748edb..d9e0515592c4 100644 --- a/arch/powerpc/sysdev/xics/icp-native.c +++ b/arch/powerpc/sysdev/xics/icp-native.c | |||
@@ -80,7 +80,7 @@ static void icp_native_set_cpu_priority(unsigned char cppr) | |||
80 | 80 | ||
81 | static void icp_native_eoi(struct irq_data *d) | 81 | static void icp_native_eoi(struct irq_data *d) |
82 | { | 82 | { |
83 | unsigned int hw_irq = (unsigned int)irq_data_to_hw(d); | 83 | unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); |
84 | 84 | ||
85 | iosync(); | 85 | iosync(); |
86 | icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq); | 86 | icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq); |
diff --git a/arch/powerpc/sysdev/xics/ics-rtas.c b/arch/powerpc/sysdev/xics/ics-rtas.c index 610c148fedcc..c782f85cf7e4 100644 --- a/arch/powerpc/sysdev/xics/ics-rtas.c +++ b/arch/powerpc/sysdev/xics/ics-rtas.c | |||
@@ -38,7 +38,7 @@ static struct ics ics_rtas = { | |||
38 | 38 | ||
39 | static void ics_rtas_unmask_irq(struct irq_data *d) | 39 | static void ics_rtas_unmask_irq(struct irq_data *d) |
40 | { | 40 | { |
41 | unsigned int hw_irq = (unsigned int)irq_data_to_hw(d); | 41 | unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); |
42 | int call_status; | 42 | int call_status; |
43 | int server; | 43 | int server; |
44 | 44 | ||
@@ -109,7 +109,7 @@ static void ics_rtas_mask_real_irq(unsigned int hw_irq) | |||
109 | 109 | ||
110 | static void ics_rtas_mask_irq(struct irq_data *d) | 110 | static void ics_rtas_mask_irq(struct irq_data *d) |
111 | { | 111 | { |
112 | unsigned int hw_irq = (unsigned int)irq_data_to_hw(d); | 112 | unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); |
113 | 113 | ||
114 | pr_devel("xics: mask virq %d [hw 0x%x]\n", d->irq, hw_irq); | 114 | pr_devel("xics: mask virq %d [hw 0x%x]\n", d->irq, hw_irq); |
115 | 115 | ||
@@ -122,7 +122,7 @@ static int ics_rtas_set_affinity(struct irq_data *d, | |||
122 | const struct cpumask *cpumask, | 122 | const struct cpumask *cpumask, |
123 | bool force) | 123 | bool force) |
124 | { | 124 | { |
125 | unsigned int hw_irq = (unsigned int)irq_data_to_hw(d); | 125 | unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); |
126 | int status; | 126 | int status; |
127 | int xics_status[2]; | 127 | int xics_status[2]; |
128 | int irq_server; | 128 | int irq_server; |
@@ -171,7 +171,7 @@ static struct irq_chip ics_rtas_irq_chip = { | |||
171 | 171 | ||
172 | static int ics_rtas_map(struct ics *ics, unsigned int virq) | 172 | static int ics_rtas_map(struct ics *ics, unsigned int virq) |
173 | { | 173 | { |
174 | unsigned int hw_irq = (unsigned int)irq_map[virq].hwirq; | 174 | unsigned int hw_irq = (unsigned int)virq_to_hw(virq); |
175 | int status[2]; | 175 | int status[2]; |
176 | int rc; | 176 | int rc; |
177 | 177 | ||
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c index c58844d72426..a0576b705ddd 100644 --- a/arch/powerpc/sysdev/xics/xics-common.c +++ b/arch/powerpc/sysdev/xics/xics-common.c | |||
@@ -240,9 +240,9 @@ void xics_migrate_irqs_away(void) | |||
240 | /* We can't set affinity on ISA interrupts */ | 240 | /* We can't set affinity on ISA interrupts */ |
241 | if (virq < NUM_ISA_INTERRUPTS) | 241 | if (virq < NUM_ISA_INTERRUPTS) |
242 | continue; | 242 | continue; |
243 | if (irq_map[virq].host != xics_host) | 243 | if (virq_to_host(virq) != xics_host) |
244 | continue; | 244 | continue; |
245 | irq = (unsigned int)irq_map[virq].hwirq; | 245 | irq = (unsigned int)virq_to_hw(virq); |
246 | /* We need to get IPIs still. */ | 246 | /* We need to get IPIs still. */ |
247 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) | 247 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) |
248 | continue; | 248 | continue; |
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c index 0a13fc19e287..6183799754af 100644 --- a/arch/powerpc/sysdev/xilinx_intc.c +++ b/arch/powerpc/sysdev/xilinx_intc.c | |||
@@ -71,7 +71,7 @@ static unsigned char xilinx_intc_map_senses[] = { | |||
71 | */ | 71 | */ |
72 | static void xilinx_intc_mask(struct irq_data *d) | 72 | static void xilinx_intc_mask(struct irq_data *d) |
73 | { | 73 | { |
74 | int irq = virq_to_hw(d->irq); | 74 | int irq = irqd_to_hwirq(d); |
75 | void * regs = irq_data_get_irq_chip_data(d); | 75 | void * regs = irq_data_get_irq_chip_data(d); |
76 | pr_debug("mask: %d\n", irq); | 76 | pr_debug("mask: %d\n", irq); |
77 | out_be32(regs + XINTC_CIE, 1 << irq); | 77 | out_be32(regs + XINTC_CIE, 1 << irq); |
@@ -87,7 +87,7 @@ static int xilinx_intc_set_type(struct irq_data *d, unsigned int flow_type) | |||
87 | */ | 87 | */ |
88 | static void xilinx_intc_level_unmask(struct irq_data *d) | 88 | static void xilinx_intc_level_unmask(struct irq_data *d) |
89 | { | 89 | { |
90 | int irq = virq_to_hw(d->irq); | 90 | int irq = irqd_to_hwirq(d); |
91 | void * regs = irq_data_get_irq_chip_data(d); | 91 | void * regs = irq_data_get_irq_chip_data(d); |
92 | pr_debug("unmask: %d\n", irq); | 92 | pr_debug("unmask: %d\n", irq); |
93 | out_be32(regs + XINTC_SIE, 1 << irq); | 93 | out_be32(regs + XINTC_SIE, 1 << irq); |
@@ -112,7 +112,7 @@ static struct irq_chip xilinx_intc_level_irqchip = { | |||
112 | */ | 112 | */ |
113 | static void xilinx_intc_edge_unmask(struct irq_data *d) | 113 | static void xilinx_intc_edge_unmask(struct irq_data *d) |
114 | { | 114 | { |
115 | int irq = virq_to_hw(d->irq); | 115 | int irq = irqd_to_hwirq(d); |
116 | void *regs = irq_data_get_irq_chip_data(d); | 116 | void *regs = irq_data_get_irq_chip_data(d); |
117 | pr_debug("unmask: %d\n", irq); | 117 | pr_debug("unmask: %d\n", irq); |
118 | out_be32(regs + XINTC_SIE, 1 << irq); | 118 | out_be32(regs + XINTC_SIE, 1 << irq); |
@@ -120,7 +120,7 @@ static void xilinx_intc_edge_unmask(struct irq_data *d) | |||
120 | 120 | ||
121 | static void xilinx_intc_edge_ack(struct irq_data *d) | 121 | static void xilinx_intc_edge_ack(struct irq_data *d) |
122 | { | 122 | { |
123 | int irq = virq_to_hw(d->irq); | 123 | int irq = irqd_to_hwirq(d); |
124 | void * regs = irq_data_get_irq_chip_data(d); | 124 | void * regs = irq_data_get_irq_chip_data(d); |
125 | pr_debug("ack: %d\n", irq); | 125 | pr_debug("ack: %d\n", irq); |
126 | out_be32(regs + XINTC_IAR, 1 << irq); | 126 | out_be32(regs + XINTC_IAR, 1 << irq); |