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-rw-r--r--arch/powerpc/sysdev/xics/Kconfig13
-rw-r--r--arch/powerpc/sysdev/xics/Makefile6
-rw-r--r--arch/powerpc/sysdev/xics/icp-hv.c164
-rw-r--r--arch/powerpc/sysdev/xics/icp-native.c293
-rw-r--r--arch/powerpc/sysdev/xics/ics-rtas.c240
-rw-r--r--arch/powerpc/sysdev/xics/xics-common.c443
6 files changed, 1159 insertions, 0 deletions
diff --git a/arch/powerpc/sysdev/xics/Kconfig b/arch/powerpc/sysdev/xics/Kconfig
new file mode 100644
index 000000000000..0031eda320c3
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/Kconfig
@@ -0,0 +1,13 @@
1config PPC_XICS
2 def_bool n
3 select PPC_SMP_MUXED_IPI
4
5config PPC_ICP_NATIVE
6 def_bool n
7
8config PPC_ICP_HV
9 def_bool n
10
11config PPC_ICS_RTAS
12 def_bool n
13
diff --git a/arch/powerpc/sysdev/xics/Makefile b/arch/powerpc/sysdev/xics/Makefile
new file mode 100644
index 000000000000..b75a6059337f
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/Makefile
@@ -0,0 +1,6 @@
1subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
2
3obj-y += xics-common.o
4obj-$(CONFIG_PPC_ICP_NATIVE) += icp-native.o
5obj-$(CONFIG_PPC_ICP_HV) += icp-hv.o
6obj-$(CONFIG_PPC_ICS_RTAS) += ics-rtas.o
diff --git a/arch/powerpc/sysdev/xics/icp-hv.c b/arch/powerpc/sysdev/xics/icp-hv.c
new file mode 100644
index 000000000000..9518d367a64f
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/icp-hv.c
@@ -0,0 +1,164 @@
1/*
2 * Copyright 2011 IBM Corporation.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 */
10#include <linux/types.h>
11#include <linux/kernel.h>
12#include <linux/irq.h>
13#include <linux/smp.h>
14#include <linux/interrupt.h>
15#include <linux/init.h>
16#include <linux/cpu.h>
17#include <linux/of.h>
18
19#include <asm/smp.h>
20#include <asm/irq.h>
21#include <asm/errno.h>
22#include <asm/xics.h>
23#include <asm/io.h>
24#include <asm/hvcall.h>
25
26static inline unsigned int icp_hv_get_xirr(unsigned char cppr)
27{
28 unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
29 long rc;
30
31 rc = plpar_hcall(H_XIRR, retbuf, cppr);
32 if (rc != H_SUCCESS)
33 panic(" bad return code xirr - rc = %lx\n", rc);
34 return (unsigned int)retbuf[0];
35}
36
37static inline void icp_hv_set_xirr(unsigned int value)
38{
39 long rc = plpar_hcall_norets(H_EOI, value);
40 if (rc != H_SUCCESS)
41 panic("bad return code EOI - rc = %ld, value=%x\n", rc, value);
42}
43
44static inline void icp_hv_set_cppr(u8 value)
45{
46 long rc = plpar_hcall_norets(H_CPPR, value);
47 if (rc != H_SUCCESS)
48 panic("bad return code cppr - rc = %lx\n", rc);
49}
50
51static inline void icp_hv_set_qirr(int n_cpu , u8 value)
52{
53 long rc = plpar_hcall_norets(H_IPI, get_hard_smp_processor_id(n_cpu),
54 value);
55 if (rc != H_SUCCESS)
56 panic("bad return code qirr - rc = %lx\n", rc);
57}
58
59static void icp_hv_eoi(struct irq_data *d)
60{
61 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
62
63 iosync();
64 icp_hv_set_xirr((xics_pop_cppr() << 24) | hw_irq);
65}
66
67static void icp_hv_teardown_cpu(void)
68{
69 int cpu = smp_processor_id();
70
71 /* Clear any pending IPI */
72 icp_hv_set_qirr(cpu, 0xff);
73}
74
75static void icp_hv_flush_ipi(void)
76{
77 /* We take the ipi irq but and never return so we
78 * need to EOI the IPI, but want to leave our priority 0
79 *
80 * should we check all the other interrupts too?
81 * should we be flagging idle loop instead?
82 * or creating some task to be scheduled?
83 */
84
85 icp_hv_set_xirr((0x00 << 24) | XICS_IPI);
86}
87
88static unsigned int icp_hv_get_irq(void)
89{
90 unsigned int xirr = icp_hv_get_xirr(xics_cppr_top());
91 unsigned int vec = xirr & 0x00ffffff;
92 unsigned int irq;
93
94 if (vec == XICS_IRQ_SPURIOUS)
95 return NO_IRQ;
96
97 irq = irq_radix_revmap_lookup(xics_host, vec);
98 if (likely(irq != NO_IRQ)) {
99 xics_push_cppr(vec);
100 return irq;
101 }
102
103 /* We don't have a linux mapping, so have rtas mask it. */
104 xics_mask_unknown_vec(vec);
105
106 /* We might learn about it later, so EOI it */
107 icp_hv_set_xirr(xirr);
108
109 return NO_IRQ;
110}
111
112static void icp_hv_set_cpu_priority(unsigned char cppr)
113{
114 xics_set_base_cppr(cppr);
115 icp_hv_set_cppr(cppr);
116 iosync();
117}
118
119#ifdef CONFIG_SMP
120
121static void icp_hv_cause_ipi(int cpu, unsigned long data)
122{
123 icp_hv_set_qirr(cpu, IPI_PRIORITY);
124}
125
126static irqreturn_t icp_hv_ipi_action(int irq, void *dev_id)
127{
128 int cpu = smp_processor_id();
129
130 icp_hv_set_qirr(cpu, 0xff);
131
132 return smp_ipi_demux();
133}
134
135#endif /* CONFIG_SMP */
136
137static const struct icp_ops icp_hv_ops = {
138 .get_irq = icp_hv_get_irq,
139 .eoi = icp_hv_eoi,
140 .set_priority = icp_hv_set_cpu_priority,
141 .teardown_cpu = icp_hv_teardown_cpu,
142 .flush_ipi = icp_hv_flush_ipi,
143#ifdef CONFIG_SMP
144 .ipi_action = icp_hv_ipi_action,
145 .cause_ipi = icp_hv_cause_ipi,
146#endif
147};
148
149int icp_hv_init(void)
150{
151 struct device_node *np;
152
153 np = of_find_compatible_node(NULL, NULL, "ibm,ppc-xicp");
154 if (!np)
155 np = of_find_node_by_type(NULL,
156 "PowerPC-External-Interrupt-Presentation");
157 if (!np)
158 return -ENODEV;
159
160 icp_ops = &icp_hv_ops;
161
162 return 0;
163}
164
diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c
new file mode 100644
index 000000000000..1f15ad436140
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/icp-native.c
@@ -0,0 +1,293 @@
1/*
2 * Copyright 2011 IBM Corporation.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 */
10
11#include <linux/types.h>
12#include <linux/kernel.h>
13#include <linux/irq.h>
14#include <linux/smp.h>
15#include <linux/interrupt.h>
16#include <linux/init.h>
17#include <linux/cpu.h>
18#include <linux/of.h>
19#include <linux/spinlock.h>
20
21#include <asm/prom.h>
22#include <asm/io.h>
23#include <asm/smp.h>
24#include <asm/irq.h>
25#include <asm/errno.h>
26#include <asm/xics.h>
27
28struct icp_ipl {
29 union {
30 u32 word;
31 u8 bytes[4];
32 } xirr_poll;
33 union {
34 u32 word;
35 u8 bytes[4];
36 } xirr;
37 u32 dummy;
38 union {
39 u32 word;
40 u8 bytes[4];
41 } qirr;
42 u32 link_a;
43 u32 link_b;
44 u32 link_c;
45};
46
47static struct icp_ipl __iomem *icp_native_regs[NR_CPUS];
48
49static inline unsigned int icp_native_get_xirr(void)
50{
51 int cpu = smp_processor_id();
52
53 return in_be32(&icp_native_regs[cpu]->xirr.word);
54}
55
56static inline void icp_native_set_xirr(unsigned int value)
57{
58 int cpu = smp_processor_id();
59
60 out_be32(&icp_native_regs[cpu]->xirr.word, value);
61}
62
63static inline void icp_native_set_cppr(u8 value)
64{
65 int cpu = smp_processor_id();
66
67 out_8(&icp_native_regs[cpu]->xirr.bytes[0], value);
68}
69
70static inline void icp_native_set_qirr(int n_cpu, u8 value)
71{
72 out_8(&icp_native_regs[n_cpu]->qirr.bytes[0], value);
73}
74
75static void icp_native_set_cpu_priority(unsigned char cppr)
76{
77 xics_set_base_cppr(cppr);
78 icp_native_set_cppr(cppr);
79 iosync();
80}
81
82static void icp_native_eoi(struct irq_data *d)
83{
84 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
85
86 iosync();
87 icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq);
88}
89
90static void icp_native_teardown_cpu(void)
91{
92 int cpu = smp_processor_id();
93
94 /* Clear any pending IPI */
95 icp_native_set_qirr(cpu, 0xff);
96}
97
98static void icp_native_flush_ipi(void)
99{
100 /* We take the ipi irq but and never return so we
101 * need to EOI the IPI, but want to leave our priority 0
102 *
103 * should we check all the other interrupts too?
104 * should we be flagging idle loop instead?
105 * or creating some task to be scheduled?
106 */
107
108 icp_native_set_xirr((0x00 << 24) | XICS_IPI);
109}
110
111static unsigned int icp_native_get_irq(void)
112{
113 unsigned int xirr = icp_native_get_xirr();
114 unsigned int vec = xirr & 0x00ffffff;
115 unsigned int irq;
116
117 if (vec == XICS_IRQ_SPURIOUS)
118 return NO_IRQ;
119
120 irq = irq_radix_revmap_lookup(xics_host, vec);
121 if (likely(irq != NO_IRQ)) {
122 xics_push_cppr(vec);
123 return irq;
124 }
125
126 /* We don't have a linux mapping, so have rtas mask it. */
127 xics_mask_unknown_vec(vec);
128
129 /* We might learn about it later, so EOI it */
130 icp_native_set_xirr(xirr);
131
132 return NO_IRQ;
133}
134
135#ifdef CONFIG_SMP
136
137static void icp_native_cause_ipi(int cpu, unsigned long data)
138{
139 icp_native_set_qirr(cpu, IPI_PRIORITY);
140}
141
142static irqreturn_t icp_native_ipi_action(int irq, void *dev_id)
143{
144 int cpu = smp_processor_id();
145
146 icp_native_set_qirr(cpu, 0xff);
147
148 return smp_ipi_demux();
149}
150
151#endif /* CONFIG_SMP */
152
153static int __init icp_native_map_one_cpu(int hw_id, unsigned long addr,
154 unsigned long size)
155{
156 char *rname;
157 int i, cpu = -1;
158
159 /* This may look gross but it's good enough for now, we don't quite
160 * have a hard -> linux processor id matching.
161 */
162 for_each_possible_cpu(i) {
163 if (!cpu_present(i))
164 continue;
165 if (hw_id == get_hard_smp_processor_id(i)) {
166 cpu = i;
167 break;
168 }
169 }
170
171 /* Fail, skip that CPU. Don't print, it's normal, some XICS come up
172 * with way more entries in there than you have CPUs
173 */
174 if (cpu == -1)
175 return 0;
176
177 rname = kasprintf(GFP_KERNEL, "CPU %d [0x%x] Interrupt Presentation",
178 cpu, hw_id);
179
180 if (!request_mem_region(addr, size, rname)) {
181 pr_warning("icp_native: Could not reserve ICP MMIO"
182 " for CPU %d, interrupt server #0x%x\n",
183 cpu, hw_id);
184 return -EBUSY;
185 }
186
187 icp_native_regs[cpu] = ioremap(addr, size);
188 if (!icp_native_regs[cpu]) {
189 pr_warning("icp_native: Failed ioremap for CPU %d, "
190 "interrupt server #0x%x, addr %#lx\n",
191 cpu, hw_id, addr);
192 release_mem_region(addr, size);
193 return -ENOMEM;
194 }
195 return 0;
196}
197
198static int __init icp_native_init_one_node(struct device_node *np,
199 unsigned int *indx)
200{
201 unsigned int ilen;
202 const u32 *ireg;
203 int i;
204 int reg_tuple_size;
205 int num_servers = 0;
206
207 /* This code does the theorically broken assumption that the interrupt
208 * server numbers are the same as the hard CPU numbers.
209 * This happens to be the case so far but we are playing with fire...
210 * should be fixed one of these days. -BenH.
211 */
212 ireg = of_get_property(np, "ibm,interrupt-server-ranges", &ilen);
213
214 /* Do that ever happen ? we'll know soon enough... but even good'old
215 * f80 does have that property ..
216 */
217 WARN_ON((ireg == NULL) || (ilen != 2*sizeof(u32)));
218
219 if (ireg) {
220 *indx = of_read_number(ireg, 1);
221 if (ilen >= 2*sizeof(u32))
222 num_servers = of_read_number(ireg + 1, 1);
223 }
224
225 ireg = of_get_property(np, "reg", &ilen);
226 if (!ireg) {
227 pr_err("icp_native: Can't find interrupt reg property");
228 return -1;
229 }
230
231 reg_tuple_size = (of_n_addr_cells(np) + of_n_size_cells(np)) * 4;
232 if (((ilen % reg_tuple_size) != 0)
233 || (num_servers && (num_servers != (ilen / reg_tuple_size)))) {
234 pr_err("icp_native: ICP reg len (%d) != num servers (%d)",
235 ilen / reg_tuple_size, num_servers);
236 return -1;
237 }
238
239 for (i = 0; i < (ilen / reg_tuple_size); i++) {
240 struct resource r;
241 int err;
242
243 err = of_address_to_resource(np, i, &r);
244 if (err) {
245 pr_err("icp_native: Could not translate ICP MMIO"
246 " for interrupt server 0x%x (%d)\n", *indx, err);
247 return -1;
248 }
249
250 if (icp_native_map_one_cpu(*indx, r.start, r.end - r.start))
251 return -1;
252
253 (*indx)++;
254 }
255 return 0;
256}
257
258static const struct icp_ops icp_native_ops = {
259 .get_irq = icp_native_get_irq,
260 .eoi = icp_native_eoi,
261 .set_priority = icp_native_set_cpu_priority,
262 .teardown_cpu = icp_native_teardown_cpu,
263 .flush_ipi = icp_native_flush_ipi,
264#ifdef CONFIG_SMP
265 .ipi_action = icp_native_ipi_action,
266 .cause_ipi = icp_native_cause_ipi,
267#endif
268};
269
270int icp_native_init(void)
271{
272 struct device_node *np;
273 u32 indx = 0;
274 int found = 0;
275
276 for_each_compatible_node(np, NULL, "ibm,ppc-xicp")
277 if (icp_native_init_one_node(np, &indx) == 0)
278 found = 1;
279 if (!found) {
280 for_each_node_by_type(np,
281 "PowerPC-External-Interrupt-Presentation") {
282 if (icp_native_init_one_node(np, &indx) == 0)
283 found = 1;
284 }
285 }
286
287 if (found == 0)
288 return -ENODEV;
289
290 icp_ops = &icp_native_ops;
291
292 return 0;
293}
diff --git a/arch/powerpc/sysdev/xics/ics-rtas.c b/arch/powerpc/sysdev/xics/ics-rtas.c
new file mode 100644
index 000000000000..c782f85cf7e4
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/ics-rtas.c
@@ -0,0 +1,240 @@
1#include <linux/types.h>
2#include <linux/kernel.h>
3#include <linux/irq.h>
4#include <linux/smp.h>
5#include <linux/interrupt.h>
6#include <linux/init.h>
7#include <linux/cpu.h>
8#include <linux/of.h>
9#include <linux/spinlock.h>
10#include <linux/msi.h>
11
12#include <asm/prom.h>
13#include <asm/smp.h>
14#include <asm/machdep.h>
15#include <asm/irq.h>
16#include <asm/errno.h>
17#include <asm/xics.h>
18#include <asm/rtas.h>
19
20/* RTAS service tokens */
21static int ibm_get_xive;
22static int ibm_set_xive;
23static int ibm_int_on;
24static int ibm_int_off;
25
26static int ics_rtas_map(struct ics *ics, unsigned int virq);
27static void ics_rtas_mask_unknown(struct ics *ics, unsigned long vec);
28static long ics_rtas_get_server(struct ics *ics, unsigned long vec);
29static int ics_rtas_host_match(struct ics *ics, struct device_node *node);
30
31/* Only one global & state struct ics */
32static struct ics ics_rtas = {
33 .map = ics_rtas_map,
34 .mask_unknown = ics_rtas_mask_unknown,
35 .get_server = ics_rtas_get_server,
36 .host_match = ics_rtas_host_match,
37};
38
39static void ics_rtas_unmask_irq(struct irq_data *d)
40{
41 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
42 int call_status;
43 int server;
44
45 pr_devel("xics: unmask virq %d [hw 0x%x]\n", d->irq, hw_irq);
46
47 if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
48 return;
49
50 server = xics_get_irq_server(d->irq, d->affinity, 0);
51
52 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, hw_irq, server,
53 DEFAULT_PRIORITY);
54 if (call_status != 0) {
55 printk(KERN_ERR
56 "%s: ibm_set_xive irq %u server %x returned %d\n",
57 __func__, hw_irq, server, call_status);
58 return;
59 }
60
61 /* Now unmask the interrupt (often a no-op) */
62 call_status = rtas_call(ibm_int_on, 1, 1, NULL, hw_irq);
63 if (call_status != 0) {
64 printk(KERN_ERR "%s: ibm_int_on irq=%u returned %d\n",
65 __func__, hw_irq, call_status);
66 return;
67 }
68}
69
70static unsigned int ics_rtas_startup(struct irq_data *d)
71{
72#ifdef CONFIG_PCI_MSI
73 /*
74 * The generic MSI code returns with the interrupt disabled on the
75 * card, using the MSI mask bits. Firmware doesn't appear to unmask
76 * at that level, so we do it here by hand.
77 */
78 if (d->msi_desc)
79 unmask_msi_irq(d);
80#endif
81 /* unmask it */
82 ics_rtas_unmask_irq(d);
83 return 0;
84}
85
86static void ics_rtas_mask_real_irq(unsigned int hw_irq)
87{
88 int call_status;
89
90 if (hw_irq == XICS_IPI)
91 return;
92
93 call_status = rtas_call(ibm_int_off, 1, 1, NULL, hw_irq);
94 if (call_status != 0) {
95 printk(KERN_ERR "%s: ibm_int_off irq=%u returned %d\n",
96 __func__, hw_irq, call_status);
97 return;
98 }
99
100 /* Have to set XIVE to 0xff to be able to remove a slot */
101 call_status = rtas_call(ibm_set_xive, 3, 1, NULL, hw_irq,
102 xics_default_server, 0xff);
103 if (call_status != 0) {
104 printk(KERN_ERR "%s: ibm_set_xive(0xff) irq=%u returned %d\n",
105 __func__, hw_irq, call_status);
106 return;
107 }
108}
109
110static void ics_rtas_mask_irq(struct irq_data *d)
111{
112 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
113
114 pr_devel("xics: mask virq %d [hw 0x%x]\n", d->irq, hw_irq);
115
116 if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
117 return;
118 ics_rtas_mask_real_irq(hw_irq);
119}
120
121static int ics_rtas_set_affinity(struct irq_data *d,
122 const struct cpumask *cpumask,
123 bool force)
124{
125 unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
126 int status;
127 int xics_status[2];
128 int irq_server;
129
130 if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
131 return -1;
132
133 status = rtas_call(ibm_get_xive, 1, 3, xics_status, hw_irq);
134
135 if (status) {
136 printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
137 __func__, hw_irq, status);
138 return -1;
139 }
140
141 irq_server = xics_get_irq_server(d->irq, cpumask, 1);
142 if (irq_server == -1) {
143 char cpulist[128];
144 cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
145 printk(KERN_WARNING
146 "%s: No online cpus in the mask %s for irq %d\n",
147 __func__, cpulist, d->irq);
148 return -1;
149 }
150
151 status = rtas_call(ibm_set_xive, 3, 1, NULL,
152 hw_irq, irq_server, xics_status[1]);
153
154 if (status) {
155 printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n",
156 __func__, hw_irq, status);
157 return -1;
158 }
159
160 return IRQ_SET_MASK_OK;
161}
162
163static struct irq_chip ics_rtas_irq_chip = {
164 .name = "XICS",
165 .irq_startup = ics_rtas_startup,
166 .irq_mask = ics_rtas_mask_irq,
167 .irq_unmask = ics_rtas_unmask_irq,
168 .irq_eoi = NULL, /* Patched at init time */
169 .irq_set_affinity = ics_rtas_set_affinity
170};
171
172static int ics_rtas_map(struct ics *ics, unsigned int virq)
173{
174 unsigned int hw_irq = (unsigned int)virq_to_hw(virq);
175 int status[2];
176 int rc;
177
178 if (WARN_ON(hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS))
179 return -EINVAL;
180
181 /* Check if RTAS knows about this interrupt */
182 rc = rtas_call(ibm_get_xive, 1, 3, status, hw_irq);
183 if (rc)
184 return -ENXIO;
185
186 irq_set_chip_and_handler(virq, &ics_rtas_irq_chip, handle_fasteoi_irq);
187 irq_set_chip_data(virq, &ics_rtas);
188
189 return 0;
190}
191
192static void ics_rtas_mask_unknown(struct ics *ics, unsigned long vec)
193{
194 ics_rtas_mask_real_irq(vec);
195}
196
197static long ics_rtas_get_server(struct ics *ics, unsigned long vec)
198{
199 int rc, status[2];
200
201 rc = rtas_call(ibm_get_xive, 1, 3, status, vec);
202 if (rc)
203 return -1;
204 return status[0];
205}
206
207static int ics_rtas_host_match(struct ics *ics, struct device_node *node)
208{
209 /* IBM machines have interrupt parents of various funky types for things
210 * like vdevices, events, etc... The trick we use here is to match
211 * everything here except the legacy 8259 which is compatible "chrp,iic"
212 */
213 return !of_device_is_compatible(node, "chrp,iic");
214}
215
216int ics_rtas_init(void)
217{
218 ibm_get_xive = rtas_token("ibm,get-xive");
219 ibm_set_xive = rtas_token("ibm,set-xive");
220 ibm_int_on = rtas_token("ibm,int-on");
221 ibm_int_off = rtas_token("ibm,int-off");
222
223 /* We enable the RTAS "ICS" if RTAS is present with the
224 * appropriate tokens
225 */
226 if (ibm_get_xive == RTAS_UNKNOWN_SERVICE ||
227 ibm_set_xive == RTAS_UNKNOWN_SERVICE)
228 return -ENODEV;
229
230 /* We need to patch our irq chip's EOI to point to the
231 * right ICP
232 */
233 ics_rtas_irq_chip.irq_eoi = icp_ops->eoi;
234
235 /* Register ourselves */
236 xics_register_ics(&ics_rtas);
237
238 return 0;
239}
240
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
new file mode 100644
index 000000000000..445c5a01b766
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -0,0 +1,443 @@
1/*
2 * Copyright 2011 IBM Corporation.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 */
10#include <linux/types.h>
11#include <linux/threads.h>
12#include <linux/kernel.h>
13#include <linux/irq.h>
14#include <linux/debugfs.h>
15#include <linux/smp.h>
16#include <linux/interrupt.h>
17#include <linux/seq_file.h>
18#include <linux/init.h>
19#include <linux/cpu.h>
20#include <linux/of.h>
21#include <linux/slab.h>
22#include <linux/spinlock.h>
23
24#include <asm/prom.h>
25#include <asm/io.h>
26#include <asm/smp.h>
27#include <asm/machdep.h>
28#include <asm/irq.h>
29#include <asm/errno.h>
30#include <asm/rtas.h>
31#include <asm/xics.h>
32#include <asm/firmware.h>
33
34/* Globals common to all ICP/ICS implementations */
35const struct icp_ops *icp_ops;
36
37unsigned int xics_default_server = 0xff;
38unsigned int xics_default_distrib_server = 0;
39unsigned int xics_interrupt_server_size = 8;
40
41DEFINE_PER_CPU(struct xics_cppr, xics_cppr);
42
43struct irq_host *xics_host;
44
45static LIST_HEAD(ics_list);
46
47void xics_update_irq_servers(void)
48{
49 int i, j;
50 struct device_node *np;
51 u32 ilen;
52 const u32 *ireg;
53 u32 hcpuid;
54
55 /* Find the server numbers for the boot cpu. */
56 np = of_get_cpu_node(boot_cpuid, NULL);
57 BUG_ON(!np);
58
59 hcpuid = get_hard_smp_processor_id(boot_cpuid);
60 xics_default_server = xics_default_distrib_server = hcpuid;
61
62 pr_devel("xics: xics_default_server = 0x%x\n", xics_default_server);
63
64 ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
65 if (!ireg) {
66 of_node_put(np);
67 return;
68 }
69
70 i = ilen / sizeof(int);
71
72 /* Global interrupt distribution server is specified in the last
73 * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
74 * entry fom this property for current boot cpu id and use it as
75 * default distribution server
76 */
77 for (j = 0; j < i; j += 2) {
78 if (ireg[j] == hcpuid) {
79 xics_default_distrib_server = ireg[j+1];
80 break;
81 }
82 }
83 pr_devel("xics: xics_default_distrib_server = 0x%x\n",
84 xics_default_distrib_server);
85 of_node_put(np);
86}
87
88/* GIQ stuff, currently only supported on RTAS setups, will have
89 * to be sorted properly for bare metal
90 */
91void xics_set_cpu_giq(unsigned int gserver, unsigned int join)
92{
93#ifdef CONFIG_PPC_RTAS
94 int index;
95 int status;
96
97 if (!rtas_indicator_present(GLOBAL_INTERRUPT_QUEUE, NULL))
98 return;
99
100 index = (1UL << xics_interrupt_server_size) - 1 - gserver;
101
102 status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, index, join);
103
104 WARN(status < 0, "set-indicator(%d, %d, %u) returned %d\n",
105 GLOBAL_INTERRUPT_QUEUE, index, join, status);
106#endif
107}
108
109void xics_setup_cpu(void)
110{
111 icp_ops->set_priority(LOWEST_PRIORITY);
112
113 xics_set_cpu_giq(xics_default_distrib_server, 1);
114}
115
116void xics_mask_unknown_vec(unsigned int vec)
117{
118 struct ics *ics;
119
120 pr_err("Interrupt 0x%x (real) is invalid, disabling it.\n", vec);
121
122 list_for_each_entry(ics, &ics_list, link)
123 ics->mask_unknown(ics, vec);
124}
125
126
127#ifdef CONFIG_SMP
128
129static void xics_request_ipi(void)
130{
131 unsigned int ipi;
132
133 ipi = irq_create_mapping(xics_host, XICS_IPI);
134 BUG_ON(ipi == NO_IRQ);
135
136 /*
137 * IPIs are marked IRQF_DISABLED as they must run with irqs
138 * disabled, and PERCPU. The handler was set in map.
139 */
140 BUG_ON(request_irq(ipi, icp_ops->ipi_action,
141 IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL));
142}
143
144int __init xics_smp_probe(void)
145{
146 /* Setup cause_ipi callback based on which ICP is used */
147 smp_ops->cause_ipi = icp_ops->cause_ipi;
148
149 /* Register all the IPIs */
150 xics_request_ipi();
151
152 return cpumask_weight(cpu_possible_mask);
153}
154
155#endif /* CONFIG_SMP */
156
157void xics_teardown_cpu(void)
158{
159 struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
160
161 /*
162 * we have to reset the cppr index to 0 because we're
163 * not going to return from the IPI
164 */
165 os_cppr->index = 0;
166 icp_ops->set_priority(0);
167 icp_ops->teardown_cpu();
168}
169
170void xics_kexec_teardown_cpu(int secondary)
171{
172 xics_teardown_cpu();
173
174 icp_ops->flush_ipi();
175
176 /*
177 * Some machines need to have at least one cpu in the GIQ,
178 * so leave the master cpu in the group.
179 */
180 if (secondary)
181 xics_set_cpu_giq(xics_default_distrib_server, 0);
182}
183
184
185#ifdef CONFIG_HOTPLUG_CPU
186
187/* Interrupts are disabled. */
188void xics_migrate_irqs_away(void)
189{
190 int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
191 unsigned int irq, virq;
192
193 /* If we used to be the default server, move to the new "boot_cpuid" */
194 if (hw_cpu == xics_default_server)
195 xics_update_irq_servers();
196
197 /* Reject any interrupt that was queued to us... */
198 icp_ops->set_priority(0);
199
200 /* Remove ourselves from the global interrupt queue */
201 xics_set_cpu_giq(xics_default_distrib_server, 0);
202
203 /* Allow IPIs again... */
204 icp_ops->set_priority(DEFAULT_PRIORITY);
205
206 for_each_irq(virq) {
207 struct irq_desc *desc;
208 struct irq_chip *chip;
209 long server;
210 unsigned long flags;
211 struct ics *ics;
212
213 /* We can't set affinity on ISA interrupts */
214 if (virq < NUM_ISA_INTERRUPTS)
215 continue;
216 if (!virq_is_host(virq, xics_host))
217 continue;
218 irq = (unsigned int)virq_to_hw(virq);
219 /* We need to get IPIs still. */
220 if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
221 continue;
222 desc = irq_to_desc(virq);
223 /* We only need to migrate enabled IRQS */
224 if (!desc || !desc->action)
225 continue;
226 chip = irq_desc_get_chip(desc);
227 if (!chip || !chip->irq_set_affinity)
228 continue;
229
230 raw_spin_lock_irqsave(&desc->lock, flags);
231
232 /* Locate interrupt server */
233 server = -1;
234 ics = irq_get_chip_data(virq);
235 if (ics)
236 server = ics->get_server(ics, irq);
237 if (server < 0) {
238 printk(KERN_ERR "%s: Can't find server for irq %d\n",
239 __func__, irq);
240 goto unlock;
241 }
242
243 /* We only support delivery to all cpus or to one cpu.
244 * The irq has to be migrated only in the single cpu
245 * case.
246 */
247 if (server != hw_cpu)
248 goto unlock;
249
250 /* This is expected during cpu offline. */
251 if (cpu_online(cpu))
252 pr_warning("IRQ %u affinity broken off cpu %u\n",
253 virq, cpu);
254
255 /* Reset affinity to all cpus */
256 raw_spin_unlock_irqrestore(&desc->lock, flags);
257 irq_set_affinity(virq, cpu_all_mask);
258 continue;
259unlock:
260 raw_spin_unlock_irqrestore(&desc->lock, flags);
261 }
262}
263#endif /* CONFIG_HOTPLUG_CPU */
264
265#ifdef CONFIG_SMP
266/*
267 * For the moment we only implement delivery to all cpus or one cpu.
268 *
269 * If the requested affinity is cpu_all_mask, we set global affinity.
270 * If not we set it to the first cpu in the mask, even if multiple cpus
271 * are set. This is so things like irqbalance (which set core and package
272 * wide affinities) do the right thing.
273 *
274 * We need to fix this to implement support for the links
275 */
276int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
277 unsigned int strict_check)
278{
279
280 if (!distribute_irqs)
281 return xics_default_server;
282
283 if (!cpumask_subset(cpu_possible_mask, cpumask)) {
284 int server = cpumask_first_and(cpu_online_mask, cpumask);
285
286 if (server < nr_cpu_ids)
287 return get_hard_smp_processor_id(server);
288
289 if (strict_check)
290 return -1;
291 }
292
293 /*
294 * Workaround issue with some versions of JS20 firmware that
295 * deliver interrupts to cpus which haven't been started. This
296 * happens when using the maxcpus= boot option.
297 */
298 if (cpumask_equal(cpu_online_mask, cpu_present_mask))
299 return xics_default_distrib_server;
300
301 return xics_default_server;
302}
303#endif /* CONFIG_SMP */
304
305static int xics_host_match(struct irq_host *h, struct device_node *node)
306{
307 struct ics *ics;
308
309 list_for_each_entry(ics, &ics_list, link)
310 if (ics->host_match(ics, node))
311 return 1;
312
313 return 0;
314}
315
316/* Dummies */
317static void xics_ipi_unmask(struct irq_data *d) { }
318static void xics_ipi_mask(struct irq_data *d) { }
319
320static struct irq_chip xics_ipi_chip = {
321 .name = "XICS",
322 .irq_eoi = NULL, /* Patched at init time */
323 .irq_mask = xics_ipi_mask,
324 .irq_unmask = xics_ipi_unmask,
325};
326
327static int xics_host_map(struct irq_host *h, unsigned int virq,
328 irq_hw_number_t hw)
329{
330 struct ics *ics;
331
332 pr_devel("xics: map virq %d, hwirq 0x%lx\n", virq, hw);
333
334 /* Insert the interrupt mapping into the radix tree for fast lookup */
335 irq_radix_revmap_insert(xics_host, virq, hw);
336
337 /* They aren't all level sensitive but we just don't really know */
338 irq_set_status_flags(virq, IRQ_LEVEL);
339
340 /* Don't call into ICS for IPIs */
341 if (hw == XICS_IPI) {
342 irq_set_chip_and_handler(virq, &xics_ipi_chip,
343 handle_percpu_irq);
344 return 0;
345 }
346
347 /* Let the ICS setup the chip data */
348 list_for_each_entry(ics, &ics_list, link)
349 if (ics->map(ics, virq) == 0)
350 return 0;
351
352 return -EINVAL;
353}
354
355static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
356 const u32 *intspec, unsigned int intsize,
357 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
358
359{
360 /* Current xics implementation translates everything
361 * to level. It is not technically right for MSIs but this
362 * is irrelevant at this point. We might get smarter in the future
363 */
364 *out_hwirq = intspec[0];
365 *out_flags = IRQ_TYPE_LEVEL_LOW;
366
367 return 0;
368}
369
370static struct irq_host_ops xics_host_ops = {
371 .match = xics_host_match,
372 .map = xics_host_map,
373 .xlate = xics_host_xlate,
374};
375
376static void __init xics_init_host(void)
377{
378 xics_host = irq_alloc_host(NULL, IRQ_HOST_MAP_TREE, 0, &xics_host_ops,
379 XICS_IRQ_SPURIOUS);
380 BUG_ON(xics_host == NULL);
381 irq_set_default_host(xics_host);
382}
383
384void __init xics_register_ics(struct ics *ics)
385{
386 list_add(&ics->link, &ics_list);
387}
388
389static void __init xics_get_server_size(void)
390{
391 struct device_node *np;
392 const u32 *isize;
393
394 /* We fetch the interrupt server size from the first ICS node
395 * we find if any
396 */
397 np = of_find_compatible_node(NULL, NULL, "ibm,ppc-xics");
398 if (!np)
399 return;
400 isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
401 if (!isize)
402 return;
403 xics_interrupt_server_size = *isize;
404 of_node_put(np);
405}
406
407void __init xics_init(void)
408{
409 int rc = -1;
410
411 /* Fist locate ICP */
412#ifdef CONFIG_PPC_ICP_HV
413 if (firmware_has_feature(FW_FEATURE_LPAR))
414 rc = icp_hv_init();
415#endif
416#ifdef CONFIG_PPC_ICP_NATIVE
417 if (rc < 0)
418 rc = icp_native_init();
419#endif
420 if (rc < 0) {
421 pr_warning("XICS: Cannot find a Presentation Controller !\n");
422 return;
423 }
424
425 /* Copy get_irq callback over to ppc_md */
426 ppc_md.get_irq = icp_ops->get_irq;
427
428 /* Patch up IPI chip EOI */
429 xics_ipi_chip.irq_eoi = icp_ops->eoi;
430
431 /* Now locate ICS */
432#ifdef CONFIG_PPC_ICS_RTAS
433 rc = ics_rtas_init();
434#endif
435 if (rc < 0)
436 pr_warning("XICS: Cannot find a Source Controller !\n");
437
438 /* Initialize common bits */
439 xics_get_server_size();
440 xics_update_irq_servers();
441 xics_init_host();
442 xics_setup_cpu();
443}
generated by cgit v1.2.2 (git 2.25.0) at 2025-07-28 14:00:51 -0400