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-rw-r--r--arch/powerpc/sysdev/mpic.c75
1 files changed, 41 insertions, 34 deletions
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 339e8a3e26d2..20b73c025a45 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -26,6 +26,7 @@
26#include <linux/bootmem.h> 26#include <linux/bootmem.h>
27#include <linux/spinlock.h> 27#include <linux/spinlock.h>
28#include <linux/pci.h> 28#include <linux/pci.h>
29#include <linux/slab.h>
29 30
30#include <asm/ptrace.h> 31#include <asm/ptrace.h>
31#include <asm/signal.h> 32#include <asm/signal.h>
@@ -567,12 +568,12 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic)
567#endif /* CONFIG_MPIC_U3_HT_IRQS */ 568#endif /* CONFIG_MPIC_U3_HT_IRQS */
568 569
569#ifdef CONFIG_SMP 570#ifdef CONFIG_SMP
570static int irq_choose_cpu(const cpumask_t *mask) 571static int irq_choose_cpu(const struct cpumask *mask)
571{ 572{
572 int cpuid; 573 int cpuid;
573 574
574 if (cpumask_equal(mask, cpu_all_mask)) { 575 if (cpumask_equal(mask, cpu_all_mask)) {
575 static int irq_rover; 576 static int irq_rover = 0;
576 static DEFINE_RAW_SPINLOCK(irq_rover_lock); 577 static DEFINE_RAW_SPINLOCK(irq_rover_lock);
577 unsigned long flags; 578 unsigned long flags;
578 579
@@ -580,15 +581,11 @@ static int irq_choose_cpu(const cpumask_t *mask)
580 do_round_robin: 581 do_round_robin:
581 raw_spin_lock_irqsave(&irq_rover_lock, flags); 582 raw_spin_lock_irqsave(&irq_rover_lock, flags);
582 583
583 while (!cpu_online(irq_rover)) { 584 irq_rover = cpumask_next(irq_rover, cpu_online_mask);
584 if (++irq_rover >= NR_CPUS) 585 if (irq_rover >= nr_cpu_ids)
585 irq_rover = 0; 586 irq_rover = cpumask_first(cpu_online_mask);
586 } 587
587 cpuid = irq_rover; 588 cpuid = irq_rover;
588 do {
589 if (++irq_rover >= NR_CPUS)
590 irq_rover = 0;
591 } while (!cpu_online(irq_rover));
592 589
593 raw_spin_unlock_irqrestore(&irq_rover_lock, flags); 590 raw_spin_unlock_irqrestore(&irq_rover_lock, flags);
594 } else { 591 } else {
@@ -600,7 +597,7 @@ static int irq_choose_cpu(const cpumask_t *mask)
600 return get_hard_smp_processor_id(cpuid); 597 return get_hard_smp_processor_id(cpuid);
601} 598}
602#else 599#else
603static int irq_choose_cpu(const cpumask_t *mask) 600static int irq_choose_cpu(const struct cpumask *mask)
604{ 601{
605 return hard_smp_processor_id(); 602 return hard_smp_processor_id();
606} 603}
@@ -813,12 +810,16 @@ int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
813 810
814 mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid); 811 mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid);
815 } else { 812 } else {
816 cpumask_t tmp; 813 cpumask_var_t tmp;
817 814
818 cpumask_and(&tmp, cpumask, cpu_online_mask); 815 alloc_cpumask_var(&tmp, GFP_KERNEL);
816
817 cpumask_and(tmp, cpumask, cpu_online_mask);
819 818
820 mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 819 mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION),
821 mpic_physmask(cpus_addr(tmp)[0])); 820 mpic_physmask(cpumask_bits(tmp)[0]));
821
822 free_cpumask_var(tmp);
822 } 823 }
823 824
824 return 0; 825 return 0;
@@ -1478,21 +1479,6 @@ void mpic_teardown_this_cpu(int secondary)
1478} 1479}
1479 1480
1480 1481
1481void mpic_send_ipi(unsigned int ipi_no, unsigned int cpu_mask)
1482{
1483 struct mpic *mpic = mpic_primary;
1484
1485 BUG_ON(mpic == NULL);
1486
1487#ifdef DEBUG_IPI
1488 DBG("%s: send_ipi(ipi_no: %d)\n", mpic->name, ipi_no);
1489#endif
1490
1491 mpic_cpu_write(MPIC_INFO(CPU_IPI_DISPATCH_0) +
1492 ipi_no * MPIC_INFO(CPU_IPI_DISPATCH_STRIDE),
1493 mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0]));
1494}
1495
1496static unsigned int _mpic_get_one_irq(struct mpic *mpic, int reg) 1482static unsigned int _mpic_get_one_irq(struct mpic *mpic, int reg)
1497{ 1483{
1498 u32 src; 1484 u32 src;
@@ -1588,8 +1574,25 @@ void mpic_request_ipis(void)
1588 } 1574 }
1589} 1575}
1590 1576
1577static void mpic_send_ipi(unsigned int ipi_no, const struct cpumask *cpu_mask)
1578{
1579 struct mpic *mpic = mpic_primary;
1580
1581 BUG_ON(mpic == NULL);
1582
1583#ifdef DEBUG_IPI
1584 DBG("%s: send_ipi(ipi_no: %d)\n", mpic->name, ipi_no);
1585#endif
1586
1587 mpic_cpu_write(MPIC_INFO(CPU_IPI_DISPATCH_0) +
1588 ipi_no * MPIC_INFO(CPU_IPI_DISPATCH_STRIDE),
1589 mpic_physmask(cpumask_bits(cpu_mask)[0]));
1590}
1591
1591void smp_mpic_message_pass(int target, int msg) 1592void smp_mpic_message_pass(int target, int msg)
1592{ 1593{
1594 cpumask_var_t tmp;
1595
1593 /* make sure we're sending something that translates to an IPI */ 1596 /* make sure we're sending something that translates to an IPI */
1594 if ((unsigned int)msg > 3) { 1597 if ((unsigned int)msg > 3) {
1595 printk("SMP %d: smp_message_pass: unknown msg %d\n", 1598 printk("SMP %d: smp_message_pass: unknown msg %d\n",
@@ -1598,13 +1601,17 @@ void smp_mpic_message_pass(int target, int msg)
1598 } 1601 }
1599 switch (target) { 1602 switch (target) {
1600 case MSG_ALL: 1603 case MSG_ALL:
1601 mpic_send_ipi(msg, 0xffffffff); 1604 mpic_send_ipi(msg, cpu_online_mask);
1602 break; 1605 break;
1603 case MSG_ALL_BUT_SELF: 1606 case MSG_ALL_BUT_SELF:
1604 mpic_send_ipi(msg, 0xffffffff & ~(1 << smp_processor_id())); 1607 alloc_cpumask_var(&tmp, GFP_NOWAIT);
1608 cpumask_andnot(tmp, cpu_online_mask,
1609 cpumask_of(smp_processor_id()));
1610 mpic_send_ipi(msg, tmp);
1611 free_cpumask_var(tmp);
1605 break; 1612 break;
1606 default: 1613 default:
1607 mpic_send_ipi(msg, 1 << target); 1614 mpic_send_ipi(msg, cpumask_of(target));
1608 break; 1615 break;
1609 } 1616 }
1610} 1617}
@@ -1615,7 +1622,7 @@ int __init smp_mpic_probe(void)
1615 1622
1616 DBG("smp_mpic_probe()...\n"); 1623 DBG("smp_mpic_probe()...\n");
1617 1624
1618 nr_cpus = cpus_weight(cpu_possible_map); 1625 nr_cpus = cpumask_weight(cpu_possible_mask);
1619 1626
1620 DBG("nr_cpus: %d\n", nr_cpus); 1627 DBG("nr_cpus: %d\n", nr_cpus);
1621 1628
@@ -1659,7 +1666,7 @@ static int mpic_resume(struct sys_device *dev)
1659 mpic->save_data[i].dest); 1666 mpic->save_data[i].dest);
1660 1667
1661#ifdef CONFIG_MPIC_U3_HT_IRQS 1668#ifdef CONFIG_MPIC_U3_HT_IRQS
1662 { 1669 if (mpic->fixups) {
1663 struct mpic_irq_fixup *fixup = &mpic->fixups[i]; 1670 struct mpic_irq_fixup *fixup = &mpic->fixups[i];
1664 1671
1665 if (fixup->base) { 1672 if (fixup->base) {