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Diffstat (limited to 'arch/powerpc/sysdev/fsl_pci.c')
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 818f7c6c8fa1..f8f7f28c6343 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC83xx/85xx/86xx PCI/PCIE support routing. 2 * MPC83xx/85xx/86xx PCI/PCIE support routing.
3 * 3 *
4 * Copyright 2007-2010 Freescale Semiconductor, Inc. 4 * Copyright 2007-2011 Freescale Semiconductor, Inc.
5 * Copyright 2008-2009 MontaVista Software, Inc. 5 * Copyright 2008-2009 MontaVista Software, Inc.
6 * 6 *
7 * Initial author: Xianghua Xiao <x.xiao@freescale.com> 7 * Initial author: Xianghua Xiao <x.xiao@freescale.com>
@@ -99,7 +99,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
99 struct resource *rsrc) 99 struct resource *rsrc)
100{ 100{
101 struct ccsr_pci __iomem *pci; 101 struct ccsr_pci __iomem *pci;
102 int i, j, n, mem_log, win_idx = 2; 102 int i, j, n, mem_log, win_idx = 3, start_idx = 1, end_idx = 4;
103 u64 mem, sz, paddr_hi = 0; 103 u64 mem, sz, paddr_hi = 0;
104 u64 paddr_lo = ULLONG_MAX; 104 u64 paddr_lo = ULLONG_MAX;
105 u32 pcicsrbar = 0, pcicsrbar_sz; 105 u32 pcicsrbar = 0, pcicsrbar_sz;
@@ -109,6 +109,13 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
109 109
110 pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n", 110 pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n",
111 (u64)rsrc->start, (u64)rsrc->end - (u64)rsrc->start + 1); 111 (u64)rsrc->start, (u64)rsrc->end - (u64)rsrc->start + 1);
112
113 if (of_device_is_compatible(hose->dn, "fsl,qoriq-pcie-v2.2")) {
114 win_idx = 2;
115 start_idx = 0;
116 end_idx = 3;
117 }
118
112 pci = ioremap(rsrc->start, rsrc->end - rsrc->start + 1); 119 pci = ioremap(rsrc->start, rsrc->end - rsrc->start + 1);
113 if (!pci) { 120 if (!pci) {
114 dev_err(hose->parent, "Unable to map ATMU registers\n"); 121 dev_err(hose->parent, "Unable to map ATMU registers\n");
@@ -118,7 +125,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
118 /* Disable all windows (except powar0 since it's ignored) */ 125 /* Disable all windows (except powar0 since it's ignored) */
119 for(i = 1; i < 5; i++) 126 for(i = 1; i < 5; i++)
120 out_be32(&pci->pow[i].powar, 0); 127 out_be32(&pci->pow[i].powar, 0);
121 for(i = 0; i < 3; i++) 128 for (i = start_idx; i < end_idx; i++)
122 out_be32(&pci->piw[i].piwar, 0); 129 out_be32(&pci->piw[i].piwar, 0);
123 130
124 /* Setup outbound MEM window */ 131 /* Setup outbound MEM window */
@@ -204,7 +211,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
204 mem_log++; 211 mem_log++;
205 } 212 }
206 213
207 piwar |= (mem_log - 1); 214 piwar |= ((mem_log - 1) & PIWAR_SZ_MASK);
208 215
209 /* Setup inbound memory window */ 216 /* Setup inbound memory window */
210 out_be32(&pci->piw[win_idx].pitar, 0x00000000); 217 out_be32(&pci->piw[win_idx].pitar, 0x00000000);