15 files changed, 131 insertions, 104 deletions

diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
index 6f8ebe1085b3..072b948b2e2d 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -553,7 +553,7 @@ static ssize_t mpc52xx_wdt_write(struct file *file, const char __user *data,
         return 0;
 }
 
-static struct watchdog_info mpc5200_wdt_info = {
+static const struct watchdog_info mpc5200_wdt_info = {
         .options        = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
         .identity       = WDT_IDENTITY,
 };
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
index 9d962d7c72c1..d4a09f8705b5 100644
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -24,7 +24,7 @@
 
 #include "pq2.h"
 
-static DEFINE_SPINLOCK(pci_pic_lock);
+static DEFINE_RAW_SPINLOCK(pci_pic_lock);
 
 struct pq2ads_pci_pic {
         struct device_node *node;
@@ -45,12 +45,12 @@ static void pq2ads_pci_mask_irq(unsigned int virq)
 
         if (irq != -1) {
                 unsigned long flags;
-                spin_lock_irqsave(&pci_pic_lock, flags);
+                raw_spin_lock_irqsave(&pci_pic_lock, flags);
 
                 setbits32(&priv->regs->mask, 1 << irq);
                 mb();
 
-                spin_unlock_irqrestore(&pci_pic_lock, flags);
+                raw_spin_unlock_irqrestore(&pci_pic_lock, flags);
         }
 }
 
@@ -62,9 +62,9 @@ static void pq2ads_pci_unmask_irq(unsigned int virq)
         if (irq != -1) {
                 unsigned long flags;
 
-                spin_lock_irqsave(&pci_pic_lock, flags);
+                raw_spin_lock_irqsave(&pci_pic_lock, flags);
                 clrbits32(&priv->regs->mask, 1 << irq);
-                spin_unlock_irqrestore(&pci_pic_lock, flags);
+                raw_spin_unlock_irqrestore(&pci_pic_lock, flags);
         }
 }
 
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index 42e87f08aa01..d48527ffc425 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -50,7 +50,7 @@ static struct socrates_fpga_irq_info fpga_irqs[SOCRATES_FPGA_NUM_IRQS] = {
 
 #define socrates_fpga_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)
 
-static DEFINE_SPINLOCK(socrates_fpga_pic_lock);
+static DEFINE_RAW_SPINLOCK(socrates_fpga_pic_lock);
 
 static void __iomem *socrates_fpga_pic_iobase;
 static struct irq_host *socrates_fpga_pic_irq_host;
@@ -80,9 +80,9 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq)
         if (i == 3)
                 return NO_IRQ;
 
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         cause = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(i));
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
         for (i = SOCRATES_FPGA_NUM_IRQS - 1; i >= 0; i--) {
                 if (cause >> (i + 16))
                         break;
@@ -116,12 +116,12 @@ static void socrates_fpga_pic_ack(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask |= (1 << (hwirq + 16));
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_mask(unsigned int virq)
@@ -134,12 +134,12 @@ static void socrates_fpga_pic_mask(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask &= ~(1 << hwirq);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_mask_ack(unsigned int virq)
@@ -152,13 +152,13 @@ static void socrates_fpga_pic_mask_ack(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask &= ~(1 << hwirq);
         mask |= (1 << (hwirq + 16));
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_unmask(unsigned int virq)
@@ -171,12 +171,12 @@ static void socrates_fpga_pic_unmask(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask |= (1 << hwirq);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static void socrates_fpga_pic_eoi(unsigned int virq)
@@ -189,12 +189,12 @@ static void socrates_fpga_pic_eoi(unsigned int virq)
         hwirq = socrates_fpga_irq_to_hw(virq);
 
         irq_line = fpga_irqs[hwirq].irq_line;
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
                 & SOCRATES_FPGA_IRQ_MASK;
         mask |= (1 << (hwirq + 16));
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
 
 static int socrates_fpga_pic_set_type(unsigned int virq,
@@ -220,14 +220,14 @@ static int socrates_fpga_pic_set_type(unsigned int virq,
         default:
                 return -EINVAL;
         }
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         mask = socrates_fpga_pic_read(FPGA_PIC_IRQCFG);
         if (polarity)
                 mask |= (1 << hwirq);
         else
                 mask &= ~(1 << hwirq);
         socrates_fpga_pic_write(FPGA_PIC_IRQCFG, mask);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
         return 0;
 }
 
@@ -314,14 +314,14 @@ void socrates_fpga_pic_init(struct device_node *pic)
 
         socrates_fpga_pic_iobase = of_iomap(pic, 0);
 
-        spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
+        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(0),
                         SOCRATES_FPGA_IRQ_MASK << 16);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(1),
                         SOCRATES_FPGA_IRQ_MASK << 16);
         socrates_fpga_pic_write(FPGA_PIC_IRQMASK(2),
                         SOCRATES_FPGA_IRQ_MASK << 16);
-        spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 
         pr_info("FPGA PIC: Setting up Socrates FPGA PIC\n");
 }
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 2bbfd530d6d8..fbe9f3621424 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -33,32 +33,32 @@ config MPC8610_HPCD
           This option enables support for the MPC8610 HPCD board.
 
 config GEF_PPC9A
-        bool "GE Fanuc PPC9A"
+        bool "GE PPC9A"
         select DEFAULT_UIMAGE
         select MMIO_NVRAM
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         help
-          This option enables support for GE Fanuc's PPC9A.
+          This option enables support for the GE PPC9A.
 
 config GEF_SBC310
-        bool "GE Fanuc SBC310"
+        bool "GE SBC310"
         select DEFAULT_UIMAGE
         select MMIO_NVRAM
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         help
-          This option enables support for GE Fanuc's SBC310.
+          This option enables support for the GE SBC310.
 
 config GEF_SBC610
-        bool "GE Fanuc SBC610"
+        bool "GE SBC610"
         select DEFAULT_UIMAGE
         select MMIO_NVRAM
         select GENERIC_GPIO
         select ARCH_REQUIRE_GPIOLIB
         select HAS_RAPIDIO
         help
-          This option enables support for GE Fanuc's SBC610.
+          This option enables support for the GE SBC610.
 
 endif
 
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c
index b2ea8875adba..11f7b2b6f49e 100644
--- a/arch/powerpc/platforms/86xx/gef_gpio.c
+++ b/arch/powerpc/platforms/86xx/gef_gpio.c
@@ -1,9 +1,9 @@
 /*
- * Driver for GE Fanuc's FPGA based GPIO pins
+ * Driver for GE FPGA based GPIO
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
@@ -164,6 +164,6 @@ static int __init gef_gpio_init(void)
 };
 arch_initcall(gef_gpio_init);
 
-MODULE_DESCRIPTION("GE Fanuc I/O FPGA GPIO driver");
-MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com");
+MODULE_DESCRIPTION("GE I/O FPGA GPIO driver");
+MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com");
 MODULE_LICENSE("GPL");
diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c
index 0110a8736d33..6df9e2561c06 100644
--- a/arch/powerpc/platforms/86xx/gef_pic.c
+++ b/arch/powerpc/platforms/86xx/gef_pic.c
@@ -1,9 +1,9 @@
 /*
- * Interrupt handling for GE Fanuc's FPGA based PIC
+ * Interrupt handling for GE FPGA based PIC
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
  * version 2.  This program is licensed "as is" without any warranty of any
@@ -49,7 +49,7 @@
 #define gef_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)
 
 
-static DEFINE_SPINLOCK(gef_pic_lock);
+static DEFINE_RAW_SPINLOCK(gef_pic_lock);
 
 static void __iomem *gef_pic_irq_reg_base;
 static struct irq_host *gef_pic_irq_host;
@@ -118,11 +118,11 @@ static void gef_pic_mask(unsigned int virq)
 
         hwirq = gef_irq_to_hw(virq);
 
-        spin_lock_irqsave(&gef_pic_lock, flags);
+        raw_spin_lock_irqsave(&gef_pic_lock, flags);
         mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
         mask &= ~(1 << hwirq);
         out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
-        spin_unlock_irqrestore(&gef_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
 }
 
 static void gef_pic_mask_ack(unsigned int virq)
@@ -141,11 +141,11 @@ static void gef_pic_unmask(unsigned int virq)
 
         hwirq = gef_irq_to_hw(virq);
 
-        spin_lock_irqsave(&gef_pic_lock, flags);
+        raw_spin_lock_irqsave(&gef_pic_lock, flags);
         mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
         mask |= (1 << hwirq);
         out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);
-        spin_unlock_irqrestore(&gef_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
 }
 
 static struct irq_chip gef_pic_chip = {
@@ -199,7 +199,7 @@ void __init gef_pic_init(struct device_node *np)
         /* Map the devices registers into memory */
         gef_pic_irq_reg_base = of_iomap(np, 0);
 
-        spin_lock_irqsave(&gef_pic_lock, flags);
+        raw_spin_lock_irqsave(&gef_pic_lock, flags);
 
         /* Initialise everything as masked. */
         out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0);
@@ -208,7 +208,7 @@ void __init gef_pic_init(struct device_node *np)
         out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0);
         out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0);
 
-        spin_unlock_irqrestore(&gef_pic_lock, flags);
+        raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
 
         /* Map controller */
         gef_pic_cascade_irq = irq_of_parse_and_map(np, 0);
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
index a792e5d85813..60ce07e39100 100644
--- a/arch/powerpc/platforms/86xx/gef_ppc9a.c
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -1,9 +1,9 @@
 /*
- * GE Fanuc PPC9A board support
+ * GE PPC9A board support
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_ppc9a_setup_arch(void)
         }
 #endif
 
-        printk(KERN_INFO "GE Fanuc Intelligent Platforms PPC9A 6U VME SBC\n");
+        printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n");
 
 #ifdef CONFIG_SMP
         mpc86xx_smp_init();
@@ -151,7 +151,7 @@ static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
 {
         uint svid = mfspr(SPRN_SVR);
 
-        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
+        seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
 
         seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(),
                 ('A' + gef_ppc9a_get_board_rev()));
@@ -235,7 +235,7 @@ static int __init declare_of_platform_devices(void)
 machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
 
 define_machine(gef_ppc9a) {
-        .name                   = "GE Fanuc PPC9A",
+        .name                   = "GE PPC9A",
         .probe                  = gef_ppc9a_probe,
         .setup_arch             = gef_ppc9a_setup_arch,
         .init_IRQ               = gef_ppc9a_init_irq,
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
index 6a1a613836c2..3ecee25bf3ed 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc310.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -1,9 +1,9 @@
 /*
- * GE Fanuc SBC310 board support
+ * GE SBC310 board support
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_sbc310_setup_arch(void)
         }
 #endif
 
-        printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC310 6U VPX SBC\n");
+        printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
 
 #ifdef CONFIG_SMP
         mpc86xx_smp_init();
@@ -142,7 +142,7 @@ static void gef_sbc310_show_cpuinfo(struct seq_file *m)
 {
         uint svid = mfspr(SPRN_SVR);
 
-        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
+        seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
 
         seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
         seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
@@ -223,7 +223,7 @@ static int __init declare_of_platform_devices(void)
 machine_device_initcall(gef_sbc310, declare_of_platform_devices);
 
 define_machine(gef_sbc310) {
-        .name                   = "GE Fanuc SBC310",
+        .name                   = "GE SBC310",
         .probe                  = gef_sbc310_probe,
         .setup_arch             = gef_sbc310_setup_arch,
         .init_IRQ               = gef_sbc310_init_irq,
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c
index e10688a0fc4e..5090d608d9ee 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc610.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc610.c
@@ -1,9 +1,9 @@
 /*
- * GE Fanuc SBC610 board support
+ * GE SBC610 board support
  *
- * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ * Author: Martyn Welch <martyn.welch@ge.com>
  *
- * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
  *
  * This program is free software; you can redistribute  it and/or modify it
  * under  the terms of  the GNU General  Public License as published by the
@@ -82,7 +82,7 @@ static void __init gef_sbc610_setup_arch(void)
         }
 #endif
 
-        printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC610 6U VPX SBC\n");
+        printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
 
 #ifdef CONFIG_SMP
         mpc86xx_smp_init();
@@ -133,7 +133,7 @@ static void gef_sbc610_show_cpuinfo(struct seq_file *m)
 {
         uint svid = mfspr(SPRN_SVR);
 
-        seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n");
+        seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
 
         seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(),
                 ('A' + gef_sbc610_get_board_rev() - 1));
@@ -212,7 +212,7 @@ static int __init declare_of_platform_devices(void)
 machine_device_initcall(gef_sbc610, declare_of_platform_devices);
 
 define_machine(gef_sbc610) {
-        .name                   = "GE Fanuc SBC610",
+        .name                   = "GE SBC610",
         .probe                  = gef_sbc610_probe,
         .setup_arch             = gef_sbc610_setup_arch,
         .init_IRQ               = gef_sbc610_init_irq,
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index fa0f690d3867..a8aae0b54579 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -144,6 +144,16 @@ config FSL_EMB_PERFMON
           and some e300 cores (c3 and c4).  Select this only if your
           core supports the Embedded Performance Monitor APU
 
+config FSL_EMB_PERF_EVENT
+        bool
+        depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
+        default y
+
+config FSL_EMB_PERF_EVENT_E500
+        bool
+        depends on FSL_EMB_PERF_EVENT && E500
+        default y
+
 config 4xx
         bool
         depends on 40x || 44x
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index 5369653dcf6a..fba5bf915073 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -43,17 +43,14 @@ system_reset_iSeries:
         LOAD_REG_ADDR(r23, alpaca)
         li      r0,ALPACA_SIZE
         sub     r23,r13,r23
-        divdu   r23,r23,r0              /* r23 has cpu number */
-        LOAD_REG_ADDR(r13, paca)
-        mulli   r0,r23,PACA_SIZE
-        add     r13,r13,r0
-        mtspr   SPRN_SPRG_PACA,r13      /* Save it away for the future */
-        mfmsr   r24
-        ori     r24,r24,MSR_RI
-        mtmsrd  r24                     /* RI on */
-        mr      r24,r23
+        divdu   r24,r23,r0              /* r24 has cpu number */
         cmpwi   0,r24,0                 /* Are we processor 0? */
         bne     1f
+        LOAD_REG_ADDR(r13, boot_paca)
+        mtspr   SPRN_SPRG_PACA,r13      /* Save it away for the future */
+        mfmsr   r23
+        ori     r23,r23,MSR_RI
+        mtmsrd  r23                     /* RI on */
         b       .__start_initialization_iSeries /* Start up the first processor */
 1:      mfspr   r4,SPRN_CTRLF
         li      r5,CTRL_RUNLATCH        /* Turn off the run light */
@@ -86,6 +83,16 @@ system_reset_iSeries:
 #endif
 
 2:
+        /* Load our paca now that it's been allocated */
+        LOAD_REG_ADDR(r13, paca)
+        ld      r13,0(r13)
+        mulli   r0,r24,PACA_SIZE
+        add     r13,r13,r0
+        mtspr   SPRN_SPRG_PACA,r13      /* Save it away for the future */
+        mfmsr   r23
+        ori     r23,r23,MSR_RI
+        mtmsrd  r23                     /* RI on */
+
         HMT_LOW
 #ifdef CONFIG_SMP
         lbz     r23,PACAPROCSTART(r13)  /* Test if this processor
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index d1b124e44d77..a8e1d5d17a28 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -122,44 +122,32 @@ static void pseries_mach_cpu_die(void)
                 if (!get_lppaca()->shared_proc)
                         get_lppaca()->donate_dedicated_cpu = 1;
 
-                printk(KERN_INFO
-                        "cpu %u (hwid %u) ceding for offline with hint %d\n",
-                        cpu, hwcpu, cede_latency_hint);
                 while (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) {
                         extended_cede_processor(cede_latency_hint);
-                        printk(KERN_INFO "cpu %u (hwid %u) returned from cede.\n",
-                                cpu, hwcpu);
-                        printk(KERN_INFO
-                        "Decrementer value = %x Timebase value = %llx\n",
-                        get_dec(), get_tb());
                 }
 
-                printk(KERN_INFO "cpu %u (hwid %u) got prodded to go online\n",
-                        cpu, hwcpu);
-
                 if (!get_lppaca()->shared_proc)
                         get_lppaca()->donate_dedicated_cpu = 0;
                 get_lppaca()->idle = 0;
-        }
 
-        if (get_preferred_offline_state(cpu) == CPU_STATE_ONLINE) {
-                unregister_slb_shadow(hwcpu, __pa(get_slb_shadow()));
+                if (get_preferred_offline_state(cpu) == CPU_STATE_ONLINE) {
+                        unregister_slb_shadow(hwcpu, __pa(get_slb_shadow()));
 
-                /*
-                 * NOTE: Calling start_secondary() here for now to
-                 * start new context.
-                 * However, need to do it cleanly by resetting the
-                 * stack pointer.
-                 */
-                start_secondary();
+                        /*
+                         * Call to start_secondary_resume() will not return.
+                         * Kernel stack will be reset and start_secondary()
+                         * will be called to continue the online operation.
+                         */
+                        start_secondary_resume();
+                }
+        }
 
-        } else if (get_preferred_offline_state(cpu) == CPU_STATE_OFFLINE) {
+        /* Requested state is CPU_STATE_OFFLINE at this point */
+        WARN_ON(get_preferred_offline_state(cpu) != CPU_STATE_OFFLINE);
 
-                set_cpu_current_state(cpu, CPU_STATE_OFFLINE);
-                unregister_slb_shadow(hard_smp_processor_id(),
-                                        __pa(get_slb_shadow()));
-                rtas_stop_self();
-        }
+        set_cpu_current_state(cpu, CPU_STATE_OFFLINE);
+        unregister_slb_shadow(hwcpu, __pa(get_slb_shadow()));
+        rtas_stop_self();
 
         /* Should never get here... */
         BUG();
diff --git a/arch/powerpc/platforms/pseries/offline_states.h b/arch/powerpc/platforms/pseries/offline_states.h
index 22574e0d9d91..75a6f480d931 100644
--- a/arch/powerpc/platforms/pseries/offline_states.h
+++ b/arch/powerpc/platforms/pseries/offline_states.h
@@ -9,10 +9,31 @@ enum cpu_state_vals {
         CPU_MAX_OFFLINE_STATES
 };
 
+#ifdef CONFIG_HOTPLUG_CPU
 extern enum cpu_state_vals get_cpu_current_state(int cpu);
 extern void set_cpu_current_state(int cpu, enum cpu_state_vals state);
-extern enum cpu_state_vals get_preferred_offline_state(int cpu);
 extern void set_preferred_offline_state(int cpu, enum cpu_state_vals state);
 extern void set_default_offline_state(int cpu);
+#else
+static inline enum cpu_state_vals get_cpu_current_state(int cpu)
+{
+        return CPU_STATE_ONLINE;
+}
+
+static inline void set_cpu_current_state(int cpu, enum cpu_state_vals state)
+{
+}
+
+static inline void set_preferred_offline_state(int cpu, enum cpu_state_vals state)
+{
+}
+
+static inline void set_default_offline_state(int cpu)
+{
+}
+#endif
+
+extern enum cpu_state_vals get_preferred_offline_state(int cpu);
 extern int start_secondary(void);
+extern void start_secondary_resume(void);
 #endif
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h
index 0603c91538ae..a05f8d427856 100644
--- a/arch/powerpc/platforms/pseries/plpar_wrappers.h
+++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h
@@ -259,12 +259,12 @@ static inline long plpar_ipi(unsigned long servernum, unsigned long mfrr)
         return plpar_hcall_norets(H_IPI, servernum, mfrr);
 }
 
-static inline long plpar_xirr(unsigned long *xirr_ret)
+static inline long plpar_xirr(unsigned long *xirr_ret, unsigned char cppr)
 {
         long rc;
         unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
 
-        rc = plpar_hcall(H_XIRR, retbuf);
+        rc = plpar_hcall(H_XIRR, retbuf, cppr);
 
         *xirr_ret = retbuf[0];
 
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 4ca641042ec3..1bcedd8b4616 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -120,12 +120,12 @@ static inline void direct_qirr_info(int n_cpu, u8 value)
 
 /* LPAR low level accessors */
 
-static inline unsigned int lpar_xirr_info_get(void)
+static inline unsigned int lpar_xirr_info_get(unsigned char cppr)
 {
         unsigned long lpar_rc;
         unsigned long return_value;
 
-        lpar_rc = plpar_xirr(&return_value);
+        lpar_rc = plpar_xirr(&return_value, cppr);
         if (lpar_rc != H_SUCCESS)
                 panic(" bad return code xirr - rc = %lx\n", lpar_rc);
         return (unsigned int)return_value;
@@ -331,7 +331,8 @@ static unsigned int xics_get_irq_direct(void)
 
 static unsigned int xics_get_irq_lpar(void)
 {
-        unsigned int xirr = lpar_xirr_info_get();
+        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
+        unsigned int xirr = lpar_xirr_info_get(os_cppr->stack[os_cppr->index]);
         unsigned int vec = xics_xirr_vector(xirr);
         unsigned int irq;