diff options
Diffstat (limited to 'arch/powerpc/platforms')
139 files changed, 4563 insertions, 1148 deletions
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c index e5c1b096c3e1..8f771395f424 100644 --- a/arch/powerpc/platforms/44x/warp.c +++ b/arch/powerpc/platforms/44x/warp.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
18 | #include <linux/of_gpio.h> | 18 | #include <linux/of_gpio.h> |
19 | #include <linux/of_i2c.h> | 19 | #include <linux/of_i2c.h> |
20 | #include <linux/slab.h> | ||
20 | 21 | ||
21 | #include <asm/machdep.h> | 22 | #include <asm/machdep.h> |
22 | #include <asm/prom.h> | 23 | #include <asm/prom.h> |
diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c index 84544d072043..4c42246b86a7 100644 --- a/arch/powerpc/platforms/512x/clock.c +++ b/arch/powerpc/platforms/512x/clock.c | |||
@@ -698,8 +698,7 @@ static struct clk_interface mpc5121_clk_functions = { | |||
698 | .clk_get_parent = NULL, | 698 | .clk_get_parent = NULL, |
699 | }; | 699 | }; |
700 | 700 | ||
701 | static int | 701 | int __init mpc5121_clk_init(void) |
702 | mpc5121_clk_init(void) | ||
703 | { | 702 | { |
704 | struct device_node *np; | 703 | struct device_node *np; |
705 | 704 | ||
@@ -724,6 +723,3 @@ mpc5121_clk_init(void) | |||
724 | clk_functions = mpc5121_clk_functions; | 723 | clk_functions = mpc5121_clk_functions; |
725 | return 0; | 724 | return 0; |
726 | } | 725 | } |
727 | |||
728 | |||
729 | arch_initcall(mpc5121_clk_init); | ||
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c index 441abc488851..ee6ae129c25c 100644 --- a/arch/powerpc/platforms/512x/mpc5121_ads.c +++ b/arch/powerpc/platforms/512x/mpc5121_ads.c | |||
@@ -64,8 +64,9 @@ define_machine(mpc5121_ads) { | |||
64 | .name = "MPC5121 ADS", | 64 | .name = "MPC5121 ADS", |
65 | .probe = mpc5121_ads_probe, | 65 | .probe = mpc5121_ads_probe, |
66 | .setup_arch = mpc5121_ads_setup_arch, | 66 | .setup_arch = mpc5121_ads_setup_arch, |
67 | .init = mpc512x_declare_of_platform_devices, | 67 | .init = mpc512x_init, |
68 | .init_IRQ = mpc5121_ads_init_IRQ, | 68 | .init_IRQ = mpc5121_ads_init_IRQ, |
69 | .get_irq = ipic_get_irq, | 69 | .get_irq = ipic_get_irq, |
70 | .calibrate_decr = generic_calibrate_decr, | 70 | .calibrate_decr = generic_calibrate_decr, |
71 | .restart = mpc512x_restart, | ||
71 | }; | 72 | }; |
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c index a6ce80566625..4ecf4cf9a51b 100644 --- a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c +++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c | |||
@@ -79,7 +79,7 @@ cpld_unmask_irq(unsigned int irq) | |||
79 | } | 79 | } |
80 | 80 | ||
81 | static struct irq_chip cpld_pic = { | 81 | static struct irq_chip cpld_pic = { |
82 | .typename = " CPLD PIC ", | 82 | .name = "CPLD PIC", |
83 | .mask = cpld_mask_irq, | 83 | .mask = cpld_mask_irq, |
84 | .ack = cpld_mask_irq, | 84 | .ack = cpld_mask_irq, |
85 | .unmask = cpld_unmask_irq, | 85 | .unmask = cpld_unmask_irq, |
@@ -132,7 +132,7 @@ static int | |||
132 | cpld_pic_host_map(struct irq_host *h, unsigned int virq, | 132 | cpld_pic_host_map(struct irq_host *h, unsigned int virq, |
133 | irq_hw_number_t hw) | 133 | irq_hw_number_t hw) |
134 | { | 134 | { |
135 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 135 | irq_to_desc(virq)->status |= IRQ_LEVEL; |
136 | set_irq_chip_and_handler(virq, &cpld_pic, handle_level_irq); | 136 | set_irq_chip_and_handler(virq, &cpld_pic, handle_level_irq); |
137 | return 0; | 137 | return 0; |
138 | } | 138 | } |
diff --git a/arch/powerpc/platforms/512x/mpc5121_generic.c b/arch/powerpc/platforms/512x/mpc5121_generic.c index 2479de9e2d12..a6c0e3a2615d 100644 --- a/arch/powerpc/platforms/512x/mpc5121_generic.c +++ b/arch/powerpc/platforms/512x/mpc5121_generic.c | |||
@@ -51,8 +51,9 @@ static int __init mpc5121_generic_probe(void) | |||
51 | define_machine(mpc5121_generic) { | 51 | define_machine(mpc5121_generic) { |
52 | .name = "MPC5121 generic", | 52 | .name = "MPC5121 generic", |
53 | .probe = mpc5121_generic_probe, | 53 | .probe = mpc5121_generic_probe, |
54 | .init = mpc512x_declare_of_platform_devices, | 54 | .init = mpc512x_init, |
55 | .init_IRQ = mpc512x_init_IRQ, | 55 | .init_IRQ = mpc512x_init_IRQ, |
56 | .get_irq = ipic_get_irq, | 56 | .get_irq = ipic_get_irq, |
57 | .calibrate_decr = generic_calibrate_decr, | 57 | .calibrate_decr = generic_calibrate_decr, |
58 | .restart = mpc512x_restart, | ||
58 | }; | 59 | }; |
diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h index 22a5352407e0..b2daca0d1488 100644 --- a/arch/powerpc/platforms/512x/mpc512x.h +++ b/arch/powerpc/platforms/512x/mpc512x.h | |||
@@ -12,5 +12,8 @@ | |||
12 | #ifndef __MPC512X_H__ | 12 | #ifndef __MPC512X_H__ |
13 | #define __MPC512X_H__ | 13 | #define __MPC512X_H__ |
14 | extern void __init mpc512x_init_IRQ(void); | 14 | extern void __init mpc512x_init_IRQ(void); |
15 | extern void __init mpc512x_init(void); | ||
16 | extern int __init mpc5121_clk_init(void); | ||
15 | void __init mpc512x_declare_of_platform_devices(void); | 17 | void __init mpc512x_declare_of_platform_devices(void); |
18 | extern void mpc512x_restart(char *cmd); | ||
16 | #endif /* __MPC512X_H__ */ | 19 | #endif /* __MPC512X_H__ */ |
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c index 434d683df5a0..b7f518a60f03 100644 --- a/arch/powerpc/platforms/512x/mpc512x_shared.c +++ b/arch/powerpc/platforms/512x/mpc512x_shared.c | |||
@@ -21,9 +21,38 @@ | |||
21 | #include <asm/ipic.h> | 21 | #include <asm/ipic.h> |
22 | #include <asm/prom.h> | 22 | #include <asm/prom.h> |
23 | #include <asm/time.h> | 23 | #include <asm/time.h> |
24 | #include <asm/mpc5121.h> | ||
24 | 25 | ||
25 | #include "mpc512x.h" | 26 | #include "mpc512x.h" |
26 | 27 | ||
28 | static struct mpc512x_reset_module __iomem *reset_module_base; | ||
29 | |||
30 | static void __init mpc512x_restart_init(void) | ||
31 | { | ||
32 | struct device_node *np; | ||
33 | |||
34 | np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-reset"); | ||
35 | if (!np) | ||
36 | return; | ||
37 | |||
38 | reset_module_base = of_iomap(np, 0); | ||
39 | of_node_put(np); | ||
40 | } | ||
41 | |||
42 | void mpc512x_restart(char *cmd) | ||
43 | { | ||
44 | if (reset_module_base) { | ||
45 | /* Enable software reset "RSTE" */ | ||
46 | out_be32(&reset_module_base->rpr, 0x52535445); | ||
47 | /* Set software hard reset */ | ||
48 | out_be32(&reset_module_base->rcr, 0x2); | ||
49 | } else { | ||
50 | pr_err("Restart module not mapped.\n"); | ||
51 | } | ||
52 | for (;;) | ||
53 | ; | ||
54 | } | ||
55 | |||
27 | void __init mpc512x_init_IRQ(void) | 56 | void __init mpc512x_init_IRQ(void) |
28 | { | 57 | { |
29 | struct device_node *np; | 58 | struct device_node *np; |
@@ -53,8 +82,22 @@ static struct of_device_id __initdata of_bus_ids[] = { | |||
53 | 82 | ||
54 | void __init mpc512x_declare_of_platform_devices(void) | 83 | void __init mpc512x_declare_of_platform_devices(void) |
55 | { | 84 | { |
85 | struct device_node *np; | ||
86 | |||
56 | if (of_platform_bus_probe(NULL, of_bus_ids, NULL)) | 87 | if (of_platform_bus_probe(NULL, of_bus_ids, NULL)) |
57 | printk(KERN_ERR __FILE__ ": " | 88 | printk(KERN_ERR __FILE__ ": " |
58 | "Error while probing of_platform bus\n"); | 89 | "Error while probing of_platform bus\n"); |
90 | |||
91 | np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-nfc"); | ||
92 | if (np) { | ||
93 | of_platform_device_create(np, NULL, NULL); | ||
94 | of_node_put(np); | ||
95 | } | ||
59 | } | 96 | } |
60 | 97 | ||
98 | void __init mpc512x_init(void) | ||
99 | { | ||
100 | mpc512x_declare_of_platform_devices(); | ||
101 | mpc5121_clk_init(); | ||
102 | mpc512x_restart_init(); | ||
103 | } | ||
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig index 8b8e9560a315..47ea1be1481b 100644 --- a/arch/powerpc/platforms/52xx/Kconfig +++ b/arch/powerpc/platforms/52xx/Kconfig | |||
@@ -62,3 +62,8 @@ config PPC_MPC5200_GPIO | |||
62 | select GENERIC_GPIO | 62 | select GENERIC_GPIO |
63 | help | 63 | help |
64 | Enable gpiolib support for mpc5200 based boards | 64 | Enable gpiolib support for mpc5200 based boards |
65 | |||
66 | config PPC_MPC5200_LPBFIFO | ||
67 | tristate "MPC5200 LocalPlus bus FIFO driver" | ||
68 | depends on PPC_MPC52xx | ||
69 | select PPC_BESTCOMM_GEN_BD | ||
diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile index bfd4f52cf3dd..2bc8cd0c5cfc 100644 --- a/arch/powerpc/platforms/52xx/Makefile +++ b/arch/powerpc/platforms/52xx/Makefile | |||
@@ -15,3 +15,4 @@ ifeq ($(CONFIG_PPC_LITE5200),y) | |||
15 | endif | 15 | endif |
16 | 16 | ||
17 | obj-$(CONFIG_PPC_MPC5200_GPIO) += mpc52xx_gpio.o | 17 | obj-$(CONFIG_PPC_MPC5200_GPIO) += mpc52xx_gpio.o |
18 | obj-$(CONFIG_PPC_MPC5200_LPBFIFO) += mpc52xx_lpbfifo.o | ||
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c index bcc69e1f77c1..45c0cb9b67e6 100644 --- a/arch/powerpc/platforms/52xx/efika.c +++ b/arch/powerpc/platforms/52xx/efika.c | |||
@@ -10,7 +10,7 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/utsrelease.h> | 13 | #include <generated/utsrelease.h> |
14 | #include <linux/pci.h> | 14 | #include <linux/pci.h> |
15 | #include <linux/of.h> | 15 | #include <linux/of.h> |
16 | #include <asm/prom.h> | 16 | #include <asm/prom.h> |
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c index 68e4f1696d14..0bac3a3dbecf 100644 --- a/arch/powerpc/platforms/52xx/media5200.c +++ b/arch/powerpc/platforms/52xx/media5200.c | |||
@@ -74,7 +74,7 @@ static void media5200_irq_mask(unsigned int virq) | |||
74 | } | 74 | } |
75 | 75 | ||
76 | static struct irq_chip media5200_irq_chip = { | 76 | static struct irq_chip media5200_irq_chip = { |
77 | .typename = "Media5200 FPGA", | 77 | .name = "Media5200 FPGA", |
78 | .unmask = media5200_irq_unmask, | 78 | .unmask = media5200_irq_unmask, |
79 | .mask = media5200_irq_mask, | 79 | .mask = media5200_irq_mask, |
80 | .mask_ack = media5200_irq_mask, | 80 | .mask_ack = media5200_irq_mask, |
@@ -86,9 +86,9 @@ void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc) | |||
86 | u32 status, enable; | 86 | u32 status, enable; |
87 | 87 | ||
88 | /* Mask off the cascaded IRQ */ | 88 | /* Mask off the cascaded IRQ */ |
89 | spin_lock(&desc->lock); | 89 | raw_spin_lock(&desc->lock); |
90 | desc->chip->mask(virq); | 90 | desc->chip->mask(virq); |
91 | spin_unlock(&desc->lock); | 91 | raw_spin_unlock(&desc->lock); |
92 | 92 | ||
93 | /* Ask the FPGA for IRQ status. If 'val' is 0, then no irqs | 93 | /* Ask the FPGA for IRQ status. If 'val' is 0, then no irqs |
94 | * are pending. 'ffs()' is 1 based */ | 94 | * are pending. 'ffs()' is 1 based */ |
@@ -104,17 +104,17 @@ void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc) | |||
104 | } | 104 | } |
105 | 105 | ||
106 | /* Processing done; can reenable the cascade now */ | 106 | /* Processing done; can reenable the cascade now */ |
107 | spin_lock(&desc->lock); | 107 | raw_spin_lock(&desc->lock); |
108 | desc->chip->ack(virq); | 108 | desc->chip->ack(virq); |
109 | if (!(desc->status & IRQ_DISABLED)) | 109 | if (!(desc->status & IRQ_DISABLED)) |
110 | desc->chip->unmask(virq); | 110 | desc->chip->unmask(virq); |
111 | spin_unlock(&desc->lock); | 111 | raw_spin_unlock(&desc->lock); |
112 | } | 112 | } |
113 | 113 | ||
114 | static int media5200_irq_map(struct irq_host *h, unsigned int virq, | 114 | static int media5200_irq_map(struct irq_host *h, unsigned int virq, |
115 | irq_hw_number_t hw) | 115 | irq_hw_number_t hw) |
116 | { | 116 | { |
117 | struct irq_desc *desc = get_irq_desc(virq); | 117 | struct irq_desc *desc = irq_to_desc(virq); |
118 | 118 | ||
119 | pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw); | 119 | pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw); |
120 | set_irq_chip_data(virq, &media5200_irq); | 120 | set_irq_chip_data(virq, &media5200_irq); |
@@ -127,7 +127,7 @@ static int media5200_irq_map(struct irq_host *h, unsigned int virq, | |||
127 | } | 127 | } |
128 | 128 | ||
129 | static int media5200_irq_xlate(struct irq_host *h, struct device_node *ct, | 129 | static int media5200_irq_xlate(struct irq_host *h, struct device_node *ct, |
130 | u32 *intspec, unsigned int intsize, | 130 | const u32 *intspec, unsigned int intsize, |
131 | irq_hw_number_t *out_hwirq, | 131 | irq_hw_number_t *out_hwirq, |
132 | unsigned int *out_flags) | 132 | unsigned int *out_flags) |
133 | { | 133 | { |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c index 2b8d8ef32e4e..fda7c2a18282 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c | |||
@@ -19,6 +19,7 @@ | |||
19 | 19 | ||
20 | #include <linux/of.h> | 20 | #include <linux/of.h> |
21 | #include <linux/kernel.h> | 21 | #include <linux/kernel.h> |
22 | #include <linux/slab.h> | ||
22 | #include <linux/of_gpio.h> | 23 | #include <linux/of_gpio.h> |
23 | #include <linux/io.h> | 24 | #include <linux/io.h> |
24 | #include <linux/of_platform.h> | 25 | #include <linux/of_platform.h> |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c index bfbcd418e690..a60ee39d3b78 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c | |||
@@ -16,8 +16,14 @@ | |||
16 | * output signals or measure input signals. | 16 | * output signals or measure input signals. |
17 | * | 17 | * |
18 | * This driver supports the GPIO and IRQ controller functions of the GPT | 18 | * This driver supports the GPIO and IRQ controller functions of the GPT |
19 | * device. Timer functions are not yet supported, nor is the watchdog | 19 | * device. Timer functions are not yet supported. |
20 | * timer. | 20 | * |
21 | * The timer gpt0 can be used as watchdog (wdt). If the wdt mode is used, | ||
22 | * this prevents the use of any gpt0 gpt function (i.e. they will fail with | ||
23 | * -EBUSY). Thus, the safety wdt function always has precedence over the gpt | ||
24 | * function. If the kernel has been compiled with CONFIG_WATCHDOG_NOWAYOUT, | ||
25 | * this means that gpt0 is locked in wdt mode until the next reboot - this | ||
26 | * may be a requirement in safety applications. | ||
21 | * | 27 | * |
22 | * To use the GPIO function, the following two properties must be added | 28 | * To use the GPIO function, the following two properties must be added |
23 | * to the device tree node for the gpt device (typically in the .dts file | 29 | * to the device tree node for the gpt device (typically in the .dts file |
@@ -46,17 +52,25 @@ | |||
46 | * the output mode. This driver does not change the output mode setting. | 52 | * the output mode. This driver does not change the output mode setting. |
47 | */ | 53 | */ |
48 | 54 | ||
55 | #include <linux/device.h> | ||
49 | #include <linux/irq.h> | 56 | #include <linux/irq.h> |
50 | #include <linux/interrupt.h> | 57 | #include <linux/interrupt.h> |
51 | #include <linux/io.h> | 58 | #include <linux/io.h> |
59 | #include <linux/list.h> | ||
60 | #include <linux/mutex.h> | ||
52 | #include <linux/of.h> | 61 | #include <linux/of.h> |
53 | #include <linux/of_platform.h> | 62 | #include <linux/of_platform.h> |
54 | #include <linux/of_gpio.h> | 63 | #include <linux/of_gpio.h> |
55 | #include <linux/kernel.h> | 64 | #include <linux/kernel.h> |
65 | #include <linux/slab.h> | ||
66 | #include <linux/watchdog.h> | ||
67 | #include <linux/miscdevice.h> | ||
68 | #include <linux/uaccess.h> | ||
69 | #include <asm/div64.h> | ||
56 | #include <asm/mpc52xx.h> | 70 | #include <asm/mpc52xx.h> |
57 | 71 | ||
58 | MODULE_DESCRIPTION("Freescale MPC52xx gpt driver"); | 72 | MODULE_DESCRIPTION("Freescale MPC52xx gpt driver"); |
59 | MODULE_AUTHOR("Sascha Hauer, Grant Likely"); | 73 | MODULE_AUTHOR("Sascha Hauer, Grant Likely, Albrecht Dreß"); |
60 | MODULE_LICENSE("GPL"); | 74 | MODULE_LICENSE("GPL"); |
61 | 75 | ||
62 | /** | 76 | /** |
@@ -66,18 +80,27 @@ MODULE_LICENSE("GPL"); | |||
66 | * @lock: spinlock to coordinate between different functions. | 80 | * @lock: spinlock to coordinate between different functions. |
67 | * @of_gc: of_gpio_chip instance structure; used when GPIO is enabled | 81 | * @of_gc: of_gpio_chip instance structure; used when GPIO is enabled |
68 | * @irqhost: Pointer to irq_host instance; used when IRQ mode is supported | 82 | * @irqhost: Pointer to irq_host instance; used when IRQ mode is supported |
83 | * @wdt_mode: only relevant for gpt0: bit 0 (MPC52xx_GPT_CAN_WDT) indicates | ||
84 | * if the gpt may be used as wdt, bit 1 (MPC52xx_GPT_IS_WDT) indicates | ||
85 | * if the timer is actively used as wdt which blocks gpt functions | ||
69 | */ | 86 | */ |
70 | struct mpc52xx_gpt_priv { | 87 | struct mpc52xx_gpt_priv { |
88 | struct list_head list; /* List of all GPT devices */ | ||
71 | struct device *dev; | 89 | struct device *dev; |
72 | struct mpc52xx_gpt __iomem *regs; | 90 | struct mpc52xx_gpt __iomem *regs; |
73 | spinlock_t lock; | 91 | spinlock_t lock; |
74 | struct irq_host *irqhost; | 92 | struct irq_host *irqhost; |
93 | u32 ipb_freq; | ||
94 | u8 wdt_mode; | ||
75 | 95 | ||
76 | #if defined(CONFIG_GPIOLIB) | 96 | #if defined(CONFIG_GPIOLIB) |
77 | struct of_gpio_chip of_gc; | 97 | struct of_gpio_chip of_gc; |
78 | #endif | 98 | #endif |
79 | }; | 99 | }; |
80 | 100 | ||
101 | LIST_HEAD(mpc52xx_gpt_list); | ||
102 | DEFINE_MUTEX(mpc52xx_gpt_list_mutex); | ||
103 | |||
81 | #define MPC52xx_GPT_MODE_MS_MASK (0x07) | 104 | #define MPC52xx_GPT_MODE_MS_MASK (0x07) |
82 | #define MPC52xx_GPT_MODE_MS_IC (0x01) | 105 | #define MPC52xx_GPT_MODE_MS_IC (0x01) |
83 | #define MPC52xx_GPT_MODE_MS_OC (0x02) | 106 | #define MPC52xx_GPT_MODE_MS_OC (0x02) |
@@ -88,15 +111,25 @@ struct mpc52xx_gpt_priv { | |||
88 | #define MPC52xx_GPT_MODE_GPIO_OUT_LOW (0x20) | 111 | #define MPC52xx_GPT_MODE_GPIO_OUT_LOW (0x20) |
89 | #define MPC52xx_GPT_MODE_GPIO_OUT_HIGH (0x30) | 112 | #define MPC52xx_GPT_MODE_GPIO_OUT_HIGH (0x30) |
90 | 113 | ||
114 | #define MPC52xx_GPT_MODE_COUNTER_ENABLE (0x1000) | ||
115 | #define MPC52xx_GPT_MODE_CONTINUOUS (0x0400) | ||
116 | #define MPC52xx_GPT_MODE_OPEN_DRAIN (0x0200) | ||
91 | #define MPC52xx_GPT_MODE_IRQ_EN (0x0100) | 117 | #define MPC52xx_GPT_MODE_IRQ_EN (0x0100) |
118 | #define MPC52xx_GPT_MODE_WDT_EN (0x8000) | ||
92 | 119 | ||
93 | #define MPC52xx_GPT_MODE_ICT_MASK (0x030000) | 120 | #define MPC52xx_GPT_MODE_ICT_MASK (0x030000) |
94 | #define MPC52xx_GPT_MODE_ICT_RISING (0x010000) | 121 | #define MPC52xx_GPT_MODE_ICT_RISING (0x010000) |
95 | #define MPC52xx_GPT_MODE_ICT_FALLING (0x020000) | 122 | #define MPC52xx_GPT_MODE_ICT_FALLING (0x020000) |
96 | #define MPC52xx_GPT_MODE_ICT_TOGGLE (0x030000) | 123 | #define MPC52xx_GPT_MODE_ICT_TOGGLE (0x030000) |
97 | 124 | ||
125 | #define MPC52xx_GPT_MODE_WDT_PING (0xa5) | ||
126 | |||
98 | #define MPC52xx_GPT_STATUS_IRQMASK (0x000f) | 127 | #define MPC52xx_GPT_STATUS_IRQMASK (0x000f) |
99 | 128 | ||
129 | #define MPC52xx_GPT_CAN_WDT (1 << 0) | ||
130 | #define MPC52xx_GPT_IS_WDT (1 << 1) | ||
131 | |||
132 | |||
100 | /* --------------------------------------------------------------------- | 133 | /* --------------------------------------------------------------------- |
101 | * Cascaded interrupt controller hooks | 134 | * Cascaded interrupt controller hooks |
102 | */ | 135 | */ |
@@ -149,7 +182,7 @@ static int mpc52xx_gpt_irq_set_type(unsigned int virq, unsigned int flow_type) | |||
149 | } | 182 | } |
150 | 183 | ||
151 | static struct irq_chip mpc52xx_gpt_irq_chip = { | 184 | static struct irq_chip mpc52xx_gpt_irq_chip = { |
152 | .typename = "MPC52xx GPT", | 185 | .name = "MPC52xx GPT", |
153 | .unmask = mpc52xx_gpt_irq_unmask, | 186 | .unmask = mpc52xx_gpt_irq_unmask, |
154 | .mask = mpc52xx_gpt_irq_mask, | 187 | .mask = mpc52xx_gpt_irq_mask, |
155 | .ack = mpc52xx_gpt_irq_ack, | 188 | .ack = mpc52xx_gpt_irq_ack, |
@@ -182,7 +215,7 @@ static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq, | |||
182 | } | 215 | } |
183 | 216 | ||
184 | static int mpc52xx_gpt_irq_xlate(struct irq_host *h, struct device_node *ct, | 217 | static int mpc52xx_gpt_irq_xlate(struct irq_host *h, struct device_node *ct, |
185 | u32 *intspec, unsigned int intsize, | 218 | const u32 *intspec, unsigned int intsize, |
186 | irq_hw_number_t *out_hwirq, | 219 | irq_hw_number_t *out_hwirq, |
187 | unsigned int *out_flags) | 220 | unsigned int *out_flags) |
188 | { | 221 | { |
@@ -190,7 +223,7 @@ static int mpc52xx_gpt_irq_xlate(struct irq_host *h, struct device_node *ct, | |||
190 | 223 | ||
191 | dev_dbg(gpt->dev, "%s: flags=%i\n", __func__, intspec[0]); | 224 | dev_dbg(gpt->dev, "%s: flags=%i\n", __func__, intspec[0]); |
192 | 225 | ||
193 | if ((intsize < 1) || (intspec[0] < 1) || (intspec[0] > 3)) { | 226 | if ((intsize < 1) || (intspec[0] > 3)) { |
194 | dev_err(gpt->dev, "bad irq specifier in %s\n", ct->full_name); | 227 | dev_err(gpt->dev, "bad irq specifier in %s\n", ct->full_name); |
195 | return -EINVAL; | 228 | return -EINVAL; |
196 | } | 229 | } |
@@ -211,13 +244,11 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node) | |||
211 | { | 244 | { |
212 | int cascade_virq; | 245 | int cascade_virq; |
213 | unsigned long flags; | 246 | unsigned long flags; |
214 | 247 | u32 mode; | |
215 | /* Only setup cascaded IRQ if device tree claims the GPT is | ||
216 | * an interrupt controller */ | ||
217 | if (!of_find_property(node, "interrupt-controller", NULL)) | ||
218 | return; | ||
219 | 248 | ||
220 | cascade_virq = irq_of_parse_and_map(node, 0); | 249 | cascade_virq = irq_of_parse_and_map(node, 0); |
250 | if (!cascade_virq) | ||
251 | return; | ||
221 | 252 | ||
222 | gpt->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, 1, | 253 | gpt->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, 1, |
223 | &mpc52xx_gpt_irq_ops, -1); | 254 | &mpc52xx_gpt_irq_ops, -1); |
@@ -227,14 +258,16 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node) | |||
227 | } | 258 | } |
228 | 259 | ||
229 | gpt->irqhost->host_data = gpt; | 260 | gpt->irqhost->host_data = gpt; |
230 | |||
231 | set_irq_data(cascade_virq, gpt); | 261 | set_irq_data(cascade_virq, gpt); |
232 | set_irq_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade); | 262 | set_irq_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade); |
233 | 263 | ||
234 | /* Set to Input Capture mode */ | 264 | /* If the GPT is currently disabled, then change it to be in Input |
265 | * Capture mode. If the mode is non-zero, then the pin could be | ||
266 | * already in use for something. */ | ||
235 | spin_lock_irqsave(&gpt->lock, flags); | 267 | spin_lock_irqsave(&gpt->lock, flags); |
236 | clrsetbits_be32(&gpt->regs->mode, MPC52xx_GPT_MODE_MS_MASK, | 268 | mode = in_be32(&gpt->regs->mode); |
237 | MPC52xx_GPT_MODE_MS_IC); | 269 | if ((mode & MPC52xx_GPT_MODE_MS_MASK) == 0) |
270 | out_be32(&gpt->regs->mode, mode | MPC52xx_GPT_MODE_MS_IC); | ||
238 | spin_unlock_irqrestore(&gpt->lock, flags); | 271 | spin_unlock_irqrestore(&gpt->lock, flags); |
239 | 272 | ||
240 | dev_dbg(gpt->dev, "%s() complete. virq=%i\n", __func__, cascade_virq); | 273 | dev_dbg(gpt->dev, "%s() complete. virq=%i\n", __func__, cascade_virq); |
@@ -335,6 +368,358 @@ static void | |||
335 | mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *p, struct device_node *np) { } | 368 | mpc52xx_gpt_gpio_setup(struct mpc52xx_gpt_priv *p, struct device_node *np) { } |
336 | #endif /* defined(CONFIG_GPIOLIB) */ | 369 | #endif /* defined(CONFIG_GPIOLIB) */ |
337 | 370 | ||
371 | /*********************************************************************** | ||
372 | * Timer API | ||
373 | */ | ||
374 | |||
375 | /** | ||
376 | * mpc52xx_gpt_from_irq - Return the GPT device associated with an IRQ number | ||
377 | * @irq: irq of timer. | ||
378 | */ | ||
379 | struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq) | ||
380 | { | ||
381 | struct mpc52xx_gpt_priv *gpt; | ||
382 | struct list_head *pos; | ||
383 | |||
384 | /* Iterate over the list of timers looking for a matching device */ | ||
385 | mutex_lock(&mpc52xx_gpt_list_mutex); | ||
386 | list_for_each(pos, &mpc52xx_gpt_list) { | ||
387 | gpt = container_of(pos, struct mpc52xx_gpt_priv, list); | ||
388 | if (gpt->irqhost && irq == irq_linear_revmap(gpt->irqhost, 0)) { | ||
389 | mutex_unlock(&mpc52xx_gpt_list_mutex); | ||
390 | return gpt; | ||
391 | } | ||
392 | } | ||
393 | mutex_unlock(&mpc52xx_gpt_list_mutex); | ||
394 | |||
395 | return NULL; | ||
396 | } | ||
397 | EXPORT_SYMBOL(mpc52xx_gpt_from_irq); | ||
398 | |||
399 | static int mpc52xx_gpt_do_start(struct mpc52xx_gpt_priv *gpt, u64 period, | ||
400 | int continuous, int as_wdt) | ||
401 | { | ||
402 | u32 clear, set; | ||
403 | u64 clocks; | ||
404 | u32 prescale; | ||
405 | unsigned long flags; | ||
406 | |||
407 | clear = MPC52xx_GPT_MODE_MS_MASK | MPC52xx_GPT_MODE_CONTINUOUS; | ||
408 | set = MPC52xx_GPT_MODE_MS_GPIO | MPC52xx_GPT_MODE_COUNTER_ENABLE; | ||
409 | if (as_wdt) { | ||
410 | clear |= MPC52xx_GPT_MODE_IRQ_EN; | ||
411 | set |= MPC52xx_GPT_MODE_WDT_EN; | ||
412 | } else if (continuous) | ||
413 | set |= MPC52xx_GPT_MODE_CONTINUOUS; | ||
414 | |||
415 | /* Determine the number of clocks in the requested period. 64 bit | ||
416 | * arithmatic is done here to preserve the precision until the value | ||
417 | * is scaled back down into the u32 range. Period is in 'ns', bus | ||
418 | * frequency is in Hz. */ | ||
419 | clocks = period * (u64)gpt->ipb_freq; | ||
420 | do_div(clocks, 1000000000); /* Scale it down to ns range */ | ||
421 | |||
422 | /* This device cannot handle a clock count greater than 32 bits */ | ||
423 | if (clocks > 0xffffffff) | ||
424 | return -EINVAL; | ||
425 | |||
426 | /* Calculate the prescaler and count values from the clocks value. | ||
427 | * 'clocks' is the number of clock ticks in the period. The timer | ||
428 | * has 16 bit precision and a 16 bit prescaler. Prescaler is | ||
429 | * calculated by integer dividing the clocks by 0x10000 (shifting | ||
430 | * down 16 bits) to obtain the smallest possible divisor for clocks | ||
431 | * to get a 16 bit count value. | ||
432 | * | ||
433 | * Note: the prescale register is '1' based, not '0' based. ie. a | ||
434 | * value of '1' means divide the clock by one. 0xffff divides the | ||
435 | * clock by 0xffff. '0x0000' does not divide by zero, but wraps | ||
436 | * around and divides by 0x10000. That is why prescale must be | ||
437 | * a u32 variable, not a u16, for this calculation. */ | ||
438 | prescale = (clocks >> 16) + 1; | ||
439 | do_div(clocks, prescale); | ||
440 | if (clocks > 0xffff) { | ||
441 | pr_err("calculation error; prescale:%x clocks:%llx\n", | ||
442 | prescale, clocks); | ||
443 | return -EINVAL; | ||
444 | } | ||
445 | |||
446 | /* Set and enable the timer, reject an attempt to use a wdt as gpt */ | ||
447 | spin_lock_irqsave(&gpt->lock, flags); | ||
448 | if (as_wdt) | ||
449 | gpt->wdt_mode |= MPC52xx_GPT_IS_WDT; | ||
450 | else if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT) != 0) { | ||
451 | spin_unlock_irqrestore(&gpt->lock, flags); | ||
452 | return -EBUSY; | ||
453 | } | ||
454 | out_be32(&gpt->regs->count, prescale << 16 | clocks); | ||
455 | clrsetbits_be32(&gpt->regs->mode, clear, set); | ||
456 | spin_unlock_irqrestore(&gpt->lock, flags); | ||
457 | |||
458 | return 0; | ||
459 | } | ||
460 | |||
461 | /** | ||
462 | * mpc52xx_gpt_start_timer - Set and enable the GPT timer | ||
463 | * @gpt: Pointer to gpt private data structure | ||
464 | * @period: period of timer in ns; max. ~130s @ 33MHz IPB clock | ||
465 | * @continuous: set to 1 to make timer continuous free running | ||
466 | * | ||
467 | * An interrupt will be generated every time the timer fires | ||
468 | */ | ||
469 | int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period, | ||
470 | int continuous) | ||
471 | { | ||
472 | return mpc52xx_gpt_do_start(gpt, period, continuous, 0); | ||
473 | } | ||
474 | EXPORT_SYMBOL(mpc52xx_gpt_start_timer); | ||
475 | |||
476 | /** | ||
477 | * mpc52xx_gpt_stop_timer - Stop a gpt | ||
478 | * @gpt: Pointer to gpt private data structure | ||
479 | * | ||
480 | * Returns an error if attempting to stop a wdt | ||
481 | */ | ||
482 | int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt) | ||
483 | { | ||
484 | unsigned long flags; | ||
485 | |||
486 | /* reject the operation if the timer is used as watchdog (gpt 0 only) */ | ||
487 | spin_lock_irqsave(&gpt->lock, flags); | ||
488 | if ((gpt->wdt_mode & MPC52xx_GPT_IS_WDT) != 0) { | ||
489 | spin_unlock_irqrestore(&gpt->lock, flags); | ||
490 | return -EBUSY; | ||
491 | } | ||
492 | |||
493 | clrbits32(&gpt->regs->mode, MPC52xx_GPT_MODE_COUNTER_ENABLE); | ||
494 | spin_unlock_irqrestore(&gpt->lock, flags); | ||
495 | return 0; | ||
496 | } | ||
497 | EXPORT_SYMBOL(mpc52xx_gpt_stop_timer); | ||
498 | |||
499 | /** | ||
500 | * mpc52xx_gpt_timer_period - Read the timer period | ||
501 | * @gpt: Pointer to gpt private data structure | ||
502 | * | ||
503 | * Returns the timer period in ns | ||
504 | */ | ||
505 | u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt) | ||
506 | { | ||
507 | u64 period; | ||
508 | u64 prescale; | ||
509 | unsigned long flags; | ||
510 | |||
511 | spin_lock_irqsave(&gpt->lock, flags); | ||
512 | period = in_be32(&gpt->regs->count); | ||
513 | spin_unlock_irqrestore(&gpt->lock, flags); | ||
514 | |||
515 | prescale = period >> 16; | ||
516 | period &= 0xffff; | ||
517 | if (prescale == 0) | ||
518 | prescale = 0x10000; | ||
519 | period = period * prescale * 1000000000ULL; | ||
520 | do_div(period, (u64)gpt->ipb_freq); | ||
521 | return period; | ||
522 | } | ||
523 | EXPORT_SYMBOL(mpc52xx_gpt_timer_period); | ||
524 | |||
525 | #if defined(CONFIG_MPC5200_WDT) | ||
526 | /*********************************************************************** | ||
527 | * Watchdog API for gpt0 | ||
528 | */ | ||
529 | |||
530 | #define WDT_IDENTITY "mpc52xx watchdog on GPT0" | ||
531 | |||
532 | /* wdt_is_active stores wether or not the /dev/watchdog device is opened */ | ||
533 | static unsigned long wdt_is_active; | ||
534 | |||
535 | /* wdt-capable gpt */ | ||
536 | static struct mpc52xx_gpt_priv *mpc52xx_gpt_wdt; | ||
537 | |||
538 | /* low-level wdt functions */ | ||
539 | static inline void mpc52xx_gpt_wdt_ping(struct mpc52xx_gpt_priv *gpt_wdt) | ||
540 | { | ||
541 | unsigned long flags; | ||
542 | |||
543 | spin_lock_irqsave(&gpt_wdt->lock, flags); | ||
544 | out_8((u8 *) &gpt_wdt->regs->mode, MPC52xx_GPT_MODE_WDT_PING); | ||
545 | spin_unlock_irqrestore(&gpt_wdt->lock, flags); | ||
546 | } | ||
547 | |||
548 | /* wdt misc device api */ | ||
549 | static ssize_t mpc52xx_wdt_write(struct file *file, const char __user *data, | ||
550 | size_t len, loff_t *ppos) | ||
551 | { | ||
552 | struct mpc52xx_gpt_priv *gpt_wdt = file->private_data; | ||
553 | mpc52xx_gpt_wdt_ping(gpt_wdt); | ||
554 | return 0; | ||
555 | } | ||
556 | |||
557 | static const struct watchdog_info mpc5200_wdt_info = { | ||
558 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, | ||
559 | .identity = WDT_IDENTITY, | ||
560 | }; | ||
561 | |||
562 | static long mpc52xx_wdt_ioctl(struct file *file, unsigned int cmd, | ||
563 | unsigned long arg) | ||
564 | { | ||
565 | struct mpc52xx_gpt_priv *gpt_wdt = file->private_data; | ||
566 | int __user *data = (int __user *)arg; | ||
567 | int timeout; | ||
568 | u64 real_timeout; | ||
569 | int ret = 0; | ||
570 | |||
571 | switch (cmd) { | ||
572 | case WDIOC_GETSUPPORT: | ||
573 | ret = copy_to_user(data, &mpc5200_wdt_info, | ||
574 | sizeof(mpc5200_wdt_info)); | ||
575 | if (ret) | ||
576 | ret = -EFAULT; | ||
577 | break; | ||
578 | |||
579 | case WDIOC_GETSTATUS: | ||
580 | case WDIOC_GETBOOTSTATUS: | ||
581 | ret = put_user(0, data); | ||
582 | break; | ||
583 | |||
584 | case WDIOC_KEEPALIVE: | ||
585 | mpc52xx_gpt_wdt_ping(gpt_wdt); | ||
586 | break; | ||
587 | |||
588 | case WDIOC_SETTIMEOUT: | ||
589 | ret = get_user(timeout, data); | ||
590 | if (ret) | ||
591 | break; | ||
592 | real_timeout = (u64) timeout * 1000000000ULL; | ||
593 | ret = mpc52xx_gpt_do_start(gpt_wdt, real_timeout, 0, 1); | ||
594 | if (ret) | ||
595 | break; | ||
596 | /* fall through and return the timeout */ | ||
597 | |||
598 | case WDIOC_GETTIMEOUT: | ||
599 | /* we need to round here as to avoid e.g. the following | ||
600 | * situation: | ||
601 | * - timeout requested is 1 second; | ||
602 | * - real timeout @33MHz is 999997090ns | ||
603 | * - the int divide by 10^9 will return 0. | ||
604 | */ | ||
605 | real_timeout = | ||
606 | mpc52xx_gpt_timer_period(gpt_wdt) + 500000000ULL; | ||
607 | do_div(real_timeout, 1000000000ULL); | ||
608 | timeout = (int) real_timeout; | ||
609 | ret = put_user(timeout, data); | ||
610 | break; | ||
611 | |||
612 | default: | ||
613 | ret = -ENOTTY; | ||
614 | } | ||
615 | return ret; | ||
616 | } | ||
617 | |||
618 | static int mpc52xx_wdt_open(struct inode *inode, struct file *file) | ||
619 | { | ||
620 | int ret; | ||
621 | |||
622 | /* sanity check */ | ||
623 | if (!mpc52xx_gpt_wdt) | ||
624 | return -ENODEV; | ||
625 | |||
626 | /* /dev/watchdog can only be opened once */ | ||
627 | if (test_and_set_bit(0, &wdt_is_active)) | ||
628 | return -EBUSY; | ||
629 | |||
630 | /* Set and activate the watchdog with 30 seconds timeout */ | ||
631 | ret = mpc52xx_gpt_do_start(mpc52xx_gpt_wdt, 30ULL * 1000000000ULL, | ||
632 | 0, 1); | ||
633 | if (ret) { | ||
634 | clear_bit(0, &wdt_is_active); | ||
635 | return ret; | ||
636 | } | ||
637 | |||
638 | file->private_data = mpc52xx_gpt_wdt; | ||
639 | return nonseekable_open(inode, file); | ||
640 | } | ||
641 | |||
642 | static int mpc52xx_wdt_release(struct inode *inode, struct file *file) | ||
643 | { | ||
644 | /* note: releasing the wdt in NOWAYOUT-mode does not stop it */ | ||
645 | #if !defined(CONFIG_WATCHDOG_NOWAYOUT) | ||
646 | struct mpc52xx_gpt_priv *gpt_wdt = file->private_data; | ||
647 | unsigned long flags; | ||
648 | |||
649 | spin_lock_irqsave(&gpt_wdt->lock, flags); | ||
650 | clrbits32(&gpt_wdt->regs->mode, | ||
651 | MPC52xx_GPT_MODE_COUNTER_ENABLE | MPC52xx_GPT_MODE_WDT_EN); | ||
652 | gpt_wdt->wdt_mode &= ~MPC52xx_GPT_IS_WDT; | ||
653 | spin_unlock_irqrestore(&gpt_wdt->lock, flags); | ||
654 | #endif | ||
655 | clear_bit(0, &wdt_is_active); | ||
656 | return 0; | ||
657 | } | ||
658 | |||
659 | |||
660 | static const struct file_operations mpc52xx_wdt_fops = { | ||
661 | .owner = THIS_MODULE, | ||
662 | .llseek = no_llseek, | ||
663 | .write = mpc52xx_wdt_write, | ||
664 | .unlocked_ioctl = mpc52xx_wdt_ioctl, | ||
665 | .open = mpc52xx_wdt_open, | ||
666 | .release = mpc52xx_wdt_release, | ||
667 | }; | ||
668 | |||
669 | static struct miscdevice mpc52xx_wdt_miscdev = { | ||
670 | .minor = WATCHDOG_MINOR, | ||
671 | .name = "watchdog", | ||
672 | .fops = &mpc52xx_wdt_fops, | ||
673 | }; | ||
674 | |||
675 | static int __devinit mpc52xx_gpt_wdt_init(void) | ||
676 | { | ||
677 | int err; | ||
678 | |||
679 | /* try to register the watchdog misc device */ | ||
680 | err = misc_register(&mpc52xx_wdt_miscdev); | ||
681 | if (err) | ||
682 | pr_err("%s: cannot register watchdog device\n", WDT_IDENTITY); | ||
683 | else | ||
684 | pr_info("%s: watchdog device registered\n", WDT_IDENTITY); | ||
685 | return err; | ||
686 | } | ||
687 | |||
688 | static int mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv *gpt, | ||
689 | const u32 *period) | ||
690 | { | ||
691 | u64 real_timeout; | ||
692 | |||
693 | /* remember the gpt for the wdt operation */ | ||
694 | mpc52xx_gpt_wdt = gpt; | ||
695 | |||
696 | /* configure the wdt if the device tree contained a timeout */ | ||
697 | if (!period || *period == 0) | ||
698 | return 0; | ||
699 | |||
700 | real_timeout = (u64) *period * 1000000000ULL; | ||
701 | if (mpc52xx_gpt_do_start(gpt, real_timeout, 0, 1)) | ||
702 | dev_warn(gpt->dev, "starting as wdt failed\n"); | ||
703 | else | ||
704 | dev_info(gpt->dev, "watchdog set to %us timeout\n", *period); | ||
705 | return 0; | ||
706 | } | ||
707 | |||
708 | #else | ||
709 | |||
710 | static int __devinit mpc52xx_gpt_wdt_init(void) | ||
711 | { | ||
712 | return 0; | ||
713 | } | ||
714 | |||
715 | static inline int mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv *gpt, | ||
716 | const u32 *period) | ||
717 | { | ||
718 | return 0; | ||
719 | } | ||
720 | |||
721 | #endif /* CONFIG_MPC5200_WDT */ | ||
722 | |||
338 | /* --------------------------------------------------------------------- | 723 | /* --------------------------------------------------------------------- |
339 | * of_platform bus binding code | 724 | * of_platform bus binding code |
340 | */ | 725 | */ |
@@ -349,6 +734,7 @@ static int __devinit mpc52xx_gpt_probe(struct of_device *ofdev, | |||
349 | 734 | ||
350 | spin_lock_init(&gpt->lock); | 735 | spin_lock_init(&gpt->lock); |
351 | gpt->dev = &ofdev->dev; | 736 | gpt->dev = &ofdev->dev; |
737 | gpt->ipb_freq = mpc5xxx_get_bus_frequency(ofdev->node); | ||
352 | gpt->regs = of_iomap(ofdev->node, 0); | 738 | gpt->regs = of_iomap(ofdev->node, 0); |
353 | if (!gpt->regs) { | 739 | if (!gpt->regs) { |
354 | kfree(gpt); | 740 | kfree(gpt); |
@@ -360,6 +746,26 @@ static int __devinit mpc52xx_gpt_probe(struct of_device *ofdev, | |||
360 | mpc52xx_gpt_gpio_setup(gpt, ofdev->node); | 746 | mpc52xx_gpt_gpio_setup(gpt, ofdev->node); |
361 | mpc52xx_gpt_irq_setup(gpt, ofdev->node); | 747 | mpc52xx_gpt_irq_setup(gpt, ofdev->node); |
362 | 748 | ||
749 | mutex_lock(&mpc52xx_gpt_list_mutex); | ||
750 | list_add(&gpt->list, &mpc52xx_gpt_list); | ||
751 | mutex_unlock(&mpc52xx_gpt_list_mutex); | ||
752 | |||
753 | /* check if this device could be a watchdog */ | ||
754 | if (of_get_property(ofdev->node, "fsl,has-wdt", NULL) || | ||
755 | of_get_property(ofdev->node, "has-wdt", NULL)) { | ||
756 | const u32 *on_boot_wdt; | ||
757 | |||
758 | gpt->wdt_mode = MPC52xx_GPT_CAN_WDT; | ||
759 | on_boot_wdt = of_get_property(ofdev->node, "fsl,wdt-on-boot", | ||
760 | NULL); | ||
761 | if (on_boot_wdt) { | ||
762 | dev_info(gpt->dev, "used as watchdog\n"); | ||
763 | gpt->wdt_mode |= MPC52xx_GPT_IS_WDT; | ||
764 | } else | ||
765 | dev_info(gpt->dev, "can function as watchdog\n"); | ||
766 | mpc52xx_gpt_wdt_setup(gpt, on_boot_wdt); | ||
767 | } | ||
768 | |||
363 | return 0; | 769 | return 0; |
364 | } | 770 | } |
365 | 771 | ||
@@ -394,3 +800,4 @@ static int __init mpc52xx_gpt_init(void) | |||
394 | 800 | ||
395 | /* Make sure GPIOs and IRQs get set up before anyone tries to use them */ | 801 | /* Make sure GPIOs and IRQs get set up before anyone tries to use them */ |
396 | subsys_initcall(mpc52xx_gpt_init); | 802 | subsys_initcall(mpc52xx_gpt_init); |
803 | device_initcall(mpc52xx_gpt_wdt_init); | ||
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c new file mode 100644 index 000000000000..d4f8be307cd5 --- /dev/null +++ b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | |||
@@ -0,0 +1,562 @@ | |||
1 | /* | ||
2 | * LocalPlus Bus FIFO driver for the Freescale MPC52xx. | ||
3 | * | ||
4 | * Copyright (C) 2009 Secret Lab Technologies Ltd. | ||
5 | * | ||
6 | * This file is released under the GPLv2 | ||
7 | * | ||
8 | * Todo: | ||
9 | * - Add support for multiple requests to be queued. | ||
10 | */ | ||
11 | |||
12 | #include <linux/interrupt.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/of.h> | ||
15 | #include <linux/of_platform.h> | ||
16 | #include <linux/spinlock.h> | ||
17 | #include <asm/io.h> | ||
18 | #include <asm/prom.h> | ||
19 | #include <asm/mpc52xx.h> | ||
20 | #include <asm/time.h> | ||
21 | |||
22 | #include <sysdev/bestcomm/bestcomm.h> | ||
23 | #include <sysdev/bestcomm/bestcomm_priv.h> | ||
24 | #include <sysdev/bestcomm/gen_bd.h> | ||
25 | |||
26 | MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>"); | ||
27 | MODULE_DESCRIPTION("MPC5200 LocalPlus FIFO device driver"); | ||
28 | MODULE_LICENSE("GPL"); | ||
29 | |||
30 | #define LPBFIFO_REG_PACKET_SIZE (0x00) | ||
31 | #define LPBFIFO_REG_START_ADDRESS (0x04) | ||
32 | #define LPBFIFO_REG_CONTROL (0x08) | ||
33 | #define LPBFIFO_REG_ENABLE (0x0C) | ||
34 | #define LPBFIFO_REG_BYTES_DONE_STATUS (0x14) | ||
35 | #define LPBFIFO_REG_FIFO_DATA (0x40) | ||
36 | #define LPBFIFO_REG_FIFO_STATUS (0x44) | ||
37 | #define LPBFIFO_REG_FIFO_CONTROL (0x48) | ||
38 | #define LPBFIFO_REG_FIFO_ALARM (0x4C) | ||
39 | |||
40 | struct mpc52xx_lpbfifo { | ||
41 | struct device *dev; | ||
42 | phys_addr_t regs_phys; | ||
43 | void __iomem *regs; | ||
44 | int irq; | ||
45 | spinlock_t lock; | ||
46 | |||
47 | struct bcom_task *bcom_tx_task; | ||
48 | struct bcom_task *bcom_rx_task; | ||
49 | struct bcom_task *bcom_cur_task; | ||
50 | |||
51 | /* Current state data */ | ||
52 | struct mpc52xx_lpbfifo_request *req; | ||
53 | int dma_irqs_enabled; | ||
54 | }; | ||
55 | |||
56 | /* The MPC5200 has only one fifo, so only need one instance structure */ | ||
57 | static struct mpc52xx_lpbfifo lpbfifo; | ||
58 | |||
59 | /** | ||
60 | * mpc52xx_lpbfifo_kick - Trigger the next block of data to be transfered | ||
61 | */ | ||
62 | static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_request *req) | ||
63 | { | ||
64 | size_t transfer_size = req->size - req->pos; | ||
65 | struct bcom_bd *bd; | ||
66 | void __iomem *reg; | ||
67 | u32 *data; | ||
68 | int i; | ||
69 | int bit_fields; | ||
70 | int dma = !(req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA); | ||
71 | int write = req->flags & MPC52XX_LPBFIFO_FLAG_WRITE; | ||
72 | int poll_dma = req->flags & MPC52XX_LPBFIFO_FLAG_POLL_DMA; | ||
73 | |||
74 | /* Set and clear the reset bits; is good practice in User Manual */ | ||
75 | out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000); | ||
76 | |||
77 | /* set master enable bit */ | ||
78 | out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x00000001); | ||
79 | if (!dma) { | ||
80 | /* While the FIFO can be setup for transfer sizes as large as | ||
81 | * 16M-1, the FIFO itself is only 512 bytes deep and it does | ||
82 | * not generate interrupts for FIFO full events (only transfer | ||
83 | * complete will raise an IRQ). Therefore when not using | ||
84 | * Bestcomm to drive the FIFO it needs to either be polled, or | ||
85 | * transfers need to constrained to the size of the fifo. | ||
86 | * | ||
87 | * This driver restricts the size of the transfer | ||
88 | */ | ||
89 | if (transfer_size > 512) | ||
90 | transfer_size = 512; | ||
91 | |||
92 | /* Load the FIFO with data */ | ||
93 | if (write) { | ||
94 | reg = lpbfifo.regs + LPBFIFO_REG_FIFO_DATA; | ||
95 | data = req->data + req->pos; | ||
96 | for (i = 0; i < transfer_size; i += 4) | ||
97 | out_be32(reg, *data++); | ||
98 | } | ||
99 | |||
100 | /* Unmask both error and completion irqs */ | ||
101 | out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x00000301); | ||
102 | } else { | ||
103 | /* Choose the correct direction | ||
104 | * | ||
105 | * Configure the watermarks so DMA will always complete correctly. | ||
106 | * It may be worth experimenting with the ALARM value to see if | ||
107 | * there is a performance impacit. However, if it is wrong there | ||
108 | * is a risk of DMA not transferring the last chunk of data | ||
109 | */ | ||
110 | if (write) { | ||
111 | out_be32(lpbfifo.regs + LPBFIFO_REG_FIFO_ALARM, 0x1e4); | ||
112 | out_8(lpbfifo.regs + LPBFIFO_REG_FIFO_CONTROL, 7); | ||
113 | lpbfifo.bcom_cur_task = lpbfifo.bcom_tx_task; | ||
114 | } else { | ||
115 | out_be32(lpbfifo.regs + LPBFIFO_REG_FIFO_ALARM, 0x1ff); | ||
116 | out_8(lpbfifo.regs + LPBFIFO_REG_FIFO_CONTROL, 0); | ||
117 | lpbfifo.bcom_cur_task = lpbfifo.bcom_rx_task; | ||
118 | |||
119 | if (poll_dma) { | ||
120 | if (lpbfifo.dma_irqs_enabled) { | ||
121 | disable_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task)); | ||
122 | lpbfifo.dma_irqs_enabled = 0; | ||
123 | } | ||
124 | } else { | ||
125 | if (!lpbfifo.dma_irqs_enabled) { | ||
126 | enable_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task)); | ||
127 | lpbfifo.dma_irqs_enabled = 1; | ||
128 | } | ||
129 | } | ||
130 | } | ||
131 | |||
132 | bd = bcom_prepare_next_buffer(lpbfifo.bcom_cur_task); | ||
133 | bd->status = transfer_size; | ||
134 | if (!write) { | ||
135 | /* | ||
136 | * In the DMA read case, the DMA doesn't complete, | ||
137 | * possibly due to incorrect watermarks in the ALARM | ||
138 | * and CONTROL regs. For now instead of trying to | ||
139 | * determine the right watermarks that will make this | ||
140 | * work, just increase the number of bytes the FIFO is | ||
141 | * expecting. | ||
142 | * | ||
143 | * When submitting another operation, the FIFO will get | ||
144 | * reset, so the condition of the FIFO waiting for a | ||
145 | * non-existent 4 bytes will get cleared. | ||
146 | */ | ||
147 | transfer_size += 4; /* BLECH! */ | ||
148 | } | ||
149 | bd->data[0] = req->data_phys + req->pos; | ||
150 | bcom_submit_next_buffer(lpbfifo.bcom_cur_task, NULL); | ||
151 | |||
152 | /* error irq & master enabled bit */ | ||
153 | bit_fields = 0x00000201; | ||
154 | |||
155 | /* Unmask irqs */ | ||
156 | if (write && (!poll_dma)) | ||
157 | bit_fields |= 0x00000100; /* completion irq too */ | ||
158 | out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, bit_fields); | ||
159 | } | ||
160 | |||
161 | /* Set transfer size, width, chip select and READ mode */ | ||
162 | out_be32(lpbfifo.regs + LPBFIFO_REG_START_ADDRESS, | ||
163 | req->offset + req->pos); | ||
164 | out_be32(lpbfifo.regs + LPBFIFO_REG_PACKET_SIZE, transfer_size); | ||
165 | |||
166 | bit_fields = req->cs << 24 | 0x000008; | ||
167 | if (!write) | ||
168 | bit_fields |= 0x010000; /* read mode */ | ||
169 | out_be32(lpbfifo.regs + LPBFIFO_REG_CONTROL, bit_fields); | ||
170 | |||
171 | /* Kick it off */ | ||
172 | out_8(lpbfifo.regs + LPBFIFO_REG_PACKET_SIZE, 0x01); | ||
173 | if (dma) | ||
174 | bcom_enable(lpbfifo.bcom_cur_task); | ||
175 | } | ||
176 | |||
177 | /** | ||
178 | * mpc52xx_lpbfifo_irq - IRQ handler for LPB FIFO | ||
179 | * | ||
180 | * On transmit, the dma completion irq triggers before the fifo completion | ||
181 | * triggers. Handle the dma completion here instead of the LPB FIFO Bestcomm | ||
182 | * task completion irq becuase everyting is not really done until the LPB FIFO | ||
183 | * completion irq triggers. | ||
184 | * | ||
185 | * In other words: | ||
186 | * For DMA, on receive, the "Fat Lady" is the bestcom completion irq. on | ||
187 | * transmit, the fifo completion irq is the "Fat Lady". The opera (or in this | ||
188 | * case the DMA/FIFO operation) is not finished until the "Fat Lady" sings. | ||
189 | * | ||
190 | * Reasons for entering this routine: | ||
191 | * 1) PIO mode rx and tx completion irq | ||
192 | * 2) DMA interrupt mode tx completion irq | ||
193 | * 3) DMA polled mode tx | ||
194 | * | ||
195 | * Exit conditions: | ||
196 | * 1) Transfer aborted | ||
197 | * 2) FIFO complete without DMA; more data to do | ||
198 | * 3) FIFO complete without DMA; all data transfered | ||
199 | * 4) FIFO complete using DMA | ||
200 | * | ||
201 | * Condition 1 can occur regardless of whether or not DMA is used. | ||
202 | * It requires executing the callback to report the error and exiting | ||
203 | * immediately. | ||
204 | * | ||
205 | * Condition 2 requires programming the FIFO with the next block of data | ||
206 | * | ||
207 | * Condition 3 requires executing the callback to report completion | ||
208 | * | ||
209 | * Condition 4 means the same as 3, except that we also retrieve the bcom | ||
210 | * buffer so DMA doesn't get clogged up. | ||
211 | * | ||
212 | * To make things trickier, the spinlock must be dropped before | ||
213 | * executing the callback, otherwise we could end up with a deadlock | ||
214 | * or nested spinlock condition. The out path is non-trivial, so | ||
215 | * extra fiddling is done to make sure all paths lead to the same | ||
216 | * outbound code. | ||
217 | */ | ||
218 | static irqreturn_t mpc52xx_lpbfifo_irq(int irq, void *dev_id) | ||
219 | { | ||
220 | struct mpc52xx_lpbfifo_request *req; | ||
221 | u32 status = in_8(lpbfifo.regs + LPBFIFO_REG_BYTES_DONE_STATUS); | ||
222 | void __iomem *reg; | ||
223 | u32 *data; | ||
224 | int count, i; | ||
225 | int do_callback = 0; | ||
226 | u32 ts; | ||
227 | unsigned long flags; | ||
228 | int dma, write, poll_dma; | ||
229 | |||
230 | spin_lock_irqsave(&lpbfifo.lock, flags); | ||
231 | ts = get_tbl(); | ||
232 | |||
233 | req = lpbfifo.req; | ||
234 | if (!req) { | ||
235 | spin_unlock_irqrestore(&lpbfifo.lock, flags); | ||
236 | pr_err("bogus LPBFIFO IRQ\n"); | ||
237 | return IRQ_HANDLED; | ||
238 | } | ||
239 | |||
240 | dma = !(req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA); | ||
241 | write = req->flags & MPC52XX_LPBFIFO_FLAG_WRITE; | ||
242 | poll_dma = req->flags & MPC52XX_LPBFIFO_FLAG_POLL_DMA; | ||
243 | |||
244 | if (dma && !write) { | ||
245 | spin_unlock_irqrestore(&lpbfifo.lock, flags); | ||
246 | pr_err("bogus LPBFIFO IRQ (dma and not writting)\n"); | ||
247 | return IRQ_HANDLED; | ||
248 | } | ||
249 | |||
250 | if ((status & 0x01) == 0) { | ||
251 | goto out; | ||
252 | } | ||
253 | |||
254 | /* check abort bit */ | ||
255 | if (status & 0x10) { | ||
256 | out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000); | ||
257 | do_callback = 1; | ||
258 | goto out; | ||
259 | } | ||
260 | |||
261 | /* Read result from hardware */ | ||
262 | count = in_be32(lpbfifo.regs + LPBFIFO_REG_BYTES_DONE_STATUS); | ||
263 | count &= 0x00ffffff; | ||
264 | |||
265 | if (!dma && !write) { | ||
266 | /* copy the data out of the FIFO */ | ||
267 | reg = lpbfifo.regs + LPBFIFO_REG_FIFO_DATA; | ||
268 | data = req->data + req->pos; | ||
269 | for (i = 0; i < count; i += 4) | ||
270 | *data++ = in_be32(reg); | ||
271 | } | ||
272 | |||
273 | /* Update transfer position and count */ | ||
274 | req->pos += count; | ||
275 | |||
276 | /* Decide what to do next */ | ||
277 | if (req->size - req->pos) | ||
278 | mpc52xx_lpbfifo_kick(req); /* more work to do */ | ||
279 | else | ||
280 | do_callback = 1; | ||
281 | |||
282 | out: | ||
283 | /* Clear the IRQ */ | ||
284 | out_8(lpbfifo.regs + LPBFIFO_REG_BYTES_DONE_STATUS, 0x01); | ||
285 | |||
286 | if (dma && (status & 0x11)) { | ||
287 | /* | ||
288 | * Count the DMA as complete only when the FIFO completion | ||
289 | * status or abort bits are set. | ||
290 | * | ||
291 | * (status & 0x01) should always be the case except sometimes | ||
292 | * when using polled DMA. | ||
293 | * | ||
294 | * (status & 0x10) {transfer aborted}: This case needs more | ||
295 | * testing. | ||
296 | */ | ||
297 | bcom_retrieve_buffer(lpbfifo.bcom_cur_task, &status, NULL); | ||
298 | } | ||
299 | req->last_byte = ((u8 *)req->data)[req->size - 1]; | ||
300 | |||
301 | /* When the do_callback flag is set; it means the transfer is finished | ||
302 | * so set the FIFO as idle */ | ||
303 | if (do_callback) | ||
304 | lpbfifo.req = NULL; | ||
305 | |||
306 | if (irq != 0) /* don't increment on polled case */ | ||
307 | req->irq_count++; | ||
308 | |||
309 | req->irq_ticks += get_tbl() - ts; | ||
310 | spin_unlock_irqrestore(&lpbfifo.lock, flags); | ||
311 | |||
312 | /* Spinlock is released; it is now safe to call the callback */ | ||
313 | if (do_callback && req->callback) | ||
314 | req->callback(req); | ||
315 | |||
316 | return IRQ_HANDLED; | ||
317 | } | ||
318 | |||
319 | /** | ||
320 | * mpc52xx_lpbfifo_bcom_irq - IRQ handler for LPB FIFO Bestcomm task | ||
321 | * | ||
322 | * Only used when receiving data. | ||
323 | */ | ||
324 | static irqreturn_t mpc52xx_lpbfifo_bcom_irq(int irq, void *dev_id) | ||
325 | { | ||
326 | struct mpc52xx_lpbfifo_request *req; | ||
327 | unsigned long flags; | ||
328 | u32 status; | ||
329 | u32 ts; | ||
330 | |||
331 | spin_lock_irqsave(&lpbfifo.lock, flags); | ||
332 | ts = get_tbl(); | ||
333 | |||
334 | req = lpbfifo.req; | ||
335 | if (!req || (req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA)) { | ||
336 | spin_unlock_irqrestore(&lpbfifo.lock, flags); | ||
337 | return IRQ_HANDLED; | ||
338 | } | ||
339 | |||
340 | if (irq != 0) /* don't increment on polled case */ | ||
341 | req->irq_count++; | ||
342 | |||
343 | if (!bcom_buffer_done(lpbfifo.bcom_cur_task)) { | ||
344 | spin_unlock_irqrestore(&lpbfifo.lock, flags); | ||
345 | |||
346 | req->buffer_not_done_cnt++; | ||
347 | if ((req->buffer_not_done_cnt % 1000) == 0) | ||
348 | pr_err("transfer stalled\n"); | ||
349 | |||
350 | return IRQ_HANDLED; | ||
351 | } | ||
352 | |||
353 | bcom_retrieve_buffer(lpbfifo.bcom_cur_task, &status, NULL); | ||
354 | |||
355 | req->last_byte = ((u8 *)req->data)[req->size - 1]; | ||
356 | |||
357 | req->pos = status & 0x00ffffff; | ||
358 | |||
359 | /* Mark the FIFO as idle */ | ||
360 | lpbfifo.req = NULL; | ||
361 | |||
362 | /* Release the lock before calling out to the callback. */ | ||
363 | req->irq_ticks += get_tbl() - ts; | ||
364 | spin_unlock_irqrestore(&lpbfifo.lock, flags); | ||
365 | |||
366 | if (req->callback) | ||
367 | req->callback(req); | ||
368 | |||
369 | return IRQ_HANDLED; | ||
370 | } | ||
371 | |||
372 | /** | ||
373 | * mpc52xx_lpbfifo_bcom_poll - Poll for DMA completion | ||
374 | */ | ||
375 | void mpc52xx_lpbfifo_poll(void) | ||
376 | { | ||
377 | struct mpc52xx_lpbfifo_request *req = lpbfifo.req; | ||
378 | int dma = !(req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA); | ||
379 | int write = req->flags & MPC52XX_LPBFIFO_FLAG_WRITE; | ||
380 | |||
381 | /* | ||
382 | * For more information, see comments on the "Fat Lady" | ||
383 | */ | ||
384 | if (dma && write) | ||
385 | mpc52xx_lpbfifo_irq(0, NULL); | ||
386 | else | ||
387 | mpc52xx_lpbfifo_bcom_irq(0, NULL); | ||
388 | } | ||
389 | EXPORT_SYMBOL(mpc52xx_lpbfifo_poll); | ||
390 | |||
391 | /** | ||
392 | * mpc52xx_lpbfifo_submit - Submit an LPB FIFO transfer request. | ||
393 | * @req: Pointer to request structure | ||
394 | */ | ||
395 | int mpc52xx_lpbfifo_submit(struct mpc52xx_lpbfifo_request *req) | ||
396 | { | ||
397 | unsigned long flags; | ||
398 | |||
399 | if (!lpbfifo.regs) | ||
400 | return -ENODEV; | ||
401 | |||
402 | spin_lock_irqsave(&lpbfifo.lock, flags); | ||
403 | |||
404 | /* If the req pointer is already set, then a transfer is in progress */ | ||
405 | if (lpbfifo.req) { | ||
406 | spin_unlock_irqrestore(&lpbfifo.lock, flags); | ||
407 | return -EBUSY; | ||
408 | } | ||
409 | |||
410 | /* Setup the transfer */ | ||
411 | lpbfifo.req = req; | ||
412 | req->irq_count = 0; | ||
413 | req->irq_ticks = 0; | ||
414 | req->buffer_not_done_cnt = 0; | ||
415 | req->pos = 0; | ||
416 | |||
417 | mpc52xx_lpbfifo_kick(req); | ||
418 | spin_unlock_irqrestore(&lpbfifo.lock, flags); | ||
419 | return 0; | ||
420 | } | ||
421 | EXPORT_SYMBOL(mpc52xx_lpbfifo_submit); | ||
422 | |||
423 | void mpc52xx_lpbfifo_abort(struct mpc52xx_lpbfifo_request *req) | ||
424 | { | ||
425 | unsigned long flags; | ||
426 | |||
427 | spin_lock_irqsave(&lpbfifo.lock, flags); | ||
428 | if (lpbfifo.req == req) { | ||
429 | /* Put it into reset and clear the state */ | ||
430 | bcom_gen_bd_rx_reset(lpbfifo.bcom_rx_task); | ||
431 | bcom_gen_bd_tx_reset(lpbfifo.bcom_tx_task); | ||
432 | out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000); | ||
433 | lpbfifo.req = NULL; | ||
434 | } | ||
435 | spin_unlock_irqrestore(&lpbfifo.lock, flags); | ||
436 | } | ||
437 | EXPORT_SYMBOL(mpc52xx_lpbfifo_abort); | ||
438 | |||
439 | static int __devinit | ||
440 | mpc52xx_lpbfifo_probe(struct of_device *op, const struct of_device_id *match) | ||
441 | { | ||
442 | struct resource res; | ||
443 | int rc = -ENOMEM; | ||
444 | |||
445 | if (lpbfifo.dev != NULL) | ||
446 | return -ENOSPC; | ||
447 | |||
448 | lpbfifo.irq = irq_of_parse_and_map(op->node, 0); | ||
449 | if (!lpbfifo.irq) | ||
450 | return -ENODEV; | ||
451 | |||
452 | if (of_address_to_resource(op->node, 0, &res)) | ||
453 | return -ENODEV; | ||
454 | lpbfifo.regs_phys = res.start; | ||
455 | lpbfifo.regs = of_iomap(op->node, 0); | ||
456 | if (!lpbfifo.regs) | ||
457 | return -ENOMEM; | ||
458 | |||
459 | spin_lock_init(&lpbfifo.lock); | ||
460 | |||
461 | /* Put FIFO into reset */ | ||
462 | out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000); | ||
463 | |||
464 | /* Register the interrupt handler */ | ||
465 | rc = request_irq(lpbfifo.irq, mpc52xx_lpbfifo_irq, 0, | ||
466 | "mpc52xx-lpbfifo", &lpbfifo); | ||
467 | if (rc) | ||
468 | goto err_irq; | ||
469 | |||
470 | /* Request the Bestcomm receive (fifo --> memory) task and IRQ */ | ||
471 | lpbfifo.bcom_rx_task = | ||
472 | bcom_gen_bd_rx_init(2, res.start + LPBFIFO_REG_FIFO_DATA, | ||
473 | BCOM_INITIATOR_SCLPC, BCOM_IPR_SCLPC, | ||
474 | 16*1024*1024); | ||
475 | if (!lpbfifo.bcom_rx_task) | ||
476 | goto err_bcom_rx; | ||
477 | |||
478 | rc = request_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task), | ||
479 | mpc52xx_lpbfifo_bcom_irq, 0, | ||
480 | "mpc52xx-lpbfifo-rx", &lpbfifo); | ||
481 | if (rc) | ||
482 | goto err_bcom_rx_irq; | ||
483 | |||
484 | lpbfifo.dma_irqs_enabled = 1; | ||
485 | |||
486 | /* Request the Bestcomm transmit (memory --> fifo) task and IRQ */ | ||
487 | lpbfifo.bcom_tx_task = | ||
488 | bcom_gen_bd_tx_init(2, res.start + LPBFIFO_REG_FIFO_DATA, | ||
489 | BCOM_INITIATOR_SCLPC, BCOM_IPR_SCLPC); | ||
490 | if (!lpbfifo.bcom_tx_task) | ||
491 | goto err_bcom_tx; | ||
492 | |||
493 | lpbfifo.dev = &op->dev; | ||
494 | return 0; | ||
495 | |||
496 | err_bcom_tx: | ||
497 | free_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task), &lpbfifo); | ||
498 | err_bcom_rx_irq: | ||
499 | bcom_gen_bd_rx_release(lpbfifo.bcom_rx_task); | ||
500 | err_bcom_rx: | ||
501 | err_irq: | ||
502 | iounmap(lpbfifo.regs); | ||
503 | lpbfifo.regs = NULL; | ||
504 | |||
505 | dev_err(&op->dev, "mpc52xx_lpbfifo_probe() failed\n"); | ||
506 | return -ENODEV; | ||
507 | } | ||
508 | |||
509 | |||
510 | static int __devexit mpc52xx_lpbfifo_remove(struct of_device *op) | ||
511 | { | ||
512 | if (lpbfifo.dev != &op->dev) | ||
513 | return 0; | ||
514 | |||
515 | /* Put FIFO in reset */ | ||
516 | out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000); | ||
517 | |||
518 | /* Release the bestcomm transmit task */ | ||
519 | free_irq(bcom_get_task_irq(lpbfifo.bcom_tx_task), &lpbfifo); | ||
520 | bcom_gen_bd_tx_release(lpbfifo.bcom_tx_task); | ||
521 | |||
522 | /* Release the bestcomm receive task */ | ||
523 | free_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task), &lpbfifo); | ||
524 | bcom_gen_bd_rx_release(lpbfifo.bcom_rx_task); | ||
525 | |||
526 | free_irq(lpbfifo.irq, &lpbfifo); | ||
527 | iounmap(lpbfifo.regs); | ||
528 | lpbfifo.regs = NULL; | ||
529 | lpbfifo.dev = NULL; | ||
530 | |||
531 | return 0; | ||
532 | } | ||
533 | |||
534 | static struct of_device_id mpc52xx_lpbfifo_match[] __devinitconst = { | ||
535 | { .compatible = "fsl,mpc5200-lpbfifo", }, | ||
536 | {}, | ||
537 | }; | ||
538 | |||
539 | static struct of_platform_driver mpc52xx_lpbfifo_driver = { | ||
540 | .owner = THIS_MODULE, | ||
541 | .name = "mpc52xx-lpbfifo", | ||
542 | .match_table = mpc52xx_lpbfifo_match, | ||
543 | .probe = mpc52xx_lpbfifo_probe, | ||
544 | .remove = __devexit_p(mpc52xx_lpbfifo_remove), | ||
545 | }; | ||
546 | |||
547 | /*********************************************************************** | ||
548 | * Module init/exit | ||
549 | */ | ||
550 | static int __init mpc52xx_lpbfifo_init(void) | ||
551 | { | ||
552 | pr_debug("Registering LocalPlus bus FIFO driver\n"); | ||
553 | return of_register_platform_driver(&mpc52xx_lpbfifo_driver); | ||
554 | } | ||
555 | module_init(mpc52xx_lpbfifo_init); | ||
556 | |||
557 | static void __exit mpc52xx_lpbfifo_exit(void) | ||
558 | { | ||
559 | pr_debug("Unregistering LocalPlus bus FIFO driver\n"); | ||
560 | of_unregister_platform_driver(&mpc52xx_lpbfifo_driver); | ||
561 | } | ||
562 | module_exit(mpc52xx_lpbfifo_exit); | ||
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c index dd43114e9684..da110bd88346 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c | |||
@@ -100,7 +100,7 @@ const struct of_device_id mpc52xx_pci_ids[] __initdata = { | |||
100 | }; | 100 | }; |
101 | 101 | ||
102 | /* ======================================================================== */ | 102 | /* ======================================================================== */ |
103 | /* PCI configuration acess */ | 103 | /* PCI configuration access */ |
104 | /* ======================================================================== */ | 104 | /* ======================================================================== */ |
105 | 105 | ||
106 | static int | 106 | static int |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c index 480f806fd0a9..4bf4bf7b063e 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c | |||
@@ -220,7 +220,7 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type) | |||
220 | } | 220 | } |
221 | 221 | ||
222 | static struct irq_chip mpc52xx_extirq_irqchip = { | 222 | static struct irq_chip mpc52xx_extirq_irqchip = { |
223 | .typename = "MPC52xx External", | 223 | .name = "MPC52xx External", |
224 | .mask = mpc52xx_extirq_mask, | 224 | .mask = mpc52xx_extirq_mask, |
225 | .unmask = mpc52xx_extirq_unmask, | 225 | .unmask = mpc52xx_extirq_unmask, |
226 | .ack = mpc52xx_extirq_ack, | 226 | .ack = mpc52xx_extirq_ack, |
@@ -258,7 +258,7 @@ static void mpc52xx_main_unmask(unsigned int virq) | |||
258 | } | 258 | } |
259 | 259 | ||
260 | static struct irq_chip mpc52xx_main_irqchip = { | 260 | static struct irq_chip mpc52xx_main_irqchip = { |
261 | .typename = "MPC52xx Main", | 261 | .name = "MPC52xx Main", |
262 | .mask = mpc52xx_main_mask, | 262 | .mask = mpc52xx_main_mask, |
263 | .mask_ack = mpc52xx_main_mask, | 263 | .mask_ack = mpc52xx_main_mask, |
264 | .unmask = mpc52xx_main_unmask, | 264 | .unmask = mpc52xx_main_unmask, |
@@ -291,7 +291,7 @@ static void mpc52xx_periph_unmask(unsigned int virq) | |||
291 | } | 291 | } |
292 | 292 | ||
293 | static struct irq_chip mpc52xx_periph_irqchip = { | 293 | static struct irq_chip mpc52xx_periph_irqchip = { |
294 | .typename = "MPC52xx Peripherals", | 294 | .name = "MPC52xx Peripherals", |
295 | .mask = mpc52xx_periph_mask, | 295 | .mask = mpc52xx_periph_mask, |
296 | .mask_ack = mpc52xx_periph_mask, | 296 | .mask_ack = mpc52xx_periph_mask, |
297 | .unmask = mpc52xx_periph_unmask, | 297 | .unmask = mpc52xx_periph_unmask, |
@@ -335,7 +335,7 @@ static void mpc52xx_sdma_ack(unsigned int virq) | |||
335 | } | 335 | } |
336 | 336 | ||
337 | static struct irq_chip mpc52xx_sdma_irqchip = { | 337 | static struct irq_chip mpc52xx_sdma_irqchip = { |
338 | .typename = "MPC52xx SDMA", | 338 | .name = "MPC52xx SDMA", |
339 | .mask = mpc52xx_sdma_mask, | 339 | .mask = mpc52xx_sdma_mask, |
340 | .unmask = mpc52xx_sdma_unmask, | 340 | .unmask = mpc52xx_sdma_unmask, |
341 | .ack = mpc52xx_sdma_ack, | 341 | .ack = mpc52xx_sdma_ack, |
@@ -355,7 +355,7 @@ static int mpc52xx_is_extirq(int l1, int l2) | |||
355 | * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property | 355 | * mpc52xx_irqhost_xlate - translate virq# from device tree interrupts property |
356 | */ | 356 | */ |
357 | static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct, | 357 | static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct, |
358 | u32 *intspec, unsigned int intsize, | 358 | const u32 *intspec, unsigned int intsize, |
359 | irq_hw_number_t *out_hwirq, | 359 | irq_hw_number_t *out_hwirq, |
360 | unsigned int *out_flags) | 360 | unsigned int *out_flags) |
361 | { | 361 | { |
diff --git a/arch/powerpc/platforms/82xx/ep8248e.c b/arch/powerpc/platforms/82xx/ep8248e.c index f9aee182e6f7..f21555d3395a 100644 --- a/arch/powerpc/platforms/82xx/ep8248e.c +++ b/arch/powerpc/platforms/82xx/ep8248e.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/fsl_devices.h> | 15 | #include <linux/fsl_devices.h> |
16 | #include <linux/mdio-bitbang.h> | 16 | #include <linux/mdio-bitbang.h> |
17 | #include <linux/of_mdio.h> | 17 | #include <linux/of_mdio.h> |
18 | #include <linux/slab.h> | ||
18 | #include <linux/of_platform.h> | 19 | #include <linux/of_platform.h> |
19 | 20 | ||
20 | #include <asm/io.h> | 21 | #include <asm/io.h> |
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c index 7ee979f323d1..5a55d87d6bd6 100644 --- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c +++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/irq.h> | 17 | #include <linux/irq.h> |
18 | #include <linux/types.h> | 18 | #include <linux/types.h> |
19 | #include <linux/bootmem.h> | 19 | #include <linux/bootmem.h> |
20 | #include <linux/slab.h> | ||
20 | 21 | ||
21 | #include <asm/io.h> | 22 | #include <asm/io.h> |
22 | #include <asm/prom.h> | 23 | #include <asm/prom.h> |
@@ -24,7 +25,7 @@ | |||
24 | 25 | ||
25 | #include "pq2.h" | 26 | #include "pq2.h" |
26 | 27 | ||
27 | static DEFINE_SPINLOCK(pci_pic_lock); | 28 | static DEFINE_RAW_SPINLOCK(pci_pic_lock); |
28 | 29 | ||
29 | struct pq2ads_pci_pic { | 30 | struct pq2ads_pci_pic { |
30 | struct device_node *node; | 31 | struct device_node *node; |
@@ -45,12 +46,12 @@ static void pq2ads_pci_mask_irq(unsigned int virq) | |||
45 | 46 | ||
46 | if (irq != -1) { | 47 | if (irq != -1) { |
47 | unsigned long flags; | 48 | unsigned long flags; |
48 | spin_lock_irqsave(&pci_pic_lock, flags); | 49 | raw_spin_lock_irqsave(&pci_pic_lock, flags); |
49 | 50 | ||
50 | setbits32(&priv->regs->mask, 1 << irq); | 51 | setbits32(&priv->regs->mask, 1 << irq); |
51 | mb(); | 52 | mb(); |
52 | 53 | ||
53 | spin_unlock_irqrestore(&pci_pic_lock, flags); | 54 | raw_spin_unlock_irqrestore(&pci_pic_lock, flags); |
54 | } | 55 | } |
55 | } | 56 | } |
56 | 57 | ||
@@ -62,14 +63,13 @@ static void pq2ads_pci_unmask_irq(unsigned int virq) | |||
62 | if (irq != -1) { | 63 | if (irq != -1) { |
63 | unsigned long flags; | 64 | unsigned long flags; |
64 | 65 | ||
65 | spin_lock_irqsave(&pci_pic_lock, flags); | 66 | raw_spin_lock_irqsave(&pci_pic_lock, flags); |
66 | clrbits32(&priv->regs->mask, 1 << irq); | 67 | clrbits32(&priv->regs->mask, 1 << irq); |
67 | spin_unlock_irqrestore(&pci_pic_lock, flags); | 68 | raw_spin_unlock_irqrestore(&pci_pic_lock, flags); |
68 | } | 69 | } |
69 | } | 70 | } |
70 | 71 | ||
71 | static struct irq_chip pq2ads_pci_ic = { | 72 | static struct irq_chip pq2ads_pci_ic = { |
72 | .typename = "PQ2 ADS PCI", | ||
73 | .name = "PQ2 ADS PCI", | 73 | .name = "PQ2 ADS PCI", |
74 | .end = pq2ads_pci_unmask_irq, | 74 | .end = pq2ads_pci_unmask_irq, |
75 | .mask = pq2ads_pci_mask_irq, | 75 | .mask = pq2ads_pci_mask_irq, |
@@ -107,7 +107,7 @@ static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc) | |||
107 | static int pci_pic_host_map(struct irq_host *h, unsigned int virq, | 107 | static int pci_pic_host_map(struct irq_host *h, unsigned int virq, |
108 | irq_hw_number_t hw) | 108 | irq_hw_number_t hw) |
109 | { | 109 | { |
110 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 110 | irq_to_desc(virq)->status |= IRQ_LEVEL; |
111 | set_irq_chip_data(virq, h->host_data); | 111 | set_irq_chip_data(virq, h->host_data); |
112 | set_irq_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq); | 112 | set_irq_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq); |
113 | return 0; | 113 | return 0; |
diff --git a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c index 82a9bcb858b6..d119a7c1c17a 100644 --- a/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c +++ b/arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
21 | #include <linux/of.h> | 21 | #include <linux/of.h> |
22 | #include <linux/of_gpio.h> | 22 | #include <linux/of_gpio.h> |
23 | #include <linux/slab.h> | ||
23 | #include <asm/prom.h> | 24 | #include <asm/prom.h> |
24 | #include <asm/machdep.h> | 25 | #include <asm/machdep.h> |
25 | 26 | ||
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c index 567ded7c3b9b..17f99745f0e4 100644 --- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c | |||
@@ -74,7 +74,7 @@ static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk, | |||
74 | 74 | ||
75 | prop = of_get_property(np, "mode", NULL); | 75 | prop = of_get_property(np, "mode", NULL); |
76 | if (prop && !strcmp(prop, "cpu-qe")) | 76 | if (prop && !strcmp(prop, "cpu-qe")) |
77 | pdata.qe_mode = 1; | 77 | pdata.flags = SPI_QE_CPU_MODE; |
78 | 78 | ||
79 | for (j = 0; j < num_board_infos; j++) { | 79 | for (j = 0; j < num_board_infos; j++) { |
80 | if (board_infos[j].bus_num == pdata.bus_num) | 80 | if (board_infos[j].bus_num == pdata.bus_num) |
diff --git a/arch/powerpc/platforms/83xx/suspend.c b/arch/powerpc/platforms/83xx/suspend.c index 08e65fc8b98c..43805348b81e 100644 --- a/arch/powerpc/platforms/83xx/suspend.c +++ b/arch/powerpc/platforms/83xx/suspend.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */ | 32 | #define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */ |
33 | #define PMCCR1_NEXT_STATE_SHIFT 2 | 33 | #define PMCCR1_NEXT_STATE_SHIFT 2 |
34 | #define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/ | 34 | #define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/ |
35 | #define IMMR_SYSCR_OFFSET 0x100 | ||
35 | #define IMMR_RCW_OFFSET 0x900 | 36 | #define IMMR_RCW_OFFSET 0x900 |
36 | #define RCW_PCI_HOST 0x80000000 | 37 | #define RCW_PCI_HOST 0x80000000 |
37 | 38 | ||
@@ -78,6 +79,22 @@ struct mpc83xx_clock { | |||
78 | u32 sccr; | 79 | u32 sccr; |
79 | }; | 80 | }; |
80 | 81 | ||
82 | struct mpc83xx_syscr { | ||
83 | __be32 sgprl; | ||
84 | __be32 sgprh; | ||
85 | __be32 spridr; | ||
86 | __be32 :32; | ||
87 | __be32 spcr; | ||
88 | __be32 sicrl; | ||
89 | __be32 sicrh; | ||
90 | }; | ||
91 | |||
92 | struct mpc83xx_saved { | ||
93 | u32 sicrl; | ||
94 | u32 sicrh; | ||
95 | u32 sccr; | ||
96 | }; | ||
97 | |||
81 | struct pmc_type { | 98 | struct pmc_type { |
82 | int has_deep_sleep; | 99 | int has_deep_sleep; |
83 | }; | 100 | }; |
@@ -87,6 +104,8 @@ static int has_deep_sleep, deep_sleeping; | |||
87 | static int pmc_irq; | 104 | static int pmc_irq; |
88 | static struct mpc83xx_pmc __iomem *pmc_regs; | 105 | static struct mpc83xx_pmc __iomem *pmc_regs; |
89 | static struct mpc83xx_clock __iomem *clock_regs; | 106 | static struct mpc83xx_clock __iomem *clock_regs; |
107 | static struct mpc83xx_syscr __iomem *syscr_regs; | ||
108 | static struct mpc83xx_saved saved_regs; | ||
90 | static int is_pci_agent, wake_from_pci; | 109 | static int is_pci_agent, wake_from_pci; |
91 | static phys_addr_t immrbase; | 110 | static phys_addr_t immrbase; |
92 | static int pci_pm_state; | 111 | static int pci_pm_state; |
@@ -96,6 +115,7 @@ int fsl_deep_sleep(void) | |||
96 | { | 115 | { |
97 | return deep_sleeping; | 116 | return deep_sleeping; |
98 | } | 117 | } |
118 | EXPORT_SYMBOL(fsl_deep_sleep); | ||
99 | 119 | ||
100 | static int mpc83xx_change_state(void) | 120 | static int mpc83xx_change_state(void) |
101 | { | 121 | { |
@@ -136,6 +156,20 @@ static irqreturn_t pmc_irq_handler(int irq, void *dev_id) | |||
136 | return ret; | 156 | return ret; |
137 | } | 157 | } |
138 | 158 | ||
159 | static void mpc83xx_suspend_restore_regs(void) | ||
160 | { | ||
161 | out_be32(&syscr_regs->sicrl, saved_regs.sicrl); | ||
162 | out_be32(&syscr_regs->sicrh, saved_regs.sicrh); | ||
163 | out_be32(&clock_regs->sccr, saved_regs.sccr); | ||
164 | } | ||
165 | |||
166 | static void mpc83xx_suspend_save_regs(void) | ||
167 | { | ||
168 | saved_regs.sicrl = in_be32(&syscr_regs->sicrl); | ||
169 | saved_regs.sicrh = in_be32(&syscr_regs->sicrh); | ||
170 | saved_regs.sccr = in_be32(&clock_regs->sccr); | ||
171 | } | ||
172 | |||
139 | static int mpc83xx_suspend_enter(suspend_state_t state) | 173 | static int mpc83xx_suspend_enter(suspend_state_t state) |
140 | { | 174 | { |
141 | int ret = -EAGAIN; | 175 | int ret = -EAGAIN; |
@@ -165,6 +199,8 @@ static int mpc83xx_suspend_enter(suspend_state_t state) | |||
165 | */ | 199 | */ |
166 | 200 | ||
167 | if (deep_sleeping) { | 201 | if (deep_sleeping) { |
202 | mpc83xx_suspend_save_regs(); | ||
203 | |||
168 | out_be32(&pmc_regs->mask, PMCER_ALL); | 204 | out_be32(&pmc_regs->mask, PMCER_ALL); |
169 | 205 | ||
170 | out_be32(&pmc_regs->config1, | 206 | out_be32(&pmc_regs->config1, |
@@ -178,6 +214,8 @@ static int mpc83xx_suspend_enter(suspend_state_t state) | |||
178 | in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF); | 214 | in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF); |
179 | 215 | ||
180 | out_be32(&pmc_regs->mask, PMCER_PMCI); | 216 | out_be32(&pmc_regs->mask, PMCER_PMCI); |
217 | |||
218 | mpc83xx_suspend_restore_regs(); | ||
181 | } else { | 219 | } else { |
182 | out_be32(&pmc_regs->mask, PMCER_PMCI); | 220 | out_be32(&pmc_regs->mask, PMCER_PMCI); |
183 | 221 | ||
@@ -193,7 +231,7 @@ out: | |||
193 | return ret; | 231 | return ret; |
194 | } | 232 | } |
195 | 233 | ||
196 | static void mpc83xx_suspend_finish(void) | 234 | static void mpc83xx_suspend_end(void) |
197 | { | 235 | { |
198 | deep_sleeping = 0; | 236 | deep_sleeping = 0; |
199 | } | 237 | } |
@@ -277,7 +315,7 @@ static struct platform_suspend_ops mpc83xx_suspend_ops = { | |||
277 | .valid = mpc83xx_suspend_valid, | 315 | .valid = mpc83xx_suspend_valid, |
278 | .begin = mpc83xx_suspend_begin, | 316 | .begin = mpc83xx_suspend_begin, |
279 | .enter = mpc83xx_suspend_enter, | 317 | .enter = mpc83xx_suspend_enter, |
280 | .finish = mpc83xx_suspend_finish, | 318 | .end = mpc83xx_suspend_end, |
281 | }; | 319 | }; |
282 | 320 | ||
283 | static int pmc_probe(struct of_device *ofdev, | 321 | static int pmc_probe(struct of_device *ofdev, |
@@ -332,12 +370,23 @@ static int pmc_probe(struct of_device *ofdev, | |||
332 | goto out_pmc; | 370 | goto out_pmc; |
333 | } | 371 | } |
334 | 372 | ||
373 | if (has_deep_sleep) { | ||
374 | syscr_regs = ioremap(immrbase + IMMR_SYSCR_OFFSET, | ||
375 | sizeof(*syscr_regs)); | ||
376 | if (!syscr_regs) { | ||
377 | ret = -ENOMEM; | ||
378 | goto out_syscr; | ||
379 | } | ||
380 | } | ||
381 | |||
335 | if (is_pci_agent) | 382 | if (is_pci_agent) |
336 | mpc83xx_set_agent(); | 383 | mpc83xx_set_agent(); |
337 | 384 | ||
338 | suspend_set_ops(&mpc83xx_suspend_ops); | 385 | suspend_set_ops(&mpc83xx_suspend_ops); |
339 | return 0; | 386 | return 0; |
340 | 387 | ||
388 | out_syscr: | ||
389 | iounmap(clock_regs); | ||
341 | out_pmc: | 390 | out_pmc: |
342 | iounmap(pmc_regs); | 391 | iounmap(pmc_regs); |
343 | out: | 392 | out: |
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index d3a975e8fd3e..3a2ade2e443f 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -1,6 +1,7 @@ | |||
1 | menuconfig MPC85xx | 1 | menuconfig FSL_SOC_BOOKE |
2 | bool "Machine Type" | 2 | bool "Freescale Book-E Machine Type" |
3 | depends on PPC_85xx | 3 | depends on PPC_85xx || PPC_BOOK3E |
4 | select FSL_SOC | ||
4 | select PPC_UDBG_16550 | 5 | select PPC_UDBG_16550 |
5 | select MPIC | 6 | select MPIC |
6 | select PPC_PCI_CHOICE | 7 | select PPC_PCI_CHOICE |
@@ -8,7 +9,7 @@ menuconfig MPC85xx | |||
8 | select SERIAL_8250_SHARE_IRQ if SERIAL_8250 | 9 | select SERIAL_8250_SHARE_IRQ if SERIAL_8250 |
9 | default y | 10 | default y |
10 | 11 | ||
11 | if MPC85xx | 12 | if FSL_SOC_BOOKE |
12 | 13 | ||
13 | config MPC8540_ADS | 14 | config MPC8540_ADS |
14 | bool "Freescale MPC8540 ADS" | 15 | bool "Freescale MPC8540 ADS" |
@@ -50,7 +51,7 @@ config MPC85xx_DS | |||
50 | bool "Freescale MPC85xx DS" | 51 | bool "Freescale MPC85xx DS" |
51 | select PPC_I8259 | 52 | select PPC_I8259 |
52 | select DEFAULT_UIMAGE | 53 | select DEFAULT_UIMAGE |
53 | select FSL_ULI1575 | 54 | select FSL_ULI1575 if PCI |
54 | select SWIOTLB | 55 | select SWIOTLB |
55 | help | 56 | help |
56 | This option enables support for the MPC85xx DS (MPC8544 DS) board | 57 | This option enables support for the MPC85xx DS (MPC8544 DS) board |
@@ -59,7 +60,7 @@ config MPC85xx_RDB | |||
59 | bool "Freescale MPC85xx RDB" | 60 | bool "Freescale MPC85xx RDB" |
60 | select PPC_I8259 | 61 | select PPC_I8259 |
61 | select DEFAULT_UIMAGE | 62 | select DEFAULT_UIMAGE |
62 | select FSL_ULI1575 | 63 | select FSL_ULI1575 if PCI |
63 | select SWIOTLB | 64 | select SWIOTLB |
64 | help | 65 | help |
65 | This option enables support for the MPC85xx RDB (P2020 RDB) board | 66 | This option enables support for the MPC85xx RDB (P2020 RDB) board |
@@ -144,7 +145,19 @@ config SBC8560 | |||
144 | help | 145 | help |
145 | This option enables support for the Wind River SBC8560 board | 146 | This option enables support for the Wind River SBC8560 board |
146 | 147 | ||
147 | endif # MPC85xx | 148 | config P4080_DS |
149 | bool "Freescale P4080 DS" | ||
150 | select DEFAULT_UIMAGE | ||
151 | select PPC_FSL_BOOK3E | ||
152 | select PPC_E500MC | ||
153 | select PHYS_64BIT | ||
154 | select SWIOTLB | ||
155 | select MPC8xxx_GPIO | ||
156 | select HAS_RAPIDIO | ||
157 | help | ||
158 | This option enables support for the P4080 DS board | ||
159 | |||
160 | endif # FSL_SOC_BOOKE | ||
148 | 161 | ||
149 | config TQM85xx | 162 | config TQM85xx |
150 | bool | 163 | bool |
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 9098aea0cf32..387c128f2c8c 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile | |||
@@ -10,6 +10,7 @@ obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o | |||
10 | obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o | 10 | obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o |
11 | obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o | 11 | obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o |
12 | obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o | 12 | obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o |
13 | obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o | ||
13 | obj-$(CONFIG_STX_GP3) += stx_gp3.o | 14 | obj-$(CONFIG_STX_GP3) += stx_gp3.o |
14 | obj-$(CONFIG_TQM85xx) += tqm85xx.o | 15 | obj-$(CONFIG_TQM85xx) += tqm85xx.o |
15 | obj-$(CONFIG_SBC8560) += sbc8560.o | 16 | obj-$(CONFIG_SBC8560) += sbc8560.o |
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c new file mode 100644 index 000000000000..534c2ecc89d9 --- /dev/null +++ b/arch/powerpc/platforms/85xx/corenet_ds.c | |||
@@ -0,0 +1,125 @@ | |||
1 | /* | ||
2 | * Corenet based SoC DS Setup | ||
3 | * | ||
4 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) | ||
5 | * | ||
6 | * Copyright 2009 Freescale Semiconductor Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/pci.h> | ||
16 | #include <linux/kdev_t.h> | ||
17 | #include <linux/delay.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/lmb.h> | ||
20 | |||
21 | #include <asm/system.h> | ||
22 | #include <asm/time.h> | ||
23 | #include <asm/machdep.h> | ||
24 | #include <asm/pci-bridge.h> | ||
25 | #include <mm/mmu_decl.h> | ||
26 | #include <asm/prom.h> | ||
27 | #include <asm/udbg.h> | ||
28 | #include <asm/mpic.h> | ||
29 | |||
30 | #include <linux/of_platform.h> | ||
31 | #include <sysdev/fsl_soc.h> | ||
32 | #include <sysdev/fsl_pci.h> | ||
33 | |||
34 | void __init corenet_ds_pic_init(void) | ||
35 | { | ||
36 | struct mpic *mpic; | ||
37 | struct resource r; | ||
38 | struct device_node *np = NULL; | ||
39 | unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN | | ||
40 | MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU; | ||
41 | |||
42 | np = of_find_node_by_type(np, "open-pic"); | ||
43 | |||
44 | if (np == NULL) { | ||
45 | printk(KERN_ERR "Could not find open-pic node\n"); | ||
46 | return; | ||
47 | } | ||
48 | |||
49 | if (of_address_to_resource(np, 0, &r)) { | ||
50 | printk(KERN_ERR "Failed to map mpic register space\n"); | ||
51 | of_node_put(np); | ||
52 | return; | ||
53 | } | ||
54 | |||
55 | if (ppc_md.get_irq == mpic_get_coreint_irq) | ||
56 | flags |= MPIC_ENABLE_COREINT; | ||
57 | |||
58 | mpic = mpic_alloc(np, r.start, flags, 0, 256, " OpenPIC "); | ||
59 | BUG_ON(mpic == NULL); | ||
60 | |||
61 | mpic_init(mpic); | ||
62 | } | ||
63 | |||
64 | #ifdef CONFIG_PCI | ||
65 | static int primary_phb_addr; | ||
66 | #endif | ||
67 | |||
68 | /* | ||
69 | * Setup the architecture | ||
70 | */ | ||
71 | #ifdef CONFIG_SMP | ||
72 | void __init mpc85xx_smp_init(void); | ||
73 | #endif | ||
74 | |||
75 | void __init corenet_ds_setup_arch(void) | ||
76 | { | ||
77 | #ifdef CONFIG_PCI | ||
78 | struct device_node *np; | ||
79 | struct pci_controller *hose; | ||
80 | #endif | ||
81 | dma_addr_t max = 0xffffffff; | ||
82 | |||
83 | #ifdef CONFIG_SMP | ||
84 | mpc85xx_smp_init(); | ||
85 | #endif | ||
86 | |||
87 | #ifdef CONFIG_PCI | ||
88 | for_each_compatible_node(np, "pci", "fsl,p4080-pcie") { | ||
89 | struct resource rsrc; | ||
90 | of_address_to_resource(np, 0, &rsrc); | ||
91 | if ((rsrc.start & 0xfffff) == primary_phb_addr) | ||
92 | fsl_add_bridge(np, 1); | ||
93 | else | ||
94 | fsl_add_bridge(np, 0); | ||
95 | |||
96 | hose = pci_find_hose_for_OF_device(np); | ||
97 | max = min(max, hose->dma_window_base_cur + | ||
98 | hose->dma_window_size); | ||
99 | } | ||
100 | #endif | ||
101 | |||
102 | #ifdef CONFIG_SWIOTLB | ||
103 | if (lmb_end_of_DRAM() > max) { | ||
104 | ppc_swiotlb_enable = 1; | ||
105 | set_pci_dma_ops(&swiotlb_dma_ops); | ||
106 | ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; | ||
107 | } | ||
108 | #endif | ||
109 | pr_info("%s board from Freescale Semiconductor\n", ppc_md.name); | ||
110 | } | ||
111 | |||
112 | static const struct of_device_id of_device_ids[] __devinitconst = { | ||
113 | { | ||
114 | .compatible = "simple-bus" | ||
115 | }, | ||
116 | { | ||
117 | .compatible = "fsl,rapidio-delta", | ||
118 | }, | ||
119 | {} | ||
120 | }; | ||
121 | |||
122 | int __init corenet_ds_publish_devices(void) | ||
123 | { | ||
124 | return of_platform_bus_probe(NULL, of_device_ids, NULL); | ||
125 | } | ||
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.h b/arch/powerpc/platforms/85xx/corenet_ds.h new file mode 100644 index 000000000000..ddd700b23031 --- /dev/null +++ b/arch/powerpc/platforms/85xx/corenet_ds.h | |||
@@ -0,0 +1,19 @@ | |||
1 | /* | ||
2 | * Corenet based SoC DS Setup | ||
3 | * | ||
4 | * Copyright 2009 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #ifndef CORENET_DS_H | ||
13 | #define CORENET_DS_H | ||
14 | |||
15 | extern void __init corenet_ds_pic_init(void); | ||
16 | extern void __init corenet_ds_setup_arch(void); | ||
17 | extern int __init corenet_ds_publish_devices(void); | ||
18 | |||
19 | #endif | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 3909d57b86e3..f0684c8ac960 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c | |||
@@ -86,7 +86,7 @@ static int mpc8568_fixup_125_clock(struct phy_device *phydev) | |||
86 | scr = phy_read(phydev, MV88E1111_SCR); | 86 | scr = phy_read(phydev, MV88E1111_SCR); |
87 | 87 | ||
88 | if (scr < 0) | 88 | if (scr < 0) |
89 | return err; | 89 | return scr; |
90 | 90 | ||
91 | err = phy_write(phydev, MV88E1111_SCR, scr | 0x0008); | 91 | err = phy_write(phydev, MV88E1111_SCR, scr | 0x0008); |
92 | 92 | ||
@@ -237,6 +237,8 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
237 | } else if (machine_is(mpc8569_mds)) { | 237 | } else if (machine_is(mpc8569_mds)) { |
238 | #define BCSR7_UCC12_GETHnRST (0x1 << 2) | 238 | #define BCSR7_UCC12_GETHnRST (0x1 << 2) |
239 | #define BCSR8_UEM_MARVELL_RST (0x1 << 1) | 239 | #define BCSR8_UEM_MARVELL_RST (0x1 << 1) |
240 | #define BCSR_UCC_RGMII (0x1 << 6) | ||
241 | #define BCSR_UCC_RTBI (0x1 << 5) | ||
240 | /* | 242 | /* |
241 | * U-Boot mangles interrupt polarity for Marvell PHYs, | 243 | * U-Boot mangles interrupt polarity for Marvell PHYs, |
242 | * so reset built-in and UEM Marvell PHYs, this puts | 244 | * so reset built-in and UEM Marvell PHYs, this puts |
@@ -247,6 +249,28 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
247 | 249 | ||
248 | setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); | 250 | setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); |
249 | clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); | 251 | clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); |
252 | |||
253 | for (np = NULL; (np = of_find_compatible_node(np, | ||
254 | "network", | ||
255 | "ucc_geth")) != NULL;) { | ||
256 | const unsigned int *prop; | ||
257 | int ucc_num; | ||
258 | |||
259 | prop = of_get_property(np, "cell-index", NULL); | ||
260 | if (prop == NULL) | ||
261 | continue; | ||
262 | |||
263 | ucc_num = *prop - 1; | ||
264 | |||
265 | prop = of_get_property(np, "phy-connection-type", NULL); | ||
266 | if (prop == NULL) | ||
267 | continue; | ||
268 | |||
269 | if (strcmp("rtbi", (const char *)prop) == 0) | ||
270 | clrsetbits_8(&bcsr_regs[7 + ucc_num], | ||
271 | BCSR_UCC_RGMII, BCSR_UCC_RTBI); | ||
272 | } | ||
273 | |||
250 | } | 274 | } |
251 | iounmap(bcsr_regs); | 275 | iounmap(bcsr_regs); |
252 | } | 276 | } |
@@ -301,11 +325,15 @@ static struct of_device_id mpc85xx_ids[] = { | |||
301 | { .compatible = "fsl,qe", }, | 325 | { .compatible = "fsl,qe", }, |
302 | { .compatible = "gianfar", }, | 326 | { .compatible = "gianfar", }, |
303 | { .compatible = "fsl,rapidio-delta", }, | 327 | { .compatible = "fsl,rapidio-delta", }, |
328 | { .compatible = "fsl,mpc8548-guts", }, | ||
329 | { .compatible = "gpio-leds", }, | ||
304 | {}, | 330 | {}, |
305 | }; | 331 | }; |
306 | 332 | ||
307 | static int __init mpc85xx_publish_devices(void) | 333 | static int __init mpc85xx_publish_devices(void) |
308 | { | 334 | { |
335 | if (machine_is(mpc8568_mds)) | ||
336 | simple_gpiochip_init("fsl,mpc8568mds-bcsr-gpio"); | ||
309 | if (machine_is(mpc8569_mds)) | 337 | if (machine_is(mpc8569_mds)) |
310 | simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio"); | 338 | simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio"); |
311 | 339 | ||
@@ -337,7 +365,8 @@ static void __init mpc85xx_mds_pic_init(void) | |||
337 | } | 365 | } |
338 | 366 | ||
339 | mpic = mpic_alloc(np, r.start, | 367 | mpic = mpic_alloc(np, r.start, |
340 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 368 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN | |
369 | MPIC_BROKEN_FRR_NIRQS, | ||
341 | 0, 256, " OpenPIC "); | 370 | 0, 256, " OpenPIC "); |
342 | BUG_ON(mpic == NULL); | 371 | BUG_ON(mpic == NULL); |
343 | of_node_put(np); | 372 | of_node_put(np); |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c index c8468de4acf6..088f30b0c088 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c | |||
@@ -44,6 +44,7 @@ void __init mpc85xx_rdb_pic_init(void) | |||
44 | struct mpic *mpic; | 44 | struct mpic *mpic; |
45 | struct resource r; | 45 | struct resource r; |
46 | struct device_node *np; | 46 | struct device_node *np; |
47 | unsigned long root = of_get_flat_dt_root(); | ||
47 | 48 | ||
48 | np = of_find_node_by_type(NULL, "open-pic"); | 49 | np = of_find_node_by_type(NULL, "open-pic"); |
49 | if (np == NULL) { | 50 | if (np == NULL) { |
@@ -57,11 +58,18 @@ void __init mpc85xx_rdb_pic_init(void) | |||
57 | return; | 58 | return; |
58 | } | 59 | } |
59 | 60 | ||
60 | mpic = mpic_alloc(np, r.start, | 61 | if (of_flat_dt_is_compatible(root, "fsl,85XXRDB-CAMP")) { |
62 | mpic = mpic_alloc(np, r.start, | ||
63 | MPIC_PRIMARY | | ||
64 | MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, | ||
65 | 0, 256, " OpenPIC "); | ||
66 | } else { | ||
67 | mpic = mpic_alloc(np, r.start, | ||
61 | MPIC_PRIMARY | MPIC_WANTS_RESET | | 68 | MPIC_PRIMARY | MPIC_WANTS_RESET | |
62 | MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | | 69 | MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | |
63 | MPIC_SINGLE_DEST_CPU, | 70 | MPIC_SINGLE_DEST_CPU, |
64 | 0, 256, " OpenPIC "); | 71 | 0, 256, " OpenPIC "); |
72 | } | ||
65 | 73 | ||
66 | BUG_ON(mpic == NULL); | 74 | BUG_ON(mpic == NULL); |
67 | of_node_put(np); | 75 | of_node_put(np); |
@@ -113,6 +121,7 @@ static int __init mpc85xxrdb_publish_devices(void) | |||
113 | return of_platform_bus_probe(NULL, mpc85xxrdb_ids, NULL); | 121 | return of_platform_bus_probe(NULL, mpc85xxrdb_ids, NULL); |
114 | } | 122 | } |
115 | machine_device_initcall(p2020_rdb, mpc85xxrdb_publish_devices); | 123 | machine_device_initcall(p2020_rdb, mpc85xxrdb_publish_devices); |
124 | machine_device_initcall(p1020_rdb, mpc85xxrdb_publish_devices); | ||
116 | 125 | ||
117 | /* | 126 | /* |
118 | * Called very early, device-tree isn't unflattened | 127 | * Called very early, device-tree isn't unflattened |
@@ -126,6 +135,15 @@ static int __init p2020_rdb_probe(void) | |||
126 | return 0; | 135 | return 0; |
127 | } | 136 | } |
128 | 137 | ||
138 | static int __init p1020_rdb_probe(void) | ||
139 | { | ||
140 | unsigned long root = of_get_flat_dt_root(); | ||
141 | |||
142 | if (of_flat_dt_is_compatible(root, "fsl,P1020RDB")) | ||
143 | return 1; | ||
144 | return 0; | ||
145 | } | ||
146 | |||
129 | define_machine(p2020_rdb) { | 147 | define_machine(p2020_rdb) { |
130 | .name = "P2020 RDB", | 148 | .name = "P2020 RDB", |
131 | .probe = p2020_rdb_probe, | 149 | .probe = p2020_rdb_probe, |
@@ -139,3 +157,17 @@ define_machine(p2020_rdb) { | |||
139 | .calibrate_decr = generic_calibrate_decr, | 157 | .calibrate_decr = generic_calibrate_decr, |
140 | .progress = udbg_progress, | 158 | .progress = udbg_progress, |
141 | }; | 159 | }; |
160 | |||
161 | define_machine(p1020_rdb) { | ||
162 | .name = "P1020 RDB", | ||
163 | .probe = p1020_rdb_probe, | ||
164 | .setup_arch = mpc85xx_rdb_setup_arch, | ||
165 | .init_IRQ = mpc85xx_rdb_pic_init, | ||
166 | #ifdef CONFIG_PCI | ||
167 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
168 | #endif | ||
169 | .get_irq = mpic_get_irq, | ||
170 | .restart = fsl_rstcr_restart, | ||
171 | .calibrate_decr = generic_calibrate_decr, | ||
172 | .progress = udbg_progress, | ||
173 | }; | ||
diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c new file mode 100644 index 000000000000..84170460497b --- /dev/null +++ b/arch/powerpc/platforms/85xx/p4080_ds.c | |||
@@ -0,0 +1,74 @@ | |||
1 | /* | ||
2 | * P4080 DS Setup | ||
3 | * | ||
4 | * Maintained by Kumar Gala (see MAINTAINERS for contact information) | ||
5 | * | ||
6 | * Copyright 2009 Freescale Semiconductor Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/pci.h> | ||
16 | #include <linux/kdev_t.h> | ||
17 | #include <linux/delay.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | |||
20 | #include <asm/system.h> | ||
21 | #include <asm/time.h> | ||
22 | #include <asm/machdep.h> | ||
23 | #include <asm/pci-bridge.h> | ||
24 | #include <mm/mmu_decl.h> | ||
25 | #include <asm/prom.h> | ||
26 | #include <asm/udbg.h> | ||
27 | #include <asm/mpic.h> | ||
28 | |||
29 | #include <linux/of_platform.h> | ||
30 | #include <sysdev/fsl_soc.h> | ||
31 | #include <sysdev/fsl_pci.h> | ||
32 | |||
33 | #include "corenet_ds.h" | ||
34 | |||
35 | #ifdef CONFIG_PCI | ||
36 | static int primary_phb_addr; | ||
37 | #endif | ||
38 | |||
39 | /* | ||
40 | * Called very early, device-tree isn't unflattened | ||
41 | */ | ||
42 | static int __init p4080_ds_probe(void) | ||
43 | { | ||
44 | unsigned long root = of_get_flat_dt_root(); | ||
45 | |||
46 | if (of_flat_dt_is_compatible(root, "fsl,P4080DS")) { | ||
47 | #ifdef CONFIG_PCI | ||
48 | /* treat PCIe1 as primary, | ||
49 | * shouldn't matter as we have no ISA on the board | ||
50 | */ | ||
51 | primary_phb_addr = 0x0000; | ||
52 | #endif | ||
53 | return 1; | ||
54 | } else { | ||
55 | return 0; | ||
56 | } | ||
57 | } | ||
58 | |||
59 | define_machine(p4080_ds) { | ||
60 | .name = "P4080 DS", | ||
61 | .probe = p4080_ds_probe, | ||
62 | .setup_arch = corenet_ds_setup_arch, | ||
63 | .init_IRQ = corenet_ds_pic_init, | ||
64 | #ifdef CONFIG_PCI | ||
65 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
66 | #endif | ||
67 | .get_irq = mpic_get_coreint_irq, | ||
68 | .restart = fsl_rstcr_restart, | ||
69 | .calibrate_decr = generic_calibrate_decr, | ||
70 | .progress = udbg_progress, | ||
71 | }; | ||
72 | |||
73 | machine_device_initcall(p4080_ds, corenet_ds_publish_devices); | ||
74 | machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier); | ||
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c index 04160a4cc699..a15f582300d8 100644 --- a/arch/powerpc/platforms/85xx/smp.c +++ b/arch/powerpc/platforms/85xx/smp.c | |||
@@ -46,6 +46,7 @@ smp_85xx_kick_cpu(int nr) | |||
46 | __iomem u32 *bptr_vaddr; | 46 | __iomem u32 *bptr_vaddr; |
47 | struct device_node *np; | 47 | struct device_node *np; |
48 | int n = 0; | 48 | int n = 0; |
49 | int ioremappable; | ||
49 | 50 | ||
50 | WARN_ON (nr < 0 || nr >= NR_CPUS); | 51 | WARN_ON (nr < 0 || nr >= NR_CPUS); |
51 | 52 | ||
@@ -59,21 +60,37 @@ smp_85xx_kick_cpu(int nr) | |||
59 | return; | 60 | return; |
60 | } | 61 | } |
61 | 62 | ||
63 | /* | ||
64 | * A secondary core could be in a spinloop in the bootpage | ||
65 | * (0xfffff000), somewhere in highmem, or somewhere in lowmem. | ||
66 | * The bootpage and highmem can be accessed via ioremap(), but | ||
67 | * we need to directly access the spinloop if its in lowmem. | ||
68 | */ | ||
69 | ioremappable = *cpu_rel_addr > virt_to_phys(high_memory); | ||
70 | |||
62 | /* Map the spin table */ | 71 | /* Map the spin table */ |
63 | bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY); | 72 | if (ioremappable) |
73 | bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY); | ||
74 | else | ||
75 | bptr_vaddr = phys_to_virt(*cpu_rel_addr); | ||
64 | 76 | ||
65 | local_irq_save(flags); | 77 | local_irq_save(flags); |
66 | 78 | ||
67 | out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr); | 79 | out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr); |
68 | out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start)); | 80 | out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start)); |
69 | 81 | ||
82 | if (!ioremappable) | ||
83 | flush_dcache_range((ulong)bptr_vaddr, | ||
84 | (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY)); | ||
85 | |||
70 | /* Wait a bit for the CPU to ack. */ | 86 | /* Wait a bit for the CPU to ack. */ |
71 | while ((__secondary_hold_acknowledge != nr) && (++n < 1000)) | 87 | while ((__secondary_hold_acknowledge != nr) && (++n < 1000)) |
72 | mdelay(1); | 88 | mdelay(1); |
73 | 89 | ||
74 | local_irq_restore(flags); | 90 | local_irq_restore(flags); |
75 | 91 | ||
76 | iounmap(bptr_vaddr); | 92 | if (ioremappable) |
93 | iounmap(bptr_vaddr); | ||
77 | 94 | ||
78 | pr_debug("waited %d msecs for CPU #%d.\n", n, nr); | 95 | pr_debug("waited %d msecs for CPU #%d.\n", n, nr); |
79 | } | 96 | } |
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c index 60edf63d0157..d48527ffc425 100644 --- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c +++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c | |||
@@ -50,7 +50,7 @@ static struct socrates_fpga_irq_info fpga_irqs[SOCRATES_FPGA_NUM_IRQS] = { | |||
50 | 50 | ||
51 | #define socrates_fpga_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | 51 | #define socrates_fpga_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) |
52 | 52 | ||
53 | static DEFINE_SPINLOCK(socrates_fpga_pic_lock); | 53 | static DEFINE_RAW_SPINLOCK(socrates_fpga_pic_lock); |
54 | 54 | ||
55 | static void __iomem *socrates_fpga_pic_iobase; | 55 | static void __iomem *socrates_fpga_pic_iobase; |
56 | static struct irq_host *socrates_fpga_pic_irq_host; | 56 | static struct irq_host *socrates_fpga_pic_irq_host; |
@@ -80,9 +80,9 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq) | |||
80 | if (i == 3) | 80 | if (i == 3) |
81 | return NO_IRQ; | 81 | return NO_IRQ; |
82 | 82 | ||
83 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 83 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
84 | cause = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(i)); | 84 | cause = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(i)); |
85 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | 85 | raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); |
86 | for (i = SOCRATES_FPGA_NUM_IRQS - 1; i >= 0; i--) { | 86 | for (i = SOCRATES_FPGA_NUM_IRQS - 1; i >= 0; i--) { |
87 | if (cause >> (i + 16)) | 87 | if (cause >> (i + 16)) |
88 | break; | 88 | break; |
@@ -116,12 +116,12 @@ static void socrates_fpga_pic_ack(unsigned int virq) | |||
116 | hwirq = socrates_fpga_irq_to_hw(virq); | 116 | hwirq = socrates_fpga_irq_to_hw(virq); |
117 | 117 | ||
118 | irq_line = fpga_irqs[hwirq].irq_line; | 118 | irq_line = fpga_irqs[hwirq].irq_line; |
119 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 119 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
120 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | 120 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) |
121 | & SOCRATES_FPGA_IRQ_MASK; | 121 | & SOCRATES_FPGA_IRQ_MASK; |
122 | mask |= (1 << (hwirq + 16)); | 122 | mask |= (1 << (hwirq + 16)); |
123 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); | 123 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); |
124 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | 124 | raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); |
125 | } | 125 | } |
126 | 126 | ||
127 | static void socrates_fpga_pic_mask(unsigned int virq) | 127 | static void socrates_fpga_pic_mask(unsigned int virq) |
@@ -134,12 +134,12 @@ static void socrates_fpga_pic_mask(unsigned int virq) | |||
134 | hwirq = socrates_fpga_irq_to_hw(virq); | 134 | hwirq = socrates_fpga_irq_to_hw(virq); |
135 | 135 | ||
136 | irq_line = fpga_irqs[hwirq].irq_line; | 136 | irq_line = fpga_irqs[hwirq].irq_line; |
137 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 137 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
138 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | 138 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) |
139 | & SOCRATES_FPGA_IRQ_MASK; | 139 | & SOCRATES_FPGA_IRQ_MASK; |
140 | mask &= ~(1 << hwirq); | 140 | mask &= ~(1 << hwirq); |
141 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); | 141 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); |
142 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | 142 | raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); |
143 | } | 143 | } |
144 | 144 | ||
145 | static void socrates_fpga_pic_mask_ack(unsigned int virq) | 145 | static void socrates_fpga_pic_mask_ack(unsigned int virq) |
@@ -152,13 +152,13 @@ static void socrates_fpga_pic_mask_ack(unsigned int virq) | |||
152 | hwirq = socrates_fpga_irq_to_hw(virq); | 152 | hwirq = socrates_fpga_irq_to_hw(virq); |
153 | 153 | ||
154 | irq_line = fpga_irqs[hwirq].irq_line; | 154 | irq_line = fpga_irqs[hwirq].irq_line; |
155 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 155 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
156 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | 156 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) |
157 | & SOCRATES_FPGA_IRQ_MASK; | 157 | & SOCRATES_FPGA_IRQ_MASK; |
158 | mask &= ~(1 << hwirq); | 158 | mask &= ~(1 << hwirq); |
159 | mask |= (1 << (hwirq + 16)); | 159 | mask |= (1 << (hwirq + 16)); |
160 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); | 160 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); |
161 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | 161 | raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); |
162 | } | 162 | } |
163 | 163 | ||
164 | static void socrates_fpga_pic_unmask(unsigned int virq) | 164 | static void socrates_fpga_pic_unmask(unsigned int virq) |
@@ -171,12 +171,12 @@ static void socrates_fpga_pic_unmask(unsigned int virq) | |||
171 | hwirq = socrates_fpga_irq_to_hw(virq); | 171 | hwirq = socrates_fpga_irq_to_hw(virq); |
172 | 172 | ||
173 | irq_line = fpga_irqs[hwirq].irq_line; | 173 | irq_line = fpga_irqs[hwirq].irq_line; |
174 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 174 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
175 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | 175 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) |
176 | & SOCRATES_FPGA_IRQ_MASK; | 176 | & SOCRATES_FPGA_IRQ_MASK; |
177 | mask |= (1 << hwirq); | 177 | mask |= (1 << hwirq); |
178 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); | 178 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); |
179 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | 179 | raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); |
180 | } | 180 | } |
181 | 181 | ||
182 | static void socrates_fpga_pic_eoi(unsigned int virq) | 182 | static void socrates_fpga_pic_eoi(unsigned int virq) |
@@ -189,12 +189,12 @@ static void socrates_fpga_pic_eoi(unsigned int virq) | |||
189 | hwirq = socrates_fpga_irq_to_hw(virq); | 189 | hwirq = socrates_fpga_irq_to_hw(virq); |
190 | 190 | ||
191 | irq_line = fpga_irqs[hwirq].irq_line; | 191 | irq_line = fpga_irqs[hwirq].irq_line; |
192 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 192 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
193 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | 193 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) |
194 | & SOCRATES_FPGA_IRQ_MASK; | 194 | & SOCRATES_FPGA_IRQ_MASK; |
195 | mask |= (1 << (hwirq + 16)); | 195 | mask |= (1 << (hwirq + 16)); |
196 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); | 196 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); |
197 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | 197 | raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); |
198 | } | 198 | } |
199 | 199 | ||
200 | static int socrates_fpga_pic_set_type(unsigned int virq, | 200 | static int socrates_fpga_pic_set_type(unsigned int virq, |
@@ -220,19 +220,19 @@ static int socrates_fpga_pic_set_type(unsigned int virq, | |||
220 | default: | 220 | default: |
221 | return -EINVAL; | 221 | return -EINVAL; |
222 | } | 222 | } |
223 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 223 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
224 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQCFG); | 224 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQCFG); |
225 | if (polarity) | 225 | if (polarity) |
226 | mask |= (1 << hwirq); | 226 | mask |= (1 << hwirq); |
227 | else | 227 | else |
228 | mask &= ~(1 << hwirq); | 228 | mask &= ~(1 << hwirq); |
229 | socrates_fpga_pic_write(FPGA_PIC_IRQCFG, mask); | 229 | socrates_fpga_pic_write(FPGA_PIC_IRQCFG, mask); |
230 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | 230 | raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); |
231 | return 0; | 231 | return 0; |
232 | } | 232 | } |
233 | 233 | ||
234 | static struct irq_chip socrates_fpga_pic_chip = { | 234 | static struct irq_chip socrates_fpga_pic_chip = { |
235 | .typename = " FPGA-PIC ", | 235 | .name = "FPGA-PIC", |
236 | .ack = socrates_fpga_pic_ack, | 236 | .ack = socrates_fpga_pic_ack, |
237 | .mask = socrates_fpga_pic_mask, | 237 | .mask = socrates_fpga_pic_mask, |
238 | .mask_ack = socrates_fpga_pic_mask_ack, | 238 | .mask_ack = socrates_fpga_pic_mask_ack, |
@@ -245,7 +245,7 @@ static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq, | |||
245 | irq_hw_number_t hwirq) | 245 | irq_hw_number_t hwirq) |
246 | { | 246 | { |
247 | /* All interrupts are LEVEL sensitive */ | 247 | /* All interrupts are LEVEL sensitive */ |
248 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 248 | irq_to_desc(virq)->status |= IRQ_LEVEL; |
249 | set_irq_chip_and_handler(virq, &socrates_fpga_pic_chip, | 249 | set_irq_chip_and_handler(virq, &socrates_fpga_pic_chip, |
250 | handle_fasteoi_irq); | 250 | handle_fasteoi_irq); |
251 | 251 | ||
@@ -253,7 +253,7 @@ static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq, | |||
253 | } | 253 | } |
254 | 254 | ||
255 | static int socrates_fpga_pic_host_xlate(struct irq_host *h, | 255 | static int socrates_fpga_pic_host_xlate(struct irq_host *h, |
256 | struct device_node *ct, u32 *intspec, unsigned int intsize, | 256 | struct device_node *ct, const u32 *intspec, unsigned int intsize, |
257 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | 257 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
258 | { | 258 | { |
259 | struct socrates_fpga_irq_info *fpga_irq = &fpga_irqs[intspec[0]]; | 259 | struct socrates_fpga_irq_info *fpga_irq = &fpga_irqs[intspec[0]]; |
@@ -314,14 +314,14 @@ void socrates_fpga_pic_init(struct device_node *pic) | |||
314 | 314 | ||
315 | socrates_fpga_pic_iobase = of_iomap(pic, 0); | 315 | socrates_fpga_pic_iobase = of_iomap(pic, 0); |
316 | 316 | ||
317 | spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 317 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
318 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(0), | 318 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(0), |
319 | SOCRATES_FPGA_IRQ_MASK << 16); | 319 | SOCRATES_FPGA_IRQ_MASK << 16); |
320 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(1), | 320 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(1), |
321 | SOCRATES_FPGA_IRQ_MASK << 16); | 321 | SOCRATES_FPGA_IRQ_MASK << 16); |
322 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(2), | 322 | socrates_fpga_pic_write(FPGA_PIC_IRQMASK(2), |
323 | SOCRATES_FPGA_IRQ_MASK << 16); | 323 | SOCRATES_FPGA_IRQ_MASK << 16); |
324 | spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); | 324 | raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags); |
325 | 325 | ||
326 | pr_info("FPGA PIC: Setting up Socrates FPGA PIC\n"); | 326 | pr_info("FPGA PIC: Setting up Socrates FPGA PIC\n"); |
327 | } | 327 | } |
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c index f559918f3c6f..bc33d1859ae7 100644 --- a/arch/powerpc/platforms/85xx/stx_gp3.c +++ b/arch/powerpc/platforms/85xx/stx_gp3.c | |||
@@ -134,7 +134,7 @@ static void stx_gp3_show_cpuinfo(struct seq_file *m) | |||
134 | pvid = mfspr(SPRN_PVR); | 134 | pvid = mfspr(SPRN_PVR); |
135 | svid = mfspr(SPRN_SVR); | 135 | svid = mfspr(SPRN_SVR); |
136 | 136 | ||
137 | seq_printf(m, "Vendor\t\t: RPC Electronics STx \n"); | 137 | seq_printf(m, "Vendor\t\t: RPC Electronics STx\n"); |
138 | seq_printf(m, "PVR\t\t: 0x%x\n", pvid); | 138 | seq_printf(m, "PVR\t\t: 0x%x\n", pvid); |
139 | seq_printf(m, "SVR\t\t: 0x%x\n", svid); | 139 | seq_printf(m, "SVR\t\t: 0x%x\n", svid); |
140 | 140 | ||
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c index 1b426050a2f9..0125604d096e 100644 --- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c +++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c | |||
@@ -80,8 +80,8 @@ static void xes_mpc85xx_configure_l2(void __iomem *l2_base) | |||
80 | printk(KERN_INFO "xes_mpc85xx: Enabling L2 as cache\n"); | 80 | printk(KERN_INFO "xes_mpc85xx: Enabling L2 as cache\n"); |
81 | 81 | ||
82 | ctl = MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2I; | 82 | ctl = MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2I; |
83 | if (machine_is_compatible("MPC8540") || | 83 | if (of_machine_is_compatible("MPC8540") || |
84 | machine_is_compatible("MPC8560")) | 84 | of_machine_is_compatible("MPC8560")) |
85 | /* | 85 | /* |
86 | * Assume L2 SRAM is used fully for cache, so set | 86 | * Assume L2 SRAM is used fully for cache, so set |
87 | * L2BLKSZ (bits 4:5) to match L2SIZ (bits 2:3). | 87 | * L2BLKSZ (bits 4:5) to match L2SIZ (bits 2:3). |
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig index 9c7b64a3402b..a0b5638c5dc8 100644 --- a/arch/powerpc/platforms/86xx/Kconfig +++ b/arch/powerpc/platforms/86xx/Kconfig | |||
@@ -13,7 +13,7 @@ config MPC8641_HPCN | |||
13 | bool "Freescale MPC8641 HPCN" | 13 | bool "Freescale MPC8641 HPCN" |
14 | select PPC_I8259 | 14 | select PPC_I8259 |
15 | select DEFAULT_UIMAGE | 15 | select DEFAULT_UIMAGE |
16 | select FSL_ULI1575 | 16 | select FSL_ULI1575 if PCI |
17 | select HAS_RAPIDIO | 17 | select HAS_RAPIDIO |
18 | select SWIOTLB | 18 | select SWIOTLB |
19 | help | 19 | help |
@@ -28,34 +28,37 @@ config SBC8641D | |||
28 | config MPC8610_HPCD | 28 | config MPC8610_HPCD |
29 | bool "Freescale MPC8610 HPCD" | 29 | bool "Freescale MPC8610 HPCD" |
30 | select DEFAULT_UIMAGE | 30 | select DEFAULT_UIMAGE |
31 | select FSL_ULI1575 | 31 | select FSL_ULI1575 if PCI |
32 | help | 32 | help |
33 | This option enables support for the MPC8610 HPCD board. | 33 | This option enables support for the MPC8610 HPCD board. |
34 | 34 | ||
35 | config GEF_PPC9A | 35 | config GEF_PPC9A |
36 | bool "GE Fanuc PPC9A" | 36 | bool "GE PPC9A" |
37 | select DEFAULT_UIMAGE | 37 | select DEFAULT_UIMAGE |
38 | select MMIO_NVRAM | ||
38 | select GENERIC_GPIO | 39 | select GENERIC_GPIO |
39 | select ARCH_REQUIRE_GPIOLIB | 40 | select ARCH_REQUIRE_GPIOLIB |
40 | help | 41 | help |
41 | This option enables support for GE Fanuc's PPC9A. | 42 | This option enables support for the GE PPC9A. |
42 | 43 | ||
43 | config GEF_SBC310 | 44 | config GEF_SBC310 |
44 | bool "GE Fanuc SBC310" | 45 | bool "GE SBC310" |
45 | select DEFAULT_UIMAGE | 46 | select DEFAULT_UIMAGE |
47 | select MMIO_NVRAM | ||
46 | select GENERIC_GPIO | 48 | select GENERIC_GPIO |
47 | select ARCH_REQUIRE_GPIOLIB | 49 | select ARCH_REQUIRE_GPIOLIB |
48 | help | 50 | help |
49 | This option enables support for GE Fanuc's SBC310. | 51 | This option enables support for the GE SBC310. |
50 | 52 | ||
51 | config GEF_SBC610 | 53 | config GEF_SBC610 |
52 | bool "GE Fanuc SBC610" | 54 | bool "GE SBC610" |
53 | select DEFAULT_UIMAGE | 55 | select DEFAULT_UIMAGE |
56 | select MMIO_NVRAM | ||
54 | select GENERIC_GPIO | 57 | select GENERIC_GPIO |
55 | select ARCH_REQUIRE_GPIOLIB | 58 | select ARCH_REQUIRE_GPIOLIB |
56 | select HAS_RAPIDIO | 59 | select HAS_RAPIDIO |
57 | help | 60 | help |
58 | This option enables support for GE Fanuc's SBC610. | 61 | This option enables support for the GE SBC610. |
59 | 62 | ||
60 | endif | 63 | endif |
61 | 64 | ||
diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c index b2ea8875adba..b8cb08dbd89c 100644 --- a/arch/powerpc/platforms/86xx/gef_gpio.c +++ b/arch/powerpc/platforms/86xx/gef_gpio.c | |||
@@ -1,9 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * Driver for GE Fanuc's FPGA based GPIO pins | 2 | * Driver for GE FPGA based GPIO |
3 | * | 3 | * |
4 | * Author: Martyn Welch <martyn.welch@gefanuc.com> | 4 | * Author: Martyn Welch <martyn.welch@ge.com> |
5 | * | 5 | * |
6 | * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 6 | * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc. |
7 | * | 7 | * |
8 | * This file is licensed under the terms of the GNU General Public License | 8 | * This file is licensed under the terms of the GNU General Public License |
9 | * version 2. This program is licensed "as is" without any warranty of any | 9 | * version 2. This program is licensed "as is" without any warranty of any |
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/of_platform.h> | 26 | #include <linux/of_platform.h> |
27 | #include <linux/of_gpio.h> | 27 | #include <linux/of_gpio.h> |
28 | #include <linux/gpio.h> | 28 | #include <linux/gpio.h> |
29 | #include <linux/slab.h> | ||
29 | 30 | ||
30 | #define GEF_GPIO_DIRECT 0x00 | 31 | #define GEF_GPIO_DIRECT 0x00 |
31 | #define GEF_GPIO_IN 0x04 | 32 | #define GEF_GPIO_IN 0x04 |
@@ -164,6 +165,6 @@ static int __init gef_gpio_init(void) | |||
164 | }; | 165 | }; |
165 | arch_initcall(gef_gpio_init); | 166 | arch_initcall(gef_gpio_init); |
166 | 167 | ||
167 | MODULE_DESCRIPTION("GE Fanuc I/O FPGA GPIO driver"); | 168 | MODULE_DESCRIPTION("GE I/O FPGA GPIO driver"); |
168 | MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com"); | 169 | MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com"); |
169 | MODULE_LICENSE("GPL"); | 170 | MODULE_LICENSE("GPL"); |
diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c index 50d0a2b63809..6df9e2561c06 100644 --- a/arch/powerpc/platforms/86xx/gef_pic.c +++ b/arch/powerpc/platforms/86xx/gef_pic.c | |||
@@ -1,9 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * Interrupt handling for GE Fanuc's FPGA based PIC | 2 | * Interrupt handling for GE FPGA based PIC |
3 | * | 3 | * |
4 | * Author: Martyn Welch <martyn.welch@gefanuc.com> | 4 | * Author: Martyn Welch <martyn.welch@ge.com> |
5 | * | 5 | * |
6 | * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 6 | * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc. |
7 | * | 7 | * |
8 | * This file is licensed under the terms of the GNU General Public License | 8 | * This file is licensed under the terms of the GNU General Public License |
9 | * version 2. This program is licensed "as is" without any warranty of any | 9 | * version 2. This program is licensed "as is" without any warranty of any |
@@ -49,7 +49,7 @@ | |||
49 | #define gef_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | 49 | #define gef_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) |
50 | 50 | ||
51 | 51 | ||
52 | static DEFINE_SPINLOCK(gef_pic_lock); | 52 | static DEFINE_RAW_SPINLOCK(gef_pic_lock); |
53 | 53 | ||
54 | static void __iomem *gef_pic_irq_reg_base; | 54 | static void __iomem *gef_pic_irq_reg_base; |
55 | static struct irq_host *gef_pic_irq_host; | 55 | static struct irq_host *gef_pic_irq_host; |
@@ -118,11 +118,11 @@ static void gef_pic_mask(unsigned int virq) | |||
118 | 118 | ||
119 | hwirq = gef_irq_to_hw(virq); | 119 | hwirq = gef_irq_to_hw(virq); |
120 | 120 | ||
121 | spin_lock_irqsave(&gef_pic_lock, flags); | 121 | raw_spin_lock_irqsave(&gef_pic_lock, flags); |
122 | mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); | 122 | mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); |
123 | mask &= ~(1 << hwirq); | 123 | mask &= ~(1 << hwirq); |
124 | out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); | 124 | out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); |
125 | spin_unlock_irqrestore(&gef_pic_lock, flags); | 125 | raw_spin_unlock_irqrestore(&gef_pic_lock, flags); |
126 | } | 126 | } |
127 | 127 | ||
128 | static void gef_pic_mask_ack(unsigned int virq) | 128 | static void gef_pic_mask_ack(unsigned int virq) |
@@ -141,15 +141,15 @@ static void gef_pic_unmask(unsigned int virq) | |||
141 | 141 | ||
142 | hwirq = gef_irq_to_hw(virq); | 142 | hwirq = gef_irq_to_hw(virq); |
143 | 143 | ||
144 | spin_lock_irqsave(&gef_pic_lock, flags); | 144 | raw_spin_lock_irqsave(&gef_pic_lock, flags); |
145 | mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); | 145 | mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); |
146 | mask |= (1 << hwirq); | 146 | mask |= (1 << hwirq); |
147 | out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); | 147 | out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); |
148 | spin_unlock_irqrestore(&gef_pic_lock, flags); | 148 | raw_spin_unlock_irqrestore(&gef_pic_lock, flags); |
149 | } | 149 | } |
150 | 150 | ||
151 | static struct irq_chip gef_pic_chip = { | 151 | static struct irq_chip gef_pic_chip = { |
152 | .typename = "gefp", | 152 | .name = "gefp", |
153 | .mask = gef_pic_mask, | 153 | .mask = gef_pic_mask, |
154 | .mask_ack = gef_pic_mask_ack, | 154 | .mask_ack = gef_pic_mask_ack, |
155 | .unmask = gef_pic_unmask, | 155 | .unmask = gef_pic_unmask, |
@@ -163,14 +163,14 @@ static int gef_pic_host_map(struct irq_host *h, unsigned int virq, | |||
163 | irq_hw_number_t hwirq) | 163 | irq_hw_number_t hwirq) |
164 | { | 164 | { |
165 | /* All interrupts are LEVEL sensitive */ | 165 | /* All interrupts are LEVEL sensitive */ |
166 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 166 | irq_to_desc(virq)->status |= IRQ_LEVEL; |
167 | set_irq_chip_and_handler(virq, &gef_pic_chip, handle_level_irq); | 167 | set_irq_chip_and_handler(virq, &gef_pic_chip, handle_level_irq); |
168 | 168 | ||
169 | return 0; | 169 | return 0; |
170 | } | 170 | } |
171 | 171 | ||
172 | static int gef_pic_host_xlate(struct irq_host *h, struct device_node *ct, | 172 | static int gef_pic_host_xlate(struct irq_host *h, struct device_node *ct, |
173 | u32 *intspec, unsigned int intsize, | 173 | const u32 *intspec, unsigned int intsize, |
174 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | 174 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
175 | { | 175 | { |
176 | 176 | ||
@@ -199,7 +199,7 @@ void __init gef_pic_init(struct device_node *np) | |||
199 | /* Map the devices registers into memory */ | 199 | /* Map the devices registers into memory */ |
200 | gef_pic_irq_reg_base = of_iomap(np, 0); | 200 | gef_pic_irq_reg_base = of_iomap(np, 0); |
201 | 201 | ||
202 | spin_lock_irqsave(&gef_pic_lock, flags); | 202 | raw_spin_lock_irqsave(&gef_pic_lock, flags); |
203 | 203 | ||
204 | /* Initialise everything as masked. */ | 204 | /* Initialise everything as masked. */ |
205 | out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0); | 205 | out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0); |
@@ -208,7 +208,7 @@ void __init gef_pic_init(struct device_node *np) | |||
208 | out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0); | 208 | out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0); |
209 | out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0); | 209 | out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0); |
210 | 210 | ||
211 | spin_unlock_irqrestore(&gef_pic_lock, flags); | 211 | raw_spin_unlock_irqrestore(&gef_pic_lock, flags); |
212 | 212 | ||
213 | /* Map controller */ | 213 | /* Map controller */ |
214 | gef_pic_cascade_irq = irq_of_parse_and_map(np, 0); | 214 | gef_pic_cascade_irq = irq_of_parse_and_map(np, 0); |
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c index 287f7bd17dd9..60ce07e39100 100644 --- a/arch/powerpc/platforms/86xx/gef_ppc9a.c +++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c | |||
@@ -1,9 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * GE Fanuc PPC9A board support | 2 | * GE PPC9A board support |
3 | * | 3 | * |
4 | * Author: Martyn Welch <martyn.welch@gefanuc.com> | 4 | * Author: Martyn Welch <martyn.welch@ge.com> |
5 | * | 5 | * |
6 | * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 6 | * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify it | 8 | * This program is free software; you can redistribute it and/or modify it |
9 | * under the terms of the GNU General Public License as published by the | 9 | * under the terms of the GNU General Public License as published by the |
@@ -33,6 +33,7 @@ | |||
33 | #include <asm/udbg.h> | 33 | #include <asm/udbg.h> |
34 | 34 | ||
35 | #include <asm/mpic.h> | 35 | #include <asm/mpic.h> |
36 | #include <asm/nvram.h> | ||
36 | 37 | ||
37 | #include <sysdev/fsl_pci.h> | 38 | #include <sysdev/fsl_pci.h> |
38 | #include <sysdev/fsl_soc.h> | 39 | #include <sysdev/fsl_soc.h> |
@@ -81,7 +82,7 @@ static void __init gef_ppc9a_setup_arch(void) | |||
81 | } | 82 | } |
82 | #endif | 83 | #endif |
83 | 84 | ||
84 | printk(KERN_INFO "GE Fanuc Intelligent Platforms PPC9A 6U VME SBC\n"); | 85 | printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n"); |
85 | 86 | ||
86 | #ifdef CONFIG_SMP | 87 | #ifdef CONFIG_SMP |
87 | mpc86xx_smp_init(); | 88 | mpc86xx_smp_init(); |
@@ -95,6 +96,10 @@ static void __init gef_ppc9a_setup_arch(void) | |||
95 | printk(KERN_WARNING "Unable to map board registers\n"); | 96 | printk(KERN_WARNING "Unable to map board registers\n"); |
96 | of_node_put(regs); | 97 | of_node_put(regs); |
97 | } | 98 | } |
99 | |||
100 | #if defined(CONFIG_MMIO_NVRAM) | ||
101 | mmio_nvram_init(); | ||
102 | #endif | ||
98 | } | 103 | } |
99 | 104 | ||
100 | /* Return the PCB revision */ | 105 | /* Return the PCB revision */ |
@@ -146,7 +151,7 @@ static void gef_ppc9a_show_cpuinfo(struct seq_file *m) | |||
146 | { | 151 | { |
147 | uint svid = mfspr(SPRN_SVR); | 152 | uint svid = mfspr(SPRN_SVR); |
148 | 153 | ||
149 | seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n"); | 154 | seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n"); |
150 | 155 | ||
151 | seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(), | 156 | seq_printf(m, "Revision\t: %u%c\n", gef_ppc9a_get_pcb_rev(), |
152 | ('A' + gef_ppc9a_get_board_rev())); | 157 | ('A' + gef_ppc9a_get_board_rev())); |
@@ -230,7 +235,7 @@ static int __init declare_of_platform_devices(void) | |||
230 | machine_device_initcall(gef_ppc9a, declare_of_platform_devices); | 235 | machine_device_initcall(gef_ppc9a, declare_of_platform_devices); |
231 | 236 | ||
232 | define_machine(gef_ppc9a) { | 237 | define_machine(gef_ppc9a) { |
233 | .name = "GE Fanuc PPC9A", | 238 | .name = "GE PPC9A", |
234 | .probe = gef_ppc9a_probe, | 239 | .probe = gef_ppc9a_probe, |
235 | .setup_arch = gef_ppc9a_setup_arch, | 240 | .setup_arch = gef_ppc9a_setup_arch, |
236 | .init_IRQ = gef_ppc9a_init_irq, | 241 | .init_IRQ = gef_ppc9a_init_irq, |
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c index 90754e752bd8..3ecee25bf3ed 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc310.c +++ b/arch/powerpc/platforms/86xx/gef_sbc310.c | |||
@@ -1,9 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * GE Fanuc SBC310 board support | 2 | * GE SBC310 board support |
3 | * | 3 | * |
4 | * Author: Martyn Welch <martyn.welch@gefanuc.com> | 4 | * Author: Martyn Welch <martyn.welch@ge.com> |
5 | * | 5 | * |
6 | * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 6 | * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify it | 8 | * This program is free software; you can redistribute it and/or modify it |
9 | * under the terms of the GNU General Public License as published by the | 9 | * under the terms of the GNU General Public License as published by the |
@@ -33,6 +33,7 @@ | |||
33 | #include <asm/udbg.h> | 33 | #include <asm/udbg.h> |
34 | 34 | ||
35 | #include <asm/mpic.h> | 35 | #include <asm/mpic.h> |
36 | #include <asm/nvram.h> | ||
36 | 37 | ||
37 | #include <sysdev/fsl_pci.h> | 38 | #include <sysdev/fsl_pci.h> |
38 | #include <sysdev/fsl_soc.h> | 39 | #include <sysdev/fsl_soc.h> |
@@ -81,7 +82,7 @@ static void __init gef_sbc310_setup_arch(void) | |||
81 | } | 82 | } |
82 | #endif | 83 | #endif |
83 | 84 | ||
84 | printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC310 6U VPX SBC\n"); | 85 | printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n"); |
85 | 86 | ||
86 | #ifdef CONFIG_SMP | 87 | #ifdef CONFIG_SMP |
87 | mpc86xx_smp_init(); | 88 | mpc86xx_smp_init(); |
@@ -95,6 +96,10 @@ static void __init gef_sbc310_setup_arch(void) | |||
95 | printk(KERN_WARNING "Unable to map board registers\n"); | 96 | printk(KERN_WARNING "Unable to map board registers\n"); |
96 | of_node_put(regs); | 97 | of_node_put(regs); |
97 | } | 98 | } |
99 | |||
100 | #if defined(CONFIG_MMIO_NVRAM) | ||
101 | mmio_nvram_init(); | ||
102 | #endif | ||
98 | } | 103 | } |
99 | 104 | ||
100 | /* Return the PCB revision */ | 105 | /* Return the PCB revision */ |
@@ -137,7 +142,7 @@ static void gef_sbc310_show_cpuinfo(struct seq_file *m) | |||
137 | { | 142 | { |
138 | uint svid = mfspr(SPRN_SVR); | 143 | uint svid = mfspr(SPRN_SVR); |
139 | 144 | ||
140 | seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n"); | 145 | seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n"); |
141 | 146 | ||
142 | seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id()); | 147 | seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id()); |
143 | seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(), | 148 | seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(), |
@@ -218,7 +223,7 @@ static int __init declare_of_platform_devices(void) | |||
218 | machine_device_initcall(gef_sbc310, declare_of_platform_devices); | 223 | machine_device_initcall(gef_sbc310, declare_of_platform_devices); |
219 | 224 | ||
220 | define_machine(gef_sbc310) { | 225 | define_machine(gef_sbc310) { |
221 | .name = "GE Fanuc SBC310", | 226 | .name = "GE SBC310", |
222 | .probe = gef_sbc310_probe, | 227 | .probe = gef_sbc310_probe, |
223 | .setup_arch = gef_sbc310_setup_arch, | 228 | .setup_arch = gef_sbc310_setup_arch, |
224 | .init_IRQ = gef_sbc310_init_irq, | 229 | .init_IRQ = gef_sbc310_init_irq, |
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c index 72b31a6010a0..5090d608d9ee 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc610.c +++ b/arch/powerpc/platforms/86xx/gef_sbc610.c | |||
@@ -1,9 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * GE Fanuc SBC610 board support | 2 | * GE SBC610 board support |
3 | * | 3 | * |
4 | * Author: Martyn Welch <martyn.welch@gefanuc.com> | 4 | * Author: Martyn Welch <martyn.welch@ge.com> |
5 | * | 5 | * |
6 | * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 6 | * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc. |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify it | 8 | * This program is free software; you can redistribute it and/or modify it |
9 | * under the terms of the GNU General Public License as published by the | 9 | * under the terms of the GNU General Public License as published by the |
@@ -33,6 +33,7 @@ | |||
33 | #include <asm/udbg.h> | 33 | #include <asm/udbg.h> |
34 | 34 | ||
35 | #include <asm/mpic.h> | 35 | #include <asm/mpic.h> |
36 | #include <asm/nvram.h> | ||
36 | 37 | ||
37 | #include <sysdev/fsl_pci.h> | 38 | #include <sysdev/fsl_pci.h> |
38 | #include <sysdev/fsl_soc.h> | 39 | #include <sysdev/fsl_soc.h> |
@@ -81,7 +82,7 @@ static void __init gef_sbc610_setup_arch(void) | |||
81 | } | 82 | } |
82 | #endif | 83 | #endif |
83 | 84 | ||
84 | printk(KERN_INFO "GE Fanuc Intelligent Platforms SBC610 6U VPX SBC\n"); | 85 | printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n"); |
85 | 86 | ||
86 | #ifdef CONFIG_SMP | 87 | #ifdef CONFIG_SMP |
87 | mpc86xx_smp_init(); | 88 | mpc86xx_smp_init(); |
@@ -95,6 +96,10 @@ static void __init gef_sbc610_setup_arch(void) | |||
95 | printk(KERN_WARNING "Unable to map board registers\n"); | 96 | printk(KERN_WARNING "Unable to map board registers\n"); |
96 | of_node_put(regs); | 97 | of_node_put(regs); |
97 | } | 98 | } |
99 | |||
100 | #if defined(CONFIG_MMIO_NVRAM) | ||
101 | mmio_nvram_init(); | ||
102 | #endif | ||
98 | } | 103 | } |
99 | 104 | ||
100 | /* Return the PCB revision */ | 105 | /* Return the PCB revision */ |
@@ -128,7 +133,7 @@ static void gef_sbc610_show_cpuinfo(struct seq_file *m) | |||
128 | { | 133 | { |
129 | uint svid = mfspr(SPRN_SVR); | 134 | uint svid = mfspr(SPRN_SVR); |
130 | 135 | ||
131 | seq_printf(m, "Vendor\t\t: GE Fanuc Intelligent Platforms\n"); | 136 | seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n"); |
132 | 137 | ||
133 | seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(), | 138 | seq_printf(m, "Revision\t: %u%c\n", gef_sbc610_get_pcb_rev(), |
134 | ('A' + gef_sbc610_get_board_rev() - 1)); | 139 | ('A' + gef_sbc610_get_board_rev() - 1)); |
@@ -207,7 +212,7 @@ static int __init declare_of_platform_devices(void) | |||
207 | machine_device_initcall(gef_sbc610, declare_of_platform_devices); | 212 | machine_device_initcall(gef_sbc610, declare_of_platform_devices); |
208 | 213 | ||
209 | define_machine(gef_sbc610) { | 214 | define_machine(gef_sbc610) { |
210 | .name = "GE Fanuc SBC610", | 215 | .name = "GE SBC610", |
211 | .probe = gef_sbc610_probe, | 216 | .probe = gef_sbc610_probe, |
212 | .setup_arch = gef_sbc610_setup_arch, | 217 | .setup_arch = gef_sbc610_setup_arch, |
213 | .init_IRQ = gef_sbc610_init_irq, | 218 | .init_IRQ = gef_sbc610_init_irq, |
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index 627908a4cd77..5abe137f6309 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/stddef.h> | 19 | #include <linux/stddef.h> |
20 | #include <linux/kernel.h> | 20 | #include <linux/kernel.h> |
21 | #include <linux/pci.h> | 21 | #include <linux/pci.h> |
22 | #include <linux/interrupt.h> | ||
22 | #include <linux/kdev_t.h> | 23 | #include <linux/kdev_t.h> |
23 | #include <linux/delay.h> | 24 | #include <linux/delay.h> |
24 | #include <linux/seq_file.h> | 25 | #include <linux/seq_file.h> |
@@ -41,10 +42,46 @@ | |||
41 | 42 | ||
42 | #include "mpc86xx.h" | 43 | #include "mpc86xx.h" |
43 | 44 | ||
45 | static struct device_node *pixis_node; | ||
44 | static unsigned char *pixis_bdcfg0, *pixis_arch; | 46 | static unsigned char *pixis_bdcfg0, *pixis_arch; |
45 | 47 | ||
48 | #ifdef CONFIG_SUSPEND | ||
49 | static irqreturn_t mpc8610_sw9_irq(int irq, void *data) | ||
50 | { | ||
51 | pr_debug("%s: PIXIS' event (sw9/wakeup) IRQ handled\n", __func__); | ||
52 | return IRQ_HANDLED; | ||
53 | } | ||
54 | |||
55 | static void __init mpc8610_suspend_init(void) | ||
56 | { | ||
57 | int irq; | ||
58 | int ret; | ||
59 | |||
60 | if (!pixis_node) | ||
61 | return; | ||
62 | |||
63 | irq = irq_of_parse_and_map(pixis_node, 0); | ||
64 | if (!irq) { | ||
65 | pr_err("%s: can't map pixis event IRQ.\n", __func__); | ||
66 | return; | ||
67 | } | ||
68 | |||
69 | ret = request_irq(irq, mpc8610_sw9_irq, 0, "sw9/wakeup", NULL); | ||
70 | if (ret) { | ||
71 | pr_err("%s: can't request pixis event IRQ: %d\n", | ||
72 | __func__, ret); | ||
73 | irq_dispose_mapping(irq); | ||
74 | } | ||
75 | |||
76 | enable_irq_wake(irq); | ||
77 | } | ||
78 | #else | ||
79 | static inline void mpc8610_suspend_init(void) { } | ||
80 | #endif /* CONFIG_SUSPEND */ | ||
81 | |||
46 | static struct of_device_id __initdata mpc8610_ids[] = { | 82 | static struct of_device_id __initdata mpc8610_ids[] = { |
47 | { .compatible = "fsl,mpc8610-immr", }, | 83 | { .compatible = "fsl,mpc8610-immr", }, |
84 | { .compatible = "fsl,mpc8610-guts", }, | ||
48 | { .compatible = "simple-bus", }, | 85 | { .compatible = "simple-bus", }, |
49 | { .compatible = "gianfar", }, | 86 | { .compatible = "gianfar", }, |
50 | {} | 87 | {} |
@@ -55,6 +92,9 @@ static int __init mpc8610_declare_of_platform_devices(void) | |||
55 | /* Firstly, register PIXIS GPIOs. */ | 92 | /* Firstly, register PIXIS GPIOs. */ |
56 | simple_gpiochip_init("fsl,fpga-pixis-gpio-bank"); | 93 | simple_gpiochip_init("fsl,fpga-pixis-gpio-bank"); |
57 | 94 | ||
95 | /* Enable wakeup on PIXIS' event IRQ. */ | ||
96 | mpc8610_suspend_init(); | ||
97 | |||
58 | /* Without this call, the SSI device driver won't get probed. */ | 98 | /* Without this call, the SSI device driver won't get probed. */ |
59 | of_platform_bus_probe(NULL, mpc8610_ids, NULL); | 99 | of_platform_bus_probe(NULL, mpc8610_ids, NULL); |
60 | 100 | ||
@@ -250,10 +290,10 @@ static void __init mpc86xx_hpcd_setup_arch(void) | |||
250 | diu_ops.set_sysfs_monitor_port = mpc8610hpcd_set_sysfs_monitor_port; | 290 | diu_ops.set_sysfs_monitor_port = mpc8610hpcd_set_sysfs_monitor_port; |
251 | #endif | 291 | #endif |
252 | 292 | ||
253 | np = of_find_compatible_node(NULL, NULL, "fsl,fpga-pixis"); | 293 | pixis_node = of_find_compatible_node(NULL, NULL, "fsl,fpga-pixis"); |
254 | if (np) { | 294 | if (pixis_node) { |
255 | of_address_to_resource(np, 0, &r); | 295 | of_address_to_resource(pixis_node, 0, &r); |
256 | of_node_put(np); | 296 | of_node_put(pixis_node); |
257 | pixis = ioremap(r.start, 32); | 297 | pixis = ioremap(r.start, 32); |
258 | if (!pixis) { | 298 | if (!pixis) { |
259 | printk(KERN_ERR "Err: can't map FPGA cfg register!\n"); | 299 | printk(KERN_ERR "Err: can't map FPGA cfg register!\n"); |
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c index 385acfc48397..60168c1f98fe 100644 --- a/arch/powerpc/platforms/8xx/m8xx_setup.c +++ b/arch/powerpc/platforms/8xx/m8xx_setup.c | |||
@@ -11,7 +11,6 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/slab.h> | ||
15 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
16 | #include <linux/init.h> | 15 | #include <linux/init.h> |
17 | #include <linux/time.h> | 16 | #include <linux/time.h> |
@@ -222,7 +221,7 @@ static void cpm_cascade(unsigned int irq, struct irq_desc *desc) | |||
222 | int cascade_irq; | 221 | int cascade_irq; |
223 | 222 | ||
224 | if ((cascade_irq = cpm_get_irq()) >= 0) { | 223 | if ((cascade_irq = cpm_get_irq()) >= 0) { |
225 | struct irq_desc *cdesc = irq_desc + cascade_irq; | 224 | struct irq_desc *cdesc = irq_to_desc(cascade_irq); |
226 | 225 | ||
227 | generic_handle_irq(cascade_irq); | 226 | generic_handle_irq(cascade_irq); |
228 | cdesc->chip->eoi(cascade_irq); | 227 | cdesc->chip->eoi(cascade_irq); |
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index 04a8061045c4..d1663db7810f 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig | |||
@@ -86,6 +86,11 @@ config RTAS_ERROR_LOGGING | |||
86 | depends on PPC_RTAS | 86 | depends on PPC_RTAS |
87 | default n | 87 | default n |
88 | 88 | ||
89 | config PPC_RTAS_DAEMON | ||
90 | bool | ||
91 | depends on PPC_RTAS | ||
92 | default n | ||
93 | |||
89 | config RTAS_PROC | 94 | config RTAS_PROC |
90 | bool "Proc interface to RTAS" | 95 | bool "Proc interface to RTAS" |
91 | depends on PPC_RTAS | 96 | depends on PPC_RTAS |
@@ -255,7 +260,7 @@ config QE_GPIO | |||
255 | 260 | ||
256 | config CPM2 | 261 | config CPM2 |
257 | bool "Enable support for the CPM2 (Communications Processor Module)" | 262 | bool "Enable support for the CPM2 (Communications Processor Module)" |
258 | depends on MPC85xx || 8260 | 263 | depends on (FSL_SOC_BOOKE && PPC32) || 8260 |
259 | select CPM | 264 | select CPM |
260 | select PPC_LIB_RHEAP | 265 | select PPC_LIB_RHEAP |
261 | select PPC_PCI_CHOICE | 266 | select PPC_PCI_CHOICE |
@@ -300,7 +305,7 @@ source "arch/powerpc/sysdev/bestcomm/Kconfig" | |||
300 | 305 | ||
301 | config MPC8xxx_GPIO | 306 | config MPC8xxx_GPIO |
302 | bool "MPC8xxx GPIO support" | 307 | bool "MPC8xxx GPIO support" |
303 | depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || PPC_85xx || PPC_86xx | 308 | depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || FSL_SOC_BOOKE || PPC_86xx |
304 | select GENERIC_GPIO | 309 | select GENERIC_GPIO |
305 | select ARCH_REQUIRE_GPIOLIB | 310 | select ARCH_REQUIRE_GPIOLIB |
306 | help | 311 | help |
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index e382cae678b8..a8aae0b54579 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype | |||
@@ -28,8 +28,6 @@ config PPC_BOOK3S_32 | |||
28 | config PPC_85xx | 28 | config PPC_85xx |
29 | bool "Freescale 85xx" | 29 | bool "Freescale 85xx" |
30 | select E500 | 30 | select E500 |
31 | select FSL_SOC | ||
32 | select MPC85xx | ||
33 | 31 | ||
34 | config PPC_8xx | 32 | config PPC_8xx |
35 | bool "Freescale 8xx" | 33 | bool "Freescale 8xx" |
@@ -138,6 +136,24 @@ config PPC_FPU | |||
138 | bool | 136 | bool |
139 | default y if PPC64 | 137 | default y if PPC64 |
140 | 138 | ||
139 | config FSL_EMB_PERFMON | ||
140 | bool "Freescale Embedded Perfmon" | ||
141 | depends on E500 || PPC_83xx | ||
142 | help | ||
143 | This is the Performance Monitor support found on the e500 core | ||
144 | and some e300 cores (c3 and c4). Select this only if your | ||
145 | core supports the Embedded Performance Monitor APU | ||
146 | |||
147 | config FSL_EMB_PERF_EVENT | ||
148 | bool | ||
149 | depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS | ||
150 | default y | ||
151 | |||
152 | config FSL_EMB_PERF_EVENT_E500 | ||
153 | bool | ||
154 | depends on FSL_EMB_PERF_EVENT && E500 | ||
155 | default y | ||
156 | |||
141 | config 4xx | 157 | config 4xx |
142 | bool | 158 | bool |
143 | depends on 40x || 44x | 159 | depends on 40x || 44x |
@@ -153,13 +169,6 @@ config FSL_BOOKE | |||
153 | depends on E200 || E500 | 169 | depends on E200 || E500 |
154 | default y | 170 | default y |
155 | 171 | ||
156 | config FSL_EMB_PERFMON | ||
157 | bool "Freescale Embedded Perfmon" | ||
158 | depends on E500 || PPC_83xx | ||
159 | help | ||
160 | This is the Performance Monitor support found on the e500 core | ||
161 | and some e300 cores (c3 and c4). Select this only if your | ||
162 | core supports the Embedded Performance Monitor APU | ||
163 | 172 | ||
164 | config PTE_64BIT | 173 | config PTE_64BIT |
165 | bool | 174 | bool |
@@ -312,7 +321,7 @@ config NR_CPUS | |||
312 | 321 | ||
313 | config NOT_COHERENT_CACHE | 322 | config NOT_COHERENT_CACHE |
314 | bool | 323 | bool |
315 | depends on 4xx || 8xx || E200 || PPC_MPC512x | 324 | depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON |
316 | default y | 325 | default y |
317 | 326 | ||
318 | config CHECK_CACHE_COHERENCY | 327 | config CHECK_CACHE_COHERENCY |
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile index a6812ee00100..fdb9f0b0d7a8 100644 --- a/arch/powerpc/platforms/Makefile +++ b/arch/powerpc/platforms/Makefile | |||
@@ -12,7 +12,7 @@ obj-$(CONFIG_PPC_MPC52xx) += 52xx/ | |||
12 | obj-$(CONFIG_PPC_8xx) += 8xx/ | 12 | obj-$(CONFIG_PPC_8xx) += 8xx/ |
13 | obj-$(CONFIG_PPC_82xx) += 82xx/ | 13 | obj-$(CONFIG_PPC_82xx) += 82xx/ |
14 | obj-$(CONFIG_PPC_83xx) += 83xx/ | 14 | obj-$(CONFIG_PPC_83xx) += 83xx/ |
15 | obj-$(CONFIG_PPC_85xx) += 85xx/ | 15 | obj-$(CONFIG_FSL_SOC_BOOKE) += 85xx/ |
16 | obj-$(CONFIG_PPC_86xx) += 86xx/ | 16 | obj-$(CONFIG_PPC_86xx) += 86xx/ |
17 | obj-$(CONFIG_PPC_PSERIES) += pseries/ | 17 | obj-$(CONFIG_PPC_PSERIES) += pseries/ |
18 | obj-$(CONFIG_PPC_ISERIES) += iseries/ | 18 | obj-$(CONFIG_PPC_ISERIES) += iseries/ |
diff --git a/arch/powerpc/platforms/amigaone/setup.c b/arch/powerpc/platforms/amigaone/setup.c index 9290a7a442d0..fb4eb0df054c 100644 --- a/arch/powerpc/platforms/amigaone/setup.c +++ b/arch/powerpc/platforms/amigaone/setup.c | |||
@@ -14,7 +14,7 @@ | |||
14 | 14 | ||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/seq_file.h> | 16 | #include <linux/seq_file.h> |
17 | #include <linux/utsrelease.h> | 17 | #include <generated/utsrelease.h> |
18 | 18 | ||
19 | #include <asm/machdep.h> | 19 | #include <asm/machdep.h> |
20 | #include <asm/cputable.h> | 20 | #include <asm/cputable.h> |
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c index a86c34b3bb84..8efe48192f3f 100644 --- a/arch/powerpc/platforms/cell/axon_msi.c +++ b/arch/powerpc/platforms/cell/axon_msi.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/msi.h> | 15 | #include <linux/msi.h> |
16 | #include <linux/of_platform.h> | 16 | #include <linux/of_platform.h> |
17 | #include <linux/debugfs.h> | 17 | #include <linux/debugfs.h> |
18 | #include <linux/slab.h> | ||
18 | 19 | ||
19 | #include <asm/dcr.h> | 20 | #include <asm/dcr.h> |
20 | #include <asm/machdep.h> | 21 | #include <asm/machdep.h> |
@@ -312,7 +313,7 @@ static struct irq_chip msic_irq_chip = { | |||
312 | .mask = mask_msi_irq, | 313 | .mask = mask_msi_irq, |
313 | .unmask = unmask_msi_irq, | 314 | .unmask = unmask_msi_irq, |
314 | .shutdown = unmask_msi_irq, | 315 | .shutdown = unmask_msi_irq, |
315 | .typename = "AXON-MSI", | 316 | .name = "AXON-MSI", |
316 | }; | 317 | }; |
317 | 318 | ||
318 | static int msic_host_map(struct irq_host *h, unsigned int virq, | 319 | static int msic_host_map(struct irq_host *h, unsigned int virq, |
diff --git a/arch/powerpc/platforms/cell/beat_htab.c b/arch/powerpc/platforms/cell/beat_htab.c index 35b1ec492715..2516c1cf8467 100644 --- a/arch/powerpc/platforms/cell/beat_htab.c +++ b/arch/powerpc/platforms/cell/beat_htab.c | |||
@@ -40,7 +40,7 @@ | |||
40 | #define DBG_LOW(fmt...) do { } while (0) | 40 | #define DBG_LOW(fmt...) do { } while (0) |
41 | #endif | 41 | #endif |
42 | 42 | ||
43 | static DEFINE_SPINLOCK(beat_htab_lock); | 43 | static DEFINE_RAW_SPINLOCK(beat_htab_lock); |
44 | 44 | ||
45 | static inline unsigned int beat_read_mask(unsigned hpte_group) | 45 | static inline unsigned int beat_read_mask(unsigned hpte_group) |
46 | { | 46 | { |
@@ -114,18 +114,18 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group, | |||
114 | if (rflags & _PAGE_NO_CACHE) | 114 | if (rflags & _PAGE_NO_CACHE) |
115 | hpte_r &= ~_PAGE_COHERENT; | 115 | hpte_r &= ~_PAGE_COHERENT; |
116 | 116 | ||
117 | spin_lock(&beat_htab_lock); | 117 | raw_spin_lock(&beat_htab_lock); |
118 | lpar_rc = beat_read_mask(hpte_group); | 118 | lpar_rc = beat_read_mask(hpte_group); |
119 | if (lpar_rc == 0) { | 119 | if (lpar_rc == 0) { |
120 | if (!(vflags & HPTE_V_BOLTED)) | 120 | if (!(vflags & HPTE_V_BOLTED)) |
121 | DBG_LOW(" full\n"); | 121 | DBG_LOW(" full\n"); |
122 | spin_unlock(&beat_htab_lock); | 122 | raw_spin_unlock(&beat_htab_lock); |
123 | return -1; | 123 | return -1; |
124 | } | 124 | } |
125 | 125 | ||
126 | lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48, | 126 | lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48, |
127 | hpte_v, hpte_r, &slot); | 127 | hpte_v, hpte_r, &slot); |
128 | spin_unlock(&beat_htab_lock); | 128 | raw_spin_unlock(&beat_htab_lock); |
129 | 129 | ||
130 | /* | 130 | /* |
131 | * Since we try and ioremap PHBs we don't own, the pte insert | 131 | * Since we try and ioremap PHBs we don't own, the pte insert |
@@ -198,17 +198,17 @@ static long beat_lpar_hpte_updatepp(unsigned long slot, | |||
198 | "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ", | 198 | "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ", |
199 | want_v & HPTE_V_AVPN, slot, psize, newpp); | 199 | want_v & HPTE_V_AVPN, slot, psize, newpp); |
200 | 200 | ||
201 | spin_lock(&beat_htab_lock); | 201 | raw_spin_lock(&beat_htab_lock); |
202 | dummy0 = beat_lpar_hpte_getword0(slot); | 202 | dummy0 = beat_lpar_hpte_getword0(slot); |
203 | if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) { | 203 | if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) { |
204 | DBG_LOW("not found !\n"); | 204 | DBG_LOW("not found !\n"); |
205 | spin_unlock(&beat_htab_lock); | 205 | raw_spin_unlock(&beat_htab_lock); |
206 | return -1; | 206 | return -1; |
207 | } | 207 | } |
208 | 208 | ||
209 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0, | 209 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0, |
210 | &dummy1); | 210 | &dummy1); |
211 | spin_unlock(&beat_htab_lock); | 211 | raw_spin_unlock(&beat_htab_lock); |
212 | if (lpar_rc != 0 || dummy0 == 0) { | 212 | if (lpar_rc != 0 || dummy0 == 0) { |
213 | DBG_LOW("not found !\n"); | 213 | DBG_LOW("not found !\n"); |
214 | return -1; | 214 | return -1; |
@@ -262,13 +262,13 @@ static void beat_lpar_hpte_updateboltedpp(unsigned long newpp, | |||
262 | vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M); | 262 | vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M); |
263 | va = (vsid << 28) | (ea & 0x0fffffff); | 263 | va = (vsid << 28) | (ea & 0x0fffffff); |
264 | 264 | ||
265 | spin_lock(&beat_htab_lock); | 265 | raw_spin_lock(&beat_htab_lock); |
266 | slot = beat_lpar_hpte_find(va, psize); | 266 | slot = beat_lpar_hpte_find(va, psize); |
267 | BUG_ON(slot == -1); | 267 | BUG_ON(slot == -1); |
268 | 268 | ||
269 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, | 269 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, |
270 | &dummy0, &dummy1); | 270 | &dummy0, &dummy1); |
271 | spin_unlock(&beat_htab_lock); | 271 | raw_spin_unlock(&beat_htab_lock); |
272 | 272 | ||
273 | BUG_ON(lpar_rc != 0); | 273 | BUG_ON(lpar_rc != 0); |
274 | } | 274 | } |
@@ -285,18 +285,18 @@ static void beat_lpar_hpte_invalidate(unsigned long slot, unsigned long va, | |||
285 | slot, va, psize, local); | 285 | slot, va, psize, local); |
286 | want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M); | 286 | want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M); |
287 | 287 | ||
288 | spin_lock_irqsave(&beat_htab_lock, flags); | 288 | raw_spin_lock_irqsave(&beat_htab_lock, flags); |
289 | dummy1 = beat_lpar_hpte_getword0(slot); | 289 | dummy1 = beat_lpar_hpte_getword0(slot); |
290 | 290 | ||
291 | if ((dummy1 & ~0x7FUL) != (want_v & ~0x7FUL)) { | 291 | if ((dummy1 & ~0x7FUL) != (want_v & ~0x7FUL)) { |
292 | DBG_LOW("not found !\n"); | 292 | DBG_LOW("not found !\n"); |
293 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 293 | raw_spin_unlock_irqrestore(&beat_htab_lock, flags); |
294 | return; | 294 | return; |
295 | } | 295 | } |
296 | 296 | ||
297 | lpar_rc = beat_write_htab_entry(0, slot, 0, 0, HPTE_V_VALID, 0, | 297 | lpar_rc = beat_write_htab_entry(0, slot, 0, 0, HPTE_V_VALID, 0, |
298 | &dummy1, &dummy2); | 298 | &dummy1, &dummy2); |
299 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 299 | raw_spin_unlock_irqrestore(&beat_htab_lock, flags); |
300 | 300 | ||
301 | BUG_ON(lpar_rc != 0); | 301 | BUG_ON(lpar_rc != 0); |
302 | } | 302 | } |
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c index 72254848a228..682af97321a8 100644 --- a/arch/powerpc/platforms/cell/beat_interrupt.c +++ b/arch/powerpc/platforms/cell/beat_interrupt.c | |||
@@ -30,7 +30,7 @@ | |||
30 | #include "beat_wrapper.h" | 30 | #include "beat_wrapper.h" |
31 | 31 | ||
32 | #define MAX_IRQS NR_IRQS | 32 | #define MAX_IRQS NR_IRQS |
33 | static DEFINE_SPINLOCK(beatic_irq_mask_lock); | 33 | static DEFINE_RAW_SPINLOCK(beatic_irq_mask_lock); |
34 | static uint64_t beatic_irq_mask_enable[(MAX_IRQS+255)/64]; | 34 | static uint64_t beatic_irq_mask_enable[(MAX_IRQS+255)/64]; |
35 | static uint64_t beatic_irq_mask_ack[(MAX_IRQS+255)/64]; | 35 | static uint64_t beatic_irq_mask_ack[(MAX_IRQS+255)/64]; |
36 | 36 | ||
@@ -65,30 +65,30 @@ static void beatic_mask_irq(unsigned int irq_plug) | |||
65 | { | 65 | { |
66 | unsigned long flags; | 66 | unsigned long flags; |
67 | 67 | ||
68 | spin_lock_irqsave(&beatic_irq_mask_lock, flags); | 68 | raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags); |
69 | beatic_irq_mask_enable[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64))); | 69 | beatic_irq_mask_enable[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64))); |
70 | beatic_update_irq_mask(irq_plug); | 70 | beatic_update_irq_mask(irq_plug); |
71 | spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); | 71 | raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); |
72 | } | 72 | } |
73 | 73 | ||
74 | static void beatic_unmask_irq(unsigned int irq_plug) | 74 | static void beatic_unmask_irq(unsigned int irq_plug) |
75 | { | 75 | { |
76 | unsigned long flags; | 76 | unsigned long flags; |
77 | 77 | ||
78 | spin_lock_irqsave(&beatic_irq_mask_lock, flags); | 78 | raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags); |
79 | beatic_irq_mask_enable[irq_plug/64] |= 1UL << (63 - (irq_plug%64)); | 79 | beatic_irq_mask_enable[irq_plug/64] |= 1UL << (63 - (irq_plug%64)); |
80 | beatic_update_irq_mask(irq_plug); | 80 | beatic_update_irq_mask(irq_plug); |
81 | spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); | 81 | raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); |
82 | } | 82 | } |
83 | 83 | ||
84 | static void beatic_ack_irq(unsigned int irq_plug) | 84 | static void beatic_ack_irq(unsigned int irq_plug) |
85 | { | 85 | { |
86 | unsigned long flags; | 86 | unsigned long flags; |
87 | 87 | ||
88 | spin_lock_irqsave(&beatic_irq_mask_lock, flags); | 88 | raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags); |
89 | beatic_irq_mask_ack[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64))); | 89 | beatic_irq_mask_ack[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64))); |
90 | beatic_update_irq_mask(irq_plug); | 90 | beatic_update_irq_mask(irq_plug); |
91 | spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); | 91 | raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); |
92 | } | 92 | } |
93 | 93 | ||
94 | static void beatic_end_irq(unsigned int irq_plug) | 94 | static void beatic_end_irq(unsigned int irq_plug) |
@@ -103,14 +103,14 @@ static void beatic_end_irq(unsigned int irq_plug) | |||
103 | 103 | ||
104 | printk(KERN_ERR "IRQ over-downcounted, plug %d\n", irq_plug); | 104 | printk(KERN_ERR "IRQ over-downcounted, plug %d\n", irq_plug); |
105 | } | 105 | } |
106 | spin_lock_irqsave(&beatic_irq_mask_lock, flags); | 106 | raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags); |
107 | beatic_irq_mask_ack[irq_plug/64] |= 1UL << (63 - (irq_plug%64)); | 107 | beatic_irq_mask_ack[irq_plug/64] |= 1UL << (63 - (irq_plug%64)); |
108 | beatic_update_irq_mask(irq_plug); | 108 | beatic_update_irq_mask(irq_plug); |
109 | spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); | 109 | raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); |
110 | } | 110 | } |
111 | 111 | ||
112 | static struct irq_chip beatic_pic = { | 112 | static struct irq_chip beatic_pic = { |
113 | .typename = " CELL-BEAT ", | 113 | .name = "CELL-BEAT", |
114 | .unmask = beatic_unmask_irq, | 114 | .unmask = beatic_unmask_irq, |
115 | .mask = beatic_mask_irq, | 115 | .mask = beatic_mask_irq, |
116 | .eoi = beatic_end_irq, | 116 | .eoi = beatic_end_irq, |
@@ -136,7 +136,7 @@ static void beatic_pic_host_unmap(struct irq_host *h, unsigned int virq) | |||
136 | static int beatic_pic_host_map(struct irq_host *h, unsigned int virq, | 136 | static int beatic_pic_host_map(struct irq_host *h, unsigned int virq, |
137 | irq_hw_number_t hw) | 137 | irq_hw_number_t hw) |
138 | { | 138 | { |
139 | struct irq_desc *desc = get_irq_desc(virq); | 139 | struct irq_desc *desc = irq_to_desc(virq); |
140 | int64_t err; | 140 | int64_t err; |
141 | 141 | ||
142 | err = beat_construct_and_connect_irq_plug(virq, hw); | 142 | err = beat_construct_and_connect_irq_plug(virq, hw); |
@@ -166,11 +166,11 @@ static void beatic_pic_host_remap(struct irq_host *h, unsigned int virq, | |||
166 | * Note: We have only 1 entry to translate. | 166 | * Note: We have only 1 entry to translate. |
167 | */ | 167 | */ |
168 | static int beatic_pic_host_xlate(struct irq_host *h, struct device_node *ct, | 168 | static int beatic_pic_host_xlate(struct irq_host *h, struct device_node *ct, |
169 | u32 *intspec, unsigned int intsize, | 169 | const u32 *intspec, unsigned int intsize, |
170 | irq_hw_number_t *out_hwirq, | 170 | irq_hw_number_t *out_hwirq, |
171 | unsigned int *out_flags) | 171 | unsigned int *out_flags) |
172 | { | 172 | { |
173 | u64 *intspec2 = (u64 *)intspec; | 173 | const u64 *intspec2 = (const u64 *)intspec; |
174 | 174 | ||
175 | *out_hwirq = *intspec2; | 175 | *out_hwirq = *intspec2; |
176 | *out_flags |= IRQ_TYPE_LEVEL_LOW; | 176 | *out_flags |= IRQ_TYPE_LEVEL_LOW; |
diff --git a/arch/powerpc/platforms/cell/cbe_powerbutton.c b/arch/powerpc/platforms/cell/cbe_powerbutton.c index dcddaa5fcb66..f75a4daa4ca2 100644 --- a/arch/powerpc/platforms/cell/cbe_powerbutton.c +++ b/arch/powerpc/platforms/cell/cbe_powerbutton.c | |||
@@ -48,7 +48,7 @@ static int __init cbe_powerbutton_init(void) | |||
48 | int ret = 0; | 48 | int ret = 0; |
49 | struct input_dev *dev; | 49 | struct input_dev *dev; |
50 | 50 | ||
51 | if (!machine_is_compatible("IBM,CBPLUS-1.0")) { | 51 | if (!of_machine_is_compatible("IBM,CBPLUS-1.0")) { |
52 | printk(KERN_ERR "%s: Not a cell blade.\n", __func__); | 52 | printk(KERN_ERR "%s: Not a cell blade.\n", __func__); |
53 | ret = -ENODEV; | 53 | ret = -ENODEV; |
54 | goto out; | 54 | goto out; |
diff --git a/arch/powerpc/platforms/cell/celleb_pci.c b/arch/powerpc/platforms/cell/celleb_pci.c index 00eaaa71630f..404d1fc04d59 100644 --- a/arch/powerpc/platforms/cell/celleb_pci.c +++ b/arch/powerpc/platforms/cell/celleb_pci.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <linux/pci_regs.h> | 33 | #include <linux/pci_regs.h> |
34 | #include <linux/of.h> | 34 | #include <linux/of.h> |
35 | #include <linux/of_device.h> | 35 | #include <linux/of_device.h> |
36 | #include <linux/slab.h> | ||
36 | 37 | ||
37 | #include <asm/io.h> | 38 | #include <asm/io.h> |
38 | #include <asm/irq.h> | 39 | #include <asm/irq.h> |
diff --git a/arch/powerpc/platforms/cell/celleb_scc_pciex.c b/arch/powerpc/platforms/cell/celleb_scc_pciex.c index 7fca09f990ba..a881bbee8de0 100644 --- a/arch/powerpc/platforms/cell/celleb_scc_pciex.c +++ b/arch/powerpc/platforms/cell/celleb_scc_pciex.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/kernel.h> | 23 | #include <linux/kernel.h> |
24 | #include <linux/pci.h> | 24 | #include <linux/pci.h> |
25 | #include <linux/string.h> | 25 | #include <linux/string.h> |
26 | #include <linux/slab.h> | ||
26 | #include <linux/init.h> | 27 | #include <linux/init.h> |
27 | #include <linux/bootmem.h> | 28 | #include <linux/bootmem.h> |
28 | #include <linux/delay.h> | 29 | #include <linux/delay.h> |
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c index 882e47080e74..10eb1a443626 100644 --- a/arch/powerpc/platforms/cell/interrupt.c +++ b/arch/powerpc/platforms/cell/interrupt.c | |||
@@ -54,7 +54,7 @@ struct iic { | |||
54 | struct device_node *node; | 54 | struct device_node *node; |
55 | }; | 55 | }; |
56 | 56 | ||
57 | static DEFINE_PER_CPU(struct iic, iic); | 57 | static DEFINE_PER_CPU(struct iic, cpu_iic); |
58 | #define IIC_NODE_COUNT 2 | 58 | #define IIC_NODE_COUNT 2 |
59 | static struct irq_host *iic_host; | 59 | static struct irq_host *iic_host; |
60 | 60 | ||
@@ -82,13 +82,13 @@ static void iic_unmask(unsigned int irq) | |||
82 | 82 | ||
83 | static void iic_eoi(unsigned int irq) | 83 | static void iic_eoi(unsigned int irq) |
84 | { | 84 | { |
85 | struct iic *iic = &__get_cpu_var(iic); | 85 | struct iic *iic = &__get_cpu_var(cpu_iic); |
86 | out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]); | 86 | out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]); |
87 | BUG_ON(iic->eoi_ptr < 0); | 87 | BUG_ON(iic->eoi_ptr < 0); |
88 | } | 88 | } |
89 | 89 | ||
90 | static struct irq_chip iic_chip = { | 90 | static struct irq_chip iic_chip = { |
91 | .typename = " CELL-IIC ", | 91 | .name = "CELL-IIC", |
92 | .mask = iic_mask, | 92 | .mask = iic_mask, |
93 | .unmask = iic_unmask, | 93 | .unmask = iic_unmask, |
94 | .eoi = iic_eoi, | 94 | .eoi = iic_eoi, |
@@ -133,7 +133,7 @@ static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc) | |||
133 | 133 | ||
134 | 134 | ||
135 | static struct irq_chip iic_ioexc_chip = { | 135 | static struct irq_chip iic_ioexc_chip = { |
136 | .typename = " CELL-IOEX", | 136 | .name = "CELL-IOEX", |
137 | .mask = iic_mask, | 137 | .mask = iic_mask, |
138 | .unmask = iic_unmask, | 138 | .unmask = iic_unmask, |
139 | .eoi = iic_ioexc_eoi, | 139 | .eoi = iic_ioexc_eoi, |
@@ -146,7 +146,7 @@ static unsigned int iic_get_irq(void) | |||
146 | struct iic *iic; | 146 | struct iic *iic; |
147 | unsigned int virq; | 147 | unsigned int virq; |
148 | 148 | ||
149 | iic = &__get_cpu_var(iic); | 149 | iic = &__get_cpu_var(cpu_iic); |
150 | *(unsigned long *) &pending = | 150 | *(unsigned long *) &pending = |
151 | in_be64((u64 __iomem *) &iic->regs->pending_destr); | 151 | in_be64((u64 __iomem *) &iic->regs->pending_destr); |
152 | if (!(pending.flags & CBE_IIC_IRQ_VALID)) | 152 | if (!(pending.flags & CBE_IIC_IRQ_VALID)) |
@@ -161,12 +161,12 @@ static unsigned int iic_get_irq(void) | |||
161 | 161 | ||
162 | void iic_setup_cpu(void) | 162 | void iic_setup_cpu(void) |
163 | { | 163 | { |
164 | out_be64(&__get_cpu_var(iic).regs->prio, 0xff); | 164 | out_be64(&__get_cpu_var(cpu_iic).regs->prio, 0xff); |
165 | } | 165 | } |
166 | 166 | ||
167 | u8 iic_get_target_id(int cpu) | 167 | u8 iic_get_target_id(int cpu) |
168 | { | 168 | { |
169 | return per_cpu(iic, cpu).target_id; | 169 | return per_cpu(cpu_iic, cpu).target_id; |
170 | } | 170 | } |
171 | 171 | ||
172 | EXPORT_SYMBOL_GPL(iic_get_target_id); | 172 | EXPORT_SYMBOL_GPL(iic_get_target_id); |
@@ -181,7 +181,7 @@ static inline int iic_ipi_to_irq(int ipi) | |||
181 | 181 | ||
182 | void iic_cause_IPI(int cpu, int mesg) | 182 | void iic_cause_IPI(int cpu, int mesg) |
183 | { | 183 | { |
184 | out_be64(&per_cpu(iic, cpu).regs->generate, (0xf - mesg) << 4); | 184 | out_be64(&per_cpu(cpu_iic, cpu).regs->generate, (0xf - mesg) << 4); |
185 | } | 185 | } |
186 | 186 | ||
187 | struct irq_host *iic_get_irq_host(int node) | 187 | struct irq_host *iic_get_irq_host(int node) |
@@ -237,7 +237,7 @@ extern int noirqdebug; | |||
237 | 237 | ||
238 | static void handle_iic_irq(unsigned int irq, struct irq_desc *desc) | 238 | static void handle_iic_irq(unsigned int irq, struct irq_desc *desc) |
239 | { | 239 | { |
240 | spin_lock(&desc->lock); | 240 | raw_spin_lock(&desc->lock); |
241 | 241 | ||
242 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 242 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
243 | 243 | ||
@@ -265,18 +265,18 @@ static void handle_iic_irq(unsigned int irq, struct irq_desc *desc) | |||
265 | goto out_eoi; | 265 | goto out_eoi; |
266 | 266 | ||
267 | desc->status &= ~IRQ_PENDING; | 267 | desc->status &= ~IRQ_PENDING; |
268 | spin_unlock(&desc->lock); | 268 | raw_spin_unlock(&desc->lock); |
269 | action_ret = handle_IRQ_event(irq, action); | 269 | action_ret = handle_IRQ_event(irq, action); |
270 | if (!noirqdebug) | 270 | if (!noirqdebug) |
271 | note_interrupt(irq, desc, action_ret); | 271 | note_interrupt(irq, desc, action_ret); |
272 | spin_lock(&desc->lock); | 272 | raw_spin_lock(&desc->lock); |
273 | 273 | ||
274 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | 274 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); |
275 | 275 | ||
276 | desc->status &= ~IRQ_INPROGRESS; | 276 | desc->status &= ~IRQ_INPROGRESS; |
277 | out_eoi: | 277 | out_eoi: |
278 | desc->chip->eoi(irq); | 278 | desc->chip->eoi(irq); |
279 | spin_unlock(&desc->lock); | 279 | raw_spin_unlock(&desc->lock); |
280 | } | 280 | } |
281 | 281 | ||
282 | static int iic_host_map(struct irq_host *h, unsigned int virq, | 282 | static int iic_host_map(struct irq_host *h, unsigned int virq, |
@@ -297,7 +297,7 @@ static int iic_host_map(struct irq_host *h, unsigned int virq, | |||
297 | } | 297 | } |
298 | 298 | ||
299 | static int iic_host_xlate(struct irq_host *h, struct device_node *ct, | 299 | static int iic_host_xlate(struct irq_host *h, struct device_node *ct, |
300 | u32 *intspec, unsigned int intsize, | 300 | const u32 *intspec, unsigned int intsize, |
301 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | 301 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
302 | 302 | ||
303 | { | 303 | { |
@@ -348,7 +348,7 @@ static void __init init_one_iic(unsigned int hw_cpu, unsigned long addr, | |||
348 | /* XXX FIXME: should locate the linux CPU number from the HW cpu | 348 | /* XXX FIXME: should locate the linux CPU number from the HW cpu |
349 | * number properly. We are lucky for now | 349 | * number properly. We are lucky for now |
350 | */ | 350 | */ |
351 | struct iic *iic = &per_cpu(iic, hw_cpu); | 351 | struct iic *iic = &per_cpu(cpu_iic, hw_cpu); |
352 | 352 | ||
353 | iic->regs = ioremap(addr, sizeof(struct cbe_iic_thread_regs)); | 353 | iic->regs = ioremap(addr, sizeof(struct cbe_iic_thread_regs)); |
354 | BUG_ON(iic->regs == NULL); | 354 | BUG_ON(iic->regs == NULL); |
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c index ca5bfdfe47f2..e3ec4976fae7 100644 --- a/arch/powerpc/platforms/cell/iommu.c +++ b/arch/powerpc/platforms/cell/iommu.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/notifier.h> | 28 | #include <linux/notifier.h> |
29 | #include <linux/of.h> | 29 | #include <linux/of.h> |
30 | #include <linux/of_platform.h> | 30 | #include <linux/of_platform.h> |
31 | #include <linux/slab.h> | ||
31 | #include <linux/lmb.h> | 32 | #include <linux/lmb.h> |
32 | 33 | ||
33 | #include <asm/prom.h> | 34 | #include <asm/prom.h> |
diff --git a/arch/powerpc/platforms/cell/ras.c b/arch/powerpc/platforms/cell/ras.c index 5e0a191764fc..1d3c4effea10 100644 --- a/arch/powerpc/platforms/cell/ras.c +++ b/arch/powerpc/platforms/cell/ras.c | |||
@@ -11,6 +11,7 @@ | |||
11 | 11 | ||
12 | #include <linux/types.h> | 12 | #include <linux/types.h> |
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/slab.h> | ||
14 | #include <linux/smp.h> | 15 | #include <linux/smp.h> |
15 | #include <linux/reboot.h> | 16 | #include <linux/reboot.h> |
16 | #include <linux/kexec.h> | 17 | #include <linux/kexec.h> |
@@ -255,7 +256,7 @@ static int __init cbe_sysreset_init(void) | |||
255 | { | 256 | { |
256 | struct cbe_pmd_regs __iomem *regs; | 257 | struct cbe_pmd_regs __iomem *regs; |
257 | 258 | ||
258 | sysreset_hack = machine_is_compatible("IBM,CBPLUS-1.0"); | 259 | sysreset_hack = of_machine_is_compatible("IBM,CBPLUS-1.0"); |
259 | if (!sysreset_hack) | 260 | if (!sysreset_hack) |
260 | return 0; | 261 | return 0; |
261 | 262 | ||
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c index 59305369f6b2..50385db586bd 100644 --- a/arch/powerpc/platforms/cell/setup.c +++ b/arch/powerpc/platforms/cell/setup.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/mm.h> | 19 | #include <linux/mm.h> |
20 | #include <linux/stddef.h> | 20 | #include <linux/stddef.h> |
21 | #include <linux/unistd.h> | 21 | #include <linux/unistd.h> |
22 | #include <linux/slab.h> | ||
23 | #include <linux/user.h> | 22 | #include <linux/user.h> |
24 | #include <linux/reboot.h> | 23 | #include <linux/reboot.h> |
25 | #include <linux/init.h> | 24 | #include <linux/init.h> |
diff --git a/arch/powerpc/platforms/cell/spider-pci.c b/arch/powerpc/platforms/cell/spider-pci.c index 5122ec145271..ca7731c0b595 100644 --- a/arch/powerpc/platforms/cell/spider-pci.c +++ b/arch/powerpc/platforms/cell/spider-pci.c | |||
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | #include <linux/kernel.h> | 23 | #include <linux/kernel.h> |
24 | #include <linux/of_platform.h> | 24 | #include <linux/of_platform.h> |
25 | #include <linux/slab.h> | ||
25 | #include <linux/io.h> | 26 | #include <linux/io.h> |
26 | 27 | ||
27 | #include <asm/ppc-pci.h> | 28 | #include <asm/ppc-pci.h> |
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index 4e5655624ae8..5876e888e412 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c | |||
@@ -102,7 +102,7 @@ static void spider_ack_irq(unsigned int virq) | |||
102 | 102 | ||
103 | /* Reset edge detection logic if necessary | 103 | /* Reset edge detection logic if necessary |
104 | */ | 104 | */ |
105 | if (get_irq_desc(virq)->status & IRQ_LEVEL) | 105 | if (irq_to_desc(virq)->status & IRQ_LEVEL) |
106 | return; | 106 | return; |
107 | 107 | ||
108 | /* Only interrupts 47 to 50 can be set to edge */ | 108 | /* Only interrupts 47 to 50 can be set to edge */ |
@@ -119,7 +119,7 @@ static int spider_set_irq_type(unsigned int virq, unsigned int type) | |||
119 | struct spider_pic *pic = spider_virq_to_pic(virq); | 119 | struct spider_pic *pic = spider_virq_to_pic(virq); |
120 | unsigned int hw = irq_map[virq].hwirq; | 120 | unsigned int hw = irq_map[virq].hwirq; |
121 | void __iomem *cfg = spider_get_irq_config(pic, hw); | 121 | void __iomem *cfg = spider_get_irq_config(pic, hw); |
122 | struct irq_desc *desc = get_irq_desc(virq); | 122 | struct irq_desc *desc = irq_to_desc(virq); |
123 | u32 old_mask; | 123 | u32 old_mask; |
124 | u32 ic; | 124 | u32 ic; |
125 | 125 | ||
@@ -168,7 +168,7 @@ static int spider_set_irq_type(unsigned int virq, unsigned int type) | |||
168 | } | 168 | } |
169 | 169 | ||
170 | static struct irq_chip spider_pic = { | 170 | static struct irq_chip spider_pic = { |
171 | .typename = " SPIDER ", | 171 | .name = "SPIDER", |
172 | .unmask = spider_unmask_irq, | 172 | .unmask = spider_unmask_irq, |
173 | .mask = spider_mask_irq, | 173 | .mask = spider_mask_irq, |
174 | .ack = spider_ack_irq, | 174 | .ack = spider_ack_irq, |
@@ -187,7 +187,7 @@ static int spider_host_map(struct irq_host *h, unsigned int virq, | |||
187 | } | 187 | } |
188 | 188 | ||
189 | static int spider_host_xlate(struct irq_host *h, struct device_node *ct, | 189 | static int spider_host_xlate(struct irq_host *h, struct device_node *ct, |
190 | u32 *intspec, unsigned int intsize, | 190 | const u32 *intspec, unsigned int intsize, |
191 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | 191 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
192 | 192 | ||
193 | { | 193 | { |
diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c index 4c506c1463cd..f465d474ad9b 100644 --- a/arch/powerpc/platforms/cell/spu_manage.c +++ b/arch/powerpc/platforms/cell/spu_manage.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <linux/list.h> | 23 | #include <linux/list.h> |
24 | #include <linux/module.h> | 24 | #include <linux/module.h> |
25 | #include <linux/ptrace.h> | 25 | #include <linux/ptrace.h> |
26 | #include <linux/slab.h> | ||
27 | #include <linux/wait.h> | 26 | #include <linux/wait.h> |
28 | #include <linux/mm.h> | 27 | #include <linux/mm.h> |
29 | #include <linux/io.h> | 28 | #include <linux/io.h> |
@@ -457,7 +456,7 @@ neighbour_spu(int cbe, struct device_node *target, struct device_node *avoid) | |||
457 | continue; | 456 | continue; |
458 | vic_handles = of_get_property(spu_dn, "vicinity", &lenp); | 457 | vic_handles = of_get_property(spu_dn, "vicinity", &lenp); |
459 | for (i=0; i < (lenp / sizeof(phandle)); i++) { | 458 | for (i=0; i < (lenp / sizeof(phandle)); i++) { |
460 | if (vic_handles[i] == target->linux_phandle) | 459 | if (vic_handles[i] == target->phandle) |
461 | return spu; | 460 | return spu; |
462 | } | 461 | } |
463 | } | 462 | } |
@@ -499,7 +498,7 @@ static void init_affinity_node(int cbe) | |||
499 | 498 | ||
500 | if (strcmp(name, "spe") == 0) { | 499 | if (strcmp(name, "spe") == 0) { |
501 | spu = devnode_spu(cbe, vic_dn); | 500 | spu = devnode_spu(cbe, vic_dn); |
502 | avoid_ph = last_spu_dn->linux_phandle; | 501 | avoid_ph = last_spu_dn->phandle; |
503 | } else { | 502 | } else { |
504 | /* | 503 | /* |
505 | * "mic-tm" and "bif0" nodes do not have | 504 | * "mic-tm" and "bif0" nodes do not have |
@@ -514,7 +513,7 @@ static void init_affinity_node(int cbe) | |||
514 | last_spu->has_mem_affinity = 1; | 513 | last_spu->has_mem_affinity = 1; |
515 | spu->has_mem_affinity = 1; | 514 | spu->has_mem_affinity = 1; |
516 | } | 515 | } |
517 | avoid_ph = vic_dn->linux_phandle; | 516 | avoid_ph = vic_dn->phandle; |
518 | } | 517 | } |
519 | 518 | ||
520 | list_add_tail(&spu->aff_list, &last_spu->aff_list); | 519 | list_add_tail(&spu->aff_list, &last_spu->aff_list); |
diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.c b/arch/powerpc/platforms/cell/spu_priv1_mmio.c index 1410443731eb..121aec353f26 100644 --- a/arch/powerpc/platforms/cell/spu_priv1_mmio.c +++ b/arch/powerpc/platforms/cell/spu_priv1_mmio.c | |||
@@ -22,7 +22,6 @@ | |||
22 | #include <linux/list.h> | 22 | #include <linux/list.h> |
23 | #include <linux/module.h> | 23 | #include <linux/module.h> |
24 | #include <linux/ptrace.h> | 24 | #include <linux/ptrace.h> |
25 | #include <linux/slab.h> | ||
26 | #include <linux/wait.h> | 25 | #include <linux/wait.h> |
27 | #include <linux/mm.h> | 26 | #include <linux/mm.h> |
28 | #include <linux/io.h> | 27 | #include <linux/io.h> |
diff --git a/arch/powerpc/platforms/cell/spufs/Makefile b/arch/powerpc/platforms/cell/spufs/Makefile index b93f877ba504..b9d5d678aa44 100644 --- a/arch/powerpc/platforms/cell/spufs/Makefile +++ b/arch/powerpc/platforms/cell/spufs/Makefile | |||
@@ -13,10 +13,8 @@ SPU_CC := $(SPU_CROSS)gcc | |||
13 | SPU_AS := $(SPU_CROSS)gcc | 13 | SPU_AS := $(SPU_CROSS)gcc |
14 | SPU_LD := $(SPU_CROSS)ld | 14 | SPU_LD := $(SPU_CROSS)ld |
15 | SPU_OBJCOPY := $(SPU_CROSS)objcopy | 15 | SPU_OBJCOPY := $(SPU_CROSS)objcopy |
16 | SPU_CFLAGS := -O2 -Wall -I$(srctree)/include \ | 16 | SPU_CFLAGS := -O2 -Wall -I$(srctree)/include -D__KERNEL__ |
17 | -I$(objtree)/include2 -D__KERNEL__ | 17 | SPU_AFLAGS := -c -D__ASSEMBLY__ -I$(srctree)/include -D__KERNEL__ |
18 | SPU_AFLAGS := -c -D__ASSEMBLY__ -I$(srctree)/include \ | ||
19 | -I$(objtree)/include2 -D__KERNEL__ | ||
20 | SPU_LDFLAGS := -N -Ttext=0x0 | 18 | SPU_LDFLAGS := -N -Ttext=0x0 |
21 | 19 | ||
22 | $(obj)/switch.o: $(obj)/spu_save_dump.h $(obj)/spu_restore_dump.h | 20 | $(obj)/switch.o: $(obj)/spu_save_dump.h $(obj)/spu_restore_dump.h |
diff --git a/arch/powerpc/platforms/cell/spufs/coredump.c b/arch/powerpc/platforms/cell/spufs/coredump.c index c4d4a19235e0..6cf3ec628527 100644 --- a/arch/powerpc/platforms/cell/spufs/coredump.c +++ b/arch/powerpc/platforms/cell/spufs/coredump.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/file.h> | 24 | #include <linux/file.h> |
25 | #include <linux/fdtable.h> | 25 | #include <linux/fdtable.h> |
26 | #include <linux/fs.h> | 26 | #include <linux/fs.h> |
27 | #include <linux/gfp.h> | ||
27 | #include <linux/list.h> | 28 | #include <linux/list.h> |
28 | #include <linux/module.h> | 29 | #include <linux/module.h> |
29 | #include <linux/syscalls.h> | 30 | #include <linux/syscalls.h> |
@@ -54,7 +55,7 @@ static ssize_t do_coredump_read(int num, struct spu_context *ctx, void *buffer, | |||
54 | */ | 55 | */ |
55 | static int spufs_dump_write(struct file *file, const void *addr, int nr, loff_t *foffset) | 56 | static int spufs_dump_write(struct file *file, const void *addr, int nr, loff_t *foffset) |
56 | { | 57 | { |
57 | unsigned long limit = current->signal->rlim[RLIMIT_CORE].rlim_cur; | 58 | unsigned long limit = rlimit(RLIMIT_CORE); |
58 | ssize_t written; | 59 | ssize_t written; |
59 | 60 | ||
60 | if (*foffset + nr > limit) | 61 | if (*foffset + nr > limit) |
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c index 884e8bcec499..5c2808252516 100644 --- a/arch/powerpc/platforms/cell/spufs/file.c +++ b/arch/powerpc/platforms/cell/spufs/file.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/poll.h> | 29 | #include <linux/poll.h> |
30 | #include <linux/ptrace.h> | 30 | #include <linux/ptrace.h> |
31 | #include <linux/seq_file.h> | 31 | #include <linux/seq_file.h> |
32 | #include <linux/slab.h> | ||
32 | 33 | ||
33 | #include <asm/io.h> | 34 | #include <asm/io.h> |
34 | #include <asm/time.h> | 35 | #include <asm/time.h> |
@@ -2494,7 +2495,7 @@ static ssize_t spufs_switch_log_read(struct file *file, char __user *buf, | |||
2494 | struct spu_context *ctx = SPUFS_I(inode)->i_ctx; | 2495 | struct spu_context *ctx = SPUFS_I(inode)->i_ctx; |
2495 | int error = 0, cnt = 0; | 2496 | int error = 0, cnt = 0; |
2496 | 2497 | ||
2497 | if (!buf || len < 0) | 2498 | if (!buf) |
2498 | return -EINVAL; | 2499 | return -EINVAL; |
2499 | 2500 | ||
2500 | error = spu_acquire(ctx); | 2501 | error = spu_acquire(ctx); |
diff --git a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c index 0e9f325c9ff7..a101abf17504 100644 --- a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c +++ b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c | |||
@@ -22,6 +22,7 @@ | |||
22 | 22 | ||
23 | #include <linux/kernel.h> | 23 | #include <linux/kernel.h> |
24 | #include <linux/mm.h> | 24 | #include <linux/mm.h> |
25 | #include <linux/slab.h> | ||
25 | #include <linux/vmalloc.h> | 26 | #include <linux/vmalloc.h> |
26 | 27 | ||
27 | #include <asm/spu.h> | 28 | #include <asm/spu.h> |
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c index 4678078fede8..0b0466284932 100644 --- a/arch/powerpc/platforms/cell/spufs/sched.c +++ b/arch/powerpc/platforms/cell/spufs/sched.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/sched.h> | 27 | #include <linux/sched.h> |
28 | #include <linux/kernel.h> | 28 | #include <linux/kernel.h> |
29 | #include <linux/mm.h> | 29 | #include <linux/mm.h> |
30 | #include <linux/slab.h> | ||
30 | #include <linux/completion.h> | 31 | #include <linux/completion.h> |
31 | #include <linux/vmalloc.h> | 32 | #include <linux/vmalloc.h> |
32 | #include <linux/smp.h> | 33 | #include <linux/smp.h> |
diff --git a/arch/powerpc/platforms/cell/spufs/syscalls.c b/arch/powerpc/platforms/cell/spufs/syscalls.c index c23617c6baf3..187a7d32f86a 100644 --- a/arch/powerpc/platforms/cell/spufs/syscalls.c +++ b/arch/powerpc/platforms/cell/spufs/syscalls.c | |||
@@ -3,6 +3,7 @@ | |||
3 | #include <linux/module.h> | 3 | #include <linux/module.h> |
4 | #include <linux/mount.h> | 4 | #include <linux/mount.h> |
5 | #include <linux/namei.h> | 5 | #include <linux/namei.h> |
6 | #include <linux/slab.h> | ||
6 | 7 | ||
7 | #include <asm/uaccess.h> | 8 | #include <asm/uaccess.h> |
8 | 9 | ||
diff --git a/arch/powerpc/platforms/chrp/Kconfig b/arch/powerpc/platforms/chrp/Kconfig index 37d438bd5b7a..bc0b0efdc5fe 100644 --- a/arch/powerpc/platforms/chrp/Kconfig +++ b/arch/powerpc/platforms/chrp/Kconfig | |||
@@ -5,6 +5,8 @@ config PPC_CHRP | |||
5 | select PPC_I8259 | 5 | select PPC_I8259 |
6 | select PPC_INDIRECT_PCI | 6 | select PPC_INDIRECT_PCI |
7 | select PPC_RTAS | 7 | select PPC_RTAS |
8 | select PPC_RTAS_DAEMON | ||
9 | select RTAS_ERROR_LOGGING | ||
8 | select PPC_MPC106 | 10 | select PPC_MPC106 |
9 | select PPC_UDBG_16550 | 11 | select PPC_UDBG_16550 |
10 | select PPC_NATIVE | 12 | select PPC_NATIVE |
diff --git a/arch/powerpc/platforms/chrp/nvram.c b/arch/powerpc/platforms/chrp/nvram.c index 8efd4244701c..ba3588f2d8e0 100644 --- a/arch/powerpc/platforms/chrp/nvram.c +++ b/arch/powerpc/platforms/chrp/nvram.c | |||
@@ -12,7 +12,6 @@ | |||
12 | 12 | ||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/slab.h> | ||
16 | #include <linux/spinlock.h> | 15 | #include <linux/spinlock.h> |
17 | #include <asm/uaccess.h> | 16 | #include <asm/uaccess.h> |
18 | #include <asm/prom.h> | 17 | #include <asm/prom.h> |
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c index cd4ad9aea760..8553cc49e0d6 100644 --- a/arch/powerpc/platforms/chrp/setup.c +++ b/arch/powerpc/platforms/chrp/setup.c | |||
@@ -15,7 +15,6 @@ | |||
15 | #include <linux/stddef.h> | 15 | #include <linux/stddef.h> |
16 | #include <linux/unistd.h> | 16 | #include <linux/unistd.h> |
17 | #include <linux/ptrace.h> | 17 | #include <linux/ptrace.h> |
18 | #include <linux/slab.h> | ||
19 | #include <linux/user.h> | 18 | #include <linux/user.h> |
20 | #include <linux/tty.h> | 19 | #include <linux/tty.h> |
21 | #include <linux/major.h> | 20 | #include <linux/major.h> |
@@ -23,7 +22,7 @@ | |||
23 | #include <linux/reboot.h> | 22 | #include <linux/reboot.h> |
24 | #include <linux/init.h> | 23 | #include <linux/init.h> |
25 | #include <linux/pci.h> | 24 | #include <linux/pci.h> |
26 | #include <linux/utsrelease.h> | 25 | #include <generated/utsrelease.h> |
27 | #include <linux/adb.h> | 26 | #include <linux/adb.h> |
28 | #include <linux/module.h> | 27 | #include <linux/module.h> |
29 | #include <linux/delay.h> | 28 | #include <linux/delay.h> |
@@ -364,19 +363,6 @@ void __init chrp_setup_arch(void) | |||
364 | if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0); | 363 | if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0); |
365 | } | 364 | } |
366 | 365 | ||
367 | void | ||
368 | chrp_event_scan(unsigned long unused) | ||
369 | { | ||
370 | unsigned char log[1024]; | ||
371 | int ret = 0; | ||
372 | |||
373 | /* XXX: we should loop until the hardware says no more error logs -- Cort */ | ||
374 | rtas_call(rtas_token("event-scan"), 4, 1, &ret, 0xffffffff, 0, | ||
375 | __pa(log), 1024); | ||
376 | mod_timer(&__get_cpu_var(heartbeat_timer), | ||
377 | jiffies + event_scan_interval); | ||
378 | } | ||
379 | |||
380 | static void chrp_8259_cascade(unsigned int irq, struct irq_desc *desc) | 366 | static void chrp_8259_cascade(unsigned int irq, struct irq_desc *desc) |
381 | { | 367 | { |
382 | unsigned int cascade_irq = i8259_irq(); | 368 | unsigned int cascade_irq = i8259_irq(); |
@@ -568,9 +554,6 @@ void __init chrp_init_IRQ(void) | |||
568 | void __init | 554 | void __init |
569 | chrp_init2(void) | 555 | chrp_init2(void) |
570 | { | 556 | { |
571 | struct device_node *device; | ||
572 | const unsigned int *p = NULL; | ||
573 | |||
574 | #ifdef CONFIG_NVRAM | 557 | #ifdef CONFIG_NVRAM |
575 | chrp_nvram_init(); | 558 | chrp_nvram_init(); |
576 | #endif | 559 | #endif |
@@ -582,40 +565,6 @@ chrp_init2(void) | |||
582 | request_region(0x80,0x10,"dma page reg"); | 565 | request_region(0x80,0x10,"dma page reg"); |
583 | request_region(0xc0,0x20,"dma2"); | 566 | request_region(0xc0,0x20,"dma2"); |
584 | 567 | ||
585 | /* Get the event scan rate for the rtas so we know how | ||
586 | * often it expects a heartbeat. -- Cort | ||
587 | */ | ||
588 | device = of_find_node_by_name(NULL, "rtas"); | ||
589 | if (device) | ||
590 | p = of_get_property(device, "rtas-event-scan-rate", NULL); | ||
591 | if (p && *p) { | ||
592 | /* | ||
593 | * Arrange to call chrp_event_scan at least *p times | ||
594 | * per minute. We use 59 rather than 60 here so that | ||
595 | * the rate will be slightly higher than the minimum. | ||
596 | * This all assumes we don't do hotplug CPU on any | ||
597 | * machine that needs the event scans done. | ||
598 | */ | ||
599 | unsigned long interval, offset; | ||
600 | int cpu, ncpus; | ||
601 | struct timer_list *timer; | ||
602 | |||
603 | interval = HZ * 59 / *p; | ||
604 | offset = HZ; | ||
605 | ncpus = num_online_cpus(); | ||
606 | event_scan_interval = ncpus * interval; | ||
607 | for (cpu = 0; cpu < ncpus; ++cpu) { | ||
608 | timer = &per_cpu(heartbeat_timer, cpu); | ||
609 | setup_timer(timer, chrp_event_scan, 0); | ||
610 | timer->expires = jiffies + offset; | ||
611 | add_timer_on(timer, cpu); | ||
612 | offset += interval; | ||
613 | } | ||
614 | printk("RTAS Event Scan Rate: %u (%lu jiffies)\n", | ||
615 | *p, interval); | ||
616 | } | ||
617 | of_node_put(device); | ||
618 | |||
619 | if (ppc_md.progress) | 568 | if (ppc_md.progress) |
620 | ppc_md.progress(" Have fun! ", 0x7777); | 569 | ppc_md.progress(" Have fun! ", 0x7777); |
621 | } | 570 | } |
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig index 291ac9d8cbee..524d971a1478 100644 --- a/arch/powerpc/platforms/embedded6xx/Kconfig +++ b/arch/powerpc/platforms/embedded6xx/Kconfig | |||
@@ -90,3 +90,36 @@ config MPC10X_OPENPIC | |||
90 | config MPC10X_STORE_GATHERING | 90 | config MPC10X_STORE_GATHERING |
91 | bool "Enable MPC10x store gathering" | 91 | bool "Enable MPC10x store gathering" |
92 | depends on MPC10X_BRIDGE | 92 | depends on MPC10X_BRIDGE |
93 | |||
94 | config GAMECUBE_COMMON | ||
95 | bool | ||
96 | |||
97 | config USBGECKO_UDBG | ||
98 | bool "USB Gecko udbg console for the Nintendo GameCube/Wii" | ||
99 | depends on GAMECUBE_COMMON | ||
100 | help | ||
101 | If you say yes to this option, support will be included for the | ||
102 | USB Gecko adapter as an udbg console. | ||
103 | The USB Gecko is a EXI to USB Serial converter that can be plugged | ||
104 | into a memcard slot in the Nintendo GameCube/Wii. | ||
105 | |||
106 | This driver bypasses the EXI layer completely. | ||
107 | |||
108 | If in doubt, say N here. | ||
109 | |||
110 | config GAMECUBE | ||
111 | bool "Nintendo-GameCube" | ||
112 | depends on EMBEDDED6xx | ||
113 | select GAMECUBE_COMMON | ||
114 | help | ||
115 | Select GAMECUBE if configuring for the Nintendo GameCube. | ||
116 | More information at: <http://gc-linux.sourceforge.net/> | ||
117 | |||
118 | config WII | ||
119 | bool "Nintendo-Wii" | ||
120 | depends on EMBEDDED6xx | ||
121 | select GAMECUBE_COMMON | ||
122 | help | ||
123 | Select WII if configuring for the Nintendo Wii. | ||
124 | More information at: <http://gc-linux.sourceforge.net/> | ||
125 | |||
diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile index 0773c08bd444..66c23e423f40 100644 --- a/arch/powerpc/platforms/embedded6xx/Makefile +++ b/arch/powerpc/platforms/embedded6xx/Makefile | |||
@@ -7,3 +7,7 @@ obj-$(CONFIG_STORCENTER) += storcenter.o | |||
7 | obj-$(CONFIG_PPC_HOLLY) += holly.o | 7 | obj-$(CONFIG_PPC_HOLLY) += holly.o |
8 | obj-$(CONFIG_PPC_PRPMC2800) += prpmc2800.o | 8 | obj-$(CONFIG_PPC_PRPMC2800) += prpmc2800.o |
9 | obj-$(CONFIG_PPC_C2K) += c2k.o | 9 | obj-$(CONFIG_PPC_C2K) += c2k.o |
10 | obj-$(CONFIG_USBGECKO_UDBG) += usbgecko_udbg.o | ||
11 | obj-$(CONFIG_GAMECUBE_COMMON) += flipper-pic.o | ||
12 | obj-$(CONFIG_GAMECUBE) += gamecube.o | ||
13 | obj-$(CONFIG_WII) += wii.o hlwd-pic.o | ||
diff --git a/arch/powerpc/platforms/embedded6xx/flipper-pic.c b/arch/powerpc/platforms/embedded6xx/flipper-pic.c new file mode 100644 index 000000000000..c278bd3a8fec --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/flipper-pic.c | |||
@@ -0,0 +1,263 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/embedded6xx/flipper-pic.c | ||
3 | * | ||
4 | * Nintendo GameCube/Wii "Flipper" interrupt controller support. | ||
5 | * Copyright (C) 2004-2009 The GameCube Linux Team | ||
6 | * Copyright (C) 2007,2008,2009 Albert Herranz | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | #define DRV_MODULE_NAME "flipper-pic" | ||
15 | #define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/irq.h> | ||
20 | #include <linux/of.h> | ||
21 | #include <asm/io.h> | ||
22 | |||
23 | #include "flipper-pic.h" | ||
24 | |||
25 | #define FLIPPER_NR_IRQS 32 | ||
26 | |||
27 | /* | ||
28 | * Each interrupt has a corresponding bit in both | ||
29 | * the Interrupt Cause (ICR) and Interrupt Mask (IMR) registers. | ||
30 | * | ||
31 | * Enabling/disabling an interrupt line involves setting/clearing | ||
32 | * the corresponding bit in IMR. | ||
33 | * Except for the RSW interrupt, all interrupts get deasserted automatically | ||
34 | * when the source deasserts the interrupt. | ||
35 | */ | ||
36 | #define FLIPPER_ICR 0x00 | ||
37 | #define FLIPPER_ICR_RSS (1<<16) /* reset switch state */ | ||
38 | |||
39 | #define FLIPPER_IMR 0x04 | ||
40 | |||
41 | #define FLIPPER_RESET 0x24 | ||
42 | |||
43 | |||
44 | /* | ||
45 | * IRQ chip hooks. | ||
46 | * | ||
47 | */ | ||
48 | |||
49 | static void flipper_pic_mask_and_ack(unsigned int virq) | ||
50 | { | ||
51 | int irq = virq_to_hw(virq); | ||
52 | void __iomem *io_base = get_irq_chip_data(virq); | ||
53 | u32 mask = 1 << irq; | ||
54 | |||
55 | clrbits32(io_base + FLIPPER_IMR, mask); | ||
56 | /* this is at least needed for RSW */ | ||
57 | out_be32(io_base + FLIPPER_ICR, mask); | ||
58 | } | ||
59 | |||
60 | static void flipper_pic_ack(unsigned int virq) | ||
61 | { | ||
62 | int irq = virq_to_hw(virq); | ||
63 | void __iomem *io_base = get_irq_chip_data(virq); | ||
64 | |||
65 | /* this is at least needed for RSW */ | ||
66 | out_be32(io_base + FLIPPER_ICR, 1 << irq); | ||
67 | } | ||
68 | |||
69 | static void flipper_pic_mask(unsigned int virq) | ||
70 | { | ||
71 | int irq = virq_to_hw(virq); | ||
72 | void __iomem *io_base = get_irq_chip_data(virq); | ||
73 | |||
74 | clrbits32(io_base + FLIPPER_IMR, 1 << irq); | ||
75 | } | ||
76 | |||
77 | static void flipper_pic_unmask(unsigned int virq) | ||
78 | { | ||
79 | int irq = virq_to_hw(virq); | ||
80 | void __iomem *io_base = get_irq_chip_data(virq); | ||
81 | |||
82 | setbits32(io_base + FLIPPER_IMR, 1 << irq); | ||
83 | } | ||
84 | |||
85 | |||
86 | static struct irq_chip flipper_pic = { | ||
87 | .name = "flipper-pic", | ||
88 | .ack = flipper_pic_ack, | ||
89 | .mask_ack = flipper_pic_mask_and_ack, | ||
90 | .mask = flipper_pic_mask, | ||
91 | .unmask = flipper_pic_unmask, | ||
92 | }; | ||
93 | |||
94 | /* | ||
95 | * IRQ host hooks. | ||
96 | * | ||
97 | */ | ||
98 | |||
99 | static struct irq_host *flipper_irq_host; | ||
100 | |||
101 | static int flipper_pic_map(struct irq_host *h, unsigned int virq, | ||
102 | irq_hw_number_t hwirq) | ||
103 | { | ||
104 | set_irq_chip_data(virq, h->host_data); | ||
105 | irq_to_desc(virq)->status |= IRQ_LEVEL; | ||
106 | set_irq_chip_and_handler(virq, &flipper_pic, handle_level_irq); | ||
107 | return 0; | ||
108 | } | ||
109 | |||
110 | static void flipper_pic_unmap(struct irq_host *h, unsigned int irq) | ||
111 | { | ||
112 | set_irq_chip_data(irq, NULL); | ||
113 | set_irq_chip(irq, NULL); | ||
114 | } | ||
115 | |||
116 | static int flipper_pic_match(struct irq_host *h, struct device_node *np) | ||
117 | { | ||
118 | return 1; | ||
119 | } | ||
120 | |||
121 | |||
122 | static struct irq_host_ops flipper_irq_host_ops = { | ||
123 | .map = flipper_pic_map, | ||
124 | .unmap = flipper_pic_unmap, | ||
125 | .match = flipper_pic_match, | ||
126 | }; | ||
127 | |||
128 | /* | ||
129 | * Platform hooks. | ||
130 | * | ||
131 | */ | ||
132 | |||
133 | static void __flipper_quiesce(void __iomem *io_base) | ||
134 | { | ||
135 | /* mask and ack all IRQs */ | ||
136 | out_be32(io_base + FLIPPER_IMR, 0x00000000); | ||
137 | out_be32(io_base + FLIPPER_ICR, 0xffffffff); | ||
138 | } | ||
139 | |||
140 | struct irq_host * __init flipper_pic_init(struct device_node *np) | ||
141 | { | ||
142 | struct device_node *pi; | ||
143 | struct irq_host *irq_host = NULL; | ||
144 | struct resource res; | ||
145 | void __iomem *io_base; | ||
146 | int retval; | ||
147 | |||
148 | pi = of_get_parent(np); | ||
149 | if (!pi) { | ||
150 | pr_err("no parent found\n"); | ||
151 | goto out; | ||
152 | } | ||
153 | if (!of_device_is_compatible(pi, "nintendo,flipper-pi")) { | ||
154 | pr_err("unexpected parent compatible\n"); | ||
155 | goto out; | ||
156 | } | ||
157 | |||
158 | retval = of_address_to_resource(pi, 0, &res); | ||
159 | if (retval) { | ||
160 | pr_err("no io memory range found\n"); | ||
161 | goto out; | ||
162 | } | ||
163 | io_base = ioremap(res.start, resource_size(&res)); | ||
164 | |||
165 | pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base); | ||
166 | |||
167 | __flipper_quiesce(io_base); | ||
168 | |||
169 | irq_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, FLIPPER_NR_IRQS, | ||
170 | &flipper_irq_host_ops, -1); | ||
171 | if (!irq_host) { | ||
172 | pr_err("failed to allocate irq_host\n"); | ||
173 | return NULL; | ||
174 | } | ||
175 | |||
176 | irq_host->host_data = io_base; | ||
177 | |||
178 | out: | ||
179 | return irq_host; | ||
180 | } | ||
181 | |||
182 | unsigned int flipper_pic_get_irq(void) | ||
183 | { | ||
184 | void __iomem *io_base = flipper_irq_host->host_data; | ||
185 | int irq; | ||
186 | u32 irq_status; | ||
187 | |||
188 | irq_status = in_be32(io_base + FLIPPER_ICR) & | ||
189 | in_be32(io_base + FLIPPER_IMR); | ||
190 | if (irq_status == 0) | ||
191 | return NO_IRQ; /* no more IRQs pending */ | ||
192 | |||
193 | irq = __ffs(irq_status); | ||
194 | return irq_linear_revmap(flipper_irq_host, irq); | ||
195 | } | ||
196 | |||
197 | /* | ||
198 | * Probe function. | ||
199 | * | ||
200 | */ | ||
201 | |||
202 | void __init flipper_pic_probe(void) | ||
203 | { | ||
204 | struct device_node *np; | ||
205 | |||
206 | np = of_find_compatible_node(NULL, NULL, "nintendo,flipper-pic"); | ||
207 | BUG_ON(!np); | ||
208 | |||
209 | flipper_irq_host = flipper_pic_init(np); | ||
210 | BUG_ON(!flipper_irq_host); | ||
211 | |||
212 | irq_set_default_host(flipper_irq_host); | ||
213 | |||
214 | of_node_put(np); | ||
215 | } | ||
216 | |||
217 | /* | ||
218 | * Misc functions related to the flipper chipset. | ||
219 | * | ||
220 | */ | ||
221 | |||
222 | /** | ||
223 | * flipper_quiesce() - quiesce flipper irq controller | ||
224 | * | ||
225 | * Mask and ack all interrupt sources. | ||
226 | * | ||
227 | */ | ||
228 | void flipper_quiesce(void) | ||
229 | { | ||
230 | void __iomem *io_base = flipper_irq_host->host_data; | ||
231 | |||
232 | __flipper_quiesce(io_base); | ||
233 | } | ||
234 | |||
235 | /* | ||
236 | * Resets the platform. | ||
237 | */ | ||
238 | void flipper_platform_reset(void) | ||
239 | { | ||
240 | void __iomem *io_base; | ||
241 | |||
242 | if (flipper_irq_host && flipper_irq_host->host_data) { | ||
243 | io_base = flipper_irq_host->host_data; | ||
244 | out_8(io_base + FLIPPER_RESET, 0x00); | ||
245 | } | ||
246 | } | ||
247 | |||
248 | /* | ||
249 | * Returns non-zero if the reset button is pressed. | ||
250 | */ | ||
251 | int flipper_is_reset_button_pressed(void) | ||
252 | { | ||
253 | void __iomem *io_base; | ||
254 | u32 icr; | ||
255 | |||
256 | if (flipper_irq_host && flipper_irq_host->host_data) { | ||
257 | io_base = flipper_irq_host->host_data; | ||
258 | icr = in_be32(io_base + FLIPPER_ICR); | ||
259 | return !(icr & FLIPPER_ICR_RSS); | ||
260 | } | ||
261 | return 0; | ||
262 | } | ||
263 | |||
diff --git a/arch/powerpc/platforms/embedded6xx/flipper-pic.h b/arch/powerpc/platforms/embedded6xx/flipper-pic.h new file mode 100644 index 000000000000..e339186b5663 --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/flipper-pic.h | |||
@@ -0,0 +1,25 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/embedded6xx/flipper-pic.h | ||
3 | * | ||
4 | * Nintendo GameCube/Wii "Flipper" interrupt controller support. | ||
5 | * Copyright (C) 2004-2009 The GameCube Linux Team | ||
6 | * Copyright (C) 2007,2008,2009 Albert Herranz | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #ifndef __FLIPPER_PIC_H | ||
16 | #define __FLIPPER_PIC_H | ||
17 | |||
18 | unsigned int flipper_pic_get_irq(void); | ||
19 | void __init flipper_pic_probe(void); | ||
20 | |||
21 | void flipper_quiesce(void); | ||
22 | void flipper_platform_reset(void); | ||
23 | int flipper_is_reset_button_pressed(void); | ||
24 | |||
25 | #endif | ||
diff --git a/arch/powerpc/platforms/embedded6xx/gamecube.c b/arch/powerpc/platforms/embedded6xx/gamecube.c new file mode 100644 index 000000000000..1106fd99627f --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/gamecube.c | |||
@@ -0,0 +1,118 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/embedded6xx/gamecube.c | ||
3 | * | ||
4 | * Nintendo GameCube board-specific support | ||
5 | * Copyright (C) 2004-2009 The GameCube Linux Team | ||
6 | * Copyright (C) 2007,2008,2009 Albert Herranz | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/irq.h> | ||
18 | #include <linux/kexec.h> | ||
19 | #include <linux/seq_file.h> | ||
20 | #include <linux/of_platform.h> | ||
21 | |||
22 | #include <asm/io.h> | ||
23 | #include <asm/machdep.h> | ||
24 | #include <asm/prom.h> | ||
25 | #include <asm/time.h> | ||
26 | #include <asm/udbg.h> | ||
27 | |||
28 | #include "flipper-pic.h" | ||
29 | #include "usbgecko_udbg.h" | ||
30 | |||
31 | |||
32 | static void gamecube_spin(void) | ||
33 | { | ||
34 | /* spin until power button pressed */ | ||
35 | for (;;) | ||
36 | cpu_relax(); | ||
37 | } | ||
38 | |||
39 | static void gamecube_restart(char *cmd) | ||
40 | { | ||
41 | local_irq_disable(); | ||
42 | flipper_platform_reset(); | ||
43 | gamecube_spin(); | ||
44 | } | ||
45 | |||
46 | static void gamecube_power_off(void) | ||
47 | { | ||
48 | local_irq_disable(); | ||
49 | gamecube_spin(); | ||
50 | } | ||
51 | |||
52 | static void gamecube_halt(void) | ||
53 | { | ||
54 | gamecube_restart(NULL); | ||
55 | } | ||
56 | |||
57 | static void __init gamecube_init_early(void) | ||
58 | { | ||
59 | ug_udbg_init(); | ||
60 | } | ||
61 | |||
62 | static int __init gamecube_probe(void) | ||
63 | { | ||
64 | unsigned long dt_root; | ||
65 | |||
66 | dt_root = of_get_flat_dt_root(); | ||
67 | if (!of_flat_dt_is_compatible(dt_root, "nintendo,gamecube")) | ||
68 | return 0; | ||
69 | |||
70 | return 1; | ||
71 | } | ||
72 | |||
73 | static void gamecube_shutdown(void) | ||
74 | { | ||
75 | flipper_quiesce(); | ||
76 | } | ||
77 | |||
78 | #ifdef CONFIG_KEXEC | ||
79 | static int gamecube_kexec_prepare(struct kimage *image) | ||
80 | { | ||
81 | return 0; | ||
82 | } | ||
83 | #endif /* CONFIG_KEXEC */ | ||
84 | |||
85 | |||
86 | define_machine(gamecube) { | ||
87 | .name = "gamecube", | ||
88 | .probe = gamecube_probe, | ||
89 | .init_early = gamecube_init_early, | ||
90 | .restart = gamecube_restart, | ||
91 | .power_off = gamecube_power_off, | ||
92 | .halt = gamecube_halt, | ||
93 | .init_IRQ = flipper_pic_probe, | ||
94 | .get_irq = flipper_pic_get_irq, | ||
95 | .calibrate_decr = generic_calibrate_decr, | ||
96 | .progress = udbg_progress, | ||
97 | .machine_shutdown = gamecube_shutdown, | ||
98 | #ifdef CONFIG_KEXEC | ||
99 | .machine_kexec_prepare = gamecube_kexec_prepare, | ||
100 | #endif | ||
101 | }; | ||
102 | |||
103 | |||
104 | static struct of_device_id gamecube_of_bus[] = { | ||
105 | { .compatible = "nintendo,flipper", }, | ||
106 | { }, | ||
107 | }; | ||
108 | |||
109 | static int __init gamecube_device_probe(void) | ||
110 | { | ||
111 | if (!machine_is(gamecube)) | ||
112 | return 0; | ||
113 | |||
114 | of_platform_bus_probe(NULL, gamecube_of_bus, NULL); | ||
115 | return 0; | ||
116 | } | ||
117 | device_initcall(gamecube_device_probe); | ||
118 | |||
diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c new file mode 100644 index 000000000000..a771f91e215b --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c | |||
@@ -0,0 +1,241 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/embedded6xx/hlwd-pic.c | ||
3 | * | ||
4 | * Nintendo Wii "Hollywood" interrupt controller support. | ||
5 | * Copyright (C) 2009 The GameCube Linux Team | ||
6 | * Copyright (C) 2009 Albert Herranz | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | #define DRV_MODULE_NAME "hlwd-pic" | ||
15 | #define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/irq.h> | ||
20 | #include <linux/of.h> | ||
21 | #include <asm/io.h> | ||
22 | |||
23 | #include "hlwd-pic.h" | ||
24 | |||
25 | #define HLWD_NR_IRQS 32 | ||
26 | |||
27 | /* | ||
28 | * Each interrupt has a corresponding bit in both | ||
29 | * the Interrupt Cause (ICR) and Interrupt Mask (IMR) registers. | ||
30 | * | ||
31 | * Enabling/disabling an interrupt line involves asserting/clearing | ||
32 | * the corresponding bit in IMR. ACK'ing a request simply involves | ||
33 | * asserting the corresponding bit in ICR. | ||
34 | */ | ||
35 | #define HW_BROADWAY_ICR 0x00 | ||
36 | #define HW_BROADWAY_IMR 0x04 | ||
37 | |||
38 | |||
39 | /* | ||
40 | * IRQ chip hooks. | ||
41 | * | ||
42 | */ | ||
43 | |||
44 | static void hlwd_pic_mask_and_ack(unsigned int virq) | ||
45 | { | ||
46 | int irq = virq_to_hw(virq); | ||
47 | void __iomem *io_base = get_irq_chip_data(virq); | ||
48 | u32 mask = 1 << irq; | ||
49 | |||
50 | clrbits32(io_base + HW_BROADWAY_IMR, mask); | ||
51 | out_be32(io_base + HW_BROADWAY_ICR, mask); | ||
52 | } | ||
53 | |||
54 | static void hlwd_pic_ack(unsigned int virq) | ||
55 | { | ||
56 | int irq = virq_to_hw(virq); | ||
57 | void __iomem *io_base = get_irq_chip_data(virq); | ||
58 | |||
59 | out_be32(io_base + HW_BROADWAY_ICR, 1 << irq); | ||
60 | } | ||
61 | |||
62 | static void hlwd_pic_mask(unsigned int virq) | ||
63 | { | ||
64 | int irq = virq_to_hw(virq); | ||
65 | void __iomem *io_base = get_irq_chip_data(virq); | ||
66 | |||
67 | clrbits32(io_base + HW_BROADWAY_IMR, 1 << irq); | ||
68 | } | ||
69 | |||
70 | static void hlwd_pic_unmask(unsigned int virq) | ||
71 | { | ||
72 | int irq = virq_to_hw(virq); | ||
73 | void __iomem *io_base = get_irq_chip_data(virq); | ||
74 | |||
75 | setbits32(io_base + HW_BROADWAY_IMR, 1 << irq); | ||
76 | } | ||
77 | |||
78 | |||
79 | static struct irq_chip hlwd_pic = { | ||
80 | .name = "hlwd-pic", | ||
81 | .ack = hlwd_pic_ack, | ||
82 | .mask_ack = hlwd_pic_mask_and_ack, | ||
83 | .mask = hlwd_pic_mask, | ||
84 | .unmask = hlwd_pic_unmask, | ||
85 | }; | ||
86 | |||
87 | /* | ||
88 | * IRQ host hooks. | ||
89 | * | ||
90 | */ | ||
91 | |||
92 | static struct irq_host *hlwd_irq_host; | ||
93 | |||
94 | static int hlwd_pic_map(struct irq_host *h, unsigned int virq, | ||
95 | irq_hw_number_t hwirq) | ||
96 | { | ||
97 | set_irq_chip_data(virq, h->host_data); | ||
98 | irq_to_desc(virq)->status |= IRQ_LEVEL; | ||
99 | set_irq_chip_and_handler(virq, &hlwd_pic, handle_level_irq); | ||
100 | return 0; | ||
101 | } | ||
102 | |||
103 | static void hlwd_pic_unmap(struct irq_host *h, unsigned int irq) | ||
104 | { | ||
105 | set_irq_chip_data(irq, NULL); | ||
106 | set_irq_chip(irq, NULL); | ||
107 | } | ||
108 | |||
109 | static struct irq_host_ops hlwd_irq_host_ops = { | ||
110 | .map = hlwd_pic_map, | ||
111 | .unmap = hlwd_pic_unmap, | ||
112 | }; | ||
113 | |||
114 | static unsigned int __hlwd_pic_get_irq(struct irq_host *h) | ||
115 | { | ||
116 | void __iomem *io_base = h->host_data; | ||
117 | int irq; | ||
118 | u32 irq_status; | ||
119 | |||
120 | irq_status = in_be32(io_base + HW_BROADWAY_ICR) & | ||
121 | in_be32(io_base + HW_BROADWAY_IMR); | ||
122 | if (irq_status == 0) | ||
123 | return NO_IRQ; /* no more IRQs pending */ | ||
124 | |||
125 | irq = __ffs(irq_status); | ||
126 | return irq_linear_revmap(h, irq); | ||
127 | } | ||
128 | |||
129 | static void hlwd_pic_irq_cascade(unsigned int cascade_virq, | ||
130 | struct irq_desc *desc) | ||
131 | { | ||
132 | struct irq_host *irq_host = get_irq_data(cascade_virq); | ||
133 | unsigned int virq; | ||
134 | |||
135 | raw_spin_lock(&desc->lock); | ||
136 | desc->chip->mask(cascade_virq); /* IRQ_LEVEL */ | ||
137 | raw_spin_unlock(&desc->lock); | ||
138 | |||
139 | virq = __hlwd_pic_get_irq(irq_host); | ||
140 | if (virq != NO_IRQ) | ||
141 | generic_handle_irq(virq); | ||
142 | else | ||
143 | pr_err("spurious interrupt!\n"); | ||
144 | |||
145 | raw_spin_lock(&desc->lock); | ||
146 | desc->chip->ack(cascade_virq); /* IRQ_LEVEL */ | ||
147 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) | ||
148 | desc->chip->unmask(cascade_virq); | ||
149 | raw_spin_unlock(&desc->lock); | ||
150 | } | ||
151 | |||
152 | /* | ||
153 | * Platform hooks. | ||
154 | * | ||
155 | */ | ||
156 | |||
157 | static void __hlwd_quiesce(void __iomem *io_base) | ||
158 | { | ||
159 | /* mask and ack all IRQs */ | ||
160 | out_be32(io_base + HW_BROADWAY_IMR, 0); | ||
161 | out_be32(io_base + HW_BROADWAY_ICR, 0xffffffff); | ||
162 | } | ||
163 | |||
164 | struct irq_host *hlwd_pic_init(struct device_node *np) | ||
165 | { | ||
166 | struct irq_host *irq_host; | ||
167 | struct resource res; | ||
168 | void __iomem *io_base; | ||
169 | int retval; | ||
170 | |||
171 | retval = of_address_to_resource(np, 0, &res); | ||
172 | if (retval) { | ||
173 | pr_err("no io memory range found\n"); | ||
174 | return NULL; | ||
175 | } | ||
176 | io_base = ioremap(res.start, resource_size(&res)); | ||
177 | if (!io_base) { | ||
178 | pr_err("ioremap failed\n"); | ||
179 | return NULL; | ||
180 | } | ||
181 | |||
182 | pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base); | ||
183 | |||
184 | __hlwd_quiesce(io_base); | ||
185 | |||
186 | irq_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, HLWD_NR_IRQS, | ||
187 | &hlwd_irq_host_ops, -1); | ||
188 | if (!irq_host) { | ||
189 | pr_err("failed to allocate irq_host\n"); | ||
190 | return NULL; | ||
191 | } | ||
192 | irq_host->host_data = io_base; | ||
193 | |||
194 | return irq_host; | ||
195 | } | ||
196 | |||
197 | unsigned int hlwd_pic_get_irq(void) | ||
198 | { | ||
199 | return __hlwd_pic_get_irq(hlwd_irq_host); | ||
200 | } | ||
201 | |||
202 | /* | ||
203 | * Probe function. | ||
204 | * | ||
205 | */ | ||
206 | |||
207 | void hlwd_pic_probe(void) | ||
208 | { | ||
209 | struct irq_host *host; | ||
210 | struct device_node *np; | ||
211 | const u32 *interrupts; | ||
212 | int cascade_virq; | ||
213 | |||
214 | for_each_compatible_node(np, NULL, "nintendo,hollywood-pic") { | ||
215 | interrupts = of_get_property(np, "interrupts", NULL); | ||
216 | if (interrupts) { | ||
217 | host = hlwd_pic_init(np); | ||
218 | BUG_ON(!host); | ||
219 | cascade_virq = irq_of_parse_and_map(np, 0); | ||
220 | set_irq_data(cascade_virq, host); | ||
221 | set_irq_chained_handler(cascade_virq, | ||
222 | hlwd_pic_irq_cascade); | ||
223 | hlwd_irq_host = host; | ||
224 | break; | ||
225 | } | ||
226 | } | ||
227 | } | ||
228 | |||
229 | /** | ||
230 | * hlwd_quiesce() - quiesce hollywood irq controller | ||
231 | * | ||
232 | * Mask and ack all interrupt sources. | ||
233 | * | ||
234 | */ | ||
235 | void hlwd_quiesce(void) | ||
236 | { | ||
237 | void __iomem *io_base = hlwd_irq_host->host_data; | ||
238 | |||
239 | __hlwd_quiesce(io_base); | ||
240 | } | ||
241 | |||
diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.h b/arch/powerpc/platforms/embedded6xx/hlwd-pic.h new file mode 100644 index 000000000000..d2e5a092761e --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.h | |||
@@ -0,0 +1,22 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/embedded6xx/hlwd-pic.h | ||
3 | * | ||
4 | * Nintendo Wii "Hollywood" interrupt controller support. | ||
5 | * Copyright (C) 2009 The GameCube Linux Team | ||
6 | * Copyright (C) 2009 Albert Herranz | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #ifndef __HLWD_PIC_H | ||
16 | #define __HLWD_PIC_H | ||
17 | |||
18 | extern unsigned int hlwd_pic_get_irq(void); | ||
19 | extern void hlwd_pic_probe(void); | ||
20 | extern void hlwd_quiesce(void); | ||
21 | |||
22 | #endif | ||
diff --git a/arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c b/arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c new file mode 100644 index 000000000000..20a8ed91962e --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c | |||
@@ -0,0 +1,328 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c | ||
3 | * | ||
4 | * udbg serial input/output routines for the USB Gecko adapter. | ||
5 | * Copyright (C) 2008-2009 The GameCube Linux Team | ||
6 | * Copyright (C) 2008,2009 Albert Herranz | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #include <mm/mmu_decl.h> | ||
16 | |||
17 | #include <asm/io.h> | ||
18 | #include <asm/prom.h> | ||
19 | #include <asm/udbg.h> | ||
20 | #include <asm/fixmap.h> | ||
21 | |||
22 | #include "usbgecko_udbg.h" | ||
23 | |||
24 | |||
25 | #define EXI_CLK_32MHZ 5 | ||
26 | |||
27 | #define EXI_CSR 0x00 | ||
28 | #define EXI_CSR_CLKMASK (0x7<<4) | ||
29 | #define EXI_CSR_CLK_32MHZ (EXI_CLK_32MHZ<<4) | ||
30 | #define EXI_CSR_CSMASK (0x7<<7) | ||
31 | #define EXI_CSR_CS_0 (0x1<<7) /* Chip Select 001 */ | ||
32 | |||
33 | #define EXI_CR 0x0c | ||
34 | #define EXI_CR_TSTART (1<<0) | ||
35 | #define EXI_CR_WRITE (1<<2) | ||
36 | #define EXI_CR_READ_WRITE (2<<2) | ||
37 | #define EXI_CR_TLEN(len) (((len)-1)<<4) | ||
38 | |||
39 | #define EXI_DATA 0x10 | ||
40 | |||
41 | #define UG_READ_ATTEMPTS 100 | ||
42 | #define UG_WRITE_ATTEMPTS 100 | ||
43 | |||
44 | |||
45 | static void __iomem *ug_io_base; | ||
46 | |||
47 | /* | ||
48 | * Performs one input/output transaction between the exi host and the usbgecko. | ||
49 | */ | ||
50 | static u32 ug_io_transaction(u32 in) | ||
51 | { | ||
52 | u32 __iomem *csr_reg = ug_io_base + EXI_CSR; | ||
53 | u32 __iomem *data_reg = ug_io_base + EXI_DATA; | ||
54 | u32 __iomem *cr_reg = ug_io_base + EXI_CR; | ||
55 | u32 csr, data, cr; | ||
56 | |||
57 | /* select */ | ||
58 | csr = EXI_CSR_CLK_32MHZ | EXI_CSR_CS_0; | ||
59 | out_be32(csr_reg, csr); | ||
60 | |||
61 | /* read/write */ | ||
62 | data = in; | ||
63 | out_be32(data_reg, data); | ||
64 | cr = EXI_CR_TLEN(2) | EXI_CR_READ_WRITE | EXI_CR_TSTART; | ||
65 | out_be32(cr_reg, cr); | ||
66 | |||
67 | while (in_be32(cr_reg) & EXI_CR_TSTART) | ||
68 | barrier(); | ||
69 | |||
70 | /* deselect */ | ||
71 | out_be32(csr_reg, 0); | ||
72 | |||
73 | /* result */ | ||
74 | data = in_be32(data_reg); | ||
75 | |||
76 | return data; | ||
77 | } | ||
78 | |||
79 | /* | ||
80 | * Returns true if an usbgecko adapter is found. | ||
81 | */ | ||
82 | static int ug_is_adapter_present(void) | ||
83 | { | ||
84 | if (!ug_io_base) | ||
85 | return 0; | ||
86 | |||
87 | return ug_io_transaction(0x90000000) == 0x04700000; | ||
88 | } | ||
89 | |||
90 | /* | ||
91 | * Returns true if the TX fifo is ready for transmission. | ||
92 | */ | ||
93 | static int ug_is_txfifo_ready(void) | ||
94 | { | ||
95 | return ug_io_transaction(0xc0000000) & 0x04000000; | ||
96 | } | ||
97 | |||
98 | /* | ||
99 | * Tries to transmit a character. | ||
100 | * If the TX fifo is not ready the result is undefined. | ||
101 | */ | ||
102 | static void ug_raw_putc(char ch) | ||
103 | { | ||
104 | ug_io_transaction(0xb0000000 | (ch << 20)); | ||
105 | } | ||
106 | |||
107 | /* | ||
108 | * Transmits a character. | ||
109 | * It silently fails if the TX fifo is not ready after a number of retries. | ||
110 | */ | ||
111 | static void ug_putc(char ch) | ||
112 | { | ||
113 | int count = UG_WRITE_ATTEMPTS; | ||
114 | |||
115 | if (!ug_io_base) | ||
116 | return; | ||
117 | |||
118 | if (ch == '\n') | ||
119 | ug_putc('\r'); | ||
120 | |||
121 | while (!ug_is_txfifo_ready() && count--) | ||
122 | barrier(); | ||
123 | if (count >= 0) | ||
124 | ug_raw_putc(ch); | ||
125 | } | ||
126 | |||
127 | /* | ||
128 | * Returns true if the RX fifo is ready for transmission. | ||
129 | */ | ||
130 | static int ug_is_rxfifo_ready(void) | ||
131 | { | ||
132 | return ug_io_transaction(0xd0000000) & 0x04000000; | ||
133 | } | ||
134 | |||
135 | /* | ||
136 | * Tries to receive a character. | ||
137 | * If a character is unavailable the function returns -1. | ||
138 | */ | ||
139 | static int ug_raw_getc(void) | ||
140 | { | ||
141 | u32 data = ug_io_transaction(0xa0000000); | ||
142 | if (data & 0x08000000) | ||
143 | return (data >> 16) & 0xff; | ||
144 | else | ||
145 | return -1; | ||
146 | } | ||
147 | |||
148 | /* | ||
149 | * Receives a character. | ||
150 | * It fails if the RX fifo is not ready after a number of retries. | ||
151 | */ | ||
152 | static int ug_getc(void) | ||
153 | { | ||
154 | int count = UG_READ_ATTEMPTS; | ||
155 | |||
156 | if (!ug_io_base) | ||
157 | return -1; | ||
158 | |||
159 | while (!ug_is_rxfifo_ready() && count--) | ||
160 | barrier(); | ||
161 | return ug_raw_getc(); | ||
162 | } | ||
163 | |||
164 | /* | ||
165 | * udbg functions. | ||
166 | * | ||
167 | */ | ||
168 | |||
169 | /* | ||
170 | * Transmits a character. | ||
171 | */ | ||
172 | void ug_udbg_putc(char ch) | ||
173 | { | ||
174 | ug_putc(ch); | ||
175 | } | ||
176 | |||
177 | /* | ||
178 | * Receives a character. Waits until a character is available. | ||
179 | */ | ||
180 | static int ug_udbg_getc(void) | ||
181 | { | ||
182 | int ch; | ||
183 | |||
184 | while ((ch = ug_getc()) == -1) | ||
185 | barrier(); | ||
186 | return ch; | ||
187 | } | ||
188 | |||
189 | /* | ||
190 | * Receives a character. If a character is not available, returns -1. | ||
191 | */ | ||
192 | static int ug_udbg_getc_poll(void) | ||
193 | { | ||
194 | if (!ug_is_rxfifo_ready()) | ||
195 | return -1; | ||
196 | return ug_getc(); | ||
197 | } | ||
198 | |||
199 | /* | ||
200 | * Retrieves and prepares the virtual address needed to access the hardware. | ||
201 | */ | ||
202 | static void __iomem *ug_udbg_setup_exi_io_base(struct device_node *np) | ||
203 | { | ||
204 | void __iomem *exi_io_base = NULL; | ||
205 | phys_addr_t paddr; | ||
206 | const unsigned int *reg; | ||
207 | |||
208 | reg = of_get_property(np, "reg", NULL); | ||
209 | if (reg) { | ||
210 | paddr = of_translate_address(np, reg); | ||
211 | if (paddr) | ||
212 | exi_io_base = ioremap(paddr, reg[1]); | ||
213 | } | ||
214 | return exi_io_base; | ||
215 | } | ||
216 | |||
217 | /* | ||
218 | * Checks if a USB Gecko adapter is inserted in any memory card slot. | ||
219 | */ | ||
220 | static void __iomem *ug_udbg_probe(void __iomem *exi_io_base) | ||
221 | { | ||
222 | int i; | ||
223 | |||
224 | /* look for a usbgecko on memcard slots A and B */ | ||
225 | for (i = 0; i < 2; i++) { | ||
226 | ug_io_base = exi_io_base + 0x14 * i; | ||
227 | if (ug_is_adapter_present()) | ||
228 | break; | ||
229 | } | ||
230 | if (i == 2) | ||
231 | ug_io_base = NULL; | ||
232 | return ug_io_base; | ||
233 | |||
234 | } | ||
235 | |||
236 | /* | ||
237 | * USB Gecko udbg support initialization. | ||
238 | */ | ||
239 | void __init ug_udbg_init(void) | ||
240 | { | ||
241 | struct device_node *np; | ||
242 | void __iomem *exi_io_base; | ||
243 | |||
244 | if (ug_io_base) | ||
245 | udbg_printf("%s: early -> final\n", __func__); | ||
246 | |||
247 | np = of_find_compatible_node(NULL, NULL, "nintendo,flipper-exi"); | ||
248 | if (!np) { | ||
249 | udbg_printf("%s: EXI node not found\n", __func__); | ||
250 | goto done; | ||
251 | } | ||
252 | |||
253 | exi_io_base = ug_udbg_setup_exi_io_base(np); | ||
254 | if (!exi_io_base) { | ||
255 | udbg_printf("%s: failed to setup EXI io base\n", __func__); | ||
256 | goto done; | ||
257 | } | ||
258 | |||
259 | if (!ug_udbg_probe(exi_io_base)) { | ||
260 | udbg_printf("usbgecko_udbg: not found\n"); | ||
261 | iounmap(exi_io_base); | ||
262 | } else { | ||
263 | udbg_putc = ug_udbg_putc; | ||
264 | udbg_getc = ug_udbg_getc; | ||
265 | udbg_getc_poll = ug_udbg_getc_poll; | ||
266 | udbg_printf("usbgecko_udbg: ready\n"); | ||
267 | } | ||
268 | |||
269 | done: | ||
270 | if (np) | ||
271 | of_node_put(np); | ||
272 | return; | ||
273 | } | ||
274 | |||
275 | #ifdef CONFIG_PPC_EARLY_DEBUG_USBGECKO | ||
276 | |||
277 | static phys_addr_t __init ug_early_grab_io_addr(void) | ||
278 | { | ||
279 | #if defined(CONFIG_GAMECUBE) | ||
280 | return 0x0c000000; | ||
281 | #elif defined(CONFIG_WII) | ||
282 | return 0x0d000000; | ||
283 | #else | ||
284 | #error Invalid platform for USB Gecko based early debugging. | ||
285 | #endif | ||
286 | } | ||
287 | |||
288 | /* | ||
289 | * USB Gecko early debug support initialization for udbg. | ||
290 | */ | ||
291 | void __init udbg_init_usbgecko(void) | ||
292 | { | ||
293 | void __iomem *early_debug_area; | ||
294 | void __iomem *exi_io_base; | ||
295 | |||
296 | /* | ||
297 | * At this point we have a BAT already setup that enables I/O | ||
298 | * to the EXI hardware. | ||
299 | * | ||
300 | * The BAT uses a virtual address range reserved at the fixmap. | ||
301 | * This must match the virtual address configured in | ||
302 | * head_32.S:setup_usbgecko_bat(). | ||
303 | */ | ||
304 | early_debug_area = (void __iomem *)__fix_to_virt(FIX_EARLY_DEBUG_BASE); | ||
305 | exi_io_base = early_debug_area + 0x00006800; | ||
306 | |||
307 | /* try to detect a USB Gecko */ | ||
308 | if (!ug_udbg_probe(exi_io_base)) | ||
309 | return; | ||
310 | |||
311 | /* we found a USB Gecko, load udbg hooks */ | ||
312 | udbg_putc = ug_udbg_putc; | ||
313 | udbg_getc = ug_udbg_getc; | ||
314 | udbg_getc_poll = ug_udbg_getc_poll; | ||
315 | |||
316 | /* | ||
317 | * Prepare again the same BAT for MMU_init. | ||
318 | * This allows udbg I/O to continue working after the MMU is | ||
319 | * turned on for real. | ||
320 | * It is safe to continue using the same virtual address as it is | ||
321 | * a reserved fixmap area. | ||
322 | */ | ||
323 | setbat(1, (unsigned long)early_debug_area, | ||
324 | ug_early_grab_io_addr(), 128*1024, PAGE_KERNEL_NCG); | ||
325 | } | ||
326 | |||
327 | #endif /* CONFIG_PPC_EARLY_DEBUG_USBGECKO */ | ||
328 | |||
diff --git a/arch/powerpc/platforms/embedded6xx/usbgecko_udbg.h b/arch/powerpc/platforms/embedded6xx/usbgecko_udbg.h new file mode 100644 index 000000000000..bb6cde4ad764 --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/usbgecko_udbg.h | |||
@@ -0,0 +1,32 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/embedded6xx/usbgecko_udbg.h | ||
3 | * | ||
4 | * udbg serial input/output routines for the USB Gecko adapter. | ||
5 | * Copyright (C) 2008-2009 The GameCube Linux Team | ||
6 | * Copyright (C) 2008,2009 Albert Herranz | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #ifndef __USBGECKO_UDBG_H | ||
16 | #define __USBGECKO_UDBG_H | ||
17 | |||
18 | #ifdef CONFIG_USBGECKO_UDBG | ||
19 | |||
20 | extern void __init ug_udbg_init(void); | ||
21 | |||
22 | #else | ||
23 | |||
24 | static inline void __init ug_udbg_init(void) | ||
25 | { | ||
26 | } | ||
27 | |||
28 | #endif /* CONFIG_USBGECKO_UDBG */ | ||
29 | |||
30 | void __init udbg_init_usbgecko(void); | ||
31 | |||
32 | #endif /* __USBGECKO_UDBG_H */ | ||
diff --git a/arch/powerpc/platforms/embedded6xx/wii.c b/arch/powerpc/platforms/embedded6xx/wii.c new file mode 100644 index 000000000000..57e5b608fa1a --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/wii.c | |||
@@ -0,0 +1,268 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/embedded6xx/wii.c | ||
3 | * | ||
4 | * Nintendo Wii board-specific support | ||
5 | * Copyright (C) 2008-2009 The GameCube Linux Team | ||
6 | * Copyright (C) 2008,2009 Albert Herranz | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | #define DRV_MODULE_NAME "wii" | ||
15 | #define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/irq.h> | ||
20 | #include <linux/seq_file.h> | ||
21 | #include <linux/kexec.h> | ||
22 | #include <linux/of_platform.h> | ||
23 | #include <linux/lmb.h> | ||
24 | #include <mm/mmu_decl.h> | ||
25 | |||
26 | #include <asm/io.h> | ||
27 | #include <asm/machdep.h> | ||
28 | #include <asm/prom.h> | ||
29 | #include <asm/time.h> | ||
30 | #include <asm/udbg.h> | ||
31 | |||
32 | #include "flipper-pic.h" | ||
33 | #include "hlwd-pic.h" | ||
34 | #include "usbgecko_udbg.h" | ||
35 | |||
36 | /* control block */ | ||
37 | #define HW_CTRL_COMPATIBLE "nintendo,hollywood-control" | ||
38 | |||
39 | #define HW_CTRL_RESETS 0x94 | ||
40 | #define HW_CTRL_RESETS_SYS (1<<0) | ||
41 | |||
42 | /* gpio */ | ||
43 | #define HW_GPIO_COMPATIBLE "nintendo,hollywood-gpio" | ||
44 | |||
45 | #define HW_GPIO_BASE(idx) (idx * 0x20) | ||
46 | #define HW_GPIO_OUT(idx) (HW_GPIO_BASE(idx) + 0) | ||
47 | #define HW_GPIO_DIR(idx) (HW_GPIO_BASE(idx) + 4) | ||
48 | |||
49 | #define HW_GPIO_SHUTDOWN (1<<1) | ||
50 | #define HW_GPIO_SLOT_LED (1<<5) | ||
51 | #define HW_GPIO_SENSOR_BAR (1<<8) | ||
52 | |||
53 | |||
54 | static void __iomem *hw_ctrl; | ||
55 | static void __iomem *hw_gpio; | ||
56 | |||
57 | unsigned long wii_hole_start; | ||
58 | unsigned long wii_hole_size; | ||
59 | |||
60 | |||
61 | static int __init page_aligned(unsigned long x) | ||
62 | { | ||
63 | return !(x & (PAGE_SIZE-1)); | ||
64 | } | ||
65 | |||
66 | void __init wii_memory_fixups(void) | ||
67 | { | ||
68 | struct lmb_property *p = lmb.memory.region; | ||
69 | |||
70 | /* | ||
71 | * This is part of a workaround to allow the use of two | ||
72 | * discontiguous RAM ranges on the Wii, even if this is | ||
73 | * currently unsupported on 32-bit PowerPC Linux. | ||
74 | * | ||
75 | * We coealesce the two memory ranges of the Wii into a | ||
76 | * single range, then create a reservation for the "hole" | ||
77 | * between both ranges. | ||
78 | */ | ||
79 | |||
80 | BUG_ON(lmb.memory.cnt != 2); | ||
81 | BUG_ON(!page_aligned(p[0].base) || !page_aligned(p[1].base)); | ||
82 | |||
83 | p[0].size = _ALIGN_DOWN(p[0].size, PAGE_SIZE); | ||
84 | p[1].size = _ALIGN_DOWN(p[1].size, PAGE_SIZE); | ||
85 | |||
86 | wii_hole_start = p[0].base + p[0].size; | ||
87 | wii_hole_size = p[1].base - wii_hole_start; | ||
88 | |||
89 | pr_info("MEM1: <%08llx %08llx>\n", p[0].base, p[0].size); | ||
90 | pr_info("HOLE: <%08lx %08lx>\n", wii_hole_start, wii_hole_size); | ||
91 | pr_info("MEM2: <%08llx %08llx>\n", p[1].base, p[1].size); | ||
92 | |||
93 | p[0].size += wii_hole_size + p[1].size; | ||
94 | |||
95 | lmb.memory.cnt = 1; | ||
96 | lmb_analyze(); | ||
97 | |||
98 | /* reserve the hole */ | ||
99 | lmb_reserve(wii_hole_start, wii_hole_size); | ||
100 | |||
101 | /* allow ioremapping the address space in the hole */ | ||
102 | __allow_ioremap_reserved = 1; | ||
103 | } | ||
104 | |||
105 | unsigned long __init wii_mmu_mapin_mem2(unsigned long top) | ||
106 | { | ||
107 | unsigned long delta, size, bl; | ||
108 | unsigned long max_size = (256<<20); | ||
109 | |||
110 | /* MEM2 64MB@0x10000000 */ | ||
111 | delta = wii_hole_start + wii_hole_size; | ||
112 | size = top - delta; | ||
113 | for (bl = 128<<10; bl < max_size; bl <<= 1) { | ||
114 | if (bl * 2 > size) | ||
115 | break; | ||
116 | } | ||
117 | setbat(4, PAGE_OFFSET+delta, delta, bl, PAGE_KERNEL_X); | ||
118 | return delta + bl; | ||
119 | } | ||
120 | |||
121 | static void wii_spin(void) | ||
122 | { | ||
123 | local_irq_disable(); | ||
124 | for (;;) | ||
125 | cpu_relax(); | ||
126 | } | ||
127 | |||
128 | static void __iomem *wii_ioremap_hw_regs(char *name, char *compatible) | ||
129 | { | ||
130 | void __iomem *hw_regs = NULL; | ||
131 | struct device_node *np; | ||
132 | struct resource res; | ||
133 | int error = -ENODEV; | ||
134 | |||
135 | np = of_find_compatible_node(NULL, NULL, compatible); | ||
136 | if (!np) { | ||
137 | pr_err("no compatible node found for %s\n", compatible); | ||
138 | goto out; | ||
139 | } | ||
140 | error = of_address_to_resource(np, 0, &res); | ||
141 | if (error) { | ||
142 | pr_err("no valid reg found for %s\n", np->name); | ||
143 | goto out_put; | ||
144 | } | ||
145 | |||
146 | hw_regs = ioremap(res.start, resource_size(&res)); | ||
147 | if (hw_regs) { | ||
148 | pr_info("%s at 0x%08x mapped to 0x%p\n", name, | ||
149 | res.start, hw_regs); | ||
150 | } | ||
151 | |||
152 | out_put: | ||
153 | of_node_put(np); | ||
154 | out: | ||
155 | return hw_regs; | ||
156 | } | ||
157 | |||
158 | static void __init wii_setup_arch(void) | ||
159 | { | ||
160 | hw_ctrl = wii_ioremap_hw_regs("hw_ctrl", HW_CTRL_COMPATIBLE); | ||
161 | hw_gpio = wii_ioremap_hw_regs("hw_gpio", HW_GPIO_COMPATIBLE); | ||
162 | if (hw_gpio) { | ||
163 | /* turn off the front blue led and IR light */ | ||
164 | clrbits32(hw_gpio + HW_GPIO_OUT(0), | ||
165 | HW_GPIO_SLOT_LED | HW_GPIO_SENSOR_BAR); | ||
166 | } | ||
167 | } | ||
168 | |||
169 | static void wii_restart(char *cmd) | ||
170 | { | ||
171 | local_irq_disable(); | ||
172 | |||
173 | if (hw_ctrl) { | ||
174 | /* clear the system reset pin to cause a reset */ | ||
175 | clrbits32(hw_ctrl + HW_CTRL_RESETS, HW_CTRL_RESETS_SYS); | ||
176 | } | ||
177 | wii_spin(); | ||
178 | } | ||
179 | |||
180 | static void wii_power_off(void) | ||
181 | { | ||
182 | local_irq_disable(); | ||
183 | |||
184 | if (hw_gpio) { | ||
185 | /* make sure that the poweroff GPIO is configured as output */ | ||
186 | setbits32(hw_gpio + HW_GPIO_DIR(1), HW_GPIO_SHUTDOWN); | ||
187 | |||
188 | /* drive the poweroff GPIO high */ | ||
189 | setbits32(hw_gpio + HW_GPIO_OUT(1), HW_GPIO_SHUTDOWN); | ||
190 | } | ||
191 | wii_spin(); | ||
192 | } | ||
193 | |||
194 | static void wii_halt(void) | ||
195 | { | ||
196 | if (ppc_md.restart) | ||
197 | ppc_md.restart(NULL); | ||
198 | wii_spin(); | ||
199 | } | ||
200 | |||
201 | static void __init wii_init_early(void) | ||
202 | { | ||
203 | ug_udbg_init(); | ||
204 | } | ||
205 | |||
206 | static void __init wii_pic_probe(void) | ||
207 | { | ||
208 | flipper_pic_probe(); | ||
209 | hlwd_pic_probe(); | ||
210 | } | ||
211 | |||
212 | static int __init wii_probe(void) | ||
213 | { | ||
214 | unsigned long dt_root; | ||
215 | |||
216 | dt_root = of_get_flat_dt_root(); | ||
217 | if (!of_flat_dt_is_compatible(dt_root, "nintendo,wii")) | ||
218 | return 0; | ||
219 | |||
220 | return 1; | ||
221 | } | ||
222 | |||
223 | static void wii_shutdown(void) | ||
224 | { | ||
225 | hlwd_quiesce(); | ||
226 | flipper_quiesce(); | ||
227 | } | ||
228 | |||
229 | #ifdef CONFIG_KEXEC | ||
230 | static int wii_machine_kexec_prepare(struct kimage *image) | ||
231 | { | ||
232 | return 0; | ||
233 | } | ||
234 | #endif /* CONFIG_KEXEC */ | ||
235 | |||
236 | define_machine(wii) { | ||
237 | .name = "wii", | ||
238 | .probe = wii_probe, | ||
239 | .init_early = wii_init_early, | ||
240 | .setup_arch = wii_setup_arch, | ||
241 | .restart = wii_restart, | ||
242 | .power_off = wii_power_off, | ||
243 | .halt = wii_halt, | ||
244 | .init_IRQ = wii_pic_probe, | ||
245 | .get_irq = flipper_pic_get_irq, | ||
246 | .calibrate_decr = generic_calibrate_decr, | ||
247 | .progress = udbg_progress, | ||
248 | .machine_shutdown = wii_shutdown, | ||
249 | #ifdef CONFIG_KEXEC | ||
250 | .machine_kexec_prepare = wii_machine_kexec_prepare, | ||
251 | #endif | ||
252 | }; | ||
253 | |||
254 | static struct of_device_id wii_of_bus[] = { | ||
255 | { .compatible = "nintendo,hollywood", }, | ||
256 | { }, | ||
257 | }; | ||
258 | |||
259 | static int __init wii_device_probe(void) | ||
260 | { | ||
261 | if (!machine_is(wii)) | ||
262 | return 0; | ||
263 | |||
264 | of_platform_bus_probe(NULL, wii_of_bus, NULL); | ||
265 | return 0; | ||
266 | } | ||
267 | device_initcall(wii_device_probe); | ||
268 | |||
diff --git a/arch/powerpc/platforms/fsl_uli1575.c b/arch/powerpc/platforms/fsl_uli1575.c index fd23a1d4b39d..8b0c2082a783 100644 --- a/arch/powerpc/platforms/fsl_uli1575.c +++ b/arch/powerpc/platforms/fsl_uli1575.c | |||
@@ -222,6 +222,7 @@ static void __devinit quirk_final_uli5249(struct pci_dev *dev) | |||
222 | int i; | 222 | int i; |
223 | u8 *dummy; | 223 | u8 *dummy; |
224 | struct pci_bus *bus = dev->bus; | 224 | struct pci_bus *bus = dev->bus; |
225 | struct resource *res; | ||
225 | resource_size_t end = 0; | 226 | resource_size_t end = 0; |
226 | 227 | ||
227 | for (i = PCI_BRIDGE_RESOURCES; i < PCI_BRIDGE_RESOURCES+3; i++) { | 228 | for (i = PCI_BRIDGE_RESOURCES; i < PCI_BRIDGE_RESOURCES+3; i++) { |
@@ -230,13 +231,12 @@ static void __devinit quirk_final_uli5249(struct pci_dev *dev) | |||
230 | end = pci_resource_end(dev, i); | 231 | end = pci_resource_end(dev, i); |
231 | } | 232 | } |
232 | 233 | ||
233 | for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) { | 234 | pci_bus_for_each_resource(bus, res, i) { |
234 | if ((bus->resource[i]) && | 235 | if (res && res->flags & IORESOURCE_MEM) { |
235 | (bus->resource[i]->flags & IORESOURCE_MEM)) { | 236 | if (res->end == end) |
236 | if (bus->resource[i]->end == end) | 237 | dummy = ioremap(res->start, 0x4); |
237 | dummy = ioremap(bus->resource[i]->start, 0x4); | ||
238 | else | 238 | else |
239 | dummy = ioremap(bus->resource[i]->end - 3, 0x4); | 239 | dummy = ioremap(res->end - 3, 0x4); |
240 | if (dummy) { | 240 | if (dummy) { |
241 | in_8(dummy); | 241 | in_8(dummy); |
242 | iounmap(dummy); | 242 | iounmap(dummy); |
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S index 5369653dcf6a..fba5bf915073 100644 --- a/arch/powerpc/platforms/iseries/exception.S +++ b/arch/powerpc/platforms/iseries/exception.S | |||
@@ -43,17 +43,14 @@ system_reset_iSeries: | |||
43 | LOAD_REG_ADDR(r23, alpaca) | 43 | LOAD_REG_ADDR(r23, alpaca) |
44 | li r0,ALPACA_SIZE | 44 | li r0,ALPACA_SIZE |
45 | sub r23,r13,r23 | 45 | sub r23,r13,r23 |
46 | divdu r23,r23,r0 /* r23 has cpu number */ | 46 | divdu r24,r23,r0 /* r24 has cpu number */ |
47 | LOAD_REG_ADDR(r13, paca) | ||
48 | mulli r0,r23,PACA_SIZE | ||
49 | add r13,r13,r0 | ||
50 | mtspr SPRN_SPRG_PACA,r13 /* Save it away for the future */ | ||
51 | mfmsr r24 | ||
52 | ori r24,r24,MSR_RI | ||
53 | mtmsrd r24 /* RI on */ | ||
54 | mr r24,r23 | ||
55 | cmpwi 0,r24,0 /* Are we processor 0? */ | 47 | cmpwi 0,r24,0 /* Are we processor 0? */ |
56 | bne 1f | 48 | bne 1f |
49 | LOAD_REG_ADDR(r13, boot_paca) | ||
50 | mtspr SPRN_SPRG_PACA,r13 /* Save it away for the future */ | ||
51 | mfmsr r23 | ||
52 | ori r23,r23,MSR_RI | ||
53 | mtmsrd r23 /* RI on */ | ||
57 | b .__start_initialization_iSeries /* Start up the first processor */ | 54 | b .__start_initialization_iSeries /* Start up the first processor */ |
58 | 1: mfspr r4,SPRN_CTRLF | 55 | 1: mfspr r4,SPRN_CTRLF |
59 | li r5,CTRL_RUNLATCH /* Turn off the run light */ | 56 | li r5,CTRL_RUNLATCH /* Turn off the run light */ |
@@ -86,6 +83,16 @@ system_reset_iSeries: | |||
86 | #endif | 83 | #endif |
87 | 84 | ||
88 | 2: | 85 | 2: |
86 | /* Load our paca now that it's been allocated */ | ||
87 | LOAD_REG_ADDR(r13, paca) | ||
88 | ld r13,0(r13) | ||
89 | mulli r0,r24,PACA_SIZE | ||
90 | add r13,r13,r0 | ||
91 | mtspr SPRN_SPRG_PACA,r13 /* Save it away for the future */ | ||
92 | mfmsr r23 | ||
93 | ori r23,r23,MSR_RI | ||
94 | mtmsrd r23 /* RI on */ | ||
95 | |||
89 | HMT_LOW | 96 | HMT_LOW |
90 | #ifdef CONFIG_SMP | 97 | #ifdef CONFIG_SMP |
91 | lbz r23,PACAPROCSTART(r13) /* Test if this processor | 98 | lbz r23,PACAPROCSTART(r13) /* Test if this processor |
diff --git a/arch/powerpc/platforms/iseries/htab.c b/arch/powerpc/platforms/iseries/htab.c index f99c6c4b6985..3ae66ab9d5e7 100644 --- a/arch/powerpc/platforms/iseries/htab.c +++ b/arch/powerpc/platforms/iseries/htab.c | |||
@@ -19,8 +19,7 @@ | |||
19 | 19 | ||
20 | #include "call_hpt.h" | 20 | #include "call_hpt.h" |
21 | 21 | ||
22 | static spinlock_t iSeries_hlocks[64] __cacheline_aligned_in_smp = | 22 | static spinlock_t iSeries_hlocks[64] __cacheline_aligned_in_smp; |
23 | { [0 ... 63] = SPIN_LOCK_UNLOCKED}; | ||
24 | 23 | ||
25 | /* | 24 | /* |
26 | * Very primitive algorithm for picking up a lock | 25 | * Very primitive algorithm for picking up a lock |
@@ -245,6 +244,11 @@ static void iSeries_hpte_invalidate(unsigned long slot, unsigned long va, | |||
245 | 244 | ||
246 | void __init hpte_init_iSeries(void) | 245 | void __init hpte_init_iSeries(void) |
247 | { | 246 | { |
247 | int i; | ||
248 | |||
249 | for (i = 0; i < ARRAY_SIZE(iSeries_hlocks); i++) | ||
250 | spin_lock_init(&iSeries_hlocks[i]); | ||
251 | |||
248 | ppc_md.hpte_invalidate = iSeries_hpte_invalidate; | 252 | ppc_md.hpte_invalidate = iSeries_hpte_invalidate; |
249 | ppc_md.hpte_updatepp = iSeries_hpte_updatepp; | 253 | ppc_md.hpte_updatepp = iSeries_hpte_updatepp; |
250 | ppc_md.hpte_updateboltedpp = iSeries_hpte_updateboltedpp; | 254 | ppc_md.hpte_updateboltedpp = iSeries_hpte_updateboltedpp; |
diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c index 9d53cb481a7c..ce61cea0afb5 100644 --- a/arch/powerpc/platforms/iseries/iommu.c +++ b/arch/powerpc/platforms/iseries/iommu.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/list.h> | 29 | #include <linux/list.h> |
30 | #include <linux/pci.h> | 30 | #include <linux/pci.h> |
31 | #include <linux/module.h> | 31 | #include <linux/module.h> |
32 | #include <linux/slab.h> | ||
32 | 33 | ||
33 | #include <asm/iommu.h> | 34 | #include <asm/iommu.h> |
34 | #include <asm/vio.h> | 35 | #include <asm/vio.h> |
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c index 94f444758836..ba446bf355a9 100644 --- a/arch/powerpc/platforms/iseries/irq.c +++ b/arch/powerpc/platforms/iseries/irq.c | |||
@@ -214,12 +214,12 @@ void __init iSeries_activate_IRQs() | |||
214 | unsigned long flags; | 214 | unsigned long flags; |
215 | 215 | ||
216 | for_each_irq (irq) { | 216 | for_each_irq (irq) { |
217 | struct irq_desc *desc = get_irq_desc(irq); | 217 | struct irq_desc *desc = irq_to_desc(irq); |
218 | 218 | ||
219 | if (desc && desc->chip && desc->chip->startup) { | 219 | if (desc && desc->chip && desc->chip->startup) { |
220 | spin_lock_irqsave(&desc->lock, flags); | 220 | raw_spin_lock_irqsave(&desc->lock, flags); |
221 | desc->chip->startup(irq); | 221 | desc->chip->startup(irq); |
222 | spin_unlock_irqrestore(&desc->lock, flags); | 222 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
223 | } | 223 | } |
224 | } | 224 | } |
225 | } | 225 | } |
@@ -273,7 +273,7 @@ static void iseries_end_IRQ(unsigned int irq) | |||
273 | } | 273 | } |
274 | 274 | ||
275 | static struct irq_chip iseries_pic = { | 275 | static struct irq_chip iseries_pic = { |
276 | .typename = "iSeries irq controller", | 276 | .name = "iSeries", |
277 | .startup = iseries_startup_IRQ, | 277 | .startup = iseries_startup_IRQ, |
278 | .shutdown = iseries_shutdown_IRQ, | 278 | .shutdown = iseries_shutdown_IRQ, |
279 | .unmask = iseries_enable_IRQ, | 279 | .unmask = iseries_enable_IRQ, |
diff --git a/arch/powerpc/platforms/iseries/mf.c b/arch/powerpc/platforms/iseries/mf.c index 0d9343df35bc..d2c1d497846e 100644 --- a/arch/powerpc/platforms/iseries/mf.c +++ b/arch/powerpc/platforms/iseries/mf.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <linux/dma-mapping.h> | 33 | #include <linux/dma-mapping.h> |
34 | #include <linux/bcd.h> | 34 | #include <linux/bcd.h> |
35 | #include <linux/rtc.h> | 35 | #include <linux/rtc.h> |
36 | #include <linux/slab.h> | ||
36 | 37 | ||
37 | #include <asm/time.h> | 38 | #include <asm/time.h> |
38 | #include <asm/uaccess.h> | 39 | #include <asm/uaccess.h> |
@@ -855,59 +856,58 @@ static int mf_get_boot_rtc(struct rtc_time *tm) | |||
855 | } | 856 | } |
856 | 857 | ||
857 | #ifdef CONFIG_PROC_FS | 858 | #ifdef CONFIG_PROC_FS |
858 | 859 | static int mf_cmdline_proc_show(struct seq_file *m, void *v) | |
859 | static int proc_mf_dump_cmdline(char *page, char **start, off_t off, | ||
860 | int count, int *eof, void *data) | ||
861 | { | 860 | { |
862 | int len; | 861 | char *page, *p; |
863 | char *p; | ||
864 | struct vsp_cmd_data vsp_cmd; | 862 | struct vsp_cmd_data vsp_cmd; |
865 | int rc; | 863 | int rc; |
866 | dma_addr_t dma_addr; | 864 | dma_addr_t dma_addr; |
867 | 865 | ||
868 | /* The HV appears to return no more than 256 bytes of command line */ | 866 | /* The HV appears to return no more than 256 bytes of command line */ |
869 | if (off >= 256) | 867 | page = kmalloc(256, GFP_KERNEL); |
870 | return 0; | 868 | if (!page) |
871 | if ((off + count) > 256) | 869 | return -ENOMEM; |
872 | count = 256 - off; | ||
873 | 870 | ||
874 | dma_addr = iseries_hv_map(page, off + count, DMA_FROM_DEVICE); | 871 | dma_addr = iseries_hv_map(page, 256, DMA_FROM_DEVICE); |
875 | if (dma_addr == DMA_ERROR_CODE) | 872 | if (dma_addr == DMA_ERROR_CODE) { |
873 | kfree(page); | ||
876 | return -ENOMEM; | 874 | return -ENOMEM; |
877 | memset(page, 0, off + count); | 875 | } |
876 | memset(page, 0, 256); | ||
878 | memset(&vsp_cmd, 0, sizeof(vsp_cmd)); | 877 | memset(&vsp_cmd, 0, sizeof(vsp_cmd)); |
879 | vsp_cmd.cmd = 33; | 878 | vsp_cmd.cmd = 33; |
880 | vsp_cmd.sub_data.kern.token = dma_addr; | 879 | vsp_cmd.sub_data.kern.token = dma_addr; |
881 | vsp_cmd.sub_data.kern.address_type = HvLpDma_AddressType_TceIndex; | 880 | vsp_cmd.sub_data.kern.address_type = HvLpDma_AddressType_TceIndex; |
882 | vsp_cmd.sub_data.kern.side = (u64)data; | 881 | vsp_cmd.sub_data.kern.side = (u64)m->private; |
883 | vsp_cmd.sub_data.kern.length = off + count; | 882 | vsp_cmd.sub_data.kern.length = 256; |
884 | mb(); | 883 | mb(); |
885 | rc = signal_vsp_instruction(&vsp_cmd); | 884 | rc = signal_vsp_instruction(&vsp_cmd); |
886 | iseries_hv_unmap(dma_addr, off + count, DMA_FROM_DEVICE); | 885 | iseries_hv_unmap(dma_addr, 256, DMA_FROM_DEVICE); |
887 | if (rc) | 886 | if (rc) { |
887 | kfree(page); | ||
888 | return rc; | 888 | return rc; |
889 | if (vsp_cmd.result_code != 0) | 889 | } |
890 | if (vsp_cmd.result_code != 0) { | ||
891 | kfree(page); | ||
890 | return -ENOMEM; | 892 | return -ENOMEM; |
893 | } | ||
891 | p = page; | 894 | p = page; |
892 | len = 0; | 895 | while (p - page < 256) { |
893 | while (len < (off + count)) { | 896 | if (*p == '\0' || *p == '\n') { |
894 | if ((*p == '\0') || (*p == '\n')) { | 897 | *p = '\n'; |
895 | if (*p == '\0') | ||
896 | *p = '\n'; | ||
897 | p++; | ||
898 | len++; | ||
899 | *eof = 1; | ||
900 | break; | 898 | break; |
901 | } | 899 | } |
902 | p++; | 900 | p++; |
903 | len++; | ||
904 | } | ||
905 | 901 | ||
906 | if (len < off) { | ||
907 | *eof = 1; | ||
908 | len = 0; | ||
909 | } | 902 | } |
910 | return len; | 903 | seq_write(m, page, p - page); |
904 | kfree(page); | ||
905 | return 0; | ||
906 | } | ||
907 | |||
908 | static int mf_cmdline_proc_open(struct inode *inode, struct file *file) | ||
909 | { | ||
910 | return single_open(file, mf_cmdline_proc_show, PDE(inode)->data); | ||
911 | } | 911 | } |
912 | 912 | ||
913 | #if 0 | 913 | #if 0 |
@@ -962,10 +962,8 @@ static int proc_mf_dump_vmlinux(char *page, char **start, off_t off, | |||
962 | } | 962 | } |
963 | #endif | 963 | #endif |
964 | 964 | ||
965 | static int proc_mf_dump_side(char *page, char **start, off_t off, | 965 | static int mf_side_proc_show(struct seq_file *m, void *v) |
966 | int count, int *eof, void *data) | ||
967 | { | 966 | { |
968 | int len; | ||
969 | char mf_current_side = ' '; | 967 | char mf_current_side = ' '; |
970 | struct vsp_cmd_data vsp_cmd; | 968 | struct vsp_cmd_data vsp_cmd; |
971 | 969 | ||
@@ -989,21 +987,17 @@ static int proc_mf_dump_side(char *page, char **start, off_t off, | |||
989 | } | 987 | } |
990 | } | 988 | } |
991 | 989 | ||
992 | len = sprintf(page, "%c\n", mf_current_side); | 990 | seq_printf(m, "%c\n", mf_current_side); |
991 | return 0; | ||
992 | } | ||
993 | 993 | ||
994 | if (len <= (off + count)) | 994 | static int mf_side_proc_open(struct inode *inode, struct file *file) |
995 | *eof = 1; | 995 | { |
996 | *start = page + off; | 996 | return single_open(file, mf_side_proc_show, NULL); |
997 | len -= off; | ||
998 | if (len > count) | ||
999 | len = count; | ||
1000 | if (len < 0) | ||
1001 | len = 0; | ||
1002 | return len; | ||
1003 | } | 997 | } |
1004 | 998 | ||
1005 | static int proc_mf_change_side(struct file *file, const char __user *buffer, | 999 | static ssize_t mf_side_proc_write(struct file *file, const char __user *buffer, |
1006 | unsigned long count, void *data) | 1000 | size_t count, loff_t *pos) |
1007 | { | 1001 | { |
1008 | char side; | 1002 | char side; |
1009 | u64 newSide; | 1003 | u64 newSide; |
@@ -1041,6 +1035,15 @@ static int proc_mf_change_side(struct file *file, const char __user *buffer, | |||
1041 | return count; | 1035 | return count; |
1042 | } | 1036 | } |
1043 | 1037 | ||
1038 | static const struct file_operations mf_side_proc_fops = { | ||
1039 | .owner = THIS_MODULE, | ||
1040 | .open = mf_side_proc_open, | ||
1041 | .read = seq_read, | ||
1042 | .llseek = seq_lseek, | ||
1043 | .release = single_release, | ||
1044 | .write = mf_side_proc_write, | ||
1045 | }; | ||
1046 | |||
1044 | #if 0 | 1047 | #if 0 |
1045 | static void mf_getSrcHistory(char *buffer, int size) | 1048 | static void mf_getSrcHistory(char *buffer, int size) |
1046 | { | 1049 | { |
@@ -1087,8 +1090,7 @@ static void mf_getSrcHistory(char *buffer, int size) | |||
1087 | } | 1090 | } |
1088 | #endif | 1091 | #endif |
1089 | 1092 | ||
1090 | static int proc_mf_dump_src(char *page, char **start, off_t off, | 1093 | static int mf_src_proc_show(struct seq_file *m, void *v) |
1091 | int count, int *eof, void *data) | ||
1092 | { | 1094 | { |
1093 | #if 0 | 1095 | #if 0 |
1094 | int len; | 1096 | int len; |
@@ -1109,8 +1111,13 @@ static int proc_mf_dump_src(char *page, char **start, off_t off, | |||
1109 | #endif | 1111 | #endif |
1110 | } | 1112 | } |
1111 | 1113 | ||
1112 | static int proc_mf_change_src(struct file *file, const char __user *buffer, | 1114 | static int mf_src_proc_open(struct inode *inode, struct file *file) |
1113 | unsigned long count, void *data) | 1115 | { |
1116 | return single_open(file, mf_src_proc_show, NULL); | ||
1117 | } | ||
1118 | |||
1119 | static ssize_t mf_src_proc_write(struct file *file, const char __user *buffer, | ||
1120 | size_t count, loff_t *pos) | ||
1114 | { | 1121 | { |
1115 | char stkbuf[10]; | 1122 | char stkbuf[10]; |
1116 | 1123 | ||
@@ -1135,9 +1142,19 @@ static int proc_mf_change_src(struct file *file, const char __user *buffer, | |||
1135 | return count; | 1142 | return count; |
1136 | } | 1143 | } |
1137 | 1144 | ||
1138 | static int proc_mf_change_cmdline(struct file *file, const char __user *buffer, | 1145 | static const struct file_operations mf_src_proc_fops = { |
1139 | unsigned long count, void *data) | 1146 | .owner = THIS_MODULE, |
1147 | .open = mf_src_proc_open, | ||
1148 | .read = seq_read, | ||
1149 | .llseek = seq_lseek, | ||
1150 | .release = single_release, | ||
1151 | .write = mf_src_proc_write, | ||
1152 | }; | ||
1153 | |||
1154 | static ssize_t mf_cmdline_proc_write(struct file *file, const char __user *buffer, | ||
1155 | size_t count, loff_t *pos) | ||
1140 | { | 1156 | { |
1157 | void *data = PDE(file->f_path.dentry->d_inode)->data; | ||
1141 | struct vsp_cmd_data vsp_cmd; | 1158 | struct vsp_cmd_data vsp_cmd; |
1142 | dma_addr_t dma_addr; | 1159 | dma_addr_t dma_addr; |
1143 | char *page; | 1160 | char *page; |
@@ -1172,6 +1189,15 @@ out: | |||
1172 | return ret; | 1189 | return ret; |
1173 | } | 1190 | } |
1174 | 1191 | ||
1192 | static const struct file_operations mf_cmdline_proc_fops = { | ||
1193 | .owner = THIS_MODULE, | ||
1194 | .open = mf_cmdline_proc_open, | ||
1195 | .read = seq_read, | ||
1196 | .llseek = seq_lseek, | ||
1197 | .release = single_release, | ||
1198 | .write = mf_cmdline_proc_write, | ||
1199 | }; | ||
1200 | |||
1175 | static ssize_t proc_mf_change_vmlinux(struct file *file, | 1201 | static ssize_t proc_mf_change_vmlinux(struct file *file, |
1176 | const char __user *buf, | 1202 | const char __user *buf, |
1177 | size_t count, loff_t *ppos) | 1203 | size_t count, loff_t *ppos) |
@@ -1246,12 +1272,10 @@ static int __init mf_proc_init(void) | |||
1246 | if (!mf) | 1272 | if (!mf) |
1247 | return 1; | 1273 | return 1; |
1248 | 1274 | ||
1249 | ent = create_proc_entry("cmdline", S_IFREG|S_IRUSR|S_IWUSR, mf); | 1275 | ent = proc_create_data("cmdline", S_IRUSR|S_IWUSR, mf, |
1276 | &mf_cmdline_proc_fops, (void *)(long)i); | ||
1250 | if (!ent) | 1277 | if (!ent) |
1251 | return 1; | 1278 | return 1; |
1252 | ent->data = (void *)(long)i; | ||
1253 | ent->read_proc = proc_mf_dump_cmdline; | ||
1254 | ent->write_proc = proc_mf_change_cmdline; | ||
1255 | 1279 | ||
1256 | if (i == 3) /* no vmlinux entry for 'D' */ | 1280 | if (i == 3) /* no vmlinux entry for 'D' */ |
1257 | continue; | 1281 | continue; |
@@ -1263,19 +1287,15 @@ static int __init mf_proc_init(void) | |||
1263 | return 1; | 1287 | return 1; |
1264 | } | 1288 | } |
1265 | 1289 | ||
1266 | ent = create_proc_entry("side", S_IFREG|S_IRUSR|S_IWUSR, mf_proc_root); | 1290 | ent = proc_create("side", S_IFREG|S_IRUSR|S_IWUSR, mf_proc_root, |
1291 | &mf_side_proc_fops); | ||
1267 | if (!ent) | 1292 | if (!ent) |
1268 | return 1; | 1293 | return 1; |
1269 | ent->data = (void *)0; | ||
1270 | ent->read_proc = proc_mf_dump_side; | ||
1271 | ent->write_proc = proc_mf_change_side; | ||
1272 | 1294 | ||
1273 | ent = create_proc_entry("src", S_IFREG|S_IRUSR|S_IWUSR, mf_proc_root); | 1295 | ent = proc_create("src", S_IFREG|S_IRUSR|S_IWUSR, mf_proc_root, |
1296 | &mf_src_proc_fops); | ||
1274 | if (!ent) | 1297 | if (!ent) |
1275 | return 1; | 1298 | return 1; |
1276 | ent->data = (void *)0; | ||
1277 | ent->read_proc = proc_mf_dump_src; | ||
1278 | ent->write_proc = proc_mf_change_src; | ||
1279 | 1299 | ||
1280 | return 0; | 1300 | return 0; |
1281 | } | 1301 | } |
diff --git a/arch/powerpc/platforms/iseries/pci.c b/arch/powerpc/platforms/iseries/pci.c index 175aac8ca7e5..b841c9a9db87 100644 --- a/arch/powerpc/platforms/iseries/pci.c +++ b/arch/powerpc/platforms/iseries/pci.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/kernel.h> | 27 | #include <linux/kernel.h> |
28 | #include <linux/list.h> | 28 | #include <linux/list.h> |
29 | #include <linux/string.h> | 29 | #include <linux/string.h> |
30 | #include <linux/slab.h> | ||
30 | #include <linux/init.h> | 31 | #include <linux/init.h> |
31 | #include <linux/module.h> | 32 | #include <linux/module.h> |
32 | #include <linux/pci.h> | 33 | #include <linux/pci.h> |
diff --git a/arch/powerpc/platforms/iseries/proc.c b/arch/powerpc/platforms/iseries/proc.c index 91f4c6cd4b99..06763682db47 100644 --- a/arch/powerpc/platforms/iseries/proc.c +++ b/arch/powerpc/platforms/iseries/proc.c | |||
@@ -85,7 +85,7 @@ static int proc_titantod_show(struct seq_file *m, void *v) | |||
85 | 85 | ||
86 | seq_printf(m, " titan elapsed = %lu uSec\n", titan_usec); | 86 | seq_printf(m, " titan elapsed = %lu uSec\n", titan_usec); |
87 | seq_printf(m, " tb elapsed = %lu ticks\n", tb_ticks); | 87 | seq_printf(m, " tb elapsed = %lu ticks\n", tb_ticks); |
88 | seq_printf(m, " titan jiffies = %lu.%04lu \n", titan_jiffies, | 88 | seq_printf(m, " titan jiffies = %lu.%04lu\n", titan_jiffies, |
89 | titan_jiff_rem_usec); | 89 | titan_jiff_rem_usec); |
90 | seq_printf(m, " tb jiffies = %lu.%04lu\n", tb_jiffies, | 90 | seq_printf(m, " tb jiffies = %lu.%04lu\n", tb_jiffies, |
91 | tb_jiff_rem_usec); | 91 | tb_jiff_rem_usec); |
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c index a6cd3394feaa..b0863410517f 100644 --- a/arch/powerpc/platforms/iseries/setup.c +++ b/arch/powerpc/platforms/iseries/setup.c | |||
@@ -256,7 +256,7 @@ static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array, | |||
256 | mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array, | 256 | mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array, |
257 | max_entries); | 257 | max_entries); |
258 | 258 | ||
259 | printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks); | 259 | printk("Mainstore_VPD: numMemoryBlocks = %ld\n", mem_blocks); |
260 | for (i = 0; i < mem_blocks; ++i) { | 260 | for (i = 0; i < mem_blocks; ++i) { |
261 | printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n" | 261 | printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n" |
262 | " abs chunks %016lx - %016lx\n", | 262 | " abs chunks %016lx - %016lx\n", |
diff --git a/arch/powerpc/platforms/iseries/vio.c b/arch/powerpc/platforms/iseries/vio.c index 657b72f68493..00b6730bc48f 100644 --- a/arch/powerpc/platforms/iseries/vio.c +++ b/arch/powerpc/platforms/iseries/vio.c | |||
@@ -22,7 +22,7 @@ | |||
22 | */ | 22 | */ |
23 | #include <linux/of.h> | 23 | #include <linux/of.h> |
24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
25 | #include <linux/gfp.h> | 25 | #include <linux/slab.h> |
26 | #include <linux/completion.h> | 26 | #include <linux/completion.h> |
27 | #include <linux/proc_fs.h> | 27 | #include <linux/proc_fs.h> |
28 | #include <linux/module.h> | 28 | #include <linux/module.h> |
@@ -474,6 +474,8 @@ static void __init get_viotape_info(struct device_node *vio_root) | |||
474 | struct vio_waitevent we; | 474 | struct vio_waitevent we; |
475 | int ret; | 475 | int ret; |
476 | 476 | ||
477 | init_completion(&we.com); | ||
478 | |||
477 | ret = viopath_open(viopath_hostLp, viomajorsubtype_tape, 2); | 479 | ret = viopath_open(viopath_hostLp, viomajorsubtype_tape, 2); |
478 | if (ret) { | 480 | if (ret) { |
479 | printk(KERN_WARNING "get_viotape_info: " | 481 | printk(KERN_WARNING "get_viotape_info: " |
diff --git a/arch/powerpc/platforms/iseries/viopath.c b/arch/powerpc/platforms/iseries/viopath.c index 49ff4dc422b7..b5f05d943a90 100644 --- a/arch/powerpc/platforms/iseries/viopath.c +++ b/arch/powerpc/platforms/iseries/viopath.c | |||
@@ -29,6 +29,7 @@ | |||
29 | */ | 29 | */ |
30 | #include <linux/module.h> | 30 | #include <linux/module.h> |
31 | #include <linux/kernel.h> | 31 | #include <linux/kernel.h> |
32 | #include <linux/slab.h> | ||
32 | #include <linux/errno.h> | 33 | #include <linux/errno.h> |
33 | #include <linux/vmalloc.h> | 34 | #include <linux/vmalloc.h> |
34 | #include <linux/string.h> | 35 | #include <linux/string.h> |
@@ -116,7 +117,7 @@ static int proc_viopath_show(struct seq_file *m, void *v) | |||
116 | u16 vlanMap; | 117 | u16 vlanMap; |
117 | dma_addr_t handle; | 118 | dma_addr_t handle; |
118 | HvLpEvent_Rc hvrc; | 119 | HvLpEvent_Rc hvrc; |
119 | DECLARE_COMPLETION(done); | 120 | DECLARE_COMPLETION_ONSTACK(done); |
120 | struct device_node *node; | 121 | struct device_node *node; |
121 | const char *sysid; | 122 | const char *sysid; |
122 | 123 | ||
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c index 0636a3df6978..39df70529d29 100644 --- a/arch/powerpc/platforms/maple/setup.c +++ b/arch/powerpc/platforms/maple/setup.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <linux/stddef.h> | 21 | #include <linux/stddef.h> |
22 | #include <linux/unistd.h> | 22 | #include <linux/unistd.h> |
23 | #include <linux/ptrace.h> | 23 | #include <linux/ptrace.h> |
24 | #include <linux/slab.h> | ||
25 | #include <linux/user.h> | 24 | #include <linux/user.h> |
26 | #include <linux/tty.h> | 25 | #include <linux/tty.h> |
27 | #include <linux/string.h> | 26 | #include <linux/string.h> |
diff --git a/arch/powerpc/platforms/pasemi/cpufreq.c b/arch/powerpc/platforms/pasemi/cpufreq.c index be2527a516ea..d35e0520abf0 100644 --- a/arch/powerpc/platforms/pasemi/cpufreq.c +++ b/arch/powerpc/platforms/pasemi/cpufreq.c | |||
@@ -304,8 +304,8 @@ static struct cpufreq_driver pas_cpufreq_driver = { | |||
304 | 304 | ||
305 | static int __init pas_cpufreq_init(void) | 305 | static int __init pas_cpufreq_init(void) |
306 | { | 306 | { |
307 | if (!machine_is_compatible("PA6T-1682M") && | 307 | if (!of_machine_is_compatible("PA6T-1682M") && |
308 | !machine_is_compatible("pasemi,pwrficient")) | 308 | !of_machine_is_compatible("pasemi,pwrficient")) |
309 | return -ENODEV; | 309 | return -ENODEV; |
310 | 310 | ||
311 | return cpufreq_register_driver(&pas_cpufreq_driver); | 311 | return cpufreq_register_driver(&pas_cpufreq_driver); |
diff --git a/arch/powerpc/platforms/pasemi/dma_lib.c b/arch/powerpc/platforms/pasemi/dma_lib.c index a6152d922243..09695ae50f91 100644 --- a/arch/powerpc/platforms/pasemi/dma_lib.c +++ b/arch/powerpc/platforms/pasemi/dma_lib.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/module.h> | 22 | #include <linux/module.h> |
23 | #include <linux/pci.h> | 23 | #include <linux/pci.h> |
24 | #include <linux/slab.h> | ||
24 | #include <linux/of.h> | 25 | #include <linux/of.h> |
25 | 26 | ||
26 | #include <asm/pasemi_dma.h> | 27 | #include <asm/pasemi_dma.h> |
diff --git a/arch/powerpc/platforms/pasemi/gpio_mdio.c b/arch/powerpc/platforms/pasemi/gpio_mdio.c index 3bf546797cbb..0f881f64583e 100644 --- a/arch/powerpc/platforms/pasemi/gpio_mdio.c +++ b/arch/powerpc/platforms/pasemi/gpio_mdio.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/module.h> | 25 | #include <linux/module.h> |
26 | #include <linux/types.h> | 26 | #include <linux/types.h> |
27 | #include <linux/slab.h> | ||
27 | #include <linux/sched.h> | 28 | #include <linux/sched.h> |
28 | #include <linux/errno.h> | 29 | #include <linux/errno.h> |
29 | #include <linux/ioport.h> | 30 | #include <linux/ioport.h> |
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c index a4619347aa7e..ac6fdd973291 100644 --- a/arch/powerpc/platforms/pasemi/setup.c +++ b/arch/powerpc/platforms/pasemi/setup.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/console.h> | 28 | #include <linux/console.h> |
29 | #include <linux/pci.h> | 29 | #include <linux/pci.h> |
30 | #include <linux/of_platform.h> | 30 | #include <linux/of_platform.h> |
31 | #include <linux/gfp.h> | ||
31 | 32 | ||
32 | #include <asm/prom.h> | 33 | #include <asm/prom.h> |
33 | #include <asm/system.h> | 34 | #include <asm/system.h> |
@@ -71,7 +72,7 @@ static void pas_restart(char *cmd) | |||
71 | } | 72 | } |
72 | 73 | ||
73 | #ifdef CONFIG_SMP | 74 | #ifdef CONFIG_SMP |
74 | static raw_spinlock_t timebase_lock; | 75 | static arch_spinlock_t timebase_lock; |
75 | static unsigned long timebase; | 76 | static unsigned long timebase; |
76 | 77 | ||
77 | static void __devinit pas_give_timebase(void) | 78 | static void __devinit pas_give_timebase(void) |
@@ -80,11 +81,11 @@ static void __devinit pas_give_timebase(void) | |||
80 | 81 | ||
81 | local_irq_save(flags); | 82 | local_irq_save(flags); |
82 | hard_irq_disable(); | 83 | hard_irq_disable(); |
83 | __raw_spin_lock(&timebase_lock); | 84 | arch_spin_lock(&timebase_lock); |
84 | mtspr(SPRN_TBCTL, TBCTL_FREEZE); | 85 | mtspr(SPRN_TBCTL, TBCTL_FREEZE); |
85 | isync(); | 86 | isync(); |
86 | timebase = get_tb(); | 87 | timebase = get_tb(); |
87 | __raw_spin_unlock(&timebase_lock); | 88 | arch_spin_unlock(&timebase_lock); |
88 | 89 | ||
89 | while (timebase) | 90 | while (timebase) |
90 | barrier(); | 91 | barrier(); |
@@ -97,10 +98,10 @@ static void __devinit pas_take_timebase(void) | |||
97 | while (!timebase) | 98 | while (!timebase) |
98 | smp_rmb(); | 99 | smp_rmb(); |
99 | 100 | ||
100 | __raw_spin_lock(&timebase_lock); | 101 | arch_spin_lock(&timebase_lock); |
101 | set_tb(timebase >> 32, timebase & 0xffffffff); | 102 | set_tb(timebase >> 32, timebase & 0xffffffff); |
102 | timebase = 0; | 103 | timebase = 0; |
103 | __raw_spin_unlock(&timebase_lock); | 104 | arch_spin_unlock(&timebase_lock); |
104 | } | 105 | } |
105 | 106 | ||
106 | struct smp_ops_t pas_smp_ops = { | 107 | struct smp_ops_t pas_smp_ops = { |
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c index cf660916ae0b..84d7fd9bcc69 100644 --- a/arch/powerpc/platforms/powermac/bootx_init.c +++ b/arch/powerpc/platforms/powermac/bootx_init.c | |||
@@ -12,7 +12,7 @@ | |||
12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
13 | #include <linux/string.h> | 13 | #include <linux/string.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/utsrelease.h> | 15 | #include <generated/utsrelease.h> |
16 | #include <asm/sections.h> | 16 | #include <asm/sections.h> |
17 | #include <asm/prom.h> | 17 | #include <asm/prom.h> |
18 | #include <asm/page.h> | 18 | #include <asm/page.h> |
@@ -539,7 +539,7 @@ void __init bootx_init(unsigned long r3, unsigned long r4) | |||
539 | if (model | 539 | if (model |
540 | && (strcmp(model, "iMac,1") == 0 | 540 | && (strcmp(model, "iMac,1") == 0 |
541 | || strcmp(model, "PowerMac1,1") == 0)) { | 541 | || strcmp(model, "PowerMac1,1") == 0)) { |
542 | bootx_printf("iMac,1 detected, shutting down USB \n"); | 542 | bootx_printf("iMac,1 detected, shutting down USB\n"); |
543 | out_le32((unsigned __iomem *)0x80880008, 1); /* XXX */ | 543 | out_le32((unsigned __iomem *)0x80880008, 1); /* XXX */ |
544 | } | 544 | } |
545 | } | 545 | } |
@@ -554,7 +554,7 @@ void __init bootx_init(unsigned long r3, unsigned long r4) | |||
554 | } else | 554 | } else |
555 | space = bi->totalParamsSize; | 555 | space = bi->totalParamsSize; |
556 | 556 | ||
557 | bootx_printf("Total space used by parameters & ramdisk: 0x%x \n", space); | 557 | bootx_printf("Total space used by parameters & ramdisk: 0x%x\n", space); |
558 | 558 | ||
559 | /* New BootX will have flushed all TLBs and enters kernel with | 559 | /* New BootX will have flushed all TLBs and enters kernel with |
560 | * MMU switched OFF, so this should not be useful anymore. | 560 | * MMU switched OFF, so this should not be useful anymore. |
diff --git a/arch/powerpc/platforms/powermac/cpufreq_32.c b/arch/powerpc/platforms/powermac/cpufreq_32.c index 08d94e4cedd3..1e9eba175ff0 100644 --- a/arch/powerpc/platforms/powermac/cpufreq_32.c +++ b/arch/powerpc/platforms/powermac/cpufreq_32.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <linux/sched.h> | 21 | #include <linux/sched.h> |
22 | #include <linux/adb.h> | 22 | #include <linux/adb.h> |
23 | #include <linux/pmu.h> | 23 | #include <linux/pmu.h> |
24 | #include <linux/slab.h> | ||
25 | #include <linux/cpufreq.h> | 24 | #include <linux/cpufreq.h> |
26 | #include <linux/init.h> | 25 | #include <linux/init.h> |
27 | #include <linux/sysdev.h> | 26 | #include <linux/sysdev.h> |
@@ -657,31 +656,31 @@ static int __init pmac_cpufreq_setup(void) | |||
657 | cur_freq = (*value) / 1000; | 656 | cur_freq = (*value) / 1000; |
658 | 657 | ||
659 | /* Check for 7447A based MacRISC3 */ | 658 | /* Check for 7447A based MacRISC3 */ |
660 | if (machine_is_compatible("MacRISC3") && | 659 | if (of_machine_is_compatible("MacRISC3") && |
661 | of_get_property(cpunode, "dynamic-power-step", NULL) && | 660 | of_get_property(cpunode, "dynamic-power-step", NULL) && |
662 | PVR_VER(mfspr(SPRN_PVR)) == 0x8003) { | 661 | PVR_VER(mfspr(SPRN_PVR)) == 0x8003) { |
663 | pmac_cpufreq_init_7447A(cpunode); | 662 | pmac_cpufreq_init_7447A(cpunode); |
664 | /* Check for other MacRISC3 machines */ | 663 | /* Check for other MacRISC3 machines */ |
665 | } else if (machine_is_compatible("PowerBook3,4") || | 664 | } else if (of_machine_is_compatible("PowerBook3,4") || |
666 | machine_is_compatible("PowerBook3,5") || | 665 | of_machine_is_compatible("PowerBook3,5") || |
667 | machine_is_compatible("MacRISC3")) { | 666 | of_machine_is_compatible("MacRISC3")) { |
668 | pmac_cpufreq_init_MacRISC3(cpunode); | 667 | pmac_cpufreq_init_MacRISC3(cpunode); |
669 | /* Else check for iBook2 500/600 */ | 668 | /* Else check for iBook2 500/600 */ |
670 | } else if (machine_is_compatible("PowerBook4,1")) { | 669 | } else if (of_machine_is_compatible("PowerBook4,1")) { |
671 | hi_freq = cur_freq; | 670 | hi_freq = cur_freq; |
672 | low_freq = 400000; | 671 | low_freq = 400000; |
673 | set_speed_proc = pmu_set_cpu_speed; | 672 | set_speed_proc = pmu_set_cpu_speed; |
674 | is_pmu_based = 1; | 673 | is_pmu_based = 1; |
675 | } | 674 | } |
676 | /* Else check for TiPb 550 */ | 675 | /* Else check for TiPb 550 */ |
677 | else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) { | 676 | else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) { |
678 | hi_freq = cur_freq; | 677 | hi_freq = cur_freq; |
679 | low_freq = 500000; | 678 | low_freq = 500000; |
680 | set_speed_proc = pmu_set_cpu_speed; | 679 | set_speed_proc = pmu_set_cpu_speed; |
681 | is_pmu_based = 1; | 680 | is_pmu_based = 1; |
682 | } | 681 | } |
683 | /* Else check for TiPb 400 & 500 */ | 682 | /* Else check for TiPb 400 & 500 */ |
684 | else if (machine_is_compatible("PowerBook3,2")) { | 683 | else if (of_machine_is_compatible("PowerBook3,2")) { |
685 | /* We only know about the 400 MHz and the 500Mhz model | 684 | /* We only know about the 400 MHz and the 500Mhz model |
686 | * they both have 300 MHz as low frequency | 685 | * they both have 300 MHz as low frequency |
687 | */ | 686 | */ |
diff --git a/arch/powerpc/platforms/powermac/cpufreq_64.c b/arch/powerpc/platforms/powermac/cpufreq_64.c index 708c75133377..3ca09d3ccce3 100644 --- a/arch/powerpc/platforms/powermac/cpufreq_64.c +++ b/arch/powerpc/platforms/powermac/cpufreq_64.c | |||
@@ -18,7 +18,6 @@ | |||
18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
19 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
20 | #include <linux/sched.h> | 20 | #include <linux/sched.h> |
21 | #include <linux/slab.h> | ||
22 | #include <linux/cpufreq.h> | 21 | #include <linux/cpufreq.h> |
23 | #include <linux/init.h> | 22 | #include <linux/init.h> |
24 | #include <linux/completion.h> | 23 | #include <linux/completion.h> |
@@ -398,11 +397,11 @@ static int __init g5_neo2_cpufreq_init(struct device_node *cpus) | |||
398 | int rc = -ENODEV; | 397 | int rc = -ENODEV; |
399 | 398 | ||
400 | /* Check supported platforms */ | 399 | /* Check supported platforms */ |
401 | if (machine_is_compatible("PowerMac8,1") || | 400 | if (of_machine_is_compatible("PowerMac8,1") || |
402 | machine_is_compatible("PowerMac8,2") || | 401 | of_machine_is_compatible("PowerMac8,2") || |
403 | machine_is_compatible("PowerMac9,1")) | 402 | of_machine_is_compatible("PowerMac9,1")) |
404 | use_volts_smu = 1; | 403 | use_volts_smu = 1; |
405 | else if (machine_is_compatible("PowerMac11,2")) | 404 | else if (of_machine_is_compatible("PowerMac11,2")) |
406 | use_volts_vdnap = 1; | 405 | use_volts_vdnap = 1; |
407 | else | 406 | else |
408 | return -ENODEV; | 407 | return -ENODEV; |
@@ -729,9 +728,9 @@ static int __init g5_cpufreq_init(void) | |||
729 | return -ENODEV; | 728 | return -ENODEV; |
730 | } | 729 | } |
731 | 730 | ||
732 | if (machine_is_compatible("PowerMac7,2") || | 731 | if (of_machine_is_compatible("PowerMac7,2") || |
733 | machine_is_compatible("PowerMac7,3") || | 732 | of_machine_is_compatible("PowerMac7,3") || |
734 | machine_is_compatible("RackMac3,1")) | 733 | of_machine_is_compatible("RackMac3,1")) |
735 | rc = g5_pm72_cpufreq_init(cpus); | 734 | rc = g5_pm72_cpufreq_init(cpus); |
736 | #ifdef CONFIG_PMAC_SMU | 735 | #ifdef CONFIG_PMAC_SMU |
737 | else | 736 | else |
diff --git a/arch/powerpc/platforms/powermac/feature.c b/arch/powerpc/platforms/powermac/feature.c index fbc9bbd74dbd..9e1b9fd75206 100644 --- a/arch/powerpc/platforms/powermac/feature.c +++ b/arch/powerpc/platforms/powermac/feature.c | |||
@@ -59,10 +59,10 @@ extern struct device_node *k2_skiplist[2]; | |||
59 | * We use a single global lock to protect accesses. Each driver has | 59 | * We use a single global lock to protect accesses. Each driver has |
60 | * to take care of its own locking | 60 | * to take care of its own locking |
61 | */ | 61 | */ |
62 | DEFINE_SPINLOCK(feature_lock); | 62 | DEFINE_RAW_SPINLOCK(feature_lock); |
63 | 63 | ||
64 | #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); | 64 | #define LOCK(flags) raw_spin_lock_irqsave(&feature_lock, flags); |
65 | #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); | 65 | #define UNLOCK(flags) raw_spin_unlock_irqrestore(&feature_lock, flags); |
66 | 66 | ||
67 | 67 | ||
68 | /* | 68 | /* |
@@ -2426,7 +2426,7 @@ static int __init probe_motherboard(void) | |||
2426 | } | 2426 | } |
2427 | } | 2427 | } |
2428 | for(i=0; i<ARRAY_SIZE(pmac_mb_defs); i++) { | 2428 | for(i=0; i<ARRAY_SIZE(pmac_mb_defs); i++) { |
2429 | if (machine_is_compatible(pmac_mb_defs[i].model_string)) { | 2429 | if (of_machine_is_compatible(pmac_mb_defs[i].model_string)) { |
2430 | pmac_mb = pmac_mb_defs[i]; | 2430 | pmac_mb = pmac_mb_defs[i]; |
2431 | goto found; | 2431 | goto found; |
2432 | } | 2432 | } |
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c index 414ca9849f23..f45331ab97cb 100644 --- a/arch/powerpc/platforms/powermac/low_i2c.c +++ b/arch/powerpc/platforms/powermac/low_i2c.c | |||
@@ -42,6 +42,8 @@ | |||
42 | #include <linux/interrupt.h> | 42 | #include <linux/interrupt.h> |
43 | #include <linux/timer.h> | 43 | #include <linux/timer.h> |
44 | #include <linux/mutex.h> | 44 | #include <linux/mutex.h> |
45 | #include <linux/i2c.h> | ||
46 | #include <linux/slab.h> | ||
45 | #include <asm/keylargo.h> | 47 | #include <asm/keylargo.h> |
46 | #include <asm/uninorth.h> | 48 | #include <asm/uninorth.h> |
47 | #include <asm/io.h> | 49 | #include <asm/io.h> |
@@ -80,7 +82,7 @@ struct pmac_i2c_bus | |||
80 | struct device_node *busnode; | 82 | struct device_node *busnode; |
81 | int type; | 83 | int type; |
82 | int flags; | 84 | int flags; |
83 | struct i2c_adapter *adapter; | 85 | struct i2c_adapter adapter; |
84 | void *hostdata; | 86 | void *hostdata; |
85 | int channel; /* some hosts have multiple */ | 87 | int channel; /* some hosts have multiple */ |
86 | int mode; /* current mode */ | 88 | int mode; /* current mode */ |
@@ -1014,25 +1016,9 @@ int pmac_i2c_get_channel(struct pmac_i2c_bus *bus) | |||
1014 | EXPORT_SYMBOL_GPL(pmac_i2c_get_channel); | 1016 | EXPORT_SYMBOL_GPL(pmac_i2c_get_channel); |
1015 | 1017 | ||
1016 | 1018 | ||
1017 | void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus, | ||
1018 | struct i2c_adapter *adapter) | ||
1019 | { | ||
1020 | WARN_ON(bus->adapter != NULL); | ||
1021 | bus->adapter = adapter; | ||
1022 | } | ||
1023 | EXPORT_SYMBOL_GPL(pmac_i2c_attach_adapter); | ||
1024 | |||
1025 | void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus, | ||
1026 | struct i2c_adapter *adapter) | ||
1027 | { | ||
1028 | WARN_ON(bus->adapter != adapter); | ||
1029 | bus->adapter = NULL; | ||
1030 | } | ||
1031 | EXPORT_SYMBOL_GPL(pmac_i2c_detach_adapter); | ||
1032 | |||
1033 | struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus) | 1019 | struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus) |
1034 | { | 1020 | { |
1035 | return bus->adapter; | 1021 | return &bus->adapter; |
1036 | } | 1022 | } |
1037 | EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter); | 1023 | EXPORT_SYMBOL_GPL(pmac_i2c_get_adapter); |
1038 | 1024 | ||
@@ -1041,7 +1027,7 @@ struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter) | |||
1041 | struct pmac_i2c_bus *bus; | 1027 | struct pmac_i2c_bus *bus; |
1042 | 1028 | ||
1043 | list_for_each_entry(bus, &pmac_i2c_busses, link) | 1029 | list_for_each_entry(bus, &pmac_i2c_busses, link) |
1044 | if (bus->adapter == adapter) | 1030 | if (&bus->adapter == adapter) |
1045 | return bus; | 1031 | return bus; |
1046 | return NULL; | 1032 | return NULL; |
1047 | } | 1033 | } |
@@ -1053,7 +1039,7 @@ int pmac_i2c_match_adapter(struct device_node *dev, struct i2c_adapter *adapter) | |||
1053 | 1039 | ||
1054 | if (bus == NULL) | 1040 | if (bus == NULL) |
1055 | return 0; | 1041 | return 0; |
1056 | return (bus->adapter == adapter); | 1042 | return (&bus->adapter == adapter); |
1057 | } | 1043 | } |
1058 | EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter); | 1044 | EXPORT_SYMBOL_GPL(pmac_i2c_match_adapter); |
1059 | 1045 | ||
diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c index c6f0f9e738e5..b1cdcf94aa8e 100644 --- a/arch/powerpc/platforms/powermac/nvram.c +++ b/arch/powerpc/platforms/powermac/nvram.c | |||
@@ -14,7 +14,6 @@ | |||
14 | #include <linux/string.h> | 14 | #include <linux/string.h> |
15 | #include <linux/nvram.h> | 15 | #include <linux/nvram.h> |
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/slab.h> | ||
18 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
19 | #include <linux/errno.h> | 18 | #include <linux/errno.h> |
20 | #include <linux/adb.h> | 19 | #include <linux/adb.h> |
@@ -80,7 +79,7 @@ static int is_core_99; | |||
80 | static int core99_bank = 0; | 79 | static int core99_bank = 0; |
81 | static int nvram_partitions[3]; | 80 | static int nvram_partitions[3]; |
82 | // XXX Turn that into a sem | 81 | // XXX Turn that into a sem |
83 | static DEFINE_SPINLOCK(nv_lock); | 82 | static DEFINE_RAW_SPINLOCK(nv_lock); |
84 | 83 | ||
85 | static int (*core99_write_bank)(int bank, u8* datas); | 84 | static int (*core99_write_bank)(int bank, u8* datas); |
86 | static int (*core99_erase_bank)(int bank); | 85 | static int (*core99_erase_bank)(int bank); |
@@ -165,10 +164,10 @@ static unsigned char indirect_nvram_read_byte(int addr) | |||
165 | unsigned char val; | 164 | unsigned char val; |
166 | unsigned long flags; | 165 | unsigned long flags; |
167 | 166 | ||
168 | spin_lock_irqsave(&nv_lock, flags); | 167 | raw_spin_lock_irqsave(&nv_lock, flags); |
169 | out_8(nvram_addr, addr >> 5); | 168 | out_8(nvram_addr, addr >> 5); |
170 | val = in_8(&nvram_data[(addr & 0x1f) << 4]); | 169 | val = in_8(&nvram_data[(addr & 0x1f) << 4]); |
171 | spin_unlock_irqrestore(&nv_lock, flags); | 170 | raw_spin_unlock_irqrestore(&nv_lock, flags); |
172 | 171 | ||
173 | return val; | 172 | return val; |
174 | } | 173 | } |
@@ -177,10 +176,10 @@ static void indirect_nvram_write_byte(int addr, unsigned char val) | |||
177 | { | 176 | { |
178 | unsigned long flags; | 177 | unsigned long flags; |
179 | 178 | ||
180 | spin_lock_irqsave(&nv_lock, flags); | 179 | raw_spin_lock_irqsave(&nv_lock, flags); |
181 | out_8(nvram_addr, addr >> 5); | 180 | out_8(nvram_addr, addr >> 5); |
182 | out_8(&nvram_data[(addr & 0x1f) << 4], val); | 181 | out_8(&nvram_data[(addr & 0x1f) << 4], val); |
183 | spin_unlock_irqrestore(&nv_lock, flags); | 182 | raw_spin_unlock_irqrestore(&nv_lock, flags); |
184 | } | 183 | } |
185 | 184 | ||
186 | 185 | ||
@@ -481,7 +480,7 @@ static void core99_nvram_sync(void) | |||
481 | if (!is_core_99 || !nvram_data || !nvram_image) | 480 | if (!is_core_99 || !nvram_data || !nvram_image) |
482 | return; | 481 | return; |
483 | 482 | ||
484 | spin_lock_irqsave(&nv_lock, flags); | 483 | raw_spin_lock_irqsave(&nv_lock, flags); |
485 | if (!memcmp(nvram_image, (u8*)nvram_data + core99_bank*NVRAM_SIZE, | 484 | if (!memcmp(nvram_image, (u8*)nvram_data + core99_bank*NVRAM_SIZE, |
486 | NVRAM_SIZE)) | 485 | NVRAM_SIZE)) |
487 | goto bail; | 486 | goto bail; |
@@ -503,7 +502,7 @@ static void core99_nvram_sync(void) | |||
503 | if (core99_write_bank(core99_bank, nvram_image)) | 502 | if (core99_write_bank(core99_bank, nvram_image)) |
504 | printk("nvram: Error writing bank %d\n", core99_bank); | 503 | printk("nvram: Error writing bank %d\n", core99_bank); |
505 | bail: | 504 | bail: |
506 | spin_unlock_irqrestore(&nv_lock, flags); | 505 | raw_spin_unlock_irqrestore(&nv_lock, flags); |
507 | 506 | ||
508 | #ifdef DEBUG | 507 | #ifdef DEBUG |
509 | mdelay(2000); | 508 | mdelay(2000); |
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c index e81403b245b5..ab2027cdf893 100644 --- a/arch/powerpc/platforms/powermac/pci.c +++ b/arch/powerpc/platforms/powermac/pci.c | |||
@@ -302,7 +302,7 @@ static void __init setup_chaos(struct pci_controller *hose, | |||
302 | * 1 -> Skip the device but act as if the access was successfull | 302 | * 1 -> Skip the device but act as if the access was successfull |
303 | * (return 0xff's on reads, eventually, cache config space | 303 | * (return 0xff's on reads, eventually, cache config space |
304 | * accesses in a later version) | 304 | * accesses in a later version) |
305 | * -1 -> Hide the device (unsuccessful acess) | 305 | * -1 -> Hide the device (unsuccessful access) |
306 | */ | 306 | */ |
307 | static int u3_ht_skip_device(struct pci_controller *hose, | 307 | static int u3_ht_skip_device(struct pci_controller *hose, |
308 | struct pci_bus *bus, unsigned int devfn) | 308 | struct pci_bus *bus, unsigned int devfn) |
diff --git a/arch/powerpc/platforms/powermac/pfunc_base.c b/arch/powerpc/platforms/powermac/pfunc_base.c index db20de512f3e..f5e3cda6660e 100644 --- a/arch/powerpc/platforms/powermac/pfunc_base.c +++ b/arch/powerpc/platforms/powermac/pfunc_base.c | |||
@@ -50,13 +50,13 @@ static int macio_do_gpio_write(PMF_STD_ARGS, u8 value, u8 mask) | |||
50 | value = ~value; | 50 | value = ~value; |
51 | 51 | ||
52 | /* Toggle the GPIO */ | 52 | /* Toggle the GPIO */ |
53 | spin_lock_irqsave(&feature_lock, flags); | 53 | raw_spin_lock_irqsave(&feature_lock, flags); |
54 | tmp = readb(addr); | 54 | tmp = readb(addr); |
55 | tmp = (tmp & ~mask) | (value & mask); | 55 | tmp = (tmp & ~mask) | (value & mask); |
56 | DBG("Do write 0x%02x to GPIO %s (%p)\n", | 56 | DBG("Do write 0x%02x to GPIO %s (%p)\n", |
57 | tmp, func->node->full_name, addr); | 57 | tmp, func->node->full_name, addr); |
58 | writeb(tmp, addr); | 58 | writeb(tmp, addr); |
59 | spin_unlock_irqrestore(&feature_lock, flags); | 59 | raw_spin_unlock_irqrestore(&feature_lock, flags); |
60 | 60 | ||
61 | return 0; | 61 | return 0; |
62 | } | 62 | } |
@@ -145,9 +145,9 @@ static int macio_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask) | |||
145 | struct macio_chip *macio = func->driver_data; | 145 | struct macio_chip *macio = func->driver_data; |
146 | unsigned long flags; | 146 | unsigned long flags; |
147 | 147 | ||
148 | spin_lock_irqsave(&feature_lock, flags); | 148 | raw_spin_lock_irqsave(&feature_lock, flags); |
149 | MACIO_OUT32(offset, (MACIO_IN32(offset) & ~mask) | (value & mask)); | 149 | MACIO_OUT32(offset, (MACIO_IN32(offset) & ~mask) | (value & mask)); |
150 | spin_unlock_irqrestore(&feature_lock, flags); | 150 | raw_spin_unlock_irqrestore(&feature_lock, flags); |
151 | return 0; | 151 | return 0; |
152 | } | 152 | } |
153 | 153 | ||
@@ -168,9 +168,9 @@ static int macio_do_write_reg8(PMF_STD_ARGS, u32 offset, u8 value, u8 mask) | |||
168 | struct macio_chip *macio = func->driver_data; | 168 | struct macio_chip *macio = func->driver_data; |
169 | unsigned long flags; | 169 | unsigned long flags; |
170 | 170 | ||
171 | spin_lock_irqsave(&feature_lock, flags); | 171 | raw_spin_lock_irqsave(&feature_lock, flags); |
172 | MACIO_OUT8(offset, (MACIO_IN8(offset) & ~mask) | (value & mask)); | 172 | MACIO_OUT8(offset, (MACIO_IN8(offset) & ~mask) | (value & mask)); |
173 | spin_unlock_irqrestore(&feature_lock, flags); | 173 | raw_spin_unlock_irqrestore(&feature_lock, flags); |
174 | return 0; | 174 | return 0; |
175 | } | 175 | } |
176 | 176 | ||
@@ -223,12 +223,12 @@ static int macio_do_write_reg32_slm(PMF_STD_ARGS, u32 offset, u32 shift, | |||
223 | if (args == NULL || args->count == 0) | 223 | if (args == NULL || args->count == 0) |
224 | return -EINVAL; | 224 | return -EINVAL; |
225 | 225 | ||
226 | spin_lock_irqsave(&feature_lock, flags); | 226 | raw_spin_lock_irqsave(&feature_lock, flags); |
227 | tmp = MACIO_IN32(offset); | 227 | tmp = MACIO_IN32(offset); |
228 | val = args->u[0].v << shift; | 228 | val = args->u[0].v << shift; |
229 | tmp = (tmp & ~mask) | (val & mask); | 229 | tmp = (tmp & ~mask) | (val & mask); |
230 | MACIO_OUT32(offset, tmp); | 230 | MACIO_OUT32(offset, tmp); |
231 | spin_unlock_irqrestore(&feature_lock, flags); | 231 | raw_spin_unlock_irqrestore(&feature_lock, flags); |
232 | return 0; | 232 | return 0; |
233 | } | 233 | } |
234 | 234 | ||
@@ -243,12 +243,12 @@ static int macio_do_write_reg8_slm(PMF_STD_ARGS, u32 offset, u32 shift, | |||
243 | if (args == NULL || args->count == 0) | 243 | if (args == NULL || args->count == 0) |
244 | return -EINVAL; | 244 | return -EINVAL; |
245 | 245 | ||
246 | spin_lock_irqsave(&feature_lock, flags); | 246 | raw_spin_lock_irqsave(&feature_lock, flags); |
247 | tmp = MACIO_IN8(offset); | 247 | tmp = MACIO_IN8(offset); |
248 | val = args->u[0].v << shift; | 248 | val = args->u[0].v << shift; |
249 | tmp = (tmp & ~mask) | (val & mask); | 249 | tmp = (tmp & ~mask) | (val & mask); |
250 | MACIO_OUT8(offset, tmp); | 250 | MACIO_OUT8(offset, tmp); |
251 | spin_unlock_irqrestore(&feature_lock, flags); | 251 | raw_spin_unlock_irqrestore(&feature_lock, flags); |
252 | return 0; | 252 | return 0; |
253 | } | 253 | } |
254 | 254 | ||
@@ -278,12 +278,12 @@ static int unin_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask) | |||
278 | { | 278 | { |
279 | unsigned long flags; | 279 | unsigned long flags; |
280 | 280 | ||
281 | spin_lock_irqsave(&feature_lock, flags); | 281 | raw_spin_lock_irqsave(&feature_lock, flags); |
282 | /* This is fairly bogus in darwin, but it should work for our needs | 282 | /* This is fairly bogus in darwin, but it should work for our needs |
283 | * implemeted that way: | 283 | * implemeted that way: |
284 | */ | 284 | */ |
285 | UN_OUT(offset, (UN_IN(offset) & ~mask) | (value & mask)); | 285 | UN_OUT(offset, (UN_IN(offset) & ~mask) | (value & mask)); |
286 | spin_unlock_irqrestore(&feature_lock, flags); | 286 | raw_spin_unlock_irqrestore(&feature_lock, flags); |
287 | return 0; | 287 | return 0; |
288 | } | 288 | } |
289 | 289 | ||
diff --git a/arch/powerpc/platforms/powermac/pfunc_core.c b/arch/powerpc/platforms/powermac/pfunc_core.c index 96d5ce50364e..cec635942657 100644 --- a/arch/powerpc/platforms/powermac/pfunc_core.c +++ b/arch/powerpc/platforms/powermac/pfunc_core.c | |||
@@ -9,6 +9,7 @@ | |||
9 | #include <linux/delay.h> | 9 | #include <linux/delay.h> |
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/spinlock.h> | 11 | #include <linux/spinlock.h> |
12 | #include <linux/slab.h> | ||
12 | #include <linux/module.h> | 13 | #include <linux/module.h> |
13 | #include <linux/mutex.h> | 14 | #include <linux/mutex.h> |
14 | 15 | ||
@@ -842,7 +843,7 @@ struct pmf_function *__pmf_find_function(struct device_node *target, | |||
842 | list_for_each_entry(func, &dev->functions, link) { | 843 | list_for_each_entry(func, &dev->functions, link) { |
843 | if (name && strcmp(name, func->name)) | 844 | if (name && strcmp(name, func->name)) |
844 | continue; | 845 | continue; |
845 | if (func->phandle && target->node != func->phandle) | 846 | if (func->phandle && target->phandle != func->phandle) |
846 | continue; | 847 | continue; |
847 | if ((func->flags & flags) == 0) | 848 | if ((func->flags & flags) == 0) |
848 | continue; | 849 | continue; |
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index d212006a5b3c..630a533d0e59 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c | |||
@@ -57,7 +57,7 @@ static int max_irqs; | |||
57 | static int max_real_irqs; | 57 | static int max_real_irqs; |
58 | static u32 level_mask[4]; | 58 | static u32 level_mask[4]; |
59 | 59 | ||
60 | static DEFINE_SPINLOCK(pmac_pic_lock); | 60 | static DEFINE_RAW_SPINLOCK(pmac_pic_lock); |
61 | 61 | ||
62 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) | 62 | #define NR_MASK_WORDS ((NR_IRQS + 31) / 32) |
63 | static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; | 63 | static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; |
@@ -85,7 +85,7 @@ static void pmac_mask_and_ack_irq(unsigned int virq) | |||
85 | int i = src >> 5; | 85 | int i = src >> 5; |
86 | unsigned long flags; | 86 | unsigned long flags; |
87 | 87 | ||
88 | spin_lock_irqsave(&pmac_pic_lock, flags); | 88 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
89 | __clear_bit(src, ppc_cached_irq_mask); | 89 | __clear_bit(src, ppc_cached_irq_mask); |
90 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) | 90 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) |
91 | atomic_dec(&ppc_n_lost_interrupts); | 91 | atomic_dec(&ppc_n_lost_interrupts); |
@@ -97,7 +97,7 @@ static void pmac_mask_and_ack_irq(unsigned int virq) | |||
97 | mb(); | 97 | mb(); |
98 | } while((in_le32(&pmac_irq_hw[i]->enable) & bit) | 98 | } while((in_le32(&pmac_irq_hw[i]->enable) & bit) |
99 | != (ppc_cached_irq_mask[i] & bit)); | 99 | != (ppc_cached_irq_mask[i] & bit)); |
100 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 100 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
101 | } | 101 | } |
102 | 102 | ||
103 | static void pmac_ack_irq(unsigned int virq) | 103 | static void pmac_ack_irq(unsigned int virq) |
@@ -107,12 +107,12 @@ static void pmac_ack_irq(unsigned int virq) | |||
107 | int i = src >> 5; | 107 | int i = src >> 5; |
108 | unsigned long flags; | 108 | unsigned long flags; |
109 | 109 | ||
110 | spin_lock_irqsave(&pmac_pic_lock, flags); | 110 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
111 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) | 111 | if (__test_and_clear_bit(src, ppc_lost_interrupts)) |
112 | atomic_dec(&ppc_n_lost_interrupts); | 112 | atomic_dec(&ppc_n_lost_interrupts); |
113 | out_le32(&pmac_irq_hw[i]->ack, bit); | 113 | out_le32(&pmac_irq_hw[i]->ack, bit); |
114 | (void)in_le32(&pmac_irq_hw[i]->ack); | 114 | (void)in_le32(&pmac_irq_hw[i]->ack); |
115 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 115 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
116 | } | 116 | } |
117 | 117 | ||
118 | static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) | 118 | static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) |
@@ -152,12 +152,12 @@ static unsigned int pmac_startup_irq(unsigned int virq) | |||
152 | unsigned long bit = 1UL << (src & 0x1f); | 152 | unsigned long bit = 1UL << (src & 0x1f); |
153 | int i = src >> 5; | 153 | int i = src >> 5; |
154 | 154 | ||
155 | spin_lock_irqsave(&pmac_pic_lock, flags); | 155 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
156 | if ((irq_desc[virq].status & IRQ_LEVEL) == 0) | 156 | if ((irq_to_desc(virq)->status & IRQ_LEVEL) == 0) |
157 | out_le32(&pmac_irq_hw[i]->ack, bit); | 157 | out_le32(&pmac_irq_hw[i]->ack, bit); |
158 | __set_bit(src, ppc_cached_irq_mask); | 158 | __set_bit(src, ppc_cached_irq_mask); |
159 | __pmac_set_irq_mask(src, 0); | 159 | __pmac_set_irq_mask(src, 0); |
160 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 160 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
161 | 161 | ||
162 | return 0; | 162 | return 0; |
163 | } | 163 | } |
@@ -167,10 +167,10 @@ static void pmac_mask_irq(unsigned int virq) | |||
167 | unsigned long flags; | 167 | unsigned long flags; |
168 | unsigned int src = irq_map[virq].hwirq; | 168 | unsigned int src = irq_map[virq].hwirq; |
169 | 169 | ||
170 | spin_lock_irqsave(&pmac_pic_lock, flags); | 170 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
171 | __clear_bit(src, ppc_cached_irq_mask); | 171 | __clear_bit(src, ppc_cached_irq_mask); |
172 | __pmac_set_irq_mask(src, 1); | 172 | __pmac_set_irq_mask(src, 1); |
173 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 173 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
174 | } | 174 | } |
175 | 175 | ||
176 | static void pmac_unmask_irq(unsigned int virq) | 176 | static void pmac_unmask_irq(unsigned int virq) |
@@ -178,24 +178,24 @@ static void pmac_unmask_irq(unsigned int virq) | |||
178 | unsigned long flags; | 178 | unsigned long flags; |
179 | unsigned int src = irq_map[virq].hwirq; | 179 | unsigned int src = irq_map[virq].hwirq; |
180 | 180 | ||
181 | spin_lock_irqsave(&pmac_pic_lock, flags); | 181 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
182 | __set_bit(src, ppc_cached_irq_mask); | 182 | __set_bit(src, ppc_cached_irq_mask); |
183 | __pmac_set_irq_mask(src, 0); | 183 | __pmac_set_irq_mask(src, 0); |
184 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 184 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
185 | } | 185 | } |
186 | 186 | ||
187 | static int pmac_retrigger(unsigned int virq) | 187 | static int pmac_retrigger(unsigned int virq) |
188 | { | 188 | { |
189 | unsigned long flags; | 189 | unsigned long flags; |
190 | 190 | ||
191 | spin_lock_irqsave(&pmac_pic_lock, flags); | 191 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
192 | __pmac_retrigger(irq_map[virq].hwirq); | 192 | __pmac_retrigger(irq_map[virq].hwirq); |
193 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 193 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
194 | return 1; | 194 | return 1; |
195 | } | 195 | } |
196 | 196 | ||
197 | static struct irq_chip pmac_pic = { | 197 | static struct irq_chip pmac_pic = { |
198 | .typename = " PMAC-PIC ", | 198 | .name = "PMAC-PIC", |
199 | .startup = pmac_startup_irq, | 199 | .startup = pmac_startup_irq, |
200 | .mask = pmac_mask_irq, | 200 | .mask = pmac_mask_irq, |
201 | .ack = pmac_ack_irq, | 201 | .ack = pmac_ack_irq, |
@@ -210,7 +210,7 @@ static irqreturn_t gatwick_action(int cpl, void *dev_id) | |||
210 | int irq, bits; | 210 | int irq, bits; |
211 | int rc = IRQ_NONE; | 211 | int rc = IRQ_NONE; |
212 | 212 | ||
213 | spin_lock_irqsave(&pmac_pic_lock, flags); | 213 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
214 | for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) { | 214 | for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) { |
215 | int i = irq >> 5; | 215 | int i = irq >> 5; |
216 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; | 216 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; |
@@ -220,12 +220,12 @@ static irqreturn_t gatwick_action(int cpl, void *dev_id) | |||
220 | if (bits == 0) | 220 | if (bits == 0) |
221 | continue; | 221 | continue; |
222 | irq += __ilog2(bits); | 222 | irq += __ilog2(bits); |
223 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 223 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
224 | generic_handle_irq(irq); | 224 | generic_handle_irq(irq); |
225 | spin_lock_irqsave(&pmac_pic_lock, flags); | 225 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
226 | rc = IRQ_HANDLED; | 226 | rc = IRQ_HANDLED; |
227 | } | 227 | } |
228 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 228 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
229 | return rc; | 229 | return rc; |
230 | } | 230 | } |
231 | 231 | ||
@@ -244,7 +244,7 @@ static unsigned int pmac_pic_get_irq(void) | |||
244 | return NO_IRQ_IGNORE; /* ignore, already handled */ | 244 | return NO_IRQ_IGNORE; /* ignore, already handled */ |
245 | } | 245 | } |
246 | #endif /* CONFIG_SMP */ | 246 | #endif /* CONFIG_SMP */ |
247 | spin_lock_irqsave(&pmac_pic_lock, flags); | 247 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
248 | for (irq = max_real_irqs; (irq -= 32) >= 0; ) { | 248 | for (irq = max_real_irqs; (irq -= 32) >= 0; ) { |
249 | int i = irq >> 5; | 249 | int i = irq >> 5; |
250 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; | 250 | bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; |
@@ -256,7 +256,7 @@ static unsigned int pmac_pic_get_irq(void) | |||
256 | irq += __ilog2(bits); | 256 | irq += __ilog2(bits); |
257 | break; | 257 | break; |
258 | } | 258 | } |
259 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 259 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
260 | if (unlikely(irq < 0)) | 260 | if (unlikely(irq < 0)) |
261 | return NO_IRQ; | 261 | return NO_IRQ; |
262 | return irq_linear_revmap(pmac_pic_host, irq); | 262 | return irq_linear_revmap(pmac_pic_host, irq); |
@@ -285,7 +285,7 @@ static int pmac_pic_host_match(struct irq_host *h, struct device_node *node) | |||
285 | static int pmac_pic_host_map(struct irq_host *h, unsigned int virq, | 285 | static int pmac_pic_host_map(struct irq_host *h, unsigned int virq, |
286 | irq_hw_number_t hw) | 286 | irq_hw_number_t hw) |
287 | { | 287 | { |
288 | struct irq_desc *desc = get_irq_desc(virq); | 288 | struct irq_desc *desc = irq_to_desc(virq); |
289 | int level; | 289 | int level; |
290 | 290 | ||
291 | if (hw >= max_irqs) | 291 | if (hw >= max_irqs) |
@@ -303,7 +303,7 @@ static int pmac_pic_host_map(struct irq_host *h, unsigned int virq, | |||
303 | } | 303 | } |
304 | 304 | ||
305 | static int pmac_pic_host_xlate(struct irq_host *h, struct device_node *ct, | 305 | static int pmac_pic_host_xlate(struct irq_host *h, struct device_node *ct, |
306 | u32 *intspec, unsigned int intsize, | 306 | const u32 *intspec, unsigned int intsize, |
307 | irq_hw_number_t *out_hwirq, | 307 | irq_hw_number_t *out_hwirq, |
308 | unsigned int *out_flags) | 308 | unsigned int *out_flags) |
309 | 309 | ||
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c index c20522656367..15c2241f9c72 100644 --- a/arch/powerpc/platforms/powermac/setup.c +++ b/arch/powerpc/platforms/powermac/setup.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <linux/stddef.h> | 31 | #include <linux/stddef.h> |
32 | #include <linux/unistd.h> | 32 | #include <linux/unistd.h> |
33 | #include <linux/ptrace.h> | 33 | #include <linux/ptrace.h> |
34 | #include <linux/slab.h> | ||
35 | #include <linux/user.h> | 34 | #include <linux/user.h> |
36 | #include <linux/tty.h> | 35 | #include <linux/tty.h> |
37 | #include <linux/string.h> | 36 | #include <linux/string.h> |
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c index b40c22d697f0..6898e8241cd0 100644 --- a/arch/powerpc/platforms/powermac/smp.c +++ b/arch/powerpc/platforms/powermac/smp.c | |||
@@ -693,9 +693,9 @@ static void __init smp_core99_setup(int ncpus) | |||
693 | #ifdef CONFIG_PPC64 | 693 | #ifdef CONFIG_PPC64 |
694 | 694 | ||
695 | /* i2c based HW sync on some G5s */ | 695 | /* i2c based HW sync on some G5s */ |
696 | if (machine_is_compatible("PowerMac7,2") || | 696 | if (of_machine_is_compatible("PowerMac7,2") || |
697 | machine_is_compatible("PowerMac7,3") || | 697 | of_machine_is_compatible("PowerMac7,3") || |
698 | machine_is_compatible("RackMac3,1")) | 698 | of_machine_is_compatible("RackMac3,1")) |
699 | smp_core99_setup_i2c_hwsync(ncpus); | 699 | smp_core99_setup_i2c_hwsync(ncpus); |
700 | 700 | ||
701 | /* pfunc based HW sync on recent G5s */ | 701 | /* pfunc based HW sync on recent G5s */ |
@@ -713,7 +713,7 @@ static void __init smp_core99_setup(int ncpus) | |||
713 | #else /* CONFIG_PPC64 */ | 713 | #else /* CONFIG_PPC64 */ |
714 | 714 | ||
715 | /* GPIO based HW sync on ppc32 Core99 */ | 715 | /* GPIO based HW sync on ppc32 Core99 */ |
716 | if (pmac_tb_freeze == NULL && !machine_is_compatible("MacRISC4")) { | 716 | if (pmac_tb_freeze == NULL && !of_machine_is_compatible("MacRISC4")) { |
717 | struct device_node *cpu; | 717 | struct device_node *cpu; |
718 | const u32 *tbprop = NULL; | 718 | const u32 *tbprop = NULL; |
719 | 719 | ||
@@ -750,7 +750,7 @@ static void __init smp_core99_setup(int ncpus) | |||
750 | #endif | 750 | #endif |
751 | 751 | ||
752 | /* 32 bits SMP can't NAP */ | 752 | /* 32 bits SMP can't NAP */ |
753 | if (!machine_is_compatible("MacRISC4")) | 753 | if (!of_machine_is_compatible("MacRISC4")) |
754 | powersave_nap = 0; | 754 | powersave_nap = 0; |
755 | } | 755 | } |
756 | 756 | ||
@@ -852,7 +852,7 @@ static void __devinit smp_core99_setup_cpu(int cpu_nr) | |||
852 | /* If we didn't start the second CPU, we must take | 852 | /* If we didn't start the second CPU, we must take |
853 | * it off the bus | 853 | * it off the bus |
854 | */ | 854 | */ |
855 | if (machine_is_compatible("MacRISC4") && | 855 | if (of_machine_is_compatible("MacRISC4") && |
856 | num_online_cpus() < 2) | 856 | num_online_cpus() < 2) |
857 | g5_phy_disable_cpu1(); | 857 | g5_phy_disable_cpu1(); |
858 | #endif /* CONFIG_PPC64 */ | 858 | #endif /* CONFIG_PPC64 */ |
diff --git a/arch/powerpc/platforms/powermac/time.c b/arch/powerpc/platforms/powermac/time.c index 1810e4226e56..48211ca134c3 100644 --- a/arch/powerpc/platforms/powermac/time.c +++ b/arch/powerpc/platforms/powermac/time.c | |||
@@ -317,9 +317,9 @@ void __init pmac_calibrate_decr(void) | |||
317 | * calibration. That's better since the VIA itself seems | 317 | * calibration. That's better since the VIA itself seems |
318 | * to be slightly off. --BenH | 318 | * to be slightly off. --BenH |
319 | */ | 319 | */ |
320 | if (!machine_is_compatible("MacRISC2") && | 320 | if (!of_machine_is_compatible("MacRISC2") && |
321 | !machine_is_compatible("MacRISC3") && | 321 | !of_machine_is_compatible("MacRISC3") && |
322 | !machine_is_compatible("MacRISC4")) | 322 | !of_machine_is_compatible("MacRISC4")) |
323 | if (via_calibrate_decr()) | 323 | if (via_calibrate_decr()) |
324 | return; | 324 | return; |
325 | 325 | ||
@@ -328,7 +328,7 @@ void __init pmac_calibrate_decr(void) | |||
328 | * probably implement calibration based on the KL timer on these | 328 | * probably implement calibration based on the KL timer on these |
329 | * machines anyway... -BenH | 329 | * machines anyway... -BenH |
330 | */ | 330 | */ |
331 | if (machine_is_compatible("PowerMac3,5")) | 331 | if (of_machine_is_compatible("PowerMac3,5")) |
332 | if (via_calibrate_decr()) | 332 | if (via_calibrate_decr()) |
333 | return; | 333 | return; |
334 | #endif | 334 | #endif |
diff --git a/arch/powerpc/platforms/powermac/udbg_scc.c b/arch/powerpc/platforms/powermac/udbg_scc.c index 9490157da62e..d83135a9830e 100644 --- a/arch/powerpc/platforms/powermac/udbg_scc.c +++ b/arch/powerpc/platforms/powermac/udbg_scc.c | |||
@@ -132,9 +132,9 @@ void udbg_scc_init(int force_scc) | |||
132 | scc_inittab[1] = in_8(sccc); | 132 | scc_inittab[1] = in_8(sccc); |
133 | out_8(sccc, 12); | 133 | out_8(sccc, 12); |
134 | scc_inittab[3] = in_8(sccc); | 134 | scc_inittab[3] = in_8(sccc); |
135 | } else if (machine_is_compatible("RackMac1,1") | 135 | } else if (of_machine_is_compatible("RackMac1,1") |
136 | || machine_is_compatible("RackMac1,2") | 136 | || of_machine_is_compatible("RackMac1,2") |
137 | || machine_is_compatible("MacRISC4")) { | 137 | || of_machine_is_compatible("MacRISC4")) { |
138 | /* Xserves and G5s default to 57600 */ | 138 | /* Xserves and G5s default to 57600 */ |
139 | scc_inittab[1] = 0; | 139 | scc_inittab[1] = 0; |
140 | scc_inittab[3] = 0; | 140 | scc_inittab[3] = 0; |
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c index bb028f165fb3..b341018326df 100644 --- a/arch/powerpc/platforms/ps3/device-init.c +++ b/arch/powerpc/platforms/ps3/device-init.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/kernel.h> | 23 | #include <linux/kernel.h> |
24 | #include <linux/kthread.h> | 24 | #include <linux/kthread.h> |
25 | #include <linux/init.h> | 25 | #include <linux/init.h> |
26 | #include <linux/slab.h> | ||
26 | #include <linux/reboot.h> | 27 | #include <linux/reboot.h> |
27 | 28 | ||
28 | #include <asm/firmware.h> | 29 | #include <asm/firmware.h> |
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c index 8ec5ccf76b19..59d9712d7364 100644 --- a/arch/powerpc/platforms/ps3/interrupt.c +++ b/arch/powerpc/platforms/ps3/interrupt.c | |||
@@ -152,7 +152,7 @@ static void ps3_chip_eoi(unsigned int virq) | |||
152 | */ | 152 | */ |
153 | 153 | ||
154 | static struct irq_chip ps3_irq_chip = { | 154 | static struct irq_chip ps3_irq_chip = { |
155 | .typename = "ps3", | 155 | .name = "ps3", |
156 | .mask = ps3_chip_mask, | 156 | .mask = ps3_chip_mask, |
157 | .unmask = ps3_chip_unmask, | 157 | .unmask = ps3_chip_unmask, |
158 | .eoi = ps3_chip_eoi, | 158 | .eoi = ps3_chip_eoi, |
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c index 189a25b80735..7925751e464a 100644 --- a/arch/powerpc/platforms/ps3/mm.c +++ b/arch/powerpc/platforms/ps3/mm.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/module.h> | 22 | #include <linux/module.h> |
23 | #include <linux/memory_hotplug.h> | 23 | #include <linux/memory_hotplug.h> |
24 | #include <linux/lmb.h> | 24 | #include <linux/lmb.h> |
25 | #include <linux/slab.h> | ||
25 | 26 | ||
26 | #include <asm/cell-regs.h> | 27 | #include <asm/cell-regs.h> |
27 | #include <asm/firmware.h> | 28 | #include <asm/firmware.h> |
@@ -34,7 +35,7 @@ | |||
34 | #if defined(DEBUG) | 35 | #if defined(DEBUG) |
35 | #define DBG udbg_printf | 36 | #define DBG udbg_printf |
36 | #else | 37 | #else |
37 | #define DBG pr_debug | 38 | #define DBG pr_devel |
38 | #endif | 39 | #endif |
39 | 40 | ||
40 | enum { | 41 | enum { |
diff --git a/arch/powerpc/platforms/ps3/os-area.c b/arch/powerpc/platforms/ps3/os-area.c index d6487a9c8019..dd521a181f23 100644 --- a/arch/powerpc/platforms/ps3/os-area.c +++ b/arch/powerpc/platforms/ps3/os-area.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/ctype.h> | 26 | #include <linux/ctype.h> |
27 | #include <linux/lmb.h> | 27 | #include <linux/lmb.h> |
28 | #include <linux/of.h> | 28 | #include <linux/of.h> |
29 | #include <linux/slab.h> | ||
29 | 30 | ||
30 | #include <asm/prom.h> | 31 | #include <asm/prom.h> |
31 | 32 | ||
diff --git a/arch/powerpc/platforms/ps3/spu.c b/arch/powerpc/platforms/ps3/spu.c index b3c6a993f9f3..39a472e9e80f 100644 --- a/arch/powerpc/platforms/ps3/spu.c +++ b/arch/powerpc/platforms/ps3/spu.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include <linux/kernel.h> | 21 | #include <linux/kernel.h> |
22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
23 | #include <linux/slab.h> | ||
23 | #include <linux/mmzone.h> | 24 | #include <linux/mmzone.h> |
24 | #include <linux/io.h> | 25 | #include <linux/io.h> |
25 | #include <linux/mm.h> | 26 | #include <linux/mm.h> |
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c index e34b305a7a52..6d09f5e3e7e4 100644 --- a/arch/powerpc/platforms/ps3/system-bus.c +++ b/arch/powerpc/platforms/ps3/system-bus.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/module.h> | 23 | #include <linux/module.h> |
24 | #include <linux/dma-mapping.h> | 24 | #include <linux/dma-mapping.h> |
25 | #include <linux/err.h> | 25 | #include <linux/err.h> |
26 | #include <linux/slab.h> | ||
26 | 27 | ||
27 | #include <asm/udbg.h> | 28 | #include <asm/udbg.h> |
28 | #include <asm/lv1call.h> | 29 | #include <asm/lv1call.h> |
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig index f0e6f28427bd..c667f0f02c34 100644 --- a/arch/powerpc/platforms/pseries/Kconfig +++ b/arch/powerpc/platforms/pseries/Kconfig | |||
@@ -2,8 +2,11 @@ config PPC_PSERIES | |||
2 | depends on PPC64 && PPC_BOOK3S | 2 | depends on PPC64 && PPC_BOOK3S |
3 | bool "IBM pSeries & new (POWER5-based) iSeries" | 3 | bool "IBM pSeries & new (POWER5-based) iSeries" |
4 | select MPIC | 4 | select MPIC |
5 | select PCI_MSI | ||
6 | select XICS | ||
5 | select PPC_I8259 | 7 | select PPC_I8259 |
6 | select PPC_RTAS | 8 | select PPC_RTAS |
9 | select PPC_RTAS_DAEMON | ||
7 | select RTAS_ERROR_LOGGING | 10 | select RTAS_ERROR_LOGGING |
8 | select PPC_UDBG_16550 | 11 | select PPC_UDBG_16550 |
9 | select PPC_NATIVE | 12 | select PPC_NATIVE |
@@ -59,7 +62,7 @@ config PPC_SMLPAR | |||
59 | 62 | ||
60 | config CMM | 63 | config CMM |
61 | tristate "Collaborative memory management" | 64 | tristate "Collaborative memory management" |
62 | depends on PPC_SMLPAR && !CRASH_DUMP | 65 | depends on PPC_SMLPAR |
63 | default y | 66 | default y |
64 | help | 67 | help |
65 | Select this option, if you want to enable the kernel interface | 68 | Select this option, if you want to enable the kernel interface |
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile index 790c0b872d4f..0ff5174ae4f5 100644 --- a/arch/powerpc/platforms/pseries/Makefile +++ b/arch/powerpc/platforms/pseries/Makefile | |||
@@ -7,8 +7,8 @@ EXTRA_CFLAGS += -DDEBUG | |||
7 | endif | 7 | endif |
8 | 8 | ||
9 | obj-y := lpar.o hvCall.o nvram.o reconfig.o \ | 9 | obj-y := lpar.o hvCall.o nvram.o reconfig.o \ |
10 | setup.o iommu.o ras.o rtasd.o \ | 10 | setup.o iommu.o ras.o \ |
11 | firmware.o power.o | 11 | firmware.o power.o dlpar.o |
12 | obj-$(CONFIG_SMP) += smp.o | 12 | obj-$(CONFIG_SMP) += smp.o |
13 | obj-$(CONFIG_XICS) += xics.o | 13 | obj-$(CONFIG_XICS) += xics.o |
14 | obj-$(CONFIG_SCANLOG) += scanlog.o | 14 | obj-$(CONFIG_SCANLOG) += scanlog.o |
diff --git a/arch/powerpc/platforms/pseries/cmm.c b/arch/powerpc/platforms/pseries/cmm.c index 6567439fe78d..f4803868642c 100644 --- a/arch/powerpc/platforms/pseries/cmm.c +++ b/arch/powerpc/platforms/pseries/cmm.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/delay.h> | 24 | #include <linux/delay.h> |
25 | #include <linux/errno.h> | 25 | #include <linux/errno.h> |
26 | #include <linux/fs.h> | 26 | #include <linux/fs.h> |
27 | #include <linux/gfp.h> | ||
27 | #include <linux/init.h> | 28 | #include <linux/init.h> |
28 | #include <linux/kthread.h> | 29 | #include <linux/kthread.h> |
29 | #include <linux/module.h> | 30 | #include <linux/module.h> |
@@ -38,19 +39,28 @@ | |||
38 | #include <asm/mmu.h> | 39 | #include <asm/mmu.h> |
39 | #include <asm/pgalloc.h> | 40 | #include <asm/pgalloc.h> |
40 | #include <asm/uaccess.h> | 41 | #include <asm/uaccess.h> |
42 | #include <linux/memory.h> | ||
41 | 43 | ||
42 | #include "plpar_wrappers.h" | 44 | #include "plpar_wrappers.h" |
43 | 45 | ||
44 | #define CMM_DRIVER_VERSION "1.0.0" | 46 | #define CMM_DRIVER_VERSION "1.0.0" |
45 | #define CMM_DEFAULT_DELAY 1 | 47 | #define CMM_DEFAULT_DELAY 1 |
48 | #define CMM_HOTPLUG_DELAY 5 | ||
46 | #define CMM_DEBUG 0 | 49 | #define CMM_DEBUG 0 |
47 | #define CMM_DISABLE 0 | 50 | #define CMM_DISABLE 0 |
48 | #define CMM_OOM_KB 1024 | 51 | #define CMM_OOM_KB 1024 |
49 | #define CMM_MIN_MEM_MB 256 | 52 | #define CMM_MIN_MEM_MB 256 |
50 | #define KB2PAGES(_p) ((_p)>>(PAGE_SHIFT-10)) | 53 | #define KB2PAGES(_p) ((_p)>>(PAGE_SHIFT-10)) |
51 | #define PAGES2KB(_p) ((_p)<<(PAGE_SHIFT-10)) | 54 | #define PAGES2KB(_p) ((_p)<<(PAGE_SHIFT-10)) |
55 | /* | ||
56 | * The priority level tries to ensure that this notifier is called as | ||
57 | * late as possible to reduce thrashing in the shared memory pool. | ||
58 | */ | ||
59 | #define CMM_MEM_HOTPLUG_PRI 1 | ||
60 | #define CMM_MEM_ISOLATE_PRI 15 | ||
52 | 61 | ||
53 | static unsigned int delay = CMM_DEFAULT_DELAY; | 62 | static unsigned int delay = CMM_DEFAULT_DELAY; |
63 | static unsigned int hotplug_delay = CMM_HOTPLUG_DELAY; | ||
54 | static unsigned int oom_kb = CMM_OOM_KB; | 64 | static unsigned int oom_kb = CMM_OOM_KB; |
55 | static unsigned int cmm_debug = CMM_DEBUG; | 65 | static unsigned int cmm_debug = CMM_DEBUG; |
56 | static unsigned int cmm_disabled = CMM_DISABLE; | 66 | static unsigned int cmm_disabled = CMM_DISABLE; |
@@ -65,6 +75,10 @@ MODULE_VERSION(CMM_DRIVER_VERSION); | |||
65 | module_param_named(delay, delay, uint, S_IRUGO | S_IWUSR); | 75 | module_param_named(delay, delay, uint, S_IRUGO | S_IWUSR); |
66 | MODULE_PARM_DESC(delay, "Delay (in seconds) between polls to query hypervisor paging requests. " | 76 | MODULE_PARM_DESC(delay, "Delay (in seconds) between polls to query hypervisor paging requests. " |
67 | "[Default=" __stringify(CMM_DEFAULT_DELAY) "]"); | 77 | "[Default=" __stringify(CMM_DEFAULT_DELAY) "]"); |
78 | module_param_named(hotplug_delay, hotplug_delay, uint, S_IRUGO | S_IWUSR); | ||
79 | MODULE_PARM_DESC(delay, "Delay (in seconds) after memory hotplug remove " | ||
80 | "before loaning resumes. " | ||
81 | "[Default=" __stringify(CMM_HOTPLUG_DELAY) "]"); | ||
68 | module_param_named(oom_kb, oom_kb, uint, S_IRUGO | S_IWUSR); | 82 | module_param_named(oom_kb, oom_kb, uint, S_IRUGO | S_IWUSR); |
69 | MODULE_PARM_DESC(oom_kb, "Amount of memory in kb to free on OOM. " | 83 | MODULE_PARM_DESC(oom_kb, "Amount of memory in kb to free on OOM. " |
70 | "[Default=" __stringify(CMM_OOM_KB) "]"); | 84 | "[Default=" __stringify(CMM_OOM_KB) "]"); |
@@ -92,6 +106,9 @@ static unsigned long oom_freed_pages; | |||
92 | static struct cmm_page_array *cmm_page_list; | 106 | static struct cmm_page_array *cmm_page_list; |
93 | static DEFINE_SPINLOCK(cmm_lock); | 107 | static DEFINE_SPINLOCK(cmm_lock); |
94 | 108 | ||
109 | static DEFINE_MUTEX(hotplug_mutex); | ||
110 | static int hotplug_occurred; /* protected by the hotplug mutex */ | ||
111 | |||
95 | static struct task_struct *cmm_thread_ptr; | 112 | static struct task_struct *cmm_thread_ptr; |
96 | 113 | ||
97 | /** | 114 | /** |
@@ -110,6 +127,17 @@ static long cmm_alloc_pages(long nr) | |||
110 | cmm_dbg("Begin request for %ld pages\n", nr); | 127 | cmm_dbg("Begin request for %ld pages\n", nr); |
111 | 128 | ||
112 | while (nr) { | 129 | while (nr) { |
130 | /* Exit if a hotplug operation is in progress or occurred */ | ||
131 | if (mutex_trylock(&hotplug_mutex)) { | ||
132 | if (hotplug_occurred) { | ||
133 | mutex_unlock(&hotplug_mutex); | ||
134 | break; | ||
135 | } | ||
136 | mutex_unlock(&hotplug_mutex); | ||
137 | } else { | ||
138 | break; | ||
139 | } | ||
140 | |||
113 | addr = __get_free_page(GFP_NOIO | __GFP_NOWARN | | 141 | addr = __get_free_page(GFP_NOIO | __GFP_NOWARN | |
114 | __GFP_NORETRY | __GFP_NOMEMALLOC); | 142 | __GFP_NORETRY | __GFP_NOMEMALLOC); |
115 | if (!addr) | 143 | if (!addr) |
@@ -119,8 +147,9 @@ static long cmm_alloc_pages(long nr) | |||
119 | if (!pa || pa->index >= CMM_NR_PAGES) { | 147 | if (!pa || pa->index >= CMM_NR_PAGES) { |
120 | /* Need a new page for the page list. */ | 148 | /* Need a new page for the page list. */ |
121 | spin_unlock(&cmm_lock); | 149 | spin_unlock(&cmm_lock); |
122 | npa = (struct cmm_page_array *)__get_free_page(GFP_NOIO | __GFP_NOWARN | | 150 | npa = (struct cmm_page_array *)__get_free_page( |
123 | __GFP_NORETRY | __GFP_NOMEMALLOC); | 151 | GFP_NOIO | __GFP_NOWARN | |
152 | __GFP_NORETRY | __GFP_NOMEMALLOC); | ||
124 | if (!npa) { | 153 | if (!npa) { |
125 | pr_info("%s: Can not allocate new page list\n", __func__); | 154 | pr_info("%s: Can not allocate new page list\n", __func__); |
126 | free_page(addr); | 155 | free_page(addr); |
@@ -229,8 +258,9 @@ static void cmm_get_mpp(void) | |||
229 | { | 258 | { |
230 | int rc; | 259 | int rc; |
231 | struct hvcall_mpp_data mpp_data; | 260 | struct hvcall_mpp_data mpp_data; |
232 | unsigned long active_pages_target; | 261 | signed long active_pages_target, page_loan_request, target; |
233 | signed long page_loan_request; | 262 | signed long total_pages = totalram_pages + loaned_pages; |
263 | signed long min_mem_pages = (min_mem_mb * 1024 * 1024) / PAGE_SIZE; | ||
234 | 264 | ||
235 | rc = h_get_mpp(&mpp_data); | 265 | rc = h_get_mpp(&mpp_data); |
236 | 266 | ||
@@ -238,17 +268,25 @@ static void cmm_get_mpp(void) | |||
238 | return; | 268 | return; |
239 | 269 | ||
240 | page_loan_request = div_s64((s64)mpp_data.loan_request, PAGE_SIZE); | 270 | page_loan_request = div_s64((s64)mpp_data.loan_request, PAGE_SIZE); |
241 | loaned_pages_target = page_loan_request + loaned_pages; | 271 | target = page_loan_request + (signed long)loaned_pages; |
242 | if (loaned_pages_target > oom_freed_pages) | 272 | |
243 | loaned_pages_target -= oom_freed_pages; | 273 | if (target < 0 || total_pages < min_mem_pages) |
274 | target = 0; | ||
275 | |||
276 | if (target > oom_freed_pages) | ||
277 | target -= oom_freed_pages; | ||
244 | else | 278 | else |
245 | loaned_pages_target = 0; | 279 | target = 0; |
280 | |||
281 | active_pages_target = total_pages - target; | ||
246 | 282 | ||
247 | active_pages_target = totalram_pages + loaned_pages - loaned_pages_target; | 283 | if (min_mem_pages > active_pages_target) |
284 | target = total_pages - min_mem_pages; | ||
248 | 285 | ||
249 | if ((min_mem_mb * 1024 * 1024) > (active_pages_target * PAGE_SIZE)) | 286 | if (target < 0) |
250 | loaned_pages_target = totalram_pages + loaned_pages - | 287 | target = 0; |
251 | ((min_mem_mb * 1024 * 1024) / PAGE_SIZE); | 288 | |
289 | loaned_pages_target = target; | ||
252 | 290 | ||
253 | cmm_dbg("delta = %ld, loaned = %lu, target = %lu, oom = %lu, totalram = %lu\n", | 291 | cmm_dbg("delta = %ld, loaned = %lu, target = %lu, oom = %lu, totalram = %lu\n", |
254 | page_loan_request, loaned_pages, loaned_pages_target, | 292 | page_loan_request, loaned_pages, loaned_pages_target, |
@@ -273,9 +311,28 @@ static int cmm_thread(void *dummy) | |||
273 | while (1) { | 311 | while (1) { |
274 | timeleft = msleep_interruptible(delay * 1000); | 312 | timeleft = msleep_interruptible(delay * 1000); |
275 | 313 | ||
276 | if (kthread_should_stop() || timeleft) { | 314 | if (kthread_should_stop() || timeleft) |
277 | loaned_pages_target = loaned_pages; | ||
278 | break; | 315 | break; |
316 | |||
317 | if (mutex_trylock(&hotplug_mutex)) { | ||
318 | if (hotplug_occurred) { | ||
319 | hotplug_occurred = 0; | ||
320 | mutex_unlock(&hotplug_mutex); | ||
321 | cmm_dbg("Hotplug operation has occurred, " | ||
322 | "loaning activity suspended " | ||
323 | "for %d seconds.\n", | ||
324 | hotplug_delay); | ||
325 | timeleft = msleep_interruptible(hotplug_delay * | ||
326 | 1000); | ||
327 | if (kthread_should_stop() || timeleft) | ||
328 | break; | ||
329 | continue; | ||
330 | } | ||
331 | mutex_unlock(&hotplug_mutex); | ||
332 | } else { | ||
333 | cmm_dbg("Hotplug operation in progress, activity " | ||
334 | "suspended\n"); | ||
335 | continue; | ||
279 | } | 336 | } |
280 | 337 | ||
281 | cmm_get_mpp(); | 338 | cmm_get_mpp(); |
@@ -405,6 +462,193 @@ static struct notifier_block cmm_reboot_nb = { | |||
405 | }; | 462 | }; |
406 | 463 | ||
407 | /** | 464 | /** |
465 | * cmm_count_pages - Count the number of pages loaned in a particular range. | ||
466 | * | ||
467 | * @arg: memory_isolate_notify structure with address range and count | ||
468 | * | ||
469 | * Return value: | ||
470 | * 0 on success | ||
471 | **/ | ||
472 | static unsigned long cmm_count_pages(void *arg) | ||
473 | { | ||
474 | struct memory_isolate_notify *marg = arg; | ||
475 | struct cmm_page_array *pa; | ||
476 | unsigned long start = (unsigned long)pfn_to_kaddr(marg->start_pfn); | ||
477 | unsigned long end = start + (marg->nr_pages << PAGE_SHIFT); | ||
478 | unsigned long idx; | ||
479 | |||
480 | spin_lock(&cmm_lock); | ||
481 | pa = cmm_page_list; | ||
482 | while (pa) { | ||
483 | if ((unsigned long)pa >= start && (unsigned long)pa < end) | ||
484 | marg->pages_found++; | ||
485 | for (idx = 0; idx < pa->index; idx++) | ||
486 | if (pa->page[idx] >= start && pa->page[idx] < end) | ||
487 | marg->pages_found++; | ||
488 | pa = pa->next; | ||
489 | } | ||
490 | spin_unlock(&cmm_lock); | ||
491 | return 0; | ||
492 | } | ||
493 | |||
494 | /** | ||
495 | * cmm_memory_isolate_cb - Handle memory isolation notifier calls | ||
496 | * @self: notifier block struct | ||
497 | * @action: action to take | ||
498 | * @arg: struct memory_isolate_notify data for handler | ||
499 | * | ||
500 | * Return value: | ||
501 | * NOTIFY_OK or notifier error based on subfunction return value | ||
502 | **/ | ||
503 | static int cmm_memory_isolate_cb(struct notifier_block *self, | ||
504 | unsigned long action, void *arg) | ||
505 | { | ||
506 | int ret = 0; | ||
507 | |||
508 | if (action == MEM_ISOLATE_COUNT) | ||
509 | ret = cmm_count_pages(arg); | ||
510 | |||
511 | if (ret) | ||
512 | ret = notifier_from_errno(ret); | ||
513 | else | ||
514 | ret = NOTIFY_OK; | ||
515 | |||
516 | return ret; | ||
517 | } | ||
518 | |||
519 | static struct notifier_block cmm_mem_isolate_nb = { | ||
520 | .notifier_call = cmm_memory_isolate_cb, | ||
521 | .priority = CMM_MEM_ISOLATE_PRI | ||
522 | }; | ||
523 | |||
524 | /** | ||
525 | * cmm_mem_going_offline - Unloan pages where memory is to be removed | ||
526 | * @arg: memory_notify structure with page range to be offlined | ||
527 | * | ||
528 | * Return value: | ||
529 | * 0 on success | ||
530 | **/ | ||
531 | static int cmm_mem_going_offline(void *arg) | ||
532 | { | ||
533 | struct memory_notify *marg = arg; | ||
534 | unsigned long start_page = (unsigned long)pfn_to_kaddr(marg->start_pfn); | ||
535 | unsigned long end_page = start_page + (marg->nr_pages << PAGE_SHIFT); | ||
536 | struct cmm_page_array *pa_curr, *pa_last, *npa; | ||
537 | unsigned long idx; | ||
538 | unsigned long freed = 0; | ||
539 | |||
540 | cmm_dbg("Memory going offline, searching 0x%lx (%ld pages).\n", | ||
541 | start_page, marg->nr_pages); | ||
542 | spin_lock(&cmm_lock); | ||
543 | |||
544 | /* Search the page list for pages in the range to be offlined */ | ||
545 | pa_last = pa_curr = cmm_page_list; | ||
546 | while (pa_curr) { | ||
547 | for (idx = (pa_curr->index - 1); (idx + 1) > 0; idx--) { | ||
548 | if ((pa_curr->page[idx] < start_page) || | ||
549 | (pa_curr->page[idx] >= end_page)) | ||
550 | continue; | ||
551 | |||
552 | plpar_page_set_active(__pa(pa_curr->page[idx])); | ||
553 | free_page(pa_curr->page[idx]); | ||
554 | freed++; | ||
555 | loaned_pages--; | ||
556 | totalram_pages++; | ||
557 | pa_curr->page[idx] = pa_last->page[--pa_last->index]; | ||
558 | if (pa_last->index == 0) { | ||
559 | if (pa_curr == pa_last) | ||
560 | pa_curr = pa_last->next; | ||
561 | pa_last = pa_last->next; | ||
562 | free_page((unsigned long)cmm_page_list); | ||
563 | cmm_page_list = pa_last; | ||
564 | continue; | ||
565 | } | ||
566 | } | ||
567 | pa_curr = pa_curr->next; | ||
568 | } | ||
569 | |||
570 | /* Search for page list structures in the range to be offlined */ | ||
571 | pa_last = NULL; | ||
572 | pa_curr = cmm_page_list; | ||
573 | while (pa_curr) { | ||
574 | if (((unsigned long)pa_curr >= start_page) && | ||
575 | ((unsigned long)pa_curr < end_page)) { | ||
576 | npa = (struct cmm_page_array *)__get_free_page( | ||
577 | GFP_NOIO | __GFP_NOWARN | | ||
578 | __GFP_NORETRY | __GFP_NOMEMALLOC); | ||
579 | if (!npa) { | ||
580 | spin_unlock(&cmm_lock); | ||
581 | cmm_dbg("Failed to allocate memory for list " | ||
582 | "management. Memory hotplug " | ||
583 | "failed.\n"); | ||
584 | return ENOMEM; | ||
585 | } | ||
586 | memcpy(npa, pa_curr, PAGE_SIZE); | ||
587 | if (pa_curr == cmm_page_list) | ||
588 | cmm_page_list = npa; | ||
589 | if (pa_last) | ||
590 | pa_last->next = npa; | ||
591 | free_page((unsigned long) pa_curr); | ||
592 | freed++; | ||
593 | pa_curr = npa; | ||
594 | } | ||
595 | |||
596 | pa_last = pa_curr; | ||
597 | pa_curr = pa_curr->next; | ||
598 | } | ||
599 | |||
600 | spin_unlock(&cmm_lock); | ||
601 | cmm_dbg("Released %ld pages in the search range.\n", freed); | ||
602 | |||
603 | return 0; | ||
604 | } | ||
605 | |||
606 | /** | ||
607 | * cmm_memory_cb - Handle memory hotplug notifier calls | ||
608 | * @self: notifier block struct | ||
609 | * @action: action to take | ||
610 | * @arg: struct memory_notify data for handler | ||
611 | * | ||
612 | * Return value: | ||
613 | * NOTIFY_OK or notifier error based on subfunction return value | ||
614 | * | ||
615 | **/ | ||
616 | static int cmm_memory_cb(struct notifier_block *self, | ||
617 | unsigned long action, void *arg) | ||
618 | { | ||
619 | int ret = 0; | ||
620 | |||
621 | switch (action) { | ||
622 | case MEM_GOING_OFFLINE: | ||
623 | mutex_lock(&hotplug_mutex); | ||
624 | hotplug_occurred = 1; | ||
625 | ret = cmm_mem_going_offline(arg); | ||
626 | break; | ||
627 | case MEM_OFFLINE: | ||
628 | case MEM_CANCEL_OFFLINE: | ||
629 | mutex_unlock(&hotplug_mutex); | ||
630 | cmm_dbg("Memory offline operation complete.\n"); | ||
631 | break; | ||
632 | case MEM_GOING_ONLINE: | ||
633 | case MEM_ONLINE: | ||
634 | case MEM_CANCEL_ONLINE: | ||
635 | break; | ||
636 | } | ||
637 | |||
638 | if (ret) | ||
639 | ret = notifier_from_errno(ret); | ||
640 | else | ||
641 | ret = NOTIFY_OK; | ||
642 | |||
643 | return ret; | ||
644 | } | ||
645 | |||
646 | static struct notifier_block cmm_mem_nb = { | ||
647 | .notifier_call = cmm_memory_cb, | ||
648 | .priority = CMM_MEM_HOTPLUG_PRI | ||
649 | }; | ||
650 | |||
651 | /** | ||
408 | * cmm_init - Module initialization | 652 | * cmm_init - Module initialization |
409 | * | 653 | * |
410 | * Return value: | 654 | * Return value: |
@@ -426,18 +670,24 @@ static int cmm_init(void) | |||
426 | if ((rc = cmm_sysfs_register(&cmm_sysdev))) | 670 | if ((rc = cmm_sysfs_register(&cmm_sysdev))) |
427 | goto out_reboot_notifier; | 671 | goto out_reboot_notifier; |
428 | 672 | ||
673 | if (register_memory_notifier(&cmm_mem_nb) || | ||
674 | register_memory_isolate_notifier(&cmm_mem_isolate_nb)) | ||
675 | goto out_unregister_notifier; | ||
676 | |||
429 | if (cmm_disabled) | 677 | if (cmm_disabled) |
430 | return rc; | 678 | return rc; |
431 | 679 | ||
432 | cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread"); | 680 | cmm_thread_ptr = kthread_run(cmm_thread, NULL, "cmmthread"); |
433 | if (IS_ERR(cmm_thread_ptr)) { | 681 | if (IS_ERR(cmm_thread_ptr)) { |
434 | rc = PTR_ERR(cmm_thread_ptr); | 682 | rc = PTR_ERR(cmm_thread_ptr); |
435 | goto out_unregister_sysfs; | 683 | goto out_unregister_notifier; |
436 | } | 684 | } |
437 | 685 | ||
438 | return rc; | 686 | return rc; |
439 | 687 | ||
440 | out_unregister_sysfs: | 688 | out_unregister_notifier: |
689 | unregister_memory_notifier(&cmm_mem_nb); | ||
690 | unregister_memory_isolate_notifier(&cmm_mem_isolate_nb); | ||
441 | cmm_unregister_sysfs(&cmm_sysdev); | 691 | cmm_unregister_sysfs(&cmm_sysdev); |
442 | out_reboot_notifier: | 692 | out_reboot_notifier: |
443 | unregister_reboot_notifier(&cmm_reboot_nb); | 693 | unregister_reboot_notifier(&cmm_reboot_nb); |
@@ -458,6 +708,8 @@ static void cmm_exit(void) | |||
458 | kthread_stop(cmm_thread_ptr); | 708 | kthread_stop(cmm_thread_ptr); |
459 | unregister_oom_notifier(&cmm_oom_nb); | 709 | unregister_oom_notifier(&cmm_oom_nb); |
460 | unregister_reboot_notifier(&cmm_reboot_nb); | 710 | unregister_reboot_notifier(&cmm_reboot_nb); |
711 | unregister_memory_notifier(&cmm_mem_nb); | ||
712 | unregister_memory_isolate_notifier(&cmm_mem_isolate_nb); | ||
461 | cmm_free_pages(loaned_pages); | 713 | cmm_free_pages(loaned_pages); |
462 | cmm_unregister_sysfs(&cmm_sysdev); | 714 | cmm_unregister_sysfs(&cmm_sysdev); |
463 | } | 715 | } |
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c new file mode 100644 index 000000000000..e1682bc168a3 --- /dev/null +++ b/arch/powerpc/platforms/pseries/dlpar.c | |||
@@ -0,0 +1,549 @@ | |||
1 | /* | ||
2 | * Support for dynamic reconfiguration for PCI, Memory, and CPU | ||
3 | * Hotplug and Dynamic Logical Partitioning on RPA platforms. | ||
4 | * | ||
5 | * Copyright (C) 2009 Nathan Fontenot | ||
6 | * Copyright (C) 2009 IBM Corporation | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License version | ||
10 | * 2 as published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/kref.h> | ||
15 | #include <linux/notifier.h> | ||
16 | #include <linux/proc_fs.h> | ||
17 | #include <linux/spinlock.h> | ||
18 | #include <linux/cpu.h> | ||
19 | #include <linux/slab.h> | ||
20 | #include "offline_states.h" | ||
21 | |||
22 | #include <asm/prom.h> | ||
23 | #include <asm/machdep.h> | ||
24 | #include <asm/uaccess.h> | ||
25 | #include <asm/rtas.h> | ||
26 | #include <asm/pSeries_reconfig.h> | ||
27 | |||
28 | struct cc_workarea { | ||
29 | u32 drc_index; | ||
30 | u32 zero; | ||
31 | u32 name_offset; | ||
32 | u32 prop_length; | ||
33 | u32 prop_offset; | ||
34 | }; | ||
35 | |||
36 | static void dlpar_free_cc_property(struct property *prop) | ||
37 | { | ||
38 | kfree(prop->name); | ||
39 | kfree(prop->value); | ||
40 | kfree(prop); | ||
41 | } | ||
42 | |||
43 | static struct property *dlpar_parse_cc_property(struct cc_workarea *ccwa) | ||
44 | { | ||
45 | struct property *prop; | ||
46 | char *name; | ||
47 | char *value; | ||
48 | |||
49 | prop = kzalloc(sizeof(*prop), GFP_KERNEL); | ||
50 | if (!prop) | ||
51 | return NULL; | ||
52 | |||
53 | name = (char *)ccwa + ccwa->name_offset; | ||
54 | prop->name = kstrdup(name, GFP_KERNEL); | ||
55 | |||
56 | prop->length = ccwa->prop_length; | ||
57 | value = (char *)ccwa + ccwa->prop_offset; | ||
58 | prop->value = kzalloc(prop->length, GFP_KERNEL); | ||
59 | if (!prop->value) { | ||
60 | dlpar_free_cc_property(prop); | ||
61 | return NULL; | ||
62 | } | ||
63 | |||
64 | memcpy(prop->value, value, prop->length); | ||
65 | return prop; | ||
66 | } | ||
67 | |||
68 | static struct device_node *dlpar_parse_cc_node(struct cc_workarea *ccwa) | ||
69 | { | ||
70 | struct device_node *dn; | ||
71 | char *name; | ||
72 | |||
73 | dn = kzalloc(sizeof(*dn), GFP_KERNEL); | ||
74 | if (!dn) | ||
75 | return NULL; | ||
76 | |||
77 | /* The configure connector reported name does not contain a | ||
78 | * preceeding '/', so we allocate a buffer large enough to | ||
79 | * prepend this to the full_name. | ||
80 | */ | ||
81 | name = (char *)ccwa + ccwa->name_offset; | ||
82 | dn->full_name = kmalloc(strlen(name) + 2, GFP_KERNEL); | ||
83 | if (!dn->full_name) { | ||
84 | kfree(dn); | ||
85 | return NULL; | ||
86 | } | ||
87 | |||
88 | sprintf(dn->full_name, "/%s", name); | ||
89 | return dn; | ||
90 | } | ||
91 | |||
92 | static void dlpar_free_one_cc_node(struct device_node *dn) | ||
93 | { | ||
94 | struct property *prop; | ||
95 | |||
96 | while (dn->properties) { | ||
97 | prop = dn->properties; | ||
98 | dn->properties = prop->next; | ||
99 | dlpar_free_cc_property(prop); | ||
100 | } | ||
101 | |||
102 | kfree(dn->full_name); | ||
103 | kfree(dn); | ||
104 | } | ||
105 | |||
106 | static void dlpar_free_cc_nodes(struct device_node *dn) | ||
107 | { | ||
108 | if (dn->child) | ||
109 | dlpar_free_cc_nodes(dn->child); | ||
110 | |||
111 | if (dn->sibling) | ||
112 | dlpar_free_cc_nodes(dn->sibling); | ||
113 | |||
114 | dlpar_free_one_cc_node(dn); | ||
115 | } | ||
116 | |||
117 | #define NEXT_SIBLING 1 | ||
118 | #define NEXT_CHILD 2 | ||
119 | #define NEXT_PROPERTY 3 | ||
120 | #define PREV_PARENT 4 | ||
121 | #define MORE_MEMORY 5 | ||
122 | #define CALL_AGAIN -2 | ||
123 | #define ERR_CFG_USE -9003 | ||
124 | |||
125 | struct device_node *dlpar_configure_connector(u32 drc_index) | ||
126 | { | ||
127 | struct device_node *dn; | ||
128 | struct device_node *first_dn = NULL; | ||
129 | struct device_node *last_dn = NULL; | ||
130 | struct property *property; | ||
131 | struct property *last_property = NULL; | ||
132 | struct cc_workarea *ccwa; | ||
133 | int cc_token; | ||
134 | int rc; | ||
135 | |||
136 | cc_token = rtas_token("ibm,configure-connector"); | ||
137 | if (cc_token == RTAS_UNKNOWN_SERVICE) | ||
138 | return NULL; | ||
139 | |||
140 | spin_lock(&rtas_data_buf_lock); | ||
141 | ccwa = (struct cc_workarea *)&rtas_data_buf[0]; | ||
142 | ccwa->drc_index = drc_index; | ||
143 | ccwa->zero = 0; | ||
144 | |||
145 | rc = rtas_call(cc_token, 2, 1, NULL, rtas_data_buf, NULL); | ||
146 | while (rc) { | ||
147 | switch (rc) { | ||
148 | case NEXT_SIBLING: | ||
149 | dn = dlpar_parse_cc_node(ccwa); | ||
150 | if (!dn) | ||
151 | goto cc_error; | ||
152 | |||
153 | dn->parent = last_dn->parent; | ||
154 | last_dn->sibling = dn; | ||
155 | last_dn = dn; | ||
156 | break; | ||
157 | |||
158 | case NEXT_CHILD: | ||
159 | dn = dlpar_parse_cc_node(ccwa); | ||
160 | if (!dn) | ||
161 | goto cc_error; | ||
162 | |||
163 | if (!first_dn) | ||
164 | first_dn = dn; | ||
165 | else { | ||
166 | dn->parent = last_dn; | ||
167 | if (last_dn) | ||
168 | last_dn->child = dn; | ||
169 | } | ||
170 | |||
171 | last_dn = dn; | ||
172 | break; | ||
173 | |||
174 | case NEXT_PROPERTY: | ||
175 | property = dlpar_parse_cc_property(ccwa); | ||
176 | if (!property) | ||
177 | goto cc_error; | ||
178 | |||
179 | if (!last_dn->properties) | ||
180 | last_dn->properties = property; | ||
181 | else | ||
182 | last_property->next = property; | ||
183 | |||
184 | last_property = property; | ||
185 | break; | ||
186 | |||
187 | case PREV_PARENT: | ||
188 | last_dn = last_dn->parent; | ||
189 | break; | ||
190 | |||
191 | case CALL_AGAIN: | ||
192 | break; | ||
193 | |||
194 | case MORE_MEMORY: | ||
195 | case ERR_CFG_USE: | ||
196 | default: | ||
197 | printk(KERN_ERR "Unexpected Error (%d) " | ||
198 | "returned from configure-connector\n", rc); | ||
199 | goto cc_error; | ||
200 | } | ||
201 | |||
202 | rc = rtas_call(cc_token, 2, 1, NULL, rtas_data_buf, NULL); | ||
203 | } | ||
204 | |||
205 | spin_unlock(&rtas_data_buf_lock); | ||
206 | return first_dn; | ||
207 | |||
208 | cc_error: | ||
209 | if (first_dn) | ||
210 | dlpar_free_cc_nodes(first_dn); | ||
211 | spin_unlock(&rtas_data_buf_lock); | ||
212 | return NULL; | ||
213 | } | ||
214 | |||
215 | static struct device_node *derive_parent(const char *path) | ||
216 | { | ||
217 | struct device_node *parent; | ||
218 | char *last_slash; | ||
219 | |||
220 | last_slash = strrchr(path, '/'); | ||
221 | if (last_slash == path) { | ||
222 | parent = of_find_node_by_path("/"); | ||
223 | } else { | ||
224 | char *parent_path; | ||
225 | int parent_path_len = last_slash - path + 1; | ||
226 | parent_path = kmalloc(parent_path_len, GFP_KERNEL); | ||
227 | if (!parent_path) | ||
228 | return NULL; | ||
229 | |||
230 | strlcpy(parent_path, path, parent_path_len); | ||
231 | parent = of_find_node_by_path(parent_path); | ||
232 | kfree(parent_path); | ||
233 | } | ||
234 | |||
235 | return parent; | ||
236 | } | ||
237 | |||
238 | int dlpar_attach_node(struct device_node *dn) | ||
239 | { | ||
240 | #ifdef CONFIG_PROC_DEVICETREE | ||
241 | struct proc_dir_entry *ent; | ||
242 | #endif | ||
243 | int rc; | ||
244 | |||
245 | of_node_set_flag(dn, OF_DYNAMIC); | ||
246 | kref_init(&dn->kref); | ||
247 | dn->parent = derive_parent(dn->full_name); | ||
248 | if (!dn->parent) | ||
249 | return -ENOMEM; | ||
250 | |||
251 | rc = blocking_notifier_call_chain(&pSeries_reconfig_chain, | ||
252 | PSERIES_RECONFIG_ADD, dn); | ||
253 | if (rc == NOTIFY_BAD) { | ||
254 | printk(KERN_ERR "Failed to add device node %s\n", | ||
255 | dn->full_name); | ||
256 | return -ENOMEM; /* For now, safe to assume kmalloc failure */ | ||
257 | } | ||
258 | |||
259 | of_attach_node(dn); | ||
260 | |||
261 | #ifdef CONFIG_PROC_DEVICETREE | ||
262 | ent = proc_mkdir(strrchr(dn->full_name, '/') + 1, dn->parent->pde); | ||
263 | if (ent) | ||
264 | proc_device_tree_add_node(dn, ent); | ||
265 | #endif | ||
266 | |||
267 | of_node_put(dn->parent); | ||
268 | return 0; | ||
269 | } | ||
270 | |||
271 | int dlpar_detach_node(struct device_node *dn) | ||
272 | { | ||
273 | #ifdef CONFIG_PROC_DEVICETREE | ||
274 | struct device_node *parent = dn->parent; | ||
275 | struct property *prop = dn->properties; | ||
276 | |||
277 | while (prop) { | ||
278 | remove_proc_entry(prop->name, dn->pde); | ||
279 | prop = prop->next; | ||
280 | } | ||
281 | |||
282 | if (dn->pde) | ||
283 | remove_proc_entry(dn->pde->name, parent->pde); | ||
284 | #endif | ||
285 | |||
286 | blocking_notifier_call_chain(&pSeries_reconfig_chain, | ||
287 | PSERIES_RECONFIG_REMOVE, dn); | ||
288 | of_detach_node(dn); | ||
289 | of_node_put(dn); /* Must decrement the refcount */ | ||
290 | |||
291 | return 0; | ||
292 | } | ||
293 | |||
294 | #define DR_ENTITY_SENSE 9003 | ||
295 | #define DR_ENTITY_PRESENT 1 | ||
296 | #define DR_ENTITY_UNUSABLE 2 | ||
297 | #define ALLOCATION_STATE 9003 | ||
298 | #define ALLOC_UNUSABLE 0 | ||
299 | #define ALLOC_USABLE 1 | ||
300 | #define ISOLATION_STATE 9001 | ||
301 | #define ISOLATE 0 | ||
302 | #define UNISOLATE 1 | ||
303 | |||
304 | int dlpar_acquire_drc(u32 drc_index) | ||
305 | { | ||
306 | int dr_status, rc; | ||
307 | |||
308 | rc = rtas_call(rtas_token("get-sensor-state"), 2, 2, &dr_status, | ||
309 | DR_ENTITY_SENSE, drc_index); | ||
310 | if (rc || dr_status != DR_ENTITY_UNUSABLE) | ||
311 | return -1; | ||
312 | |||
313 | rc = rtas_set_indicator(ALLOCATION_STATE, drc_index, ALLOC_USABLE); | ||
314 | if (rc) | ||
315 | return rc; | ||
316 | |||
317 | rc = rtas_set_indicator(ISOLATION_STATE, drc_index, UNISOLATE); | ||
318 | if (rc) { | ||
319 | rtas_set_indicator(ALLOCATION_STATE, drc_index, ALLOC_UNUSABLE); | ||
320 | return rc; | ||
321 | } | ||
322 | |||
323 | return 0; | ||
324 | } | ||
325 | |||
326 | int dlpar_release_drc(u32 drc_index) | ||
327 | { | ||
328 | int dr_status, rc; | ||
329 | |||
330 | rc = rtas_call(rtas_token("get-sensor-state"), 2, 2, &dr_status, | ||
331 | DR_ENTITY_SENSE, drc_index); | ||
332 | if (rc || dr_status != DR_ENTITY_PRESENT) | ||
333 | return -1; | ||
334 | |||
335 | rc = rtas_set_indicator(ISOLATION_STATE, drc_index, ISOLATE); | ||
336 | if (rc) | ||
337 | return rc; | ||
338 | |||
339 | rc = rtas_set_indicator(ALLOCATION_STATE, drc_index, ALLOC_UNUSABLE); | ||
340 | if (rc) { | ||
341 | rtas_set_indicator(ISOLATION_STATE, drc_index, UNISOLATE); | ||
342 | return rc; | ||
343 | } | ||
344 | |||
345 | return 0; | ||
346 | } | ||
347 | |||
348 | #ifdef CONFIG_ARCH_CPU_PROBE_RELEASE | ||
349 | |||
350 | static int dlpar_online_cpu(struct device_node *dn) | ||
351 | { | ||
352 | int rc = 0; | ||
353 | unsigned int cpu; | ||
354 | int len, nthreads, i; | ||
355 | const u32 *intserv; | ||
356 | |||
357 | intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", &len); | ||
358 | if (!intserv) | ||
359 | return -EINVAL; | ||
360 | |||
361 | nthreads = len / sizeof(u32); | ||
362 | |||
363 | cpu_maps_update_begin(); | ||
364 | for (i = 0; i < nthreads; i++) { | ||
365 | for_each_present_cpu(cpu) { | ||
366 | if (get_hard_smp_processor_id(cpu) != intserv[i]) | ||
367 | continue; | ||
368 | BUG_ON(get_cpu_current_state(cpu) | ||
369 | != CPU_STATE_OFFLINE); | ||
370 | cpu_maps_update_done(); | ||
371 | rc = cpu_up(cpu); | ||
372 | if (rc) | ||
373 | goto out; | ||
374 | cpu_maps_update_begin(); | ||
375 | |||
376 | break; | ||
377 | } | ||
378 | if (cpu == num_possible_cpus()) | ||
379 | printk(KERN_WARNING "Could not find cpu to online " | ||
380 | "with physical id 0x%x\n", intserv[i]); | ||
381 | } | ||
382 | cpu_maps_update_done(); | ||
383 | |||
384 | out: | ||
385 | return rc; | ||
386 | |||
387 | } | ||
388 | |||
389 | static ssize_t dlpar_cpu_probe(const char *buf, size_t count) | ||
390 | { | ||
391 | struct device_node *dn; | ||
392 | unsigned long drc_index; | ||
393 | char *cpu_name; | ||
394 | int rc; | ||
395 | |||
396 | cpu_hotplug_driver_lock(); | ||
397 | rc = strict_strtoul(buf, 0, &drc_index); | ||
398 | if (rc) { | ||
399 | rc = -EINVAL; | ||
400 | goto out; | ||
401 | } | ||
402 | |||
403 | dn = dlpar_configure_connector(drc_index); | ||
404 | if (!dn) { | ||
405 | rc = -EINVAL; | ||
406 | goto out; | ||
407 | } | ||
408 | |||
409 | /* configure-connector reports cpus as living in the base | ||
410 | * directory of the device tree. CPUs actually live in the | ||
411 | * cpus directory so we need to fixup the full_name. | ||
412 | */ | ||
413 | cpu_name = kzalloc(strlen(dn->full_name) + strlen("/cpus") + 1, | ||
414 | GFP_KERNEL); | ||
415 | if (!cpu_name) { | ||
416 | dlpar_free_cc_nodes(dn); | ||
417 | rc = -ENOMEM; | ||
418 | goto out; | ||
419 | } | ||
420 | |||
421 | sprintf(cpu_name, "/cpus%s", dn->full_name); | ||
422 | kfree(dn->full_name); | ||
423 | dn->full_name = cpu_name; | ||
424 | |||
425 | rc = dlpar_acquire_drc(drc_index); | ||
426 | if (rc) { | ||
427 | dlpar_free_cc_nodes(dn); | ||
428 | rc = -EINVAL; | ||
429 | goto out; | ||
430 | } | ||
431 | |||
432 | rc = dlpar_attach_node(dn); | ||
433 | if (rc) { | ||
434 | dlpar_release_drc(drc_index); | ||
435 | dlpar_free_cc_nodes(dn); | ||
436 | } | ||
437 | |||
438 | rc = dlpar_online_cpu(dn); | ||
439 | out: | ||
440 | cpu_hotplug_driver_unlock(); | ||
441 | |||
442 | return rc ? rc : count; | ||
443 | } | ||
444 | |||
445 | static int dlpar_offline_cpu(struct device_node *dn) | ||
446 | { | ||
447 | int rc = 0; | ||
448 | unsigned int cpu; | ||
449 | int len, nthreads, i; | ||
450 | const u32 *intserv; | ||
451 | |||
452 | intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", &len); | ||
453 | if (!intserv) | ||
454 | return -EINVAL; | ||
455 | |||
456 | nthreads = len / sizeof(u32); | ||
457 | |||
458 | cpu_maps_update_begin(); | ||
459 | for (i = 0; i < nthreads; i++) { | ||
460 | for_each_present_cpu(cpu) { | ||
461 | if (get_hard_smp_processor_id(cpu) != intserv[i]) | ||
462 | continue; | ||
463 | |||
464 | if (get_cpu_current_state(cpu) == CPU_STATE_OFFLINE) | ||
465 | break; | ||
466 | |||
467 | if (get_cpu_current_state(cpu) == CPU_STATE_ONLINE) { | ||
468 | cpu_maps_update_done(); | ||
469 | rc = cpu_down(cpu); | ||
470 | if (rc) | ||
471 | goto out; | ||
472 | cpu_maps_update_begin(); | ||
473 | break; | ||
474 | |||
475 | } | ||
476 | |||
477 | /* | ||
478 | * The cpu is in CPU_STATE_INACTIVE. | ||
479 | * Upgrade it's state to CPU_STATE_OFFLINE. | ||
480 | */ | ||
481 | set_preferred_offline_state(cpu, CPU_STATE_OFFLINE); | ||
482 | BUG_ON(plpar_hcall_norets(H_PROD, intserv[i]) | ||
483 | != H_SUCCESS); | ||
484 | __cpu_die(cpu); | ||
485 | break; | ||
486 | } | ||
487 | if (cpu == num_possible_cpus()) | ||
488 | printk(KERN_WARNING "Could not find cpu to offline " | ||
489 | "with physical id 0x%x\n", intserv[i]); | ||
490 | } | ||
491 | cpu_maps_update_done(); | ||
492 | |||
493 | out: | ||
494 | return rc; | ||
495 | |||
496 | } | ||
497 | |||
498 | static ssize_t dlpar_cpu_release(const char *buf, size_t count) | ||
499 | { | ||
500 | struct device_node *dn; | ||
501 | const u32 *drc_index; | ||
502 | int rc; | ||
503 | |||
504 | dn = of_find_node_by_path(buf); | ||
505 | if (!dn) | ||
506 | return -EINVAL; | ||
507 | |||
508 | drc_index = of_get_property(dn, "ibm,my-drc-index", NULL); | ||
509 | if (!drc_index) { | ||
510 | of_node_put(dn); | ||
511 | return -EINVAL; | ||
512 | } | ||
513 | |||
514 | cpu_hotplug_driver_lock(); | ||
515 | rc = dlpar_offline_cpu(dn); | ||
516 | if (rc) { | ||
517 | of_node_put(dn); | ||
518 | rc = -EINVAL; | ||
519 | goto out; | ||
520 | } | ||
521 | |||
522 | rc = dlpar_release_drc(*drc_index); | ||
523 | if (rc) { | ||
524 | of_node_put(dn); | ||
525 | goto out; | ||
526 | } | ||
527 | |||
528 | rc = dlpar_detach_node(dn); | ||
529 | if (rc) { | ||
530 | dlpar_acquire_drc(*drc_index); | ||
531 | goto out; | ||
532 | } | ||
533 | |||
534 | of_node_put(dn); | ||
535 | out: | ||
536 | cpu_hotplug_driver_unlock(); | ||
537 | return rc ? rc : count; | ||
538 | } | ||
539 | |||
540 | static int __init pseries_dlpar_init(void) | ||
541 | { | ||
542 | ppc_md.cpu_probe = dlpar_cpu_probe; | ||
543 | ppc_md.cpu_release = dlpar_cpu_release; | ||
544 | |||
545 | return 0; | ||
546 | } | ||
547 | machine_device_initcall(pseries, pseries_dlpar_init); | ||
548 | |||
549 | #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */ | ||
diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c index 937a544a236d..a00addb55945 100644 --- a/arch/powerpc/platforms/pseries/dtl.c +++ b/arch/powerpc/platforms/pseries/dtl.c | |||
@@ -21,6 +21,7 @@ | |||
21 | */ | 21 | */ |
22 | 22 | ||
23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
24 | #include <linux/slab.h> | ||
24 | #include <linux/debugfs.h> | 25 | #include <linux/debugfs.h> |
25 | #include <asm/smp.h> | 26 | #include <asm/smp.h> |
26 | #include <asm/system.h> | 27 | #include <asm/system.h> |
@@ -54,7 +55,7 @@ struct dtl { | |||
54 | int buf_entries; | 55 | int buf_entries; |
55 | u64 last_idx; | 56 | u64 last_idx; |
56 | }; | 57 | }; |
57 | static DEFINE_PER_CPU(struct dtl, dtl); | 58 | static DEFINE_PER_CPU(struct dtl, cpu_dtl); |
58 | 59 | ||
59 | /* | 60 | /* |
60 | * Dispatch trace log event mask: | 61 | * Dispatch trace log event mask: |
@@ -261,7 +262,7 @@ static int dtl_init(void) | |||
261 | 262 | ||
262 | /* set up the per-cpu log structures */ | 263 | /* set up the per-cpu log structures */ |
263 | for_each_possible_cpu(i) { | 264 | for_each_possible_cpu(i) { |
264 | struct dtl *dtl = &per_cpu(dtl, i); | 265 | struct dtl *dtl = &per_cpu(cpu_dtl, i); |
265 | dtl->cpu = i; | 266 | dtl->cpu = i; |
266 | 267 | ||
267 | rc = dtl_setup_file(dtl); | 268 | rc = dtl_setup_file(dtl); |
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c index ccd8dd03b8c9..7df7fbb7cacb 100644 --- a/arch/powerpc/platforms/pseries/eeh.c +++ b/arch/powerpc/platforms/pseries/eeh.c | |||
@@ -100,7 +100,7 @@ int eeh_subsystem_enabled; | |||
100 | EXPORT_SYMBOL(eeh_subsystem_enabled); | 100 | EXPORT_SYMBOL(eeh_subsystem_enabled); |
101 | 101 | ||
102 | /* Lock to avoid races due to multiple reports of an error */ | 102 | /* Lock to avoid races due to multiple reports of an error */ |
103 | static DEFINE_SPINLOCK(confirm_error_lock); | 103 | static DEFINE_RAW_SPINLOCK(confirm_error_lock); |
104 | 104 | ||
105 | /* Buffer for reporting slot-error-detail rtas calls. Its here | 105 | /* Buffer for reporting slot-error-detail rtas calls. Its here |
106 | * in BSS, and not dynamically alloced, so that it ends up in | 106 | * in BSS, and not dynamically alloced, so that it ends up in |
@@ -436,7 +436,7 @@ static void __eeh_clear_slot(struct device_node *parent, int mode_flag) | |||
436 | void eeh_clear_slot (struct device_node *dn, int mode_flag) | 436 | void eeh_clear_slot (struct device_node *dn, int mode_flag) |
437 | { | 437 | { |
438 | unsigned long flags; | 438 | unsigned long flags; |
439 | spin_lock_irqsave(&confirm_error_lock, flags); | 439 | raw_spin_lock_irqsave(&confirm_error_lock, flags); |
440 | 440 | ||
441 | dn = find_device_pe (dn); | 441 | dn = find_device_pe (dn); |
442 | 442 | ||
@@ -447,7 +447,7 @@ void eeh_clear_slot (struct device_node *dn, int mode_flag) | |||
447 | PCI_DN(dn)->eeh_mode &= ~mode_flag; | 447 | PCI_DN(dn)->eeh_mode &= ~mode_flag; |
448 | PCI_DN(dn)->eeh_check_count = 0; | 448 | PCI_DN(dn)->eeh_check_count = 0; |
449 | __eeh_clear_slot(dn, mode_flag); | 449 | __eeh_clear_slot(dn, mode_flag); |
450 | spin_unlock_irqrestore(&confirm_error_lock, flags); | 450 | raw_spin_unlock_irqrestore(&confirm_error_lock, flags); |
451 | } | 451 | } |
452 | 452 | ||
453 | /** | 453 | /** |
@@ -491,7 +491,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev) | |||
491 | pdn->eeh_mode & EEH_MODE_NOCHECK) { | 491 | pdn->eeh_mode & EEH_MODE_NOCHECK) { |
492 | ignored_check++; | 492 | ignored_check++; |
493 | pr_debug("EEH: Ignored check (%x) for %s %s\n", | 493 | pr_debug("EEH: Ignored check (%x) for %s %s\n", |
494 | pdn->eeh_mode, pci_name (dev), dn->full_name); | 494 | pdn->eeh_mode, eeh_pci_name(dev), dn->full_name); |
495 | return 0; | 495 | return 0; |
496 | } | 496 | } |
497 | 497 | ||
@@ -506,7 +506,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev) | |||
506 | * in one slot might report errors simultaneously, and we | 506 | * in one slot might report errors simultaneously, and we |
507 | * only want one error recovery routine running. | 507 | * only want one error recovery routine running. |
508 | */ | 508 | */ |
509 | spin_lock_irqsave(&confirm_error_lock, flags); | 509 | raw_spin_lock_irqsave(&confirm_error_lock, flags); |
510 | rc = 1; | 510 | rc = 1; |
511 | if (pdn->eeh_mode & EEH_MODE_ISOLATED) { | 511 | if (pdn->eeh_mode & EEH_MODE_ISOLATED) { |
512 | pdn->eeh_check_count ++; | 512 | pdn->eeh_check_count ++; |
@@ -515,7 +515,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev) | |||
515 | printk (KERN_ERR "EEH: %d reads ignored for recovering device at " | 515 | printk (KERN_ERR "EEH: %d reads ignored for recovering device at " |
516 | "location=%s driver=%s pci addr=%s\n", | 516 | "location=%s driver=%s pci addr=%s\n", |
517 | pdn->eeh_check_count, location, | 517 | pdn->eeh_check_count, location, |
518 | dev->driver->name, pci_name(dev)); | 518 | dev->driver->name, eeh_pci_name(dev)); |
519 | printk (KERN_ERR "EEH: Might be infinite loop in %s driver\n", | 519 | printk (KERN_ERR "EEH: Might be infinite loop in %s driver\n", |
520 | dev->driver->name); | 520 | dev->driver->name); |
521 | dump_stack(); | 521 | dump_stack(); |
@@ -575,7 +575,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev) | |||
575 | * with other functions on this device, and functions under | 575 | * with other functions on this device, and functions under |
576 | * bridges. */ | 576 | * bridges. */ |
577 | eeh_mark_slot (dn, EEH_MODE_ISOLATED); | 577 | eeh_mark_slot (dn, EEH_MODE_ISOLATED); |
578 | spin_unlock_irqrestore(&confirm_error_lock, flags); | 578 | raw_spin_unlock_irqrestore(&confirm_error_lock, flags); |
579 | 579 | ||
580 | eeh_send_failure_event (dn, dev); | 580 | eeh_send_failure_event (dn, dev); |
581 | 581 | ||
@@ -586,7 +586,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev) | |||
586 | return 1; | 586 | return 1; |
587 | 587 | ||
588 | dn_unlock: | 588 | dn_unlock: |
589 | spin_unlock_irqrestore(&confirm_error_lock, flags); | 589 | raw_spin_unlock_irqrestore(&confirm_error_lock, flags); |
590 | return rc; | 590 | return rc; |
591 | } | 591 | } |
592 | 592 | ||
@@ -1064,7 +1064,7 @@ void __init eeh_init(void) | |||
1064 | struct device_node *phb, *np; | 1064 | struct device_node *phb, *np; |
1065 | struct eeh_early_enable_info info; | 1065 | struct eeh_early_enable_info info; |
1066 | 1066 | ||
1067 | spin_lock_init(&confirm_error_lock); | 1067 | raw_spin_lock_init(&confirm_error_lock); |
1068 | spin_lock_init(&slot_errbuf_lock); | 1068 | spin_lock_init(&slot_errbuf_lock); |
1069 | 1069 | ||
1070 | np = of_find_node_by_path("/rtas"); | 1070 | np = of_find_node_by_path("/rtas"); |
diff --git a/arch/powerpc/platforms/pseries/eeh_cache.c b/arch/powerpc/platforms/pseries/eeh_cache.c index ce37040af870..30b987b73c20 100644 --- a/arch/powerpc/platforms/pseries/eeh_cache.c +++ b/arch/powerpc/platforms/pseries/eeh_cache.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/list.h> | 23 | #include <linux/list.h> |
24 | #include <linux/pci.h> | 24 | #include <linux/pci.h> |
25 | #include <linux/rbtree.h> | 25 | #include <linux/rbtree.h> |
26 | #include <linux/slab.h> | ||
26 | #include <linux/spinlock.h> | 27 | #include <linux/spinlock.h> |
27 | #include <asm/atomic.h> | 28 | #include <asm/atomic.h> |
28 | #include <asm/pci-bridge.h> | 29 | #include <asm/pci-bridge.h> |
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c index 0e8db6771252..b8d70f5d9aa9 100644 --- a/arch/powerpc/platforms/pseries/eeh_driver.c +++ b/arch/powerpc/platforms/pseries/eeh_driver.c | |||
@@ -63,22 +63,6 @@ static void print_device_node_tree(struct pci_dn *pdn, int dent) | |||
63 | } | 63 | } |
64 | #endif | 64 | #endif |
65 | 65 | ||
66 | /** | ||
67 | * irq_in_use - return true if this irq is being used | ||
68 | */ | ||
69 | static int irq_in_use(unsigned int irq) | ||
70 | { | ||
71 | int rc = 0; | ||
72 | unsigned long flags; | ||
73 | struct irq_desc *desc = irq_desc + irq; | ||
74 | |||
75 | spin_lock_irqsave(&desc->lock, flags); | ||
76 | if (desc->action) | ||
77 | rc = 1; | ||
78 | spin_unlock_irqrestore(&desc->lock, flags); | ||
79 | return rc; | ||
80 | } | ||
81 | |||
82 | /** | 66 | /** |
83 | * eeh_disable_irq - disable interrupt for the recovering device | 67 | * eeh_disable_irq - disable interrupt for the recovering device |
84 | */ | 68 | */ |
@@ -93,7 +77,7 @@ static void eeh_disable_irq(struct pci_dev *dev) | |||
93 | if (dev->msi_enabled || dev->msix_enabled) | 77 | if (dev->msi_enabled || dev->msix_enabled) |
94 | return; | 78 | return; |
95 | 79 | ||
96 | if (!irq_in_use(dev->irq)) | 80 | if (!irq_has_action(dev->irq)) |
97 | return; | 81 | return; |
98 | 82 | ||
99 | PCI_DN(dn)->eeh_mode |= EEH_MODE_IRQ_DISABLED; | 83 | PCI_DN(dn)->eeh_mode |= EEH_MODE_IRQ_DISABLED; |
@@ -353,7 +337,7 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event) | |||
353 | location = location ? location : "unknown"; | 337 | location = location ? location : "unknown"; |
354 | printk(KERN_ERR "EEH: Error: Cannot find partition endpoint " | 338 | printk(KERN_ERR "EEH: Error: Cannot find partition endpoint " |
355 | "for location=%s pci addr=%s\n", | 339 | "for location=%s pci addr=%s\n", |
356 | location, pci_name(event->dev)); | 340 | location, eeh_pci_name(event->dev)); |
357 | return NULL; | 341 | return NULL; |
358 | } | 342 | } |
359 | 343 | ||
@@ -384,7 +368,7 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event) | |||
384 | pci_str = pci_name (frozen_pdn->pcidev); | 368 | pci_str = pci_name (frozen_pdn->pcidev); |
385 | drv_str = pcid_name (frozen_pdn->pcidev); | 369 | drv_str = pcid_name (frozen_pdn->pcidev); |
386 | } else { | 370 | } else { |
387 | pci_str = pci_name (event->dev); | 371 | pci_str = eeh_pci_name(event->dev); |
388 | drv_str = pcid_name (event->dev); | 372 | drv_str = pcid_name (event->dev); |
389 | } | 373 | } |
390 | 374 | ||
@@ -494,9 +478,9 @@ excess_failures: | |||
494 | * due to actual, failed cards. | 478 | * due to actual, failed cards. |
495 | */ | 479 | */ |
496 | printk(KERN_ERR | 480 | printk(KERN_ERR |
497 | "EEH: PCI device at location=%s driver=%s pci addr=%s \n" | 481 | "EEH: PCI device at location=%s driver=%s pci addr=%s\n" |
498 | "has failed %d times in the last hour " | 482 | "has failed %d times in the last hour " |
499 | "and has been permanently disabled. \n" | 483 | "and has been permanently disabled.\n" |
500 | "Please try reseating this device or replacing it.\n", | 484 | "Please try reseating this device or replacing it.\n", |
501 | location, drv_str, pci_str, frozen_pdn->eeh_freeze_count); | 485 | location, drv_str, pci_str, frozen_pdn->eeh_freeze_count); |
502 | goto perm_error; | 486 | goto perm_error; |
@@ -504,7 +488,7 @@ excess_failures: | |||
504 | hard_fail: | 488 | hard_fail: |
505 | printk(KERN_ERR | 489 | printk(KERN_ERR |
506 | "EEH: Unable to recover from failure of PCI device " | 490 | "EEH: Unable to recover from failure of PCI device " |
507 | "at location=%s driver=%s pci addr=%s \n" | 491 | "at location=%s driver=%s pci addr=%s\n" |
508 | "Please try reseating this device or replacing it.\n", | 492 | "Please try reseating this device or replacing it.\n", |
509 | location, drv_str, pci_str); | 493 | location, drv_str, pci_str); |
510 | 494 | ||
diff --git a/arch/powerpc/platforms/pseries/eeh_event.c b/arch/powerpc/platforms/pseries/eeh_event.c index ddb80f5d850b..2ec500c130b5 100644 --- a/arch/powerpc/platforms/pseries/eeh_event.c +++ b/arch/powerpc/platforms/pseries/eeh_event.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/list.h> | 22 | #include <linux/list.h> |
23 | #include <linux/mutex.h> | 23 | #include <linux/mutex.h> |
24 | #include <linux/pci.h> | 24 | #include <linux/pci.h> |
25 | #include <linux/slab.h> | ||
25 | #include <linux/workqueue.h> | 26 | #include <linux/workqueue.h> |
26 | #include <asm/eeh_event.h> | 27 | #include <asm/eeh_event.h> |
27 | #include <asm/ppc-pci.h> | 28 | #include <asm/ppc-pci.h> |
@@ -80,7 +81,7 @@ static int eeh_event_handler(void * dummy) | |||
80 | eeh_mark_slot(event->dn, EEH_MODE_RECOVERING); | 81 | eeh_mark_slot(event->dn, EEH_MODE_RECOVERING); |
81 | 82 | ||
82 | printk(KERN_INFO "EEH: Detected PCI bus error on device %s\n", | 83 | printk(KERN_INFO "EEH: Detected PCI bus error on device %s\n", |
83 | pci_name(event->dev)); | 84 | eeh_pci_name(event->dev)); |
84 | 85 | ||
85 | pdn = handle_eeh_events(event); | 86 | pdn = handle_eeh_events(event); |
86 | 87 | ||
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c index ebff6d9a4e39..a8e1d5d17a28 100644 --- a/arch/powerpc/platforms/pseries/hotplug-cpu.c +++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <asm/pSeries_reconfig.h> | 30 | #include <asm/pSeries_reconfig.h> |
31 | #include "xics.h" | 31 | #include "xics.h" |
32 | #include "plpar_wrappers.h" | 32 | #include "plpar_wrappers.h" |
33 | #include "offline_states.h" | ||
33 | 34 | ||
34 | /* This version can't take the spinlock, because it never returns */ | 35 | /* This version can't take the spinlock, because it never returns */ |
35 | static struct rtas_args rtas_stop_self_args = { | 36 | static struct rtas_args rtas_stop_self_args = { |
@@ -39,6 +40,55 @@ static struct rtas_args rtas_stop_self_args = { | |||
39 | .rets = &rtas_stop_self_args.args[0], | 40 | .rets = &rtas_stop_self_args.args[0], |
40 | }; | 41 | }; |
41 | 42 | ||
43 | static DEFINE_PER_CPU(enum cpu_state_vals, preferred_offline_state) = | ||
44 | CPU_STATE_OFFLINE; | ||
45 | static DEFINE_PER_CPU(enum cpu_state_vals, current_state) = CPU_STATE_OFFLINE; | ||
46 | |||
47 | static enum cpu_state_vals default_offline_state = CPU_STATE_OFFLINE; | ||
48 | |||
49 | static int cede_offline_enabled __read_mostly = 1; | ||
50 | |||
51 | /* | ||
52 | * Enable/disable cede_offline when available. | ||
53 | */ | ||
54 | static int __init setup_cede_offline(char *str) | ||
55 | { | ||
56 | if (!strcmp(str, "off")) | ||
57 | cede_offline_enabled = 0; | ||
58 | else if (!strcmp(str, "on")) | ||
59 | cede_offline_enabled = 1; | ||
60 | else | ||
61 | return 0; | ||
62 | return 1; | ||
63 | } | ||
64 | |||
65 | __setup("cede_offline=", setup_cede_offline); | ||
66 | |||
67 | enum cpu_state_vals get_cpu_current_state(int cpu) | ||
68 | { | ||
69 | return per_cpu(current_state, cpu); | ||
70 | } | ||
71 | |||
72 | void set_cpu_current_state(int cpu, enum cpu_state_vals state) | ||
73 | { | ||
74 | per_cpu(current_state, cpu) = state; | ||
75 | } | ||
76 | |||
77 | enum cpu_state_vals get_preferred_offline_state(int cpu) | ||
78 | { | ||
79 | return per_cpu(preferred_offline_state, cpu); | ||
80 | } | ||
81 | |||
82 | void set_preferred_offline_state(int cpu, enum cpu_state_vals state) | ||
83 | { | ||
84 | per_cpu(preferred_offline_state, cpu) = state; | ||
85 | } | ||
86 | |||
87 | void set_default_offline_state(int cpu) | ||
88 | { | ||
89 | per_cpu(preferred_offline_state, cpu) = default_offline_state; | ||
90 | } | ||
91 | |||
42 | static void rtas_stop_self(void) | 92 | static void rtas_stop_self(void) |
43 | { | 93 | { |
44 | struct rtas_args *args = &rtas_stop_self_args; | 94 | struct rtas_args *args = &rtas_stop_self_args; |
@@ -56,11 +106,49 @@ static void rtas_stop_self(void) | |||
56 | 106 | ||
57 | static void pseries_mach_cpu_die(void) | 107 | static void pseries_mach_cpu_die(void) |
58 | { | 108 | { |
109 | unsigned int cpu = smp_processor_id(); | ||
110 | unsigned int hwcpu = hard_smp_processor_id(); | ||
111 | u8 cede_latency_hint = 0; | ||
112 | |||
59 | local_irq_disable(); | 113 | local_irq_disable(); |
60 | idle_task_exit(); | 114 | idle_task_exit(); |
61 | xics_teardown_cpu(); | 115 | xics_teardown_cpu(); |
62 | unregister_slb_shadow(hard_smp_processor_id(), __pa(get_slb_shadow())); | 116 | |
117 | if (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) { | ||
118 | set_cpu_current_state(cpu, CPU_STATE_INACTIVE); | ||
119 | cede_latency_hint = 2; | ||
120 | |||
121 | get_lppaca()->idle = 1; | ||
122 | if (!get_lppaca()->shared_proc) | ||
123 | get_lppaca()->donate_dedicated_cpu = 1; | ||
124 | |||
125 | while (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) { | ||
126 | extended_cede_processor(cede_latency_hint); | ||
127 | } | ||
128 | |||
129 | if (!get_lppaca()->shared_proc) | ||
130 | get_lppaca()->donate_dedicated_cpu = 0; | ||
131 | get_lppaca()->idle = 0; | ||
132 | |||
133 | if (get_preferred_offline_state(cpu) == CPU_STATE_ONLINE) { | ||
134 | unregister_slb_shadow(hwcpu, __pa(get_slb_shadow())); | ||
135 | |||
136 | /* | ||
137 | * Call to start_secondary_resume() will not return. | ||
138 | * Kernel stack will be reset and start_secondary() | ||
139 | * will be called to continue the online operation. | ||
140 | */ | ||
141 | start_secondary_resume(); | ||
142 | } | ||
143 | } | ||
144 | |||
145 | /* Requested state is CPU_STATE_OFFLINE at this point */ | ||
146 | WARN_ON(get_preferred_offline_state(cpu) != CPU_STATE_OFFLINE); | ||
147 | |||
148 | set_cpu_current_state(cpu, CPU_STATE_OFFLINE); | ||
149 | unregister_slb_shadow(hwcpu, __pa(get_slb_shadow())); | ||
63 | rtas_stop_self(); | 150 | rtas_stop_self(); |
151 | |||
64 | /* Should never get here... */ | 152 | /* Should never get here... */ |
65 | BUG(); | 153 | BUG(); |
66 | for(;;); | 154 | for(;;); |
@@ -106,18 +194,43 @@ static int pseries_cpu_disable(void) | |||
106 | return 0; | 194 | return 0; |
107 | } | 195 | } |
108 | 196 | ||
197 | /* | ||
198 | * pseries_cpu_die: Wait for the cpu to die. | ||
199 | * @cpu: logical processor id of the CPU whose death we're awaiting. | ||
200 | * | ||
201 | * This function is called from the context of the thread which is performing | ||
202 | * the cpu-offline. Here we wait for long enough to allow the cpu in question | ||
203 | * to self-destroy so that the cpu-offline thread can send the CPU_DEAD | ||
204 | * notifications. | ||
205 | * | ||
206 | * OTOH, pseries_mach_cpu_die() is called by the @cpu when it wants to | ||
207 | * self-destruct. | ||
208 | */ | ||
109 | static void pseries_cpu_die(unsigned int cpu) | 209 | static void pseries_cpu_die(unsigned int cpu) |
110 | { | 210 | { |
111 | int tries; | 211 | int tries; |
112 | int cpu_status; | 212 | int cpu_status = 1; |
113 | unsigned int pcpu = get_hard_smp_processor_id(cpu); | 213 | unsigned int pcpu = get_hard_smp_processor_id(cpu); |
114 | 214 | ||
115 | for (tries = 0; tries < 25; tries++) { | 215 | if (get_preferred_offline_state(cpu) == CPU_STATE_INACTIVE) { |
116 | cpu_status = query_cpu_stopped(pcpu); | 216 | cpu_status = 1; |
117 | if (cpu_status == 0 || cpu_status == -1) | 217 | for (tries = 0; tries < 1000; tries++) { |
118 | break; | 218 | if (get_cpu_current_state(cpu) == CPU_STATE_INACTIVE) { |
119 | cpu_relax(); | 219 | cpu_status = 0; |
220 | break; | ||
221 | } | ||
222 | cpu_relax(); | ||
223 | } | ||
224 | } else if (get_preferred_offline_state(cpu) == CPU_STATE_OFFLINE) { | ||
225 | |||
226 | for (tries = 0; tries < 25; tries++) { | ||
227 | cpu_status = query_cpu_stopped(pcpu); | ||
228 | if (cpu_status == 0 || cpu_status == -1) | ||
229 | break; | ||
230 | cpu_relax(); | ||
231 | } | ||
120 | } | 232 | } |
233 | |||
121 | if (cpu_status != 0) { | 234 | if (cpu_status != 0) { |
122 | printk("Querying DEAD? cpu %i (%i) shows %i\n", | 235 | printk("Querying DEAD? cpu %i (%i) shows %i\n", |
123 | cpu, pcpu, cpu_status); | 236 | cpu, pcpu, cpu_status); |
@@ -252,10 +365,29 @@ static struct notifier_block pseries_smp_nb = { | |||
252 | .notifier_call = pseries_smp_notifier, | 365 | .notifier_call = pseries_smp_notifier, |
253 | }; | 366 | }; |
254 | 367 | ||
368 | #define MAX_CEDE_LATENCY_LEVELS 4 | ||
369 | #define CEDE_LATENCY_PARAM_LENGTH 10 | ||
370 | #define CEDE_LATENCY_PARAM_MAX_LENGTH \ | ||
371 | (MAX_CEDE_LATENCY_LEVELS * CEDE_LATENCY_PARAM_LENGTH * sizeof(char)) | ||
372 | #define CEDE_LATENCY_TOKEN 45 | ||
373 | |||
374 | static char cede_parameters[CEDE_LATENCY_PARAM_MAX_LENGTH]; | ||
375 | |||
376 | static int parse_cede_parameters(void) | ||
377 | { | ||
378 | memset(cede_parameters, 0, CEDE_LATENCY_PARAM_MAX_LENGTH); | ||
379 | return rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, | ||
380 | NULL, | ||
381 | CEDE_LATENCY_TOKEN, | ||
382 | __pa(cede_parameters), | ||
383 | CEDE_LATENCY_PARAM_MAX_LENGTH); | ||
384 | } | ||
385 | |||
255 | static int __init pseries_cpu_hotplug_init(void) | 386 | static int __init pseries_cpu_hotplug_init(void) |
256 | { | 387 | { |
257 | struct device_node *np; | 388 | struct device_node *np; |
258 | const char *typep; | 389 | const char *typep; |
390 | int cpu; | ||
259 | 391 | ||
260 | for_each_node_by_name(np, "interrupt-controller") { | 392 | for_each_node_by_name(np, "interrupt-controller") { |
261 | typep = of_get_property(np, "compatible", NULL); | 393 | typep = of_get_property(np, "compatible", NULL); |
@@ -283,8 +415,16 @@ static int __init pseries_cpu_hotplug_init(void) | |||
283 | smp_ops->cpu_die = pseries_cpu_die; | 415 | smp_ops->cpu_die = pseries_cpu_die; |
284 | 416 | ||
285 | /* Processors can be added/removed only on LPAR */ | 417 | /* Processors can be added/removed only on LPAR */ |
286 | if (firmware_has_feature(FW_FEATURE_LPAR)) | 418 | if (firmware_has_feature(FW_FEATURE_LPAR)) { |
287 | pSeries_reconfig_notifier_register(&pseries_smp_nb); | 419 | pSeries_reconfig_notifier_register(&pseries_smp_nb); |
420 | cpu_maps_update_begin(); | ||
421 | if (cede_offline_enabled && parse_cede_parameters() == 0) { | ||
422 | default_offline_state = CPU_STATE_INACTIVE; | ||
423 | for_each_online_cpu(cpu) | ||
424 | set_default_offline_state(cpu); | ||
425 | } | ||
426 | cpu_maps_update_done(); | ||
427 | } | ||
288 | 428 | ||
289 | return 0; | 429 | return 0; |
290 | } | 430 | } |
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c index 9b21ee68ea50..01e7b5bb3c1d 100644 --- a/arch/powerpc/platforms/pseries/hotplug-memory.c +++ b/arch/powerpc/platforms/pseries/hotplug-memory.c | |||
@@ -11,6 +11,7 @@ | |||
11 | 11 | ||
12 | #include <linux/of.h> | 12 | #include <linux/of.h> |
13 | #include <linux/lmb.h> | 13 | #include <linux/lmb.h> |
14 | #include <linux/vmalloc.h> | ||
14 | #include <asm/firmware.h> | 15 | #include <asm/firmware.h> |
15 | #include <asm/machdep.h> | 16 | #include <asm/machdep.h> |
16 | #include <asm/pSeries_reconfig.h> | 17 | #include <asm/pSeries_reconfig.h> |
@@ -54,6 +55,12 @@ static int pseries_remove_lmb(unsigned long base, unsigned int lmb_size) | |||
54 | */ | 55 | */ |
55 | start = (unsigned long)__va(base); | 56 | start = (unsigned long)__va(base); |
56 | ret = remove_section_mapping(start, start + lmb_size); | 57 | ret = remove_section_mapping(start, start + lmb_size); |
58 | |||
59 | /* Ensure all vmalloc mappings are flushed in case they also | ||
60 | * hit that section of memory | ||
61 | */ | ||
62 | vm_unmap_aliases(); | ||
63 | |||
57 | return ret; | 64 | return ret; |
58 | } | 65 | } |
59 | 66 | ||
diff --git a/arch/powerpc/platforms/pseries/hvCall.S b/arch/powerpc/platforms/pseries/hvCall.S index c1427b3634ec..383a5d0e9818 100644 --- a/arch/powerpc/platforms/pseries/hvCall.S +++ b/arch/powerpc/platforms/pseries/hvCall.S | |||
@@ -14,68 +14,94 @@ | |||
14 | 14 | ||
15 | #define STK_PARM(i) (48 + ((i)-3)*8) | 15 | #define STK_PARM(i) (48 + ((i)-3)*8) |
16 | 16 | ||
17 | #ifdef CONFIG_HCALL_STATS | 17 | #ifdef CONFIG_TRACEPOINTS |
18 | |||
19 | .section ".toc","aw" | ||
20 | |||
21 | .globl hcall_tracepoint_refcount | ||
22 | hcall_tracepoint_refcount: | ||
23 | .llong 0 | ||
24 | |||
25 | .section ".text" | ||
26 | |||
18 | /* | 27 | /* |
19 | * precall must preserve all registers. use unused STK_PARM() | 28 | * precall must preserve all registers. use unused STK_PARM() |
20 | * areas to save snapshots and opcode. | 29 | * areas to save snapshots and opcode. We branch around this |
30 | * in early init (eg when populating the MMU hashtable) by using an | ||
31 | * unconditional cpu feature. | ||
21 | */ | 32 | */ |
22 | #define HCALL_INST_PRECALL \ | 33 | #define HCALL_INST_PRECALL(FIRST_REG) \ |
23 | std r3,STK_PARM(r3)(r1); /* save opcode */ \ | ||
24 | mftb r0; /* get timebase and */ \ | ||
25 | std r0,STK_PARM(r5)(r1); /* save for later */ \ | ||
26 | BEGIN_FTR_SECTION; \ | 34 | BEGIN_FTR_SECTION; \ |
27 | mfspr r0,SPRN_PURR; /* get PURR and */ \ | 35 | b 1f; \ |
28 | std r0,STK_PARM(r6)(r1); /* save for later */ \ | 36 | END_FTR_SECTION(0, 1); \ |
29 | END_FTR_SECTION_IFSET(CPU_FTR_PURR); | 37 | ld r12,hcall_tracepoint_refcount@toc(r2); \ |
30 | 38 | cmpdi r12,0; \ | |
39 | beq+ 1f; \ | ||
40 | mflr r0; \ | ||
41 | std r3,STK_PARM(r3)(r1); \ | ||
42 | std r4,STK_PARM(r4)(r1); \ | ||
43 | std r5,STK_PARM(r5)(r1); \ | ||
44 | std r6,STK_PARM(r6)(r1); \ | ||
45 | std r7,STK_PARM(r7)(r1); \ | ||
46 | std r8,STK_PARM(r8)(r1); \ | ||
47 | std r9,STK_PARM(r9)(r1); \ | ||
48 | std r10,STK_PARM(r10)(r1); \ | ||
49 | std r0,16(r1); \ | ||
50 | addi r4,r1,STK_PARM(FIRST_REG); \ | ||
51 | stdu r1,-STACK_FRAME_OVERHEAD(r1); \ | ||
52 | bl .__trace_hcall_entry; \ | ||
53 | addi r1,r1,STACK_FRAME_OVERHEAD; \ | ||
54 | ld r0,16(r1); \ | ||
55 | ld r3,STK_PARM(r3)(r1); \ | ||
56 | ld r4,STK_PARM(r4)(r1); \ | ||
57 | ld r5,STK_PARM(r5)(r1); \ | ||
58 | ld r6,STK_PARM(r6)(r1); \ | ||
59 | ld r7,STK_PARM(r7)(r1); \ | ||
60 | ld r8,STK_PARM(r8)(r1); \ | ||
61 | ld r9,STK_PARM(r9)(r1); \ | ||
62 | ld r10,STK_PARM(r10)(r1); \ | ||
63 | mtlr r0; \ | ||
64 | 1: | ||
65 | |||
31 | /* | 66 | /* |
32 | * postcall is performed immediately before function return which | 67 | * postcall is performed immediately before function return which |
33 | * allows liberal use of volatile registers. We branch around this | 68 | * allows liberal use of volatile registers. We branch around this |
34 | * in early init (eg when populating the MMU hashtable) by using an | 69 | * in early init (eg when populating the MMU hashtable) by using an |
35 | * unconditional cpu feature. | 70 | * unconditional cpu feature. |
36 | */ | 71 | */ |
37 | #define HCALL_INST_POSTCALL \ | 72 | #define __HCALL_INST_POSTCALL \ |
38 | BEGIN_FTR_SECTION; \ | 73 | BEGIN_FTR_SECTION; \ |
39 | b 1f; \ | 74 | b 1f; \ |
40 | END_FTR_SECTION(0, 1); \ | 75 | END_FTR_SECTION(0, 1); \ |
41 | ld r4,STK_PARM(r3)(r1); /* validate opcode */ \ | 76 | ld r12,hcall_tracepoint_refcount@toc(r2); \ |
42 | cmpldi cr7,r4,MAX_HCALL_OPCODE; \ | 77 | cmpdi r12,0; \ |
43 | bgt- cr7,1f; \ | 78 | beq+ 1f; \ |
44 | \ | 79 | mflr r0; \ |
45 | /* get time and PURR snapshots after hcall */ \ | 80 | ld r6,STK_PARM(r3)(r1); \ |
46 | mftb r7; /* timebase after */ \ | 81 | std r3,STK_PARM(r3)(r1); \ |
47 | BEGIN_FTR_SECTION; \ | 82 | mr r4,r3; \ |
48 | mfspr r8,SPRN_PURR; /* PURR after */ \ | 83 | mr r3,r6; \ |
49 | ld r6,STK_PARM(r6)(r1); /* PURR before */ \ | 84 | std r0,16(r1); \ |
50 | subf r6,r6,r8; /* delta */ \ | 85 | stdu r1,-STACK_FRAME_OVERHEAD(r1); \ |
51 | END_FTR_SECTION_IFSET(CPU_FTR_PURR); \ | 86 | bl .__trace_hcall_exit; \ |
52 | ld r5,STK_PARM(r5)(r1); /* timebase before */ \ | 87 | addi r1,r1,STACK_FRAME_OVERHEAD; \ |
53 | subf r5,r5,r7; /* time delta */ \ | 88 | ld r0,16(r1); \ |
54 | \ | 89 | ld r3,STK_PARM(r3)(r1); \ |
55 | /* calculate address of stat structure r4 = opcode */ \ | 90 | mtlr r0; \ |
56 | srdi r4,r4,2; /* index into array */ \ | ||
57 | mulli r4,r4,HCALL_STAT_SIZE; \ | ||
58 | LOAD_REG_ADDR(r7, per_cpu__hcall_stats); \ | ||
59 | add r4,r4,r7; \ | ||
60 | ld r7,PACA_DATA_OFFSET(r13); /* per cpu offset */ \ | ||
61 | add r4,r4,r7; \ | ||
62 | \ | ||
63 | /* update stats */ \ | ||
64 | ld r7,HCALL_STAT_CALLS(r4); /* count */ \ | ||
65 | addi r7,r7,1; \ | ||
66 | std r7,HCALL_STAT_CALLS(r4); \ | ||
67 | ld r7,HCALL_STAT_TB(r4); /* timebase */ \ | ||
68 | add r7,r7,r5; \ | ||
69 | std r7,HCALL_STAT_TB(r4); \ | ||
70 | BEGIN_FTR_SECTION; \ | ||
71 | ld r7,HCALL_STAT_PURR(r4); /* PURR */ \ | ||
72 | add r7,r7,r6; \ | ||
73 | std r7,HCALL_STAT_PURR(r4); \ | ||
74 | END_FTR_SECTION_IFSET(CPU_FTR_PURR); \ | ||
75 | 1: | 91 | 1: |
92 | |||
93 | #define HCALL_INST_POSTCALL_NORETS \ | ||
94 | li r5,0; \ | ||
95 | __HCALL_INST_POSTCALL | ||
96 | |||
97 | #define HCALL_INST_POSTCALL(BUFREG) \ | ||
98 | mr r5,BUFREG; \ | ||
99 | __HCALL_INST_POSTCALL | ||
100 | |||
76 | #else | 101 | #else |
77 | #define HCALL_INST_PRECALL | 102 | #define HCALL_INST_PRECALL(FIRST_ARG) |
78 | #define HCALL_INST_POSTCALL | 103 | #define HCALL_INST_POSTCALL_NORETS |
104 | #define HCALL_INST_POSTCALL(BUFREG) | ||
79 | #endif | 105 | #endif |
80 | 106 | ||
81 | .text | 107 | .text |
@@ -86,11 +112,11 @@ _GLOBAL(plpar_hcall_norets) | |||
86 | mfcr r0 | 112 | mfcr r0 |
87 | stw r0,8(r1) | 113 | stw r0,8(r1) |
88 | 114 | ||
89 | HCALL_INST_PRECALL | 115 | HCALL_INST_PRECALL(r4) |
90 | 116 | ||
91 | HVSC /* invoke the hypervisor */ | 117 | HVSC /* invoke the hypervisor */ |
92 | 118 | ||
93 | HCALL_INST_POSTCALL | 119 | HCALL_INST_POSTCALL_NORETS |
94 | 120 | ||
95 | lwz r0,8(r1) | 121 | lwz r0,8(r1) |
96 | mtcrf 0xff,r0 | 122 | mtcrf 0xff,r0 |
@@ -102,7 +128,7 @@ _GLOBAL(plpar_hcall) | |||
102 | mfcr r0 | 128 | mfcr r0 |
103 | stw r0,8(r1) | 129 | stw r0,8(r1) |
104 | 130 | ||
105 | HCALL_INST_PRECALL | 131 | HCALL_INST_PRECALL(r5) |
106 | 132 | ||
107 | std r4,STK_PARM(r4)(r1) /* Save ret buffer */ | 133 | std r4,STK_PARM(r4)(r1) /* Save ret buffer */ |
108 | 134 | ||
@@ -121,7 +147,7 @@ _GLOBAL(plpar_hcall) | |||
121 | std r6, 16(r12) | 147 | std r6, 16(r12) |
122 | std r7, 24(r12) | 148 | std r7, 24(r12) |
123 | 149 | ||
124 | HCALL_INST_POSTCALL | 150 | HCALL_INST_POSTCALL(r12) |
125 | 151 | ||
126 | lwz r0,8(r1) | 152 | lwz r0,8(r1) |
127 | mtcrf 0xff,r0 | 153 | mtcrf 0xff,r0 |
@@ -168,7 +194,7 @@ _GLOBAL(plpar_hcall9) | |||
168 | mfcr r0 | 194 | mfcr r0 |
169 | stw r0,8(r1) | 195 | stw r0,8(r1) |
170 | 196 | ||
171 | HCALL_INST_PRECALL | 197 | HCALL_INST_PRECALL(r5) |
172 | 198 | ||
173 | std r4,STK_PARM(r4)(r1) /* Save ret buffer */ | 199 | std r4,STK_PARM(r4)(r1) /* Save ret buffer */ |
174 | 200 | ||
@@ -196,7 +222,7 @@ _GLOBAL(plpar_hcall9) | |||
196 | std r11,56(r12) | 222 | std r11,56(r12) |
197 | std r0, 64(r12) | 223 | std r0, 64(r12) |
198 | 224 | ||
199 | HCALL_INST_POSTCALL | 225 | HCALL_INST_POSTCALL(r12) |
200 | 226 | ||
201 | lwz r0,8(r1) | 227 | lwz r0,8(r1) |
202 | mtcrf 0xff,r0 | 228 | mtcrf 0xff,r0 |
diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c index 3631a4f277eb..1fefae76e295 100644 --- a/arch/powerpc/platforms/pseries/hvCall_inst.c +++ b/arch/powerpc/platforms/pseries/hvCall_inst.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <asm/hvcall.h> | 26 | #include <asm/hvcall.h> |
27 | #include <asm/firmware.h> | 27 | #include <asm/firmware.h> |
28 | #include <asm/cputable.h> | 28 | #include <asm/cputable.h> |
29 | #include <asm/trace.h> | ||
29 | 30 | ||
30 | DEFINE_PER_CPU(struct hcall_stats[HCALL_STAT_ARRAY_SIZE], hcall_stats); | 31 | DEFINE_PER_CPU(struct hcall_stats[HCALL_STAT_ARRAY_SIZE], hcall_stats); |
31 | 32 | ||
@@ -100,6 +101,35 @@ static const struct file_operations hcall_inst_seq_fops = { | |||
100 | #define HCALL_ROOT_DIR "hcall_inst" | 101 | #define HCALL_ROOT_DIR "hcall_inst" |
101 | #define CPU_NAME_BUF_SIZE 32 | 102 | #define CPU_NAME_BUF_SIZE 32 |
102 | 103 | ||
104 | |||
105 | static void probe_hcall_entry(unsigned long opcode, unsigned long *args) | ||
106 | { | ||
107 | struct hcall_stats *h; | ||
108 | |||
109 | if (opcode > MAX_HCALL_OPCODE) | ||
110 | return; | ||
111 | |||
112 | h = &get_cpu_var(hcall_stats)[opcode / 4]; | ||
113 | h->tb_start = mftb(); | ||
114 | h->purr_start = mfspr(SPRN_PURR); | ||
115 | } | ||
116 | |||
117 | static void probe_hcall_exit(unsigned long opcode, unsigned long retval, | ||
118 | unsigned long *retbuf) | ||
119 | { | ||
120 | struct hcall_stats *h; | ||
121 | |||
122 | if (opcode > MAX_HCALL_OPCODE) | ||
123 | return; | ||
124 | |||
125 | h = &__get_cpu_var(hcall_stats)[opcode / 4]; | ||
126 | h->num_calls++; | ||
127 | h->tb_total += mftb() - h->tb_start; | ||
128 | h->purr_total += mfspr(SPRN_PURR) - h->purr_start; | ||
129 | |||
130 | put_cpu_var(hcall_stats); | ||
131 | } | ||
132 | |||
103 | static int __init hcall_inst_init(void) | 133 | static int __init hcall_inst_init(void) |
104 | { | 134 | { |
105 | struct dentry *hcall_root; | 135 | struct dentry *hcall_root; |
@@ -110,6 +140,14 @@ static int __init hcall_inst_init(void) | |||
110 | if (!firmware_has_feature(FW_FEATURE_LPAR)) | 140 | if (!firmware_has_feature(FW_FEATURE_LPAR)) |
111 | return 0; | 141 | return 0; |
112 | 142 | ||
143 | if (register_trace_hcall_entry(probe_hcall_entry)) | ||
144 | return -EINVAL; | ||
145 | |||
146 | if (register_trace_hcall_exit(probe_hcall_exit)) { | ||
147 | unregister_trace_hcall_entry(probe_hcall_entry); | ||
148 | return -EINVAL; | ||
149 | } | ||
150 | |||
113 | hcall_root = debugfs_create_dir(HCALL_ROOT_DIR, NULL); | 151 | hcall_root = debugfs_create_dir(HCALL_ROOT_DIR, NULL); |
114 | if (!hcall_root) | 152 | if (!hcall_root) |
115 | return -ENOMEM; | 153 | return -ENOMEM; |
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c index 903eb9eec687..0707653612ba 100644 --- a/arch/powerpc/platforms/pseries/lpar.c +++ b/arch/powerpc/platforms/pseries/lpar.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <asm/cputable.h> | 39 | #include <asm/cputable.h> |
40 | #include <asm/udbg.h> | 40 | #include <asm/udbg.h> |
41 | #include <asm/smp.h> | 41 | #include <asm/smp.h> |
42 | #include <asm/trace.h> | ||
42 | 43 | ||
43 | #include "plpar_wrappers.h" | 44 | #include "plpar_wrappers.h" |
44 | #include "pseries.h" | 45 | #include "pseries.h" |
@@ -661,3 +662,35 @@ void arch_free_page(struct page *page, int order) | |||
661 | EXPORT_SYMBOL(arch_free_page); | 662 | EXPORT_SYMBOL(arch_free_page); |
662 | 663 | ||
663 | #endif | 664 | #endif |
665 | |||
666 | #ifdef CONFIG_TRACEPOINTS | ||
667 | /* | ||
668 | * We optimise our hcall path by placing hcall_tracepoint_refcount | ||
669 | * directly in the TOC so we can check if the hcall tracepoints are | ||
670 | * enabled via a single load. | ||
671 | */ | ||
672 | |||
673 | /* NB: reg/unreg are called while guarded with the tracepoints_mutex */ | ||
674 | extern long hcall_tracepoint_refcount; | ||
675 | |||
676 | void hcall_tracepoint_regfunc(void) | ||
677 | { | ||
678 | hcall_tracepoint_refcount++; | ||
679 | } | ||
680 | |||
681 | void hcall_tracepoint_unregfunc(void) | ||
682 | { | ||
683 | hcall_tracepoint_refcount--; | ||
684 | } | ||
685 | |||
686 | void __trace_hcall_entry(unsigned long opcode, unsigned long *args) | ||
687 | { | ||
688 | trace_hcall_entry(opcode, args); | ||
689 | } | ||
690 | |||
691 | void __trace_hcall_exit(long opcode, unsigned long retval, | ||
692 | unsigned long *retbuf) | ||
693 | { | ||
694 | trace_hcall_exit(opcode, retval, retbuf); | ||
695 | } | ||
696 | #endif | ||
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c index 42f7e384e6c4..bc3c7f2abd79 100644 --- a/arch/powerpc/platforms/pseries/nvram.c +++ b/arch/powerpc/platforms/pseries/nvram.c | |||
@@ -15,7 +15,6 @@ | |||
15 | #include <linux/types.h> | 15 | #include <linux/types.h> |
16 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/slab.h> | ||
19 | #include <linux/spinlock.h> | 18 | #include <linux/spinlock.h> |
20 | #include <asm/uaccess.h> | 19 | #include <asm/uaccess.h> |
21 | #include <asm/nvram.h> | 20 | #include <asm/nvram.h> |
diff --git a/arch/powerpc/platforms/pseries/offline_states.h b/arch/powerpc/platforms/pseries/offline_states.h new file mode 100644 index 000000000000..75a6f480d931 --- /dev/null +++ b/arch/powerpc/platforms/pseries/offline_states.h | |||
@@ -0,0 +1,39 @@ | |||
1 | #ifndef _OFFLINE_STATES_H_ | ||
2 | #define _OFFLINE_STATES_H_ | ||
3 | |||
4 | /* Cpu offline states go here */ | ||
5 | enum cpu_state_vals { | ||
6 | CPU_STATE_OFFLINE, | ||
7 | CPU_STATE_INACTIVE, | ||
8 | CPU_STATE_ONLINE, | ||
9 | CPU_MAX_OFFLINE_STATES | ||
10 | }; | ||
11 | |||
12 | #ifdef CONFIG_HOTPLUG_CPU | ||
13 | extern enum cpu_state_vals get_cpu_current_state(int cpu); | ||
14 | extern void set_cpu_current_state(int cpu, enum cpu_state_vals state); | ||
15 | extern void set_preferred_offline_state(int cpu, enum cpu_state_vals state); | ||
16 | extern void set_default_offline_state(int cpu); | ||
17 | #else | ||
18 | static inline enum cpu_state_vals get_cpu_current_state(int cpu) | ||
19 | { | ||
20 | return CPU_STATE_ONLINE; | ||
21 | } | ||
22 | |||
23 | static inline void set_cpu_current_state(int cpu, enum cpu_state_vals state) | ||
24 | { | ||
25 | } | ||
26 | |||
27 | static inline void set_preferred_offline_state(int cpu, enum cpu_state_vals state) | ||
28 | { | ||
29 | } | ||
30 | |||
31 | static inline void set_default_offline_state(int cpu) | ||
32 | { | ||
33 | } | ||
34 | #endif | ||
35 | |||
36 | extern enum cpu_state_vals get_preferred_offline_state(int cpu); | ||
37 | extern int start_secondary(void); | ||
38 | extern void start_secondary_resume(void); | ||
39 | #endif | ||
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c index b6fa3e4b51b5..4b7a062dee15 100644 --- a/arch/powerpc/platforms/pseries/pci_dlpar.c +++ b/arch/powerpc/platforms/pseries/pci_dlpar.c | |||
@@ -165,7 +165,7 @@ int remove_phb_dynamic(struct pci_controller *phb) | |||
165 | struct resource *res; | 165 | struct resource *res; |
166 | int rc, i; | 166 | int rc, i; |
167 | 167 | ||
168 | pr_debug("PCI: Removing PHB %04x:%02x... \n", | 168 | pr_debug("PCI: Removing PHB %04x:%02x...\n", |
169 | pci_domain_nr(b), b->number); | 169 | pci_domain_nr(b), b->number); |
170 | 170 | ||
171 | /* We cannot to remove a root bus that has children */ | 171 | /* We cannot to remove a root bus that has children */ |
diff --git a/arch/powerpc/platforms/pseries/phyp_dump.c b/arch/powerpc/platforms/pseries/phyp_dump.c index 15eb6107bcd2..7ebd9e88d369 100644 --- a/arch/powerpc/platforms/pseries/phyp_dump.c +++ b/arch/powerpc/platforms/pseries/phyp_dump.c | |||
@@ -11,6 +11,7 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/gfp.h> | ||
14 | #include <linux/init.h> | 15 | #include <linux/init.h> |
15 | #include <linux/kobject.h> | 16 | #include <linux/kobject.h> |
16 | #include <linux/mm.h> | 17 | #include <linux/mm.h> |
@@ -150,7 +151,7 @@ static void print_dump_header(const struct phyp_dump_header *ph) | |||
150 | printk(KERN_INFO "Max auto time= %d\n", ph->maxtime_to_auto); | 151 | printk(KERN_INFO "Max auto time= %d\n", ph->maxtime_to_auto); |
151 | 152 | ||
152 | /*set cpu state and hpte states as well scratch pad area */ | 153 | /*set cpu state and hpte states as well scratch pad area */ |
153 | printk(KERN_INFO " CPU AREA \n"); | 154 | printk(KERN_INFO " CPU AREA\n"); |
154 | printk(KERN_INFO "cpu dump_flags =%d\n", ph->cpu_data.dump_flags); | 155 | printk(KERN_INFO "cpu dump_flags =%d\n", ph->cpu_data.dump_flags); |
155 | printk(KERN_INFO "cpu source_type =%d\n", ph->cpu_data.source_type); | 156 | printk(KERN_INFO "cpu source_type =%d\n", ph->cpu_data.source_type); |
156 | printk(KERN_INFO "cpu error_flags =%d\n", ph->cpu_data.error_flags); | 157 | printk(KERN_INFO "cpu error_flags =%d\n", ph->cpu_data.error_flags); |
@@ -161,7 +162,7 @@ static void print_dump_header(const struct phyp_dump_header *ph) | |||
161 | printk(KERN_INFO "cpu length_copied =%llx\n", | 162 | printk(KERN_INFO "cpu length_copied =%llx\n", |
162 | ph->cpu_data.length_copied); | 163 | ph->cpu_data.length_copied); |
163 | 164 | ||
164 | printk(KERN_INFO " HPTE AREA \n"); | 165 | printk(KERN_INFO " HPTE AREA\n"); |
165 | printk(KERN_INFO "HPTE dump_flags =%d\n", ph->hpte_data.dump_flags); | 166 | printk(KERN_INFO "HPTE dump_flags =%d\n", ph->hpte_data.dump_flags); |
166 | printk(KERN_INFO "HPTE source_type =%d\n", ph->hpte_data.source_type); | 167 | printk(KERN_INFO "HPTE source_type =%d\n", ph->hpte_data.source_type); |
167 | printk(KERN_INFO "HPTE error_flags =%d\n", ph->hpte_data.error_flags); | 168 | printk(KERN_INFO "HPTE error_flags =%d\n", ph->hpte_data.error_flags); |
@@ -172,7 +173,7 @@ static void print_dump_header(const struct phyp_dump_header *ph) | |||
172 | printk(KERN_INFO "HPTE length_copied =%llx\n", | 173 | printk(KERN_INFO "HPTE length_copied =%llx\n", |
173 | ph->hpte_data.length_copied); | 174 | ph->hpte_data.length_copied); |
174 | 175 | ||
175 | printk(KERN_INFO " SRSD AREA \n"); | 176 | printk(KERN_INFO " SRSD AREA\n"); |
176 | printk(KERN_INFO "SRSD dump_flags =%d\n", ph->kernel_data.dump_flags); | 177 | printk(KERN_INFO "SRSD dump_flags =%d\n", ph->kernel_data.dump_flags); |
177 | printk(KERN_INFO "SRSD source_type =%d\n", ph->kernel_data.source_type); | 178 | printk(KERN_INFO "SRSD source_type =%d\n", ph->kernel_data.source_type); |
178 | printk(KERN_INFO "SRSD error_flags =%d\n", ph->kernel_data.error_flags); | 179 | printk(KERN_INFO "SRSD error_flags =%d\n", ph->kernel_data.error_flags); |
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h index a24a6b2333b2..a05f8d427856 100644 --- a/arch/powerpc/platforms/pseries/plpar_wrappers.h +++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h | |||
@@ -9,11 +9,33 @@ static inline long poll_pending(void) | |||
9 | return plpar_hcall_norets(H_POLL_PENDING); | 9 | return plpar_hcall_norets(H_POLL_PENDING); |
10 | } | 10 | } |
11 | 11 | ||
12 | static inline u8 get_cede_latency_hint(void) | ||
13 | { | ||
14 | return get_lppaca()->gpr5_dword.fields.cede_latency_hint; | ||
15 | } | ||
16 | |||
17 | static inline void set_cede_latency_hint(u8 latency_hint) | ||
18 | { | ||
19 | get_lppaca()->gpr5_dword.fields.cede_latency_hint = latency_hint; | ||
20 | } | ||
21 | |||
12 | static inline long cede_processor(void) | 22 | static inline long cede_processor(void) |
13 | { | 23 | { |
14 | return plpar_hcall_norets(H_CEDE); | 24 | return plpar_hcall_norets(H_CEDE); |
15 | } | 25 | } |
16 | 26 | ||
27 | static inline long extended_cede_processor(unsigned long latency_hint) | ||
28 | { | ||
29 | long rc; | ||
30 | u8 old_latency_hint = get_cede_latency_hint(); | ||
31 | |||
32 | set_cede_latency_hint(latency_hint); | ||
33 | rc = cede_processor(); | ||
34 | set_cede_latency_hint(old_latency_hint); | ||
35 | |||
36 | return rc; | ||
37 | } | ||
38 | |||
17 | static inline long vpa_call(unsigned long flags, unsigned long cpu, | 39 | static inline long vpa_call(unsigned long flags, unsigned long cpu, |
18 | unsigned long vpa) | 40 | unsigned long vpa) |
19 | { | 41 | { |
@@ -237,12 +259,12 @@ static inline long plpar_ipi(unsigned long servernum, unsigned long mfrr) | |||
237 | return plpar_hcall_norets(H_IPI, servernum, mfrr); | 259 | return plpar_hcall_norets(H_IPI, servernum, mfrr); |
238 | } | 260 | } |
239 | 261 | ||
240 | static inline long plpar_xirr(unsigned long *xirr_ret) | 262 | static inline long plpar_xirr(unsigned long *xirr_ret, unsigned char cppr) |
241 | { | 263 | { |
242 | long rc; | 264 | long rc; |
243 | unsigned long retbuf[PLPAR_HCALL_BUFSIZE]; | 265 | unsigned long retbuf[PLPAR_HCALL_BUFSIZE]; |
244 | 266 | ||
245 | rc = plpar_hcall(H_XIRR, retbuf); | 267 | rc = plpar_hcall(H_XIRR, retbuf, cppr); |
246 | 268 | ||
247 | *xirr_ret = retbuf[0]; | 269 | *xirr_ret = retbuf[0]; |
248 | 270 | ||
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c index d20b96e22c2e..db940d2c39a0 100644 --- a/arch/powerpc/platforms/pseries/ras.c +++ b/arch/powerpc/platforms/pseries/ras.c | |||
@@ -30,7 +30,6 @@ | |||
30 | #include <linux/interrupt.h> | 30 | #include <linux/interrupt.h> |
31 | #include <linux/timex.h> | 31 | #include <linux/timex.h> |
32 | #include <linux/init.h> | 32 | #include <linux/init.h> |
33 | #include <linux/slab.h> | ||
34 | #include <linux/delay.h> | 33 | #include <linux/delay.h> |
35 | #include <linux/irq.h> | 34 | #include <linux/irq.h> |
36 | #include <linux/random.h> | 35 | #include <linux/random.h> |
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c index 2e2bbe120b90..1a58637bcea5 100644 --- a/arch/powerpc/platforms/pseries/reconfig.c +++ b/arch/powerpc/platforms/pseries/reconfig.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/kref.h> | 15 | #include <linux/kref.h> |
16 | #include <linux/notifier.h> | 16 | #include <linux/notifier.h> |
17 | #include <linux/proc_fs.h> | 17 | #include <linux/proc_fs.h> |
18 | #include <linux/slab.h> | ||
18 | 19 | ||
19 | #include <asm/prom.h> | 20 | #include <asm/prom.h> |
20 | #include <asm/machdep.h> | 21 | #include <asm/machdep.h> |
@@ -96,7 +97,7 @@ static struct device_node *derive_parent(const char *path) | |||
96 | return parent; | 97 | return parent; |
97 | } | 98 | } |
98 | 99 | ||
99 | static BLOCKING_NOTIFIER_HEAD(pSeries_reconfig_chain); | 100 | BLOCKING_NOTIFIER_HEAD(pSeries_reconfig_chain); |
100 | 101 | ||
101 | int pSeries_reconfig_notifier_register(struct notifier_block *nb) | 102 | int pSeries_reconfig_notifier_register(struct notifier_block *nb) |
102 | { | 103 | { |
@@ -184,7 +185,7 @@ static int pSeries_reconfig_remove_node(struct device_node *np) | |||
184 | } | 185 | } |
185 | 186 | ||
186 | /* | 187 | /* |
187 | * /proc/ppc64/ofdt - yucky binary interface for adding and removing | 188 | * /proc/powerpc/ofdt - yucky binary interface for adding and removing |
188 | * OF device nodes. Should be deprecated as soon as we get an | 189 | * OF device nodes. Should be deprecated as soon as we get an |
189 | * in-kernel wrapper for the RTAS ibm,configure-connector call. | 190 | * in-kernel wrapper for the RTAS ibm,configure-connector call. |
190 | */ | 191 | */ |
@@ -543,7 +544,7 @@ static const struct file_operations ofdt_fops = { | |||
543 | .write = ofdt_write | 544 | .write = ofdt_write |
544 | }; | 545 | }; |
545 | 546 | ||
546 | /* create /proc/ppc64/ofdt write-only by root */ | 547 | /* create /proc/powerpc/ofdt write-only by root */ |
547 | static int proc_ppc64_create_ofdt(void) | 548 | static int proc_ppc64_create_ofdt(void) |
548 | { | 549 | { |
549 | struct proc_dir_entry *ent; | 550 | struct proc_dir_entry *ent; |
@@ -551,7 +552,7 @@ static int proc_ppc64_create_ofdt(void) | |||
551 | if (!machine_is(pseries)) | 552 | if (!machine_is(pseries)) |
552 | return 0; | 553 | return 0; |
553 | 554 | ||
554 | ent = proc_create("ppc64/ofdt", S_IWUSR, NULL, &ofdt_fops); | 555 | ent = proc_create("powerpc/ofdt", S_IWUSR, NULL, &ofdt_fops); |
555 | if (ent) | 556 | if (ent) |
556 | ent->size = 0; | 557 | ent->size = 0; |
557 | 558 | ||
diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c deleted file mode 100644 index b3cbac855924..000000000000 --- a/arch/powerpc/platforms/pseries/rtasd.c +++ /dev/null | |||
@@ -1,519 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version | ||
7 | * 2 of the License, or (at your option) any later version. | ||
8 | * | ||
9 | * Communication to userspace based on kernel/printk.c | ||
10 | */ | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | #include <linux/errno.h> | ||
14 | #include <linux/sched.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/poll.h> | ||
17 | #include <linux/proc_fs.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/vmalloc.h> | ||
20 | #include <linux/spinlock.h> | ||
21 | #include <linux/cpu.h> | ||
22 | #include <linux/workqueue.h> | ||
23 | |||
24 | #include <asm/uaccess.h> | ||
25 | #include <asm/io.h> | ||
26 | #include <asm/rtas.h> | ||
27 | #include <asm/prom.h> | ||
28 | #include <asm/nvram.h> | ||
29 | #include <asm/atomic.h> | ||
30 | #include <asm/machdep.h> | ||
31 | |||
32 | |||
33 | static DEFINE_SPINLOCK(rtasd_log_lock); | ||
34 | |||
35 | static DECLARE_WAIT_QUEUE_HEAD(rtas_log_wait); | ||
36 | |||
37 | static char *rtas_log_buf; | ||
38 | static unsigned long rtas_log_start; | ||
39 | static unsigned long rtas_log_size; | ||
40 | |||
41 | static int surveillance_timeout = -1; | ||
42 | static unsigned int rtas_error_log_max; | ||
43 | static unsigned int rtas_error_log_buffer_max; | ||
44 | |||
45 | /* RTAS service tokens */ | ||
46 | static unsigned int event_scan; | ||
47 | static unsigned int rtas_event_scan_rate; | ||
48 | |||
49 | static int full_rtas_msgs = 0; | ||
50 | |||
51 | /* Stop logging to nvram after first fatal error */ | ||
52 | static int logging_enabled; /* Until we initialize everything, | ||
53 | * make sure we don't try logging | ||
54 | * anything */ | ||
55 | static int error_log_cnt; | ||
56 | |||
57 | /* | ||
58 | * Since we use 32 bit RTAS, the physical address of this must be below | ||
59 | * 4G or else bad things happen. Allocate this in the kernel data and | ||
60 | * make it big enough. | ||
61 | */ | ||
62 | static unsigned char logdata[RTAS_ERROR_LOG_MAX]; | ||
63 | |||
64 | static char *rtas_type[] = { | ||
65 | "Unknown", "Retry", "TCE Error", "Internal Device Failure", | ||
66 | "Timeout", "Data Parity", "Address Parity", "Cache Parity", | ||
67 | "Address Invalid", "ECC Uncorrected", "ECC Corrupted", | ||
68 | }; | ||
69 | |||
70 | static char *rtas_event_type(int type) | ||
71 | { | ||
72 | if ((type > 0) && (type < 11)) | ||
73 | return rtas_type[type]; | ||
74 | |||
75 | switch (type) { | ||
76 | case RTAS_TYPE_EPOW: | ||
77 | return "EPOW"; | ||
78 | case RTAS_TYPE_PLATFORM: | ||
79 | return "Platform Error"; | ||
80 | case RTAS_TYPE_IO: | ||
81 | return "I/O Event"; | ||
82 | case RTAS_TYPE_INFO: | ||
83 | return "Platform Information Event"; | ||
84 | case RTAS_TYPE_DEALLOC: | ||
85 | return "Resource Deallocation Event"; | ||
86 | case RTAS_TYPE_DUMP: | ||
87 | return "Dump Notification Event"; | ||
88 | } | ||
89 | |||
90 | return rtas_type[0]; | ||
91 | } | ||
92 | |||
93 | /* To see this info, grep RTAS /var/log/messages and each entry | ||
94 | * will be collected together with obvious begin/end. | ||
95 | * There will be a unique identifier on the begin and end lines. | ||
96 | * This will persist across reboots. | ||
97 | * | ||
98 | * format of error logs returned from RTAS: | ||
99 | * bytes (size) : contents | ||
100 | * -------------------------------------------------------- | ||
101 | * 0-7 (8) : rtas_error_log | ||
102 | * 8-47 (40) : extended info | ||
103 | * 48-51 (4) : vendor id | ||
104 | * 52-1023 (vendor specific) : location code and debug data | ||
105 | */ | ||
106 | static void printk_log_rtas(char *buf, int len) | ||
107 | { | ||
108 | |||
109 | int i,j,n = 0; | ||
110 | int perline = 16; | ||
111 | char buffer[64]; | ||
112 | char * str = "RTAS event"; | ||
113 | |||
114 | if (full_rtas_msgs) { | ||
115 | printk(RTAS_DEBUG "%d -------- %s begin --------\n", | ||
116 | error_log_cnt, str); | ||
117 | |||
118 | /* | ||
119 | * Print perline bytes on each line, each line will start | ||
120 | * with RTAS and a changing number, so syslogd will | ||
121 | * print lines that are otherwise the same. Separate every | ||
122 | * 4 bytes with a space. | ||
123 | */ | ||
124 | for (i = 0; i < len; i++) { | ||
125 | j = i % perline; | ||
126 | if (j == 0) { | ||
127 | memset(buffer, 0, sizeof(buffer)); | ||
128 | n = sprintf(buffer, "RTAS %d:", i/perline); | ||
129 | } | ||
130 | |||
131 | if ((i % 4) == 0) | ||
132 | n += sprintf(buffer+n, " "); | ||
133 | |||
134 | n += sprintf(buffer+n, "%02x", (unsigned char)buf[i]); | ||
135 | |||
136 | if (j == (perline-1)) | ||
137 | printk(KERN_DEBUG "%s\n", buffer); | ||
138 | } | ||
139 | if ((i % perline) != 0) | ||
140 | printk(KERN_DEBUG "%s\n", buffer); | ||
141 | |||
142 | printk(RTAS_DEBUG "%d -------- %s end ----------\n", | ||
143 | error_log_cnt, str); | ||
144 | } else { | ||
145 | struct rtas_error_log *errlog = (struct rtas_error_log *)buf; | ||
146 | |||
147 | printk(RTAS_DEBUG "event: %d, Type: %s, Severity: %d\n", | ||
148 | error_log_cnt, rtas_event_type(errlog->type), | ||
149 | errlog->severity); | ||
150 | } | ||
151 | } | ||
152 | |||
153 | static int log_rtas_len(char * buf) | ||
154 | { | ||
155 | int len; | ||
156 | struct rtas_error_log *err; | ||
157 | |||
158 | /* rtas fixed header */ | ||
159 | len = 8; | ||
160 | err = (struct rtas_error_log *)buf; | ||
161 | if (err->extended_log_length) { | ||
162 | |||
163 | /* extended header */ | ||
164 | len += err->extended_log_length; | ||
165 | } | ||
166 | |||
167 | if (rtas_error_log_max == 0) | ||
168 | rtas_error_log_max = rtas_get_error_log_max(); | ||
169 | |||
170 | if (len > rtas_error_log_max) | ||
171 | len = rtas_error_log_max; | ||
172 | |||
173 | return len; | ||
174 | } | ||
175 | |||
176 | /* | ||
177 | * First write to nvram, if fatal error, that is the only | ||
178 | * place we log the info. The error will be picked up | ||
179 | * on the next reboot by rtasd. If not fatal, run the | ||
180 | * method for the type of error. Currently, only RTAS | ||
181 | * errors have methods implemented, but in the future | ||
182 | * there might be a need to store data in nvram before a | ||
183 | * call to panic(). | ||
184 | * | ||
185 | * XXX We write to nvram periodically, to indicate error has | ||
186 | * been written and sync'd, but there is a possibility | ||
187 | * that if we don't shutdown correctly, a duplicate error | ||
188 | * record will be created on next reboot. | ||
189 | */ | ||
190 | void pSeries_log_error(char *buf, unsigned int err_type, int fatal) | ||
191 | { | ||
192 | unsigned long offset; | ||
193 | unsigned long s; | ||
194 | int len = 0; | ||
195 | |||
196 | pr_debug("rtasd: logging event\n"); | ||
197 | if (buf == NULL) | ||
198 | return; | ||
199 | |||
200 | spin_lock_irqsave(&rtasd_log_lock, s); | ||
201 | |||
202 | /* get length and increase count */ | ||
203 | switch (err_type & ERR_TYPE_MASK) { | ||
204 | case ERR_TYPE_RTAS_LOG: | ||
205 | len = log_rtas_len(buf); | ||
206 | if (!(err_type & ERR_FLAG_BOOT)) | ||
207 | error_log_cnt++; | ||
208 | break; | ||
209 | case ERR_TYPE_KERNEL_PANIC: | ||
210 | default: | ||
211 | WARN_ON_ONCE(!irqs_disabled()); /* @@@ DEBUG @@@ */ | ||
212 | spin_unlock_irqrestore(&rtasd_log_lock, s); | ||
213 | return; | ||
214 | } | ||
215 | |||
216 | /* Write error to NVRAM */ | ||
217 | if (logging_enabled && !(err_type & ERR_FLAG_BOOT)) | ||
218 | nvram_write_error_log(buf, len, err_type, error_log_cnt); | ||
219 | |||
220 | /* | ||
221 | * rtas errors can occur during boot, and we do want to capture | ||
222 | * those somewhere, even if nvram isn't ready (why not?), and even | ||
223 | * if rtasd isn't ready. Put them into the boot log, at least. | ||
224 | */ | ||
225 | if ((err_type & ERR_TYPE_MASK) == ERR_TYPE_RTAS_LOG) | ||
226 | printk_log_rtas(buf, len); | ||
227 | |||
228 | /* Check to see if we need to or have stopped logging */ | ||
229 | if (fatal || !logging_enabled) { | ||
230 | logging_enabled = 0; | ||
231 | WARN_ON_ONCE(!irqs_disabled()); /* @@@ DEBUG @@@ */ | ||
232 | spin_unlock_irqrestore(&rtasd_log_lock, s); | ||
233 | return; | ||
234 | } | ||
235 | |||
236 | /* call type specific method for error */ | ||
237 | switch (err_type & ERR_TYPE_MASK) { | ||
238 | case ERR_TYPE_RTAS_LOG: | ||
239 | offset = rtas_error_log_buffer_max * | ||
240 | ((rtas_log_start+rtas_log_size) & LOG_NUMBER_MASK); | ||
241 | |||
242 | /* First copy over sequence number */ | ||
243 | memcpy(&rtas_log_buf[offset], (void *) &error_log_cnt, sizeof(int)); | ||
244 | |||
245 | /* Second copy over error log data */ | ||
246 | offset += sizeof(int); | ||
247 | memcpy(&rtas_log_buf[offset], buf, len); | ||
248 | |||
249 | if (rtas_log_size < LOG_NUMBER) | ||
250 | rtas_log_size += 1; | ||
251 | else | ||
252 | rtas_log_start += 1; | ||
253 | |||
254 | WARN_ON_ONCE(!irqs_disabled()); /* @@@ DEBUG @@@ */ | ||
255 | spin_unlock_irqrestore(&rtasd_log_lock, s); | ||
256 | wake_up_interruptible(&rtas_log_wait); | ||
257 | break; | ||
258 | case ERR_TYPE_KERNEL_PANIC: | ||
259 | default: | ||
260 | WARN_ON_ONCE(!irqs_disabled()); /* @@@ DEBUG @@@ */ | ||
261 | spin_unlock_irqrestore(&rtasd_log_lock, s); | ||
262 | return; | ||
263 | } | ||
264 | |||
265 | } | ||
266 | |||
267 | |||
268 | static int rtas_log_open(struct inode * inode, struct file * file) | ||
269 | { | ||
270 | return 0; | ||
271 | } | ||
272 | |||
273 | static int rtas_log_release(struct inode * inode, struct file * file) | ||
274 | { | ||
275 | return 0; | ||
276 | } | ||
277 | |||
278 | /* This will check if all events are logged, if they are then, we | ||
279 | * know that we can safely clear the events in NVRAM. | ||
280 | * Next we'll sit and wait for something else to log. | ||
281 | */ | ||
282 | static ssize_t rtas_log_read(struct file * file, char __user * buf, | ||
283 | size_t count, loff_t *ppos) | ||
284 | { | ||
285 | int error; | ||
286 | char *tmp; | ||
287 | unsigned long s; | ||
288 | unsigned long offset; | ||
289 | |||
290 | if (!buf || count < rtas_error_log_buffer_max) | ||
291 | return -EINVAL; | ||
292 | |||
293 | count = rtas_error_log_buffer_max; | ||
294 | |||
295 | if (!access_ok(VERIFY_WRITE, buf, count)) | ||
296 | return -EFAULT; | ||
297 | |||
298 | tmp = kmalloc(count, GFP_KERNEL); | ||
299 | if (!tmp) | ||
300 | return -ENOMEM; | ||
301 | |||
302 | spin_lock_irqsave(&rtasd_log_lock, s); | ||
303 | /* if it's 0, then we know we got the last one (the one in NVRAM) */ | ||
304 | while (rtas_log_size == 0) { | ||
305 | if (file->f_flags & O_NONBLOCK) { | ||
306 | spin_unlock_irqrestore(&rtasd_log_lock, s); | ||
307 | error = -EAGAIN; | ||
308 | goto out; | ||
309 | } | ||
310 | |||
311 | if (!logging_enabled) { | ||
312 | spin_unlock_irqrestore(&rtasd_log_lock, s); | ||
313 | error = -ENODATA; | ||
314 | goto out; | ||
315 | } | ||
316 | nvram_clear_error_log(); | ||
317 | |||
318 | spin_unlock_irqrestore(&rtasd_log_lock, s); | ||
319 | error = wait_event_interruptible(rtas_log_wait, rtas_log_size); | ||
320 | if (error) | ||
321 | goto out; | ||
322 | spin_lock_irqsave(&rtasd_log_lock, s); | ||
323 | } | ||
324 | |||
325 | offset = rtas_error_log_buffer_max * (rtas_log_start & LOG_NUMBER_MASK); | ||
326 | memcpy(tmp, &rtas_log_buf[offset], count); | ||
327 | |||
328 | rtas_log_start += 1; | ||
329 | rtas_log_size -= 1; | ||
330 | spin_unlock_irqrestore(&rtasd_log_lock, s); | ||
331 | |||
332 | error = copy_to_user(buf, tmp, count) ? -EFAULT : count; | ||
333 | out: | ||
334 | kfree(tmp); | ||
335 | return error; | ||
336 | } | ||
337 | |||
338 | static unsigned int rtas_log_poll(struct file *file, poll_table * wait) | ||
339 | { | ||
340 | poll_wait(file, &rtas_log_wait, wait); | ||
341 | if (rtas_log_size) | ||
342 | return POLLIN | POLLRDNORM; | ||
343 | return 0; | ||
344 | } | ||
345 | |||
346 | static const struct file_operations proc_rtas_log_operations = { | ||
347 | .read = rtas_log_read, | ||
348 | .poll = rtas_log_poll, | ||
349 | .open = rtas_log_open, | ||
350 | .release = rtas_log_release, | ||
351 | }; | ||
352 | |||
353 | static int enable_surveillance(int timeout) | ||
354 | { | ||
355 | int error; | ||
356 | |||
357 | error = rtas_set_indicator(SURVEILLANCE_TOKEN, 0, timeout); | ||
358 | |||
359 | if (error == 0) | ||
360 | return 0; | ||
361 | |||
362 | if (error == -EINVAL) { | ||
363 | printk(KERN_DEBUG "rtasd: surveillance not supported\n"); | ||
364 | return 0; | ||
365 | } | ||
366 | |||
367 | printk(KERN_ERR "rtasd: could not update surveillance\n"); | ||
368 | return -1; | ||
369 | } | ||
370 | |||
371 | static void do_event_scan(void) | ||
372 | { | ||
373 | int error; | ||
374 | do { | ||
375 | memset(logdata, 0, rtas_error_log_max); | ||
376 | error = rtas_call(event_scan, 4, 1, NULL, | ||
377 | RTAS_EVENT_SCAN_ALL_EVENTS, 0, | ||
378 | __pa(logdata), rtas_error_log_max); | ||
379 | if (error == -1) { | ||
380 | printk(KERN_ERR "event-scan failed\n"); | ||
381 | break; | ||
382 | } | ||
383 | |||
384 | if (error == 0) | ||
385 | pSeries_log_error(logdata, ERR_TYPE_RTAS_LOG, 0); | ||
386 | |||
387 | } while(error == 0); | ||
388 | } | ||
389 | |||
390 | static void rtas_event_scan(struct work_struct *w); | ||
391 | DECLARE_DELAYED_WORK(event_scan_work, rtas_event_scan); | ||
392 | |||
393 | /* | ||
394 | * Delay should be at least one second since some machines have problems if | ||
395 | * we call event-scan too quickly. | ||
396 | */ | ||
397 | static unsigned long event_scan_delay = 1*HZ; | ||
398 | static int first_pass = 1; | ||
399 | |||
400 | static void rtas_event_scan(struct work_struct *w) | ||
401 | { | ||
402 | unsigned int cpu; | ||
403 | |||
404 | do_event_scan(); | ||
405 | |||
406 | get_online_cpus(); | ||
407 | |||
408 | cpu = next_cpu(smp_processor_id(), cpu_online_map); | ||
409 | if (cpu == NR_CPUS) { | ||
410 | cpu = first_cpu(cpu_online_map); | ||
411 | |||
412 | if (first_pass) { | ||
413 | first_pass = 0; | ||
414 | event_scan_delay = 30*HZ/rtas_event_scan_rate; | ||
415 | |||
416 | if (surveillance_timeout != -1) { | ||
417 | pr_debug("rtasd: enabling surveillance\n"); | ||
418 | enable_surveillance(surveillance_timeout); | ||
419 | pr_debug("rtasd: surveillance enabled\n"); | ||
420 | } | ||
421 | } | ||
422 | } | ||
423 | |||
424 | schedule_delayed_work_on(cpu, &event_scan_work, | ||
425 | __round_jiffies_relative(event_scan_delay, cpu)); | ||
426 | |||
427 | put_online_cpus(); | ||
428 | } | ||
429 | |||
430 | static void start_event_scan(void) | ||
431 | { | ||
432 | unsigned int err_type; | ||
433 | int rc; | ||
434 | |||
435 | printk(KERN_DEBUG "RTAS daemon started\n"); | ||
436 | pr_debug("rtasd: will sleep for %d milliseconds\n", | ||
437 | (30000 / rtas_event_scan_rate)); | ||
438 | |||
439 | /* See if we have any error stored in NVRAM */ | ||
440 | memset(logdata, 0, rtas_error_log_max); | ||
441 | rc = nvram_read_error_log(logdata, rtas_error_log_max, | ||
442 | &err_type, &error_log_cnt); | ||
443 | /* We can use rtas_log_buf now */ | ||
444 | logging_enabled = 1; | ||
445 | |||
446 | if (!rc) { | ||
447 | if (err_type != ERR_FLAG_ALREADY_LOGGED) { | ||
448 | pSeries_log_error(logdata, err_type | ERR_FLAG_BOOT, 0); | ||
449 | } | ||
450 | } | ||
451 | |||
452 | schedule_delayed_work_on(first_cpu(cpu_online_map), &event_scan_work, | ||
453 | event_scan_delay); | ||
454 | } | ||
455 | |||
456 | static int __init rtas_init(void) | ||
457 | { | ||
458 | struct proc_dir_entry *entry; | ||
459 | |||
460 | if (!machine_is(pseries)) | ||
461 | return 0; | ||
462 | |||
463 | /* No RTAS */ | ||
464 | event_scan = rtas_token("event-scan"); | ||
465 | if (event_scan == RTAS_UNKNOWN_SERVICE) { | ||
466 | printk(KERN_DEBUG "rtasd: no event-scan on system\n"); | ||
467 | return -ENODEV; | ||
468 | } | ||
469 | |||
470 | rtas_event_scan_rate = rtas_token("rtas-event-scan-rate"); | ||
471 | if (rtas_event_scan_rate == RTAS_UNKNOWN_SERVICE) { | ||
472 | printk(KERN_ERR "rtasd: no rtas-event-scan-rate on system\n"); | ||
473 | return -ENODEV; | ||
474 | } | ||
475 | |||
476 | /* Make room for the sequence number */ | ||
477 | rtas_error_log_max = rtas_get_error_log_max(); | ||
478 | rtas_error_log_buffer_max = rtas_error_log_max + sizeof(int); | ||
479 | |||
480 | rtas_log_buf = vmalloc(rtas_error_log_buffer_max*LOG_NUMBER); | ||
481 | if (!rtas_log_buf) { | ||
482 | printk(KERN_ERR "rtasd: no memory\n"); | ||
483 | return -ENOMEM; | ||
484 | } | ||
485 | |||
486 | entry = proc_create("ppc64/rtas/error_log", S_IRUSR, NULL, | ||
487 | &proc_rtas_log_operations); | ||
488 | if (!entry) | ||
489 | printk(KERN_ERR "Failed to create error_log proc entry\n"); | ||
490 | |||
491 | start_event_scan(); | ||
492 | |||
493 | return 0; | ||
494 | } | ||
495 | |||
496 | static int __init surveillance_setup(char *str) | ||
497 | { | ||
498 | int i; | ||
499 | |||
500 | if (get_option(&str,&i)) { | ||
501 | if (i >= 0 && i <= 255) | ||
502 | surveillance_timeout = i; | ||
503 | } | ||
504 | |||
505 | return 1; | ||
506 | } | ||
507 | |||
508 | static int __init rtasmsgs_setup(char *str) | ||
509 | { | ||
510 | if (strcmp(str, "on") == 0) | ||
511 | full_rtas_msgs = 1; | ||
512 | else if (strcmp(str, "off") == 0) | ||
513 | full_rtas_msgs = 0; | ||
514 | |||
515 | return 1; | ||
516 | } | ||
517 | __initcall(rtas_init); | ||
518 | __setup("surveillance=", surveillance_setup); | ||
519 | __setup("rtasmsgs=", rtasmsgs_setup); | ||
diff --git a/arch/powerpc/platforms/pseries/scanlog.c b/arch/powerpc/platforms/pseries/scanlog.c index 417eca79df69..80e9e7652a4d 100644 --- a/arch/powerpc/platforms/pseries/scanlog.c +++ b/arch/powerpc/platforms/pseries/scanlog.c | |||
@@ -13,7 +13,7 @@ | |||
13 | * of this data using this driver. A dump exists if the device-tree | 13 | * of this data using this driver. A dump exists if the device-tree |
14 | * /chosen/ibm,scan-log-data property exists. | 14 | * /chosen/ibm,scan-log-data property exists. |
15 | * | 15 | * |
16 | * This driver exports /proc/ppc64/scan-log-dump which can be read. | 16 | * This driver exports /proc/powerpc/scan-log-dump which can be read. |
17 | * The driver supports only sequential reads. | 17 | * The driver supports only sequential reads. |
18 | * | 18 | * |
19 | * The driver looks at a write to the driver for the single word "reset". | 19 | * The driver looks at a write to the driver for the single word "reset". |
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/proc_fs.h> | 26 | #include <linux/proc_fs.h> |
27 | #include <linux/init.h> | 27 | #include <linux/init.h> |
28 | #include <linux/delay.h> | 28 | #include <linux/delay.h> |
29 | #include <linux/slab.h> | ||
29 | #include <asm/uaccess.h> | 30 | #include <asm/uaccess.h> |
30 | #include <asm/rtas.h> | 31 | #include <asm/rtas.h> |
31 | #include <asm/prom.h> | 32 | #include <asm/prom.h> |
@@ -186,7 +187,7 @@ static int __init scanlog_init(void) | |||
186 | if (!data) | 187 | if (!data) |
187 | goto err; | 188 | goto err; |
188 | 189 | ||
189 | ent = proc_create_data("ppc64/rtas/scan-log-dump", S_IRUSR, NULL, | 190 | ent = proc_create_data("powerpc/rtas/scan-log-dump", S_IRUSR, NULL, |
190 | &scanlog_fops, data); | 191 | &scanlog_fops, data); |
191 | if (!ent) | 192 | if (!ent) |
192 | goto err; | 193 | goto err; |
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index ca5f2e10972c..6710761bf60f 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <linux/mm.h> | 23 | #include <linux/mm.h> |
24 | #include <linux/stddef.h> | 24 | #include <linux/stddef.h> |
25 | #include <linux/unistd.h> | 25 | #include <linux/unistd.h> |
26 | #include <linux/slab.h> | ||
27 | #include <linux/user.h> | 26 | #include <linux/user.h> |
28 | #include <linux/tty.h> | 27 | #include <linux/tty.h> |
29 | #include <linux/major.h> | 28 | #include <linux/major.h> |
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c index 440000cc7130..4e7f89a84561 100644 --- a/arch/powerpc/platforms/pseries/smp.c +++ b/arch/powerpc/platforms/pseries/smp.c | |||
@@ -48,6 +48,7 @@ | |||
48 | #include "plpar_wrappers.h" | 48 | #include "plpar_wrappers.h" |
49 | #include "pseries.h" | 49 | #include "pseries.h" |
50 | #include "xics.h" | 50 | #include "xics.h" |
51 | #include "offline_states.h" | ||
51 | 52 | ||
52 | 53 | ||
53 | /* | 54 | /* |
@@ -84,6 +85,9 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu) | |||
84 | /* Fixup atomic count: it exited inside IRQ handler. */ | 85 | /* Fixup atomic count: it exited inside IRQ handler. */ |
85 | task_thread_info(paca[lcpu].__current)->preempt_count = 0; | 86 | task_thread_info(paca[lcpu].__current)->preempt_count = 0; |
86 | 87 | ||
88 | if (get_cpu_current_state(lcpu) == CPU_STATE_INACTIVE) | ||
89 | goto out; | ||
90 | |||
87 | /* | 91 | /* |
88 | * If the RTAS start-cpu token does not exist then presume the | 92 | * If the RTAS start-cpu token does not exist then presume the |
89 | * cpu is already spinning. | 93 | * cpu is already spinning. |
@@ -98,6 +102,7 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu) | |||
98 | return 0; | 102 | return 0; |
99 | } | 103 | } |
100 | 104 | ||
105 | out: | ||
101 | return 1; | 106 | return 1; |
102 | } | 107 | } |
103 | 108 | ||
@@ -111,12 +116,16 @@ static void __devinit smp_xics_setup_cpu(int cpu) | |||
111 | vpa_init(cpu); | 116 | vpa_init(cpu); |
112 | 117 | ||
113 | cpu_clear(cpu, of_spin_map); | 118 | cpu_clear(cpu, of_spin_map); |
119 | set_cpu_current_state(cpu, CPU_STATE_ONLINE); | ||
120 | set_default_offline_state(cpu); | ||
114 | 121 | ||
115 | } | 122 | } |
116 | #endif /* CONFIG_XICS */ | 123 | #endif /* CONFIG_XICS */ |
117 | 124 | ||
118 | static void __devinit smp_pSeries_kick_cpu(int nr) | 125 | static void __devinit smp_pSeries_kick_cpu(int nr) |
119 | { | 126 | { |
127 | long rc; | ||
128 | unsigned long hcpuid; | ||
120 | BUG_ON(nr < 0 || nr >= NR_CPUS); | 129 | BUG_ON(nr < 0 || nr >= NR_CPUS); |
121 | 130 | ||
122 | if (!smp_startup_cpu(nr)) | 131 | if (!smp_startup_cpu(nr)) |
@@ -128,6 +137,16 @@ static void __devinit smp_pSeries_kick_cpu(int nr) | |||
128 | * the processor will continue on to secondary_start | 137 | * the processor will continue on to secondary_start |
129 | */ | 138 | */ |
130 | paca[nr].cpu_start = 1; | 139 | paca[nr].cpu_start = 1; |
140 | |||
141 | set_preferred_offline_state(nr, CPU_STATE_ONLINE); | ||
142 | |||
143 | if (get_cpu_current_state(nr) == CPU_STATE_INACTIVE) { | ||
144 | hcpuid = get_hard_smp_processor_id(nr); | ||
145 | rc = plpar_hcall_norets(H_PROD, hcpuid); | ||
146 | if (rc != H_SUCCESS) | ||
147 | printk(KERN_ERR "Error: Prod to wake up processor %d " | ||
148 | "Ret= %ld\n", nr, rc); | ||
149 | } | ||
131 | } | 150 | } |
132 | 151 | ||
133 | static int smp_pSeries_cpu_bootable(unsigned int nr) | 152 | static int smp_pSeries_cpu_bootable(unsigned int nr) |
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index b9bf0eedccf2..1bcedd8b4616 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/cpu.h> | 20 | #include <linux/cpu.h> |
21 | #include <linux/msi.h> | 21 | #include <linux/msi.h> |
22 | #include <linux/of.h> | 22 | #include <linux/of.h> |
23 | #include <linux/percpu.h> | ||
23 | 24 | ||
24 | #include <asm/firmware.h> | 25 | #include <asm/firmware.h> |
25 | #include <asm/io.h> | 26 | #include <asm/io.h> |
@@ -46,6 +47,12 @@ static struct irq_host *xics_host; | |||
46 | */ | 47 | */ |
47 | #define IPI_PRIORITY 4 | 48 | #define IPI_PRIORITY 4 |
48 | 49 | ||
50 | /* The least favored priority */ | ||
51 | #define LOWEST_PRIORITY 0xFF | ||
52 | |||
53 | /* The number of priorities defined above */ | ||
54 | #define MAX_NUM_PRIORITIES 3 | ||
55 | |||
49 | static unsigned int default_server = 0xFF; | 56 | static unsigned int default_server = 0xFF; |
50 | static unsigned int default_distrib_server = 0; | 57 | static unsigned int default_distrib_server = 0; |
51 | static unsigned int interrupt_server_size = 8; | 58 | static unsigned int interrupt_server_size = 8; |
@@ -56,6 +63,12 @@ static int ibm_set_xive; | |||
56 | static int ibm_int_on; | 63 | static int ibm_int_on; |
57 | static int ibm_int_off; | 64 | static int ibm_int_off; |
58 | 65 | ||
66 | struct xics_cppr { | ||
67 | unsigned char stack[MAX_NUM_PRIORITIES]; | ||
68 | int index; | ||
69 | }; | ||
70 | |||
71 | static DEFINE_PER_CPU(struct xics_cppr, xics_cppr); | ||
59 | 72 | ||
60 | /* Direct hardware low level accessors */ | 73 | /* Direct hardware low level accessors */ |
61 | 74 | ||
@@ -107,14 +120,14 @@ static inline void direct_qirr_info(int n_cpu, u8 value) | |||
107 | 120 | ||
108 | /* LPAR low level accessors */ | 121 | /* LPAR low level accessors */ |
109 | 122 | ||
110 | static inline unsigned int lpar_xirr_info_get(void) | 123 | static inline unsigned int lpar_xirr_info_get(unsigned char cppr) |
111 | { | 124 | { |
112 | unsigned long lpar_rc; | 125 | unsigned long lpar_rc; |
113 | unsigned long return_value; | 126 | unsigned long return_value; |
114 | 127 | ||
115 | lpar_rc = plpar_xirr(&return_value); | 128 | lpar_rc = plpar_xirr(&return_value, cppr); |
116 | if (lpar_rc != H_SUCCESS) | 129 | if (lpar_rc != H_SUCCESS) |
117 | panic(" bad return code xirr - rc = %lx \n", lpar_rc); | 130 | panic(" bad return code xirr - rc = %lx\n", lpar_rc); |
118 | return (unsigned int)return_value; | 131 | return (unsigned int)return_value; |
119 | } | 132 | } |
120 | 133 | ||
@@ -150,14 +163,13 @@ static inline void lpar_qirr_info(int n_cpu , u8 value) | |||
150 | /* Interface to generic irq subsystem */ | 163 | /* Interface to generic irq subsystem */ |
151 | 164 | ||
152 | #ifdef CONFIG_SMP | 165 | #ifdef CONFIG_SMP |
153 | static int get_irq_server(unsigned int virq, unsigned int strict_check) | 166 | static int get_irq_server(unsigned int virq, cpumask_t cpumask, |
167 | unsigned int strict_check) | ||
154 | { | 168 | { |
155 | int server; | 169 | int server; |
156 | /* For the moment only implement delivery to all cpus or one cpu */ | 170 | /* For the moment only implement delivery to all cpus or one cpu */ |
157 | cpumask_t cpumask; | ||
158 | cpumask_t tmp = CPU_MASK_NONE; | 171 | cpumask_t tmp = CPU_MASK_NONE; |
159 | 172 | ||
160 | cpumask_copy(&cpumask, irq_desc[virq].affinity); | ||
161 | if (!distribute_irqs) | 173 | if (!distribute_irqs) |
162 | return default_server; | 174 | return default_server; |
163 | 175 | ||
@@ -179,10 +191,7 @@ static int get_irq_server(unsigned int virq, unsigned int strict_check) | |||
179 | return default_server; | 191 | return default_server; |
180 | } | 192 | } |
181 | #else | 193 | #else |
182 | static int get_irq_server(unsigned int virq, unsigned int strict_check) | 194 | #define get_irq_server(virq, cpumask, strict_check) (default_server) |
183 | { | ||
184 | return default_server; | ||
185 | } | ||
186 | #endif | 195 | #endif |
187 | 196 | ||
188 | static void xics_unmask_irq(unsigned int virq) | 197 | static void xics_unmask_irq(unsigned int virq) |
@@ -198,7 +207,7 @@ static void xics_unmask_irq(unsigned int virq) | |||
198 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) | 207 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) |
199 | return; | 208 | return; |
200 | 209 | ||
201 | server = get_irq_server(virq, 0); | 210 | server = get_irq_server(virq, *(irq_to_desc(virq)->affinity), 0); |
202 | 211 | ||
203 | call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server, | 212 | call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server, |
204 | DEFAULT_PRIORITY); | 213 | DEFAULT_PRIORITY); |
@@ -284,6 +293,19 @@ static inline unsigned int xics_xirr_vector(unsigned int xirr) | |||
284 | return xirr & 0x00ffffff; | 293 | return xirr & 0x00ffffff; |
285 | } | 294 | } |
286 | 295 | ||
296 | static void push_cppr(unsigned int vec) | ||
297 | { | ||
298 | struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); | ||
299 | |||
300 | if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1)) | ||
301 | return; | ||
302 | |||
303 | if (vec == XICS_IPI) | ||
304 | os_cppr->stack[++os_cppr->index] = IPI_PRIORITY; | ||
305 | else | ||
306 | os_cppr->stack[++os_cppr->index] = DEFAULT_PRIORITY; | ||
307 | } | ||
308 | |||
287 | static unsigned int xics_get_irq_direct(void) | 309 | static unsigned int xics_get_irq_direct(void) |
288 | { | 310 | { |
289 | unsigned int xirr = direct_xirr_info_get(); | 311 | unsigned int xirr = direct_xirr_info_get(); |
@@ -294,8 +316,10 @@ static unsigned int xics_get_irq_direct(void) | |||
294 | return NO_IRQ; | 316 | return NO_IRQ; |
295 | 317 | ||
296 | irq = irq_radix_revmap_lookup(xics_host, vec); | 318 | irq = irq_radix_revmap_lookup(xics_host, vec); |
297 | if (likely(irq != NO_IRQ)) | 319 | if (likely(irq != NO_IRQ)) { |
320 | push_cppr(vec); | ||
298 | return irq; | 321 | return irq; |
322 | } | ||
299 | 323 | ||
300 | /* We don't have a linux mapping, so have rtas mask it. */ | 324 | /* We don't have a linux mapping, so have rtas mask it. */ |
301 | xics_mask_unknown_vec(vec); | 325 | xics_mask_unknown_vec(vec); |
@@ -307,7 +331,8 @@ static unsigned int xics_get_irq_direct(void) | |||
307 | 331 | ||
308 | static unsigned int xics_get_irq_lpar(void) | 332 | static unsigned int xics_get_irq_lpar(void) |
309 | { | 333 | { |
310 | unsigned int xirr = lpar_xirr_info_get(); | 334 | struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); |
335 | unsigned int xirr = lpar_xirr_info_get(os_cppr->stack[os_cppr->index]); | ||
311 | unsigned int vec = xics_xirr_vector(xirr); | 336 | unsigned int vec = xics_xirr_vector(xirr); |
312 | unsigned int irq; | 337 | unsigned int irq; |
313 | 338 | ||
@@ -315,8 +340,10 @@ static unsigned int xics_get_irq_lpar(void) | |||
315 | return NO_IRQ; | 340 | return NO_IRQ; |
316 | 341 | ||
317 | irq = irq_radix_revmap_lookup(xics_host, vec); | 342 | irq = irq_radix_revmap_lookup(xics_host, vec); |
318 | if (likely(irq != NO_IRQ)) | 343 | if (likely(irq != NO_IRQ)) { |
344 | push_cppr(vec); | ||
319 | return irq; | 345 | return irq; |
346 | } | ||
320 | 347 | ||
321 | /* We don't have a linux mapping, so have RTAS mask it. */ | 348 | /* We don't have a linux mapping, so have RTAS mask it. */ |
322 | xics_mask_unknown_vec(vec); | 349 | xics_mask_unknown_vec(vec); |
@@ -326,12 +353,22 @@ static unsigned int xics_get_irq_lpar(void) | |||
326 | return NO_IRQ; | 353 | return NO_IRQ; |
327 | } | 354 | } |
328 | 355 | ||
356 | static unsigned char pop_cppr(void) | ||
357 | { | ||
358 | struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); | ||
359 | |||
360 | if (WARN_ON(os_cppr->index < 1)) | ||
361 | return LOWEST_PRIORITY; | ||
362 | |||
363 | return os_cppr->stack[--os_cppr->index]; | ||
364 | } | ||
365 | |||
329 | static void xics_eoi_direct(unsigned int virq) | 366 | static void xics_eoi_direct(unsigned int virq) |
330 | { | 367 | { |
331 | unsigned int irq = (unsigned int)irq_map[virq].hwirq; | 368 | unsigned int irq = (unsigned int)irq_map[virq].hwirq; |
332 | 369 | ||
333 | iosync(); | 370 | iosync(); |
334 | direct_xirr_info_set((0xff << 24) | irq); | 371 | direct_xirr_info_set((pop_cppr() << 24) | irq); |
335 | } | 372 | } |
336 | 373 | ||
337 | static void xics_eoi_lpar(unsigned int virq) | 374 | static void xics_eoi_lpar(unsigned int virq) |
@@ -339,7 +376,7 @@ static void xics_eoi_lpar(unsigned int virq) | |||
339 | unsigned int irq = (unsigned int)irq_map[virq].hwirq; | 376 | unsigned int irq = (unsigned int)irq_map[virq].hwirq; |
340 | 377 | ||
341 | iosync(); | 378 | iosync(); |
342 | lpar_xirr_info_set((0xff << 24) | irq); | 379 | lpar_xirr_info_set((pop_cppr() << 24) | irq); |
343 | } | 380 | } |
344 | 381 | ||
345 | static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) | 382 | static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) |
@@ -365,7 +402,7 @@ static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) | |||
365 | * For the moment only implement delivery to all cpus or one cpu. | 402 | * For the moment only implement delivery to all cpus or one cpu. |
366 | * Get current irq_server for the given irq | 403 | * Get current irq_server for the given irq |
367 | */ | 404 | */ |
368 | irq_server = get_irq_server(virq, 1); | 405 | irq_server = get_irq_server(virq, *cpumask, 1); |
369 | if (irq_server == -1) { | 406 | if (irq_server == -1) { |
370 | char cpulist[128]; | 407 | char cpulist[128]; |
371 | cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask); | 408 | cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask); |
@@ -388,7 +425,7 @@ static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask) | |||
388 | } | 425 | } |
389 | 426 | ||
390 | static struct irq_chip xics_pic_direct = { | 427 | static struct irq_chip xics_pic_direct = { |
391 | .typename = " XICS ", | 428 | .name = "XICS", |
392 | .startup = xics_startup, | 429 | .startup = xics_startup, |
393 | .mask = xics_mask_irq, | 430 | .mask = xics_mask_irq, |
394 | .unmask = xics_unmask_irq, | 431 | .unmask = xics_unmask_irq, |
@@ -397,7 +434,7 @@ static struct irq_chip xics_pic_direct = { | |||
397 | }; | 434 | }; |
398 | 435 | ||
399 | static struct irq_chip xics_pic_lpar = { | 436 | static struct irq_chip xics_pic_lpar = { |
400 | .typename = " XICS ", | 437 | .name = "XICS", |
401 | .startup = xics_startup, | 438 | .startup = xics_startup, |
402 | .mask = xics_mask_irq, | 439 | .mask = xics_mask_irq, |
403 | .unmask = xics_unmask_irq, | 440 | .unmask = xics_unmask_irq, |
@@ -428,13 +465,13 @@ static int xics_host_map(struct irq_host *h, unsigned int virq, | |||
428 | /* Insert the interrupt mapping into the radix tree for fast lookup */ | 465 | /* Insert the interrupt mapping into the radix tree for fast lookup */ |
429 | irq_radix_revmap_insert(xics_host, virq, hw); | 466 | irq_radix_revmap_insert(xics_host, virq, hw); |
430 | 467 | ||
431 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 468 | irq_to_desc(virq)->status |= IRQ_LEVEL; |
432 | set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq); | 469 | set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq); |
433 | return 0; | 470 | return 0; |
434 | } | 471 | } |
435 | 472 | ||
436 | static int xics_host_xlate(struct irq_host *h, struct device_node *ct, | 473 | static int xics_host_xlate(struct irq_host *h, struct device_node *ct, |
437 | u32 *intspec, unsigned int intsize, | 474 | const u32 *intspec, unsigned int intsize, |
438 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | 475 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
439 | 476 | ||
440 | { | 477 | { |
@@ -474,15 +511,13 @@ static void __init xics_init_host(void) | |||
474 | /* | 511 | /* |
475 | * XICS only has a single IPI, so encode the messages per CPU | 512 | * XICS only has a single IPI, so encode the messages per CPU |
476 | */ | 513 | */ |
477 | struct xics_ipi_struct { | 514 | static DEFINE_PER_CPU_SHARED_ALIGNED(unsigned long, xics_ipi_message); |
478 | unsigned long value; | ||
479 | } ____cacheline_aligned; | ||
480 | |||
481 | static struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned; | ||
482 | 515 | ||
483 | static inline void smp_xics_do_message(int cpu, int msg) | 516 | static inline void smp_xics_do_message(int cpu, int msg) |
484 | { | 517 | { |
485 | set_bit(msg, &xics_ipi_message[cpu].value); | 518 | unsigned long *tgt = &per_cpu(xics_ipi_message, cpu); |
519 | |||
520 | set_bit(msg, tgt); | ||
486 | mb(); | 521 | mb(); |
487 | if (firmware_has_feature(FW_FEATURE_LPAR)) | 522 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
488 | lpar_qirr_info(cpu, IPI_PRIORITY); | 523 | lpar_qirr_info(cpu, IPI_PRIORITY); |
@@ -508,25 +543,23 @@ void smp_xics_message_pass(int target, int msg) | |||
508 | 543 | ||
509 | static irqreturn_t xics_ipi_dispatch(int cpu) | 544 | static irqreturn_t xics_ipi_dispatch(int cpu) |
510 | { | 545 | { |
546 | unsigned long *tgt = &per_cpu(xics_ipi_message, cpu); | ||
547 | |||
511 | WARN_ON(cpu_is_offline(cpu)); | 548 | WARN_ON(cpu_is_offline(cpu)); |
512 | 549 | ||
513 | mb(); /* order mmio clearing qirr */ | 550 | mb(); /* order mmio clearing qirr */ |
514 | while (xics_ipi_message[cpu].value) { | 551 | while (*tgt) { |
515 | if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION, | 552 | if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION, tgt)) { |
516 | &xics_ipi_message[cpu].value)) { | ||
517 | smp_message_recv(PPC_MSG_CALL_FUNCTION); | 553 | smp_message_recv(PPC_MSG_CALL_FUNCTION); |
518 | } | 554 | } |
519 | if (test_and_clear_bit(PPC_MSG_RESCHEDULE, | 555 | if (test_and_clear_bit(PPC_MSG_RESCHEDULE, tgt)) { |
520 | &xics_ipi_message[cpu].value)) { | ||
521 | smp_message_recv(PPC_MSG_RESCHEDULE); | 556 | smp_message_recv(PPC_MSG_RESCHEDULE); |
522 | } | 557 | } |
523 | if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE, | 558 | if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE, tgt)) { |
524 | &xics_ipi_message[cpu].value)) { | ||
525 | smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE); | 559 | smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE); |
526 | } | 560 | } |
527 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) | 561 | #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) |
528 | if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK, | 562 | if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK, tgt)) { |
529 | &xics_ipi_message[cpu].value)) { | ||
530 | smp_message_recv(PPC_MSG_DEBUGGER_BREAK); | 563 | smp_message_recv(PPC_MSG_DEBUGGER_BREAK); |
531 | } | 564 | } |
532 | #endif | 565 | #endif |
@@ -746,6 +779,16 @@ void __init xics_init_IRQ(void) | |||
746 | 779 | ||
747 | static void xics_set_cpu_priority(unsigned char cppr) | 780 | static void xics_set_cpu_priority(unsigned char cppr) |
748 | { | 781 | { |
782 | struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); | ||
783 | |||
784 | /* | ||
785 | * we only really want to set the priority when there's | ||
786 | * just one cppr value on the stack | ||
787 | */ | ||
788 | WARN_ON(os_cppr->index != 0); | ||
789 | |||
790 | os_cppr->stack[0] = cppr; | ||
791 | |||
749 | if (firmware_has_feature(FW_FEATURE_LPAR)) | 792 | if (firmware_has_feature(FW_FEATURE_LPAR)) |
750 | lpar_cppr_info(cppr); | 793 | lpar_cppr_info(cppr); |
751 | else | 794 | else |
@@ -772,15 +815,21 @@ static void xics_set_cpu_giq(unsigned int gserver, unsigned int join) | |||
772 | 815 | ||
773 | void xics_setup_cpu(void) | 816 | void xics_setup_cpu(void) |
774 | { | 817 | { |
775 | xics_set_cpu_priority(0xff); | 818 | xics_set_cpu_priority(LOWEST_PRIORITY); |
776 | 819 | ||
777 | xics_set_cpu_giq(default_distrib_server, 1); | 820 | xics_set_cpu_giq(default_distrib_server, 1); |
778 | } | 821 | } |
779 | 822 | ||
780 | void xics_teardown_cpu(void) | 823 | void xics_teardown_cpu(void) |
781 | { | 824 | { |
825 | struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr); | ||
782 | int cpu = smp_processor_id(); | 826 | int cpu = smp_processor_id(); |
783 | 827 | ||
828 | /* | ||
829 | * we have to reset the cppr index to 0 because we're | ||
830 | * not going to return from the IPI | ||
831 | */ | ||
832 | os_cppr->index = 0; | ||
784 | xics_set_cpu_priority(0); | 833 | xics_set_cpu_priority(0); |
785 | 834 | ||
786 | /* Clear any pending IPI request */ | 835 | /* Clear any pending IPI request */ |
@@ -852,7 +901,7 @@ void xics_migrate_irqs_away(void) | |||
852 | /* We need to get IPIs still. */ | 901 | /* We need to get IPIs still. */ |
853 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) | 902 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) |
854 | continue; | 903 | continue; |
855 | desc = get_irq_desc(virq); | 904 | desc = irq_to_desc(virq); |
856 | 905 | ||
857 | /* We only need to migrate enabled IRQS */ | 906 | /* We only need to migrate enabled IRQS */ |
858 | if (desc == NULL || desc->chip == NULL | 907 | if (desc == NULL || desc->chip == NULL |
@@ -860,7 +909,7 @@ void xics_migrate_irqs_away(void) | |||
860 | || desc->chip->set_affinity == NULL) | 909 | || desc->chip->set_affinity == NULL) |
861 | continue; | 910 | continue; |
862 | 911 | ||
863 | spin_lock_irqsave(&desc->lock, flags); | 912 | raw_spin_lock_irqsave(&desc->lock, flags); |
864 | 913 | ||
865 | status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); | 914 | status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq); |
866 | if (status) { | 915 | if (status) { |
@@ -881,10 +930,10 @@ void xics_migrate_irqs_away(void) | |||
881 | virq, cpu); | 930 | virq, cpu); |
882 | 931 | ||
883 | /* Reset affinity to all cpus */ | 932 | /* Reset affinity to all cpus */ |
884 | cpumask_setall(irq_desc[virq].affinity); | 933 | cpumask_setall(irq_to_desc(virq)->affinity); |
885 | desc->chip->set_affinity(virq, cpu_all_mask); | 934 | desc->chip->set_affinity(virq, cpu_all_mask); |
886 | unlock: | 935 | unlock: |
887 | spin_unlock_irqrestore(&desc->lock, flags); | 936 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
888 | } | 937 | } |
889 | } | 938 | } |
890 | #endif | 939 | #endif |