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-rw-r--r--arch/powerpc/platforms/cell/Kconfig9
-rw-r--r--arch/powerpc/platforms/cell/Makefile23
-rw-r--r--arch/powerpc/platforms/cell/cbe_regs.c128
-rw-r--r--arch/powerpc/platforms/cell/cbe_regs.h129
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c40
-rw-r--r--arch/powerpc/platforms/cell/iommu.c18
-rw-r--r--arch/powerpc/platforms/cell/pervasive.c104
-rw-r--r--arch/powerpc/platforms/cell/pervasive.h37
-rw-r--r--arch/powerpc/platforms/cell/ras.c112
-rw-r--r--arch/powerpc/platforms/cell/ras.h9
-rw-r--r--arch/powerpc/platforms/cell/setup.c14
-rw-r--r--arch/powerpc/platforms/cell/spu_base.c179
-rw-r--r--arch/powerpc/platforms/cell/spu_callbacks.c314
-rw-r--r--arch/powerpc/platforms/cell/spu_priv1.c133
-rw-r--r--arch/powerpc/platforms/cell/spu_priv1_mmio.c159
-rw-r--r--arch/powerpc/platforms/cell/spufs/Makefile14
-rw-r--r--arch/powerpc/platforms/cell/spufs/context.c12
-rw-r--r--arch/powerpc/platforms/cell/spufs/file.c67
-rw-r--r--arch/powerpc/platforms/cell/spufs/hw_ops.c1
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c30
-rw-r--r--arch/powerpc/platforms/cell/spufs/sched.c3
-rw-r--r--arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped1122
-rw-r--r--arch/powerpc/platforms/cell/spufs/spu_save_dump.h_shipped922
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c48
24 files changed, 2486 insertions, 1141 deletions
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig
index 6a02d51086c8..352bbbacde9a 100644
--- a/arch/powerpc/platforms/cell/Kconfig
+++ b/arch/powerpc/platforms/cell/Kconfig
@@ -5,15 +5,24 @@ config SPU_FS
5 tristate "SPU file system" 5 tristate "SPU file system"
6 default m 6 default m
7 depends on PPC_CELL 7 depends on PPC_CELL
8 select SPU_BASE
8 help 9 help
9 The SPU file system is used to access Synergistic Processing 10 The SPU file system is used to access Synergistic Processing
10 Units on machines implementing the Broadband Processor 11 Units on machines implementing the Broadband Processor
11 Architecture. 12 Architecture.
12 13
14config SPU_BASE
15 bool
16 default n
17
13config SPUFS_MMAP 18config SPUFS_MMAP
14 bool 19 bool
15 depends on SPU_FS && SPARSEMEM 20 depends on SPU_FS && SPARSEMEM
16 select MEMORY_HOTPLUG 21 select MEMORY_HOTPLUG
17 default y 22 default y
18 23
24config CBE_RAS
25 bool "RAS features for bare metal Cell BE"
26 default y
27
19endmenu 28endmenu
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index e570bad06394..c89cdd67383b 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -1,16 +1,15 @@
1obj-y += interrupt.o iommu.o setup.o spider-pic.o 1obj-$(CONFIG_PPC_CELL_NATIVE) += interrupt.o iommu.o setup.o \
2obj-y += pervasive.o 2 cbe_regs.o spider-pic.o pervasive.o
3obj-$(CONFIG_CBE_RAS) += ras.o
3 4
4obj-$(CONFIG_SMP) += smp.o 5ifeq ($(CONFIG_SMP),y)
5obj-$(CONFIG_SPU_FS) += spu-base.o spufs/ 6obj-$(CONFIG_PPC_CELL_NATIVE) += smp.o
6 7endif
7spu-base-y += spu_base.o spu_priv1.o
8 8
9# needed only when building loadable spufs.ko 9# needed only when building loadable spufs.ko
10spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o 10spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o
11obj-y += $(spufs-modular-m) 11spu-priv1-$(CONFIG_PPC_CELL_NATIVE) += spu_priv1_mmio.o
12
13# always needed in kernel
14spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o
15obj-y += $(spufs-builtin-y) $(spufs-builtin-m)
16 12
13obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \
14 $(spufs-modular-m) \
15 $(spu-priv1-y) spufs/
diff --git a/arch/powerpc/platforms/cell/cbe_regs.c b/arch/powerpc/platforms/cell/cbe_regs.c
new file mode 100644
index 000000000000..2dfde61c8412
--- /dev/null
+++ b/arch/powerpc/platforms/cell/cbe_regs.c
@@ -0,0 +1,128 @@
1/*
2 * cbe_regs.c
3 *
4 * Accessor routines for the various MMIO register blocks of the CBE
5 *
6 * (c) 2006 Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp.
7 */
8
9
10#include <linux/config.h>
11#include <linux/percpu.h>
12#include <linux/types.h>
13
14#include <asm/io.h>
15#include <asm/pgtable.h>
16#include <asm/prom.h>
17#include <asm/ptrace.h>
18
19#include "cbe_regs.h"
20
21#define MAX_CBE 2
22
23/*
24 * Current implementation uses "cpu" nodes. We build our own mapping
25 * array of cpu numbers to cpu nodes locally for now to allow interrupt
26 * time code to have a fast path rather than call of_get_cpu_node(). If
27 * we implement cpu hotplug, we'll have to install an appropriate norifier
28 * in order to release references to the cpu going away
29 */
30static struct cbe_regs_map
31{
32 struct device_node *cpu_node;
33 struct cbe_pmd_regs __iomem *pmd_regs;
34 struct cbe_iic_regs __iomem *iic_regs;
35} cbe_regs_maps[MAX_CBE];
36static int cbe_regs_map_count;
37
38static struct cbe_thread_map
39{
40 struct device_node *cpu_node;
41 struct cbe_regs_map *regs;
42} cbe_thread_map[NR_CPUS];
43
44static struct cbe_regs_map *cbe_find_map(struct device_node *np)
45{
46 int i;
47
48 for (i = 0; i < cbe_regs_map_count; i++)
49 if (cbe_regs_maps[i].cpu_node == np)
50 return &cbe_regs_maps[i];
51 return NULL;
52}
53
54struct cbe_pmd_regs __iomem *cbe_get_pmd_regs(struct device_node *np)
55{
56 struct cbe_regs_map *map = cbe_find_map(np);
57 if (map == NULL)
58 return NULL;
59 return map->pmd_regs;
60}
61
62struct cbe_pmd_regs __iomem *cbe_get_cpu_pmd_regs(int cpu)
63{
64 struct cbe_regs_map *map = cbe_thread_map[cpu].regs;
65 if (map == NULL)
66 return NULL;
67 return map->pmd_regs;
68}
69
70
71struct cbe_iic_regs __iomem *cbe_get_iic_regs(struct device_node *np)
72{
73 struct cbe_regs_map *map = cbe_find_map(np);
74 if (map == NULL)
75 return NULL;
76 return map->iic_regs;
77}
78struct cbe_iic_regs __iomem *cbe_get_cpu_iic_regs(int cpu)
79{
80 struct cbe_regs_map *map = cbe_thread_map[cpu].regs;
81 if (map == NULL)
82 return NULL;
83 return map->iic_regs;
84}
85
86void __init cbe_regs_init(void)
87{
88 int i;
89 struct device_node *cpu;
90
91 /* Build local fast map of CPUs */
92 for_each_cpu(i)
93 cbe_thread_map[i].cpu_node = of_get_cpu_node(i, NULL);
94
95 /* Find maps for each device tree CPU */
96 for_each_node_by_type(cpu, "cpu") {
97 struct cbe_regs_map *map = &cbe_regs_maps[cbe_regs_map_count++];
98
99 /* That hack must die die die ! */
100 struct address_prop {
101 unsigned long address;
102 unsigned int len;
103 } __attribute__((packed)) *prop;
104
105
106 if (cbe_regs_map_count > MAX_CBE) {
107 printk(KERN_ERR "cbe_regs: More BE chips than supported"
108 "!\n");
109 cbe_regs_map_count--;
110 return;
111 }
112 map->cpu_node = cpu;
113 for_each_cpu(i)
114 if (cbe_thread_map[i].cpu_node == cpu)
115 cbe_thread_map[i].regs = map;
116
117 prop = (struct address_prop *)get_property(cpu, "pervasive",
118 NULL);
119 if (prop != NULL)
120 map->pmd_regs = ioremap(prop->address, prop->len);
121
122 prop = (struct address_prop *)get_property(cpu, "iic",
123 NULL);
124 if (prop != NULL)
125 map->iic_regs = ioremap(prop->address, prop->len);
126 }
127}
128
diff --git a/arch/powerpc/platforms/cell/cbe_regs.h b/arch/powerpc/platforms/cell/cbe_regs.h
new file mode 100644
index 000000000000..e76e4a6af5bc
--- /dev/null
+++ b/arch/powerpc/platforms/cell/cbe_regs.h
@@ -0,0 +1,129 @@
1/*
2 * cbe_regs.h
3 *
4 * This file is intended to hold the various register definitions for CBE
5 * on-chip system devices (memory controller, IO controller, etc...)
6 *
7 * (c) 2006 Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp.
8 */
9
10#ifndef CBE_REGS_H
11#define CBE_REGS_H
12
13/*
14 *
15 * Some HID register definitions
16 *
17 */
18
19/* CBE specific HID0 bits */
20#define HID0_CBE_THERM_WAKEUP 0x0000020000000000ul
21#define HID0_CBE_SYSERR_WAKEUP 0x0000008000000000ul
22#define HID0_CBE_THERM_INT_EN 0x0000000400000000ul
23#define HID0_CBE_SYSERR_INT_EN 0x0000000200000000ul
24
25
26/*
27 *
28 * Pervasive unit register definitions
29 *
30 */
31
32struct cbe_pmd_regs {
33 u8 pad_0x0000_0x0800[0x0800 - 0x0000]; /* 0x0000 */
34
35 /* Thermal Sensor Registers */
36 u64 ts_ctsr1; /* 0x0800 */
37 u64 ts_ctsr2; /* 0x0808 */
38 u64 ts_mtsr1; /* 0x0810 */
39 u64 ts_mtsr2; /* 0x0818 */
40 u64 ts_itr1; /* 0x0820 */
41 u64 ts_itr2; /* 0x0828 */
42 u64 ts_gitr; /* 0x0830 */
43 u64 ts_isr; /* 0x0838 */
44 u64 ts_imr; /* 0x0840 */
45 u64 tm_cr1; /* 0x0848 */
46 u64 tm_cr2; /* 0x0850 */
47 u64 tm_simr; /* 0x0858 */
48 u64 tm_tpr; /* 0x0860 */
49 u64 tm_str1; /* 0x0868 */
50 u64 tm_str2; /* 0x0870 */
51 u64 tm_tsr; /* 0x0878 */
52
53 /* Power Management */
54 u64 pm_control; /* 0x0880 */
55#define CBE_PMD_PAUSE_ZERO_CONTROL 0x10000
56 u64 pm_status; /* 0x0888 */
57
58 /* Time Base Register */
59 u64 tbr; /* 0x0890 */
60
61 u8 pad_0x0898_0x0c00 [0x0c00 - 0x0898]; /* 0x0898 */
62
63 /* Fault Isolation Registers */
64 u64 checkstop_fir; /* 0x0c00 */
65 u64 recoverable_fir;
66 u64 spec_att_mchk_fir;
67 u64 fir_mode_reg;
68 u64 fir_enable_mask;
69
70 u8 pad_0x0c28_0x1000 [0x1000 - 0x0c28]; /* 0x0c28 */
71};
72
73extern struct cbe_pmd_regs __iomem *cbe_get_pmd_regs(struct device_node *np);
74extern struct cbe_pmd_regs __iomem *cbe_get_cpu_pmd_regs(int cpu);
75
76/*
77 *
78 * IIC unit register definitions
79 *
80 */
81
82struct cbe_iic_pending_bits {
83 u32 data;
84 u8 flags;
85 u8 class;
86 u8 source;
87 u8 prio;
88};
89
90#define CBE_IIC_IRQ_VALID 0x80
91#define CBE_IIC_IRQ_IPI 0x40
92
93struct cbe_iic_thread_regs {
94 struct cbe_iic_pending_bits pending;
95 struct cbe_iic_pending_bits pending_destr;
96 u64 generate;
97 u64 prio;
98};
99
100struct cbe_iic_regs {
101 u8 pad_0x0000_0x0400[0x0400 - 0x0000]; /* 0x0000 */
102
103 /* IIC interrupt registers */
104 struct cbe_iic_thread_regs thread[2]; /* 0x0400 */
105 u64 iic_ir; /* 0x0440 */
106 u64 iic_is; /* 0x0448 */
107
108 u8 pad_0x0450_0x0500[0x0500 - 0x0450]; /* 0x0450 */
109
110 /* IOC FIR */
111 u64 ioc_fir_reset; /* 0x0500 */
112 u64 ioc_fir_set;
113 u64 ioc_checkstop_enable;
114 u64 ioc_fir_error_mask;
115 u64 ioc_syserr_enable;
116 u64 ioc_fir;
117
118 u8 pad_0x0530_0x1000[0x1000 - 0x0530]; /* 0x0530 */
119};
120
121extern struct cbe_iic_regs __iomem *cbe_get_iic_regs(struct device_node *np);
122extern struct cbe_iic_regs __iomem *cbe_get_cpu_iic_regs(int cpu);
123
124
125/* Init this module early */
126extern void cbe_regs_init(void);
127
128
129#endif /* CBE_REGS_H */
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 978be1c30c1b..f4e2d8805c9e 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -33,29 +33,10 @@
33#include <asm/ptrace.h> 33#include <asm/ptrace.h>
34 34
35#include "interrupt.h" 35#include "interrupt.h"
36 36#include "cbe_regs.h"
37struct iic_pending_bits {
38 u32 data;
39 u8 flags;
40 u8 class;
41 u8 source;
42 u8 prio;
43};
44
45enum iic_pending_flags {
46 IIC_VALID = 0x80,
47 IIC_IPI = 0x40,
48};
49
50struct iic_regs {
51 struct iic_pending_bits pending;
52 struct iic_pending_bits pending_destr;
53 u64 generate;
54 u64 prio;
55};
56 37
57struct iic { 38struct iic {
58 struct iic_regs __iomem *regs; 39 struct cbe_iic_thread_regs __iomem *regs;
59 u8 target_id; 40 u8 target_id;
60}; 41};
61 42
@@ -115,7 +96,7 @@ static struct hw_interrupt_type iic_pic = {
115 .end = iic_end, 96 .end = iic_end,
116}; 97};
117 98
118static int iic_external_get_irq(struct iic_pending_bits pending) 99static int iic_external_get_irq(struct cbe_iic_pending_bits pending)
119{ 100{
120 int irq; 101 int irq;
121 unsigned char node, unit; 102 unsigned char node, unit;
@@ -136,8 +117,7 @@ static int iic_external_get_irq(struct iic_pending_bits pending)
136 * One of these units can be connected 117 * One of these units can be connected
137 * to an external interrupt controller. 118 * to an external interrupt controller.
138 */ 119 */
139 if (pending.prio > 0x3f || 120 if (pending.class != 2)
140 pending.class != 2)
141 break; 121 break;
142 irq = IIC_EXT_OFFSET 122 irq = IIC_EXT_OFFSET
143 + spider_get_irq(node) 123 + spider_get_irq(node)
@@ -168,15 +148,15 @@ int iic_get_irq(struct pt_regs *regs)
168{ 148{
169 struct iic *iic; 149 struct iic *iic;
170 int irq; 150 int irq;
171 struct iic_pending_bits pending; 151 struct cbe_iic_pending_bits pending;
172 152
173 iic = &__get_cpu_var(iic); 153 iic = &__get_cpu_var(iic);
174 *(unsigned long *) &pending = 154 *(unsigned long *) &pending =
175 in_be64((unsigned long __iomem *) &iic->regs->pending_destr); 155 in_be64((unsigned long __iomem *) &iic->regs->pending_destr);
176 156
177 irq = -1; 157 irq = -1;
178 if (pending.flags & IIC_VALID) { 158 if (pending.flags & CBE_IIC_IRQ_VALID) {
179 if (pending.flags & IIC_IPI) { 159 if (pending.flags & CBE_IIC_IRQ_IPI) {
180 irq = IIC_IPI_OFFSET + (pending.prio >> 4); 160 irq = IIC_IPI_OFFSET + (pending.prio >> 4);
181/* 161/*
182 if (irq > 0x80) 162 if (irq > 0x80)
@@ -226,7 +206,7 @@ static int setup_iic_hardcoded(void)
226 regs += 0x20; 206 regs += 0x20;
227 207
228 printk(KERN_INFO "IIC for CPU %d at %lx\n", cpu, regs); 208 printk(KERN_INFO "IIC for CPU %d at %lx\n", cpu, regs);
229 iic->regs = ioremap(regs, sizeof(struct iic_regs)); 209 iic->regs = ioremap(regs, sizeof(struct cbe_iic_thread_regs));
230 iic->target_id = (nodeid << 4) + ((cpu & 1) ? 0xf : 0xe); 210 iic->target_id = (nodeid << 4) + ((cpu & 1) ? 0xf : 0xe);
231 } 211 }
232 212
@@ -267,12 +247,12 @@ static int setup_iic(void)
267 } 247 }
268 248
269 iic = &per_cpu(iic, np[0]); 249 iic = &per_cpu(iic, np[0]);
270 iic->regs = ioremap(regs[0], sizeof(struct iic_regs)); 250 iic->regs = ioremap(regs[0], sizeof(struct cbe_iic_thread_regs));
271 iic->target_id = ((np[0] & 2) << 3) + ((np[0] & 1) ? 0xf : 0xe); 251 iic->target_id = ((np[0] & 2) << 3) + ((np[0] & 1) ? 0xf : 0xe);
272 printk("IIC for CPU %d at %lx mapped to %p\n", np[0], regs[0], iic->regs); 252 printk("IIC for CPU %d at %lx mapped to %p\n", np[0], regs[0], iic->regs);
273 253
274 iic = &per_cpu(iic, np[1]); 254 iic = &per_cpu(iic, np[1]);
275 iic->regs = ioremap(regs[2], sizeof(struct iic_regs)); 255 iic->regs = ioremap(regs[2], sizeof(struct cbe_iic_thread_regs));
276 iic->target_id = ((np[1] & 2) << 3) + ((np[1] & 1) ? 0xf : 0xe); 256 iic->target_id = ((np[1] & 2) << 3) + ((np[1] & 1) ? 0xf : 0xe);
277 printk("IIC for CPU %d at %lx mapped to %p\n", np[1], regs[2], iic->regs); 257 printk("IIC for CPU %d at %lx mapped to %p\n", np[1], regs[2], iic->regs);
278 258
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index a49ceb799a8e..a35004e14c69 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -473,6 +473,16 @@ static int cell_dma_supported(struct device *dev, u64 mask)
473 return mask < 0x100000000ull; 473 return mask < 0x100000000ull;
474} 474}
475 475
476static struct dma_mapping_ops cell_iommu_ops = {
477 .alloc_coherent = cell_alloc_coherent,
478 .free_coherent = cell_free_coherent,
479 .map_single = cell_map_single,
480 .unmap_single = cell_unmap_single,
481 .map_sg = cell_map_sg,
482 .unmap_sg = cell_unmap_sg,
483 .dma_supported = cell_dma_supported,
484};
485
476void cell_init_iommu(void) 486void cell_init_iommu(void)
477{ 487{
478 int setup_bus = 0; 488 int setup_bus = 0;
@@ -498,11 +508,5 @@ void cell_init_iommu(void)
498 } 508 }
499 } 509 }
500 510
501 pci_dma_ops.alloc_coherent = cell_alloc_coherent; 511 pci_dma_ops = cell_iommu_ops;
502 pci_dma_ops.free_coherent = cell_free_coherent;
503 pci_dma_ops.map_single = cell_map_single;
504 pci_dma_ops.unmap_single = cell_unmap_single;
505 pci_dma_ops.map_sg = cell_map_sg;
506 pci_dma_ops.unmap_sg = cell_unmap_sg;
507 pci_dma_ops.dma_supported = cell_dma_supported;
508} 512}
diff --git a/arch/powerpc/platforms/cell/pervasive.c b/arch/powerpc/platforms/cell/pervasive.c
index 7eed8c624517..695ac4e1617e 100644
--- a/arch/powerpc/platforms/cell/pervasive.c
+++ b/arch/powerpc/platforms/cell/pervasive.c
@@ -37,36 +37,28 @@
37#include <asm/reg.h> 37#include <asm/reg.h>
38 38
39#include "pervasive.h" 39#include "pervasive.h"
40#include "cbe_regs.h"
40 41
41static DEFINE_SPINLOCK(cbe_pervasive_lock); 42static DEFINE_SPINLOCK(cbe_pervasive_lock);
42struct cbe_pervasive {
43 struct pmd_regs __iomem *regs;
44 unsigned int thread;
45};
46
47/* can't use per_cpu from setup_arch */
48static struct cbe_pervasive cbe_pervasive[NR_CPUS];
49 43
50static void __init cbe_enable_pause_zero(void) 44static void __init cbe_enable_pause_zero(void)
51{ 45{
52 unsigned long thread_switch_control; 46 unsigned long thread_switch_control;
53 unsigned long temp_register; 47 unsigned long temp_register;
54 struct cbe_pervasive *p; 48 struct cbe_pmd_regs __iomem *pregs;
55 int thread;
56 49
57 spin_lock_irq(&cbe_pervasive_lock); 50 spin_lock_irq(&cbe_pervasive_lock);
58 p = &cbe_pervasive[smp_processor_id()]; 51 pregs = cbe_get_cpu_pmd_regs(smp_processor_id());
59 52 if (pregs == NULL)
60 if (!cbe_pervasive->regs)
61 goto out; 53 goto out;
62 54
63 pr_debug("Power Management: CPU %d\n", smp_processor_id()); 55 pr_debug("Power Management: CPU %d\n", smp_processor_id());
64 56
65 /* Enable Pause(0) control bit */ 57 /* Enable Pause(0) control bit */
66 temp_register = in_be64(&p->regs->pm_control); 58 temp_register = in_be64(&pregs->pm_control);
67 59
68 out_be64(&p->regs->pm_control, 60 out_be64(&pregs->pm_control,
69 temp_register|PMD_PAUSE_ZERO_CONTROL); 61 temp_register | CBE_PMD_PAUSE_ZERO_CONTROL);
70 62
71 /* Enable DEC and EE interrupt request */ 63 /* Enable DEC and EE interrupt request */
72 thread_switch_control = mfspr(SPRN_TSC_CELL); 64 thread_switch_control = mfspr(SPRN_TSC_CELL);
@@ -75,25 +67,16 @@ static void __init cbe_enable_pause_zero(void)
75 switch ((mfspr(SPRN_CTRLF) & CTRL_CT)) { 67 switch ((mfspr(SPRN_CTRLF) & CTRL_CT)) {
76 case CTRL_CT0: 68 case CTRL_CT0:
77 thread_switch_control |= TSC_CELL_DEC_ENABLE_0; 69 thread_switch_control |= TSC_CELL_DEC_ENABLE_0;
78 thread = 0;
79 break; 70 break;
80 case CTRL_CT1: 71 case CTRL_CT1:
81 thread_switch_control |= TSC_CELL_DEC_ENABLE_1; 72 thread_switch_control |= TSC_CELL_DEC_ENABLE_1;
82 thread = 1;
83 break; 73 break;
84 default: 74 default:
85 printk(KERN_WARNING "%s: unknown configuration\n", 75 printk(KERN_WARNING "%s: unknown configuration\n",
86 __FUNCTION__); 76 __FUNCTION__);
87 thread = -1;
88 break; 77 break;
89 } 78 }
90 79
91 if (p->thread != thread)
92 printk(KERN_WARNING "%s: device tree inconsistant, "
93 "cpu %i: %d/%d\n", __FUNCTION__,
94 smp_processor_id(),
95 p->thread, thread);
96
97 mtspr(SPRN_TSC_CELL, thread_switch_control); 80 mtspr(SPRN_TSC_CELL, thread_switch_control);
98 81
99out: 82out:
@@ -104,6 +87,11 @@ static void cbe_idle(void)
104{ 87{
105 unsigned long ctrl; 88 unsigned long ctrl;
106 89
90 /* Why do we do that on every idle ? Couldn't that be done once for
91 * all or do we lose the state some way ? Also, the pm_control
92 * register setting, that can't be set once at boot ? We really want
93 * to move that away in order to implement a simple powersave
94 */
107 cbe_enable_pause_zero(); 95 cbe_enable_pause_zero();
108 96
109 while (1) { 97 while (1) {
@@ -152,8 +140,15 @@ static int cbe_system_reset_exception(struct pt_regs *regs)
152 timer_interrupt(regs); 140 timer_interrupt(regs);
153 break; 141 break;
154 case SRR1_WAKEMT: 142 case SRR1_WAKEMT:
155 /* no action required */
156 break; 143 break;
144#ifdef CONFIG_CBE_RAS
145 case SRR1_WAKESYSERR:
146 cbe_system_error_exception(regs);
147 break;
148 case SRR1_WAKETHERM:
149 cbe_thermal_exception(regs);
150 break;
151#endif /* CONFIG_CBE_RAS */
157 default: 152 default:
158 /* do system reset */ 153 /* do system reset */
159 return 0; 154 return 0;
@@ -162,68 +157,11 @@ static int cbe_system_reset_exception(struct pt_regs *regs)
162 return 1; 157 return 1;
163} 158}
164 159
165static int __init cbe_find_pmd_mmio(int cpu, struct cbe_pervasive *p) 160void __init cbe_pervasive_init(void)
166{
167 struct device_node *node;
168 unsigned int *int_servers;
169 char *addr;
170 unsigned long real_address;
171 unsigned int size;
172
173 struct pmd_regs __iomem *pmd_mmio_area;
174 int hardid, thread;
175 int proplen;
176
177 pmd_mmio_area = NULL;
178 hardid = get_hard_smp_processor_id(cpu);
179 for (node = NULL; (node = of_find_node_by_type(node, "cpu"));) {
180 int_servers = (void *) get_property(node,
181 "ibm,ppc-interrupt-server#s", &proplen);
182 if (!int_servers) {
183 printk(KERN_WARNING "%s misses "
184 "ibm,ppc-interrupt-server#s property",
185 node->full_name);
186 continue;
187 }
188 for (thread = 0; thread < proplen / sizeof (int); thread++) {
189 if (hardid == int_servers[thread]) {
190 addr = get_property(node, "pervasive", NULL);
191 goto found;
192 }
193 }
194 }
195
196 printk(KERN_WARNING "%s: CPU %d not found\n", __FUNCTION__, cpu);
197 return -EINVAL;
198
199found:
200 real_address = *(unsigned long*) addr;
201 addr += sizeof (unsigned long);
202 size = *(unsigned int*) addr;
203
204 pr_debug("pervasive area for CPU %d at %lx, size %x\n",
205 cpu, real_address, size);
206 p->regs = ioremap(real_address, size);
207 p->thread = thread;
208 return 0;
209}
210
211void __init cell_pervasive_init(void)
212{ 161{
213 struct cbe_pervasive *p;
214 int cpu;
215 int ret;
216
217 if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO)) 162 if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO))
218 return; 163 return;
219 164
220 for_each_possible_cpu(cpu) {
221 p = &cbe_pervasive[cpu];
222 ret = cbe_find_pmd_mmio(cpu, p);
223 if (ret)
224 return;
225 }
226
227 ppc_md.idle_loop = cbe_idle; 165 ppc_md.idle_loop = cbe_idle;
228 ppc_md.system_reset_exception = cbe_system_reset_exception; 166 ppc_md.system_reset_exception = cbe_system_reset_exception;
229} 167}
diff --git a/arch/powerpc/platforms/cell/pervasive.h b/arch/powerpc/platforms/cell/pervasive.h
index da1fb85ca3e8..7b50947f8044 100644
--- a/arch/powerpc/platforms/cell/pervasive.h
+++ b/arch/powerpc/platforms/cell/pervasive.h
@@ -25,38 +25,9 @@
25#ifndef PERVASIVE_H 25#ifndef PERVASIVE_H
26#define PERVASIVE_H 26#define PERVASIVE_H
27 27
28struct pmd_regs { 28extern void cbe_pervasive_init(void);
29 u8 pad_0x0000_0x0800[0x0800 - 0x0000]; /* 0x0000 */ 29extern void cbe_system_error_exception(struct pt_regs *regs);
30 30extern void cbe_maintenance_exception(struct pt_regs *regs);
31 /* Thermal Sensor Registers */ 31extern void cbe_thermal_exception(struct pt_regs *regs);
32 u64 ts_ctsr1; /* 0x0800 */
33 u64 ts_ctsr2; /* 0x0808 */
34 u64 ts_mtsr1; /* 0x0810 */
35 u64 ts_mtsr2; /* 0x0818 */
36 u64 ts_itr1; /* 0x0820 */
37 u64 ts_itr2; /* 0x0828 */
38 u64 ts_gitr; /* 0x0830 */
39 u64 ts_isr; /* 0x0838 */
40 u64 ts_imr; /* 0x0840 */
41 u64 tm_cr1; /* 0x0848 */
42 u64 tm_cr2; /* 0x0850 */
43 u64 tm_simr; /* 0x0858 */
44 u64 tm_tpr; /* 0x0860 */
45 u64 tm_str1; /* 0x0868 */
46 u64 tm_str2; /* 0x0870 */
47 u64 tm_tsr; /* 0x0878 */
48
49 /* Power Management */
50 u64 pm_control; /* 0x0880 */
51#define PMD_PAUSE_ZERO_CONTROL 0x10000
52 u64 pm_status; /* 0x0888 */
53
54 /* Time Base Register */
55 u64 tbr; /* 0x0890 */
56
57 u8 pad_0x0898_0x1000 [0x1000 - 0x0898]; /* 0x0898 */
58};
59
60void __init cell_pervasive_init(void);
61 32
62#endif 33#endif
diff --git a/arch/powerpc/platforms/cell/ras.c b/arch/powerpc/platforms/cell/ras.c
new file mode 100644
index 000000000000..033ad6e2827b
--- /dev/null
+++ b/arch/powerpc/platforms/cell/ras.c
@@ -0,0 +1,112 @@
1#define DEBUG
2
3#include <linux/config.h>
4#include <linux/types.h>
5#include <linux/kernel.h>
6#include <linux/smp.h>
7
8#include <asm/reg.h>
9#include <asm/io.h>
10#include <asm/prom.h>
11#include <asm/machdep.h>
12
13#include "ras.h"
14#include "cbe_regs.h"
15
16
17static void dump_fir(int cpu)
18{
19 struct cbe_pmd_regs __iomem *pregs = cbe_get_cpu_pmd_regs(cpu);
20 struct cbe_iic_regs __iomem *iregs = cbe_get_cpu_iic_regs(cpu);
21
22 if (pregs == NULL)
23 return;
24
25 /* Todo: do some nicer parsing of bits and based on them go down
26 * to other sub-units FIRs and not only IIC
27 */
28 printk(KERN_ERR "Global Checkstop FIR : 0x%016lx\n",
29 in_be64(&pregs->checkstop_fir));
30 printk(KERN_ERR "Global Recoverable FIR : 0x%016lx\n",
31 in_be64(&pregs->checkstop_fir));
32 printk(KERN_ERR "Global MachineCheck FIR : 0x%016lx\n",
33 in_be64(&pregs->spec_att_mchk_fir));
34
35 if (iregs == NULL)
36 return;
37 printk(KERN_ERR "IOC FIR : 0x%016lx\n",
38 in_be64(&iregs->ioc_fir));
39
40}
41
42void cbe_system_error_exception(struct pt_regs *regs)
43{
44 int cpu = smp_processor_id();
45
46 printk(KERN_ERR "System Error Interrupt on CPU %d !\n", cpu);
47 dump_fir(cpu);
48 dump_stack();
49}
50
51void cbe_maintenance_exception(struct pt_regs *regs)
52{
53 int cpu = smp_processor_id();
54
55 /*
56 * Nothing implemented for the maintenance interrupt at this point
57 */
58
59 printk(KERN_ERR "Unhandled Maintenance interrupt on CPU %d !\n", cpu);
60 dump_stack();
61}
62
63void cbe_thermal_exception(struct pt_regs *regs)
64{
65 int cpu = smp_processor_id();
66
67 /*
68 * Nothing implemented for the thermal interrupt at this point
69 */
70
71 printk(KERN_ERR "Unhandled Thermal interrupt on CPU %d !\n", cpu);
72 dump_stack();
73}
74
75static int cbe_machine_check_handler(struct pt_regs *regs)
76{
77 int cpu = smp_processor_id();
78
79 printk(KERN_ERR "Machine Check Interrupt on CPU %d !\n", cpu);
80 dump_fir(cpu);
81
82 /* No recovery from this code now, lets continue */
83 return 0;
84}
85
86void __init cbe_ras_init(void)
87{
88 unsigned long hid0;
89
90 /*
91 * Enable System Error & thermal interrupts and wakeup conditions
92 */
93
94 hid0 = mfspr(SPRN_HID0);
95 hid0 |= HID0_CBE_THERM_INT_EN | HID0_CBE_THERM_WAKEUP |
96 HID0_CBE_SYSERR_INT_EN | HID0_CBE_SYSERR_WAKEUP;
97 mtspr(SPRN_HID0, hid0);
98 mb();
99
100 /*
101 * Install machine check handler. Leave setting of precise mode to
102 * what the firmware did for now
103 */
104 ppc_md.machine_check_exception = cbe_machine_check_handler;
105 mb();
106
107 /*
108 * For now, we assume that IOC_FIR is already set to forward some
109 * error conditions to the System Error handler. If that is not true
110 * then it will have to be fixed up here.
111 */
112}
diff --git a/arch/powerpc/platforms/cell/ras.h b/arch/powerpc/platforms/cell/ras.h
new file mode 100644
index 000000000000..eb7ee54c82a0
--- /dev/null
+++ b/arch/powerpc/platforms/cell/ras.h
@@ -0,0 +1,9 @@
1#ifndef RAS_H
2#define RAS_H
3
4extern void cbe_system_error_exception(struct pt_regs *regs);
5extern void cbe_maintenance_exception(struct pt_regs *regs);
6extern void cbe_thermal_exception(struct pt_regs *regs);
7extern void cbe_ras_init(void);
8
9#endif /* RAS_H */
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index fd3e5609e3e0..3d1831d331e5 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -49,10 +49,13 @@
49#include <asm/ppc-pci.h> 49#include <asm/ppc-pci.h>
50#include <asm/irq.h> 50#include <asm/irq.h>
51#include <asm/spu.h> 51#include <asm/spu.h>
52#include <asm/spu_priv1.h>
52 53
53#include "interrupt.h" 54#include "interrupt.h"
54#include "iommu.h" 55#include "iommu.h"
56#include "cbe_regs.h"
55#include "pervasive.h" 57#include "pervasive.h"
58#include "ras.h"
56 59
57#ifdef DEBUG 60#ifdef DEBUG
58#define DBG(fmt...) udbg_printf(fmt) 61#define DBG(fmt...) udbg_printf(fmt)
@@ -81,6 +84,15 @@ static void __init cell_setup_arch(void)
81{ 84{
82 ppc_md.init_IRQ = iic_init_IRQ; 85 ppc_md.init_IRQ = iic_init_IRQ;
83 ppc_md.get_irq = iic_get_irq; 86 ppc_md.get_irq = iic_get_irq;
87#ifdef CONFIG_SPU_BASE
88 spu_priv1_ops = &spu_priv1_mmio_ops;
89#endif
90
91 cbe_regs_init();
92
93#ifdef CONFIG_CBE_RAS
94 cbe_ras_init();
95#endif
84 96
85#ifdef CONFIG_SMP 97#ifdef CONFIG_SMP
86 smp_init_cell(); 98 smp_init_cell();
@@ -98,7 +110,7 @@ static void __init cell_setup_arch(void)
98 init_pci_config_tokens(); 110 init_pci_config_tokens();
99 find_and_init_phbs(); 111 find_and_init_phbs();
100 spider_init_IRQ(); 112 spider_init_IRQ();
101 cell_pervasive_init(); 113 cbe_pervasive_init();
102#ifdef CONFIG_DUMMY_CONSOLE 114#ifdef CONFIG_DUMMY_CONSOLE
103 conswitchp = &dummy_con; 115 conswitchp = &dummy_con;
104#endif 116#endif
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index ad141fe8d52d..db82f503ba2c 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -34,10 +34,15 @@
34#include <asm/prom.h> 34#include <asm/prom.h>
35#include <linux/mutex.h> 35#include <linux/mutex.h>
36#include <asm/spu.h> 36#include <asm/spu.h>
37#include <asm/spu_priv1.h>
37#include <asm/mmu_context.h> 38#include <asm/mmu_context.h>
38 39
39#include "interrupt.h" 40#include "interrupt.h"
40 41
42const struct spu_priv1_ops *spu_priv1_ops;
43
44EXPORT_SYMBOL_GPL(spu_priv1_ops);
45
41static int __spu_trap_invalid_dma(struct spu *spu) 46static int __spu_trap_invalid_dma(struct spu *spu)
42{ 47{
43 pr_debug("%s\n", __FUNCTION__); 48 pr_debug("%s\n", __FUNCTION__);
@@ -71,7 +76,7 @@ static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
71{ 76{
72 struct spu_priv2 __iomem *priv2 = spu->priv2; 77 struct spu_priv2 __iomem *priv2 = spu->priv2;
73 struct mm_struct *mm = spu->mm; 78 struct mm_struct *mm = spu->mm;
74 u64 esid, vsid; 79 u64 esid, vsid, llp;
75 80
76 pr_debug("%s\n", __FUNCTION__); 81 pr_debug("%s\n", __FUNCTION__);
77 82
@@ -91,9 +96,14 @@ static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
91 } 96 }
92 97
93 esid = (ea & ESID_MASK) | SLB_ESID_V; 98 esid = (ea & ESID_MASK) | SLB_ESID_V;
94 vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) | SLB_VSID_USER; 99#ifdef CONFIG_HUGETLB_PAGE
95 if (in_hugepage_area(mm->context, ea)) 100 if (in_hugepage_area(mm->context, ea))
96 vsid |= SLB_VSID_L; 101 llp = mmu_psize_defs[mmu_huge_psize].sllp;
102 else
103#endif
104 llp = mmu_psize_defs[mmu_virtual_psize].sllp;
105 vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) |
106 SLB_VSID_USER | llp;
97 107
98 out_be64(&priv2->slb_index_W, spu->slb_replace); 108 out_be64(&priv2->slb_index_W, spu->slb_replace);
99 out_be64(&priv2->slb_vsid_RW, vsid); 109 out_be64(&priv2->slb_vsid_RW, vsid);
@@ -130,57 +140,7 @@ static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
130 spu->dar = ea; 140 spu->dar = ea;
131 spu->dsisr = dsisr; 141 spu->dsisr = dsisr;
132 mb(); 142 mb();
133 if (spu->stop_callback) 143 spu->stop_callback(spu);
134 spu->stop_callback(spu);
135 return 0;
136}
137
138static int __spu_trap_mailbox(struct spu *spu)
139{
140 if (spu->ibox_callback)
141 spu->ibox_callback(spu);
142
143 /* atomically disable SPU mailbox interrupts */
144 spin_lock(&spu->register_lock);
145 spu_int_mask_and(spu, 2, ~0x1);
146 spin_unlock(&spu->register_lock);
147 return 0;
148}
149
150static int __spu_trap_stop(struct spu *spu)
151{
152 pr_debug("%s\n", __FUNCTION__);
153 spu->stop_code = in_be32(&spu->problem->spu_status_R);
154 if (spu->stop_callback)
155 spu->stop_callback(spu);
156 return 0;
157}
158
159static int __spu_trap_halt(struct spu *spu)
160{
161 pr_debug("%s\n", __FUNCTION__);
162 spu->stop_code = in_be32(&spu->problem->spu_status_R);
163 if (spu->stop_callback)
164 spu->stop_callback(spu);
165 return 0;
166}
167
168static int __spu_trap_tag_group(struct spu *spu)
169{
170 pr_debug("%s\n", __FUNCTION__);
171 spu->mfc_callback(spu);
172 return 0;
173}
174
175static int __spu_trap_spubox(struct spu *spu)
176{
177 if (spu->wbox_callback)
178 spu->wbox_callback(spu);
179
180 /* atomically disable SPU mailbox interrupts */
181 spin_lock(&spu->register_lock);
182 spu_int_mask_and(spu, 2, ~0x10);
183 spin_unlock(&spu->register_lock);
184 return 0; 144 return 0;
185} 145}
186 146
@@ -191,8 +151,7 @@ spu_irq_class_0(int irq, void *data, struct pt_regs *regs)
191 151
192 spu = data; 152 spu = data;
193 spu->class_0_pending = 1; 153 spu->class_0_pending = 1;
194 if (spu->stop_callback) 154 spu->stop_callback(spu);
195 spu->stop_callback(spu);
196 155
197 return IRQ_HANDLED; 156 return IRQ_HANDLED;
198} 157}
@@ -270,29 +229,38 @@ spu_irq_class_2(int irq, void *data, struct pt_regs *regs)
270 unsigned long mask; 229 unsigned long mask;
271 230
272 spu = data; 231 spu = data;
232 spin_lock(&spu->register_lock);
273 stat = spu_int_stat_get(spu, 2); 233 stat = spu_int_stat_get(spu, 2);
274 mask = spu_int_mask_get(spu, 2); 234 mask = spu_int_mask_get(spu, 2);
235 /* ignore interrupts we're not waiting for */
236 stat &= mask;
237 /*
238 * mailbox interrupts (0x1 and 0x10) are level triggered.
239 * mask them now before acknowledging.
240 */
241 if (stat & 0x11)
242 spu_int_mask_and(spu, 2, ~(stat & 0x11));
243 /* acknowledge all interrupts before the callbacks */
244 spu_int_stat_clear(spu, 2, stat);
245 spin_unlock(&spu->register_lock);
275 246
276 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask); 247 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
277 248
278 stat &= mask;
279
280 if (stat & 1) /* PPC core mailbox */ 249 if (stat & 1) /* PPC core mailbox */
281 __spu_trap_mailbox(spu); 250 spu->ibox_callback(spu);
282 251
283 if (stat & 2) /* SPU stop-and-signal */ 252 if (stat & 2) /* SPU stop-and-signal */
284 __spu_trap_stop(spu); 253 spu->stop_callback(spu);
285 254
286 if (stat & 4) /* SPU halted */ 255 if (stat & 4) /* SPU halted */
287 __spu_trap_halt(spu); 256 spu->stop_callback(spu);
288 257
289 if (stat & 8) /* DMA tag group complete */ 258 if (stat & 8) /* DMA tag group complete */
290 __spu_trap_tag_group(spu); 259 spu->mfc_callback(spu);
291 260
292 if (stat & 0x10) /* SPU mailbox threshold */ 261 if (stat & 0x10) /* SPU mailbox threshold */
293 __spu_trap_spubox(spu); 262 spu->wbox_callback(spu);
294 263
295 spu_int_stat_clear(spu, 2, stat);
296 return stat ? IRQ_HANDLED : IRQ_NONE; 264 return stat ? IRQ_HANDLED : IRQ_NONE;
297} 265}
298 266
@@ -512,14 +480,6 @@ int spu_irq_class_1_bottom(struct spu *spu)
512 return ret; 480 return ret;
513} 481}
514 482
515void spu_irq_setaffinity(struct spu *spu, int cpu)
516{
517 u64 target = iic_get_target_id(cpu);
518 u64 route = target << 48 | target << 32 | target << 16;
519 spu_int_route_set(spu, route);
520}
521EXPORT_SYMBOL_GPL(spu_irq_setaffinity);
522
523static int __init find_spu_node_id(struct device_node *spe) 483static int __init find_spu_node_id(struct device_node *spe)
524{ 484{
525 unsigned int *id; 485 unsigned int *id;
@@ -649,6 +609,46 @@ out:
649 return ret; 609 return ret;
650} 610}
651 611
612struct sysdev_class spu_sysdev_class = {
613 set_kset_name("spu")
614};
615
616static ssize_t spu_show_isrc(struct sys_device *sysdev, char *buf)
617{
618 struct spu *spu = container_of(sysdev, struct spu, sysdev);
619 return sprintf(buf, "%d\n", spu->isrc);
620
621}
622static SYSDEV_ATTR(isrc, 0400, spu_show_isrc, NULL);
623
624extern int attach_sysdev_to_node(struct sys_device *dev, int nid);
625
626static int spu_create_sysdev(struct spu *spu)
627{
628 int ret;
629
630 spu->sysdev.id = spu->number;
631 spu->sysdev.cls = &spu_sysdev_class;
632 ret = sysdev_register(&spu->sysdev);
633 if (ret) {
634 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
635 spu->number);
636 return ret;
637 }
638
639 sysdev_create_file(&spu->sysdev, &attr_isrc);
640 sysfs_add_device_to_node(&spu->sysdev, spu->nid);
641
642 return 0;
643}
644
645static void spu_destroy_sysdev(struct spu *spu)
646{
647 sysdev_remove_file(&spu->sysdev, &attr_isrc);
648 sysfs_remove_device_from_node(&spu->sysdev, spu->nid);
649 sysdev_unregister(&spu->sysdev);
650}
651
652static int __init create_spu(struct device_node *spe) 652static int __init create_spu(struct device_node *spe)
653{ 653{
654 struct spu *spu; 654 struct spu *spu;
@@ -656,7 +656,7 @@ static int __init create_spu(struct device_node *spe)
656 static int number; 656 static int number;
657 657
658 ret = -ENOMEM; 658 ret = -ENOMEM;
659 spu = kmalloc(sizeof (*spu), GFP_KERNEL); 659 spu = kzalloc(sizeof (*spu), GFP_KERNEL);
660 if (!spu) 660 if (!spu)
661 goto out; 661 goto out;
662 662
@@ -668,33 +668,20 @@ static int __init create_spu(struct device_node *spe)
668 spu->nid = of_node_to_nid(spe); 668 spu->nid = of_node_to_nid(spe);
669 if (spu->nid == -1) 669 if (spu->nid == -1)
670 spu->nid = 0; 670 spu->nid = 0;
671
672 spu->stop_code = 0;
673 spu->slb_replace = 0;
674 spu->mm = NULL;
675 spu->ctx = NULL;
676 spu->rq = NULL;
677 spu->pid = 0;
678 spu->class_0_pending = 0;
679 spu->flags = 0UL;
680 spu->dar = 0UL;
681 spu->dsisr = 0UL;
682 spin_lock_init(&spu->register_lock); 671 spin_lock_init(&spu->register_lock);
683
684 spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1)); 672 spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1));
685 spu_mfc_sr1_set(spu, 0x33); 673 spu_mfc_sr1_set(spu, 0x33);
686
687 spu->ibox_callback = NULL;
688 spu->wbox_callback = NULL;
689 spu->stop_callback = NULL;
690 spu->mfc_callback = NULL;
691
692 mutex_lock(&spu_mutex); 674 mutex_lock(&spu_mutex);
675
693 spu->number = number++; 676 spu->number = number++;
694 ret = spu_request_irqs(spu); 677 ret = spu_request_irqs(spu);
695 if (ret) 678 if (ret)
696 goto out_unmap; 679 goto out_unmap;
697 680
681 ret = spu_create_sysdev(spu);
682 if (ret)
683 goto out_free_irqs;
684
698 list_add(&spu->list, &spu_list); 685 list_add(&spu->list, &spu_list);
699 mutex_unlock(&spu_mutex); 686 mutex_unlock(&spu_mutex);
700 687
@@ -703,6 +690,9 @@ static int __init create_spu(struct device_node *spe)
703 spu->problem, spu->priv1, spu->priv2, spu->number); 690 spu->problem, spu->priv1, spu->priv2, spu->number);
704 goto out; 691 goto out;
705 692
693out_free_irqs:
694 spu_free_irqs(spu);
695
706out_unmap: 696out_unmap:
707 mutex_unlock(&spu_mutex); 697 mutex_unlock(&spu_mutex);
708 spu_unmap(spu); 698 spu_unmap(spu);
@@ -716,6 +706,7 @@ static void destroy_spu(struct spu *spu)
716{ 706{
717 list_del_init(&spu->list); 707 list_del_init(&spu->list);
718 708
709 spu_destroy_sysdev(spu);
719 spu_free_irqs(spu); 710 spu_free_irqs(spu);
720 spu_unmap(spu); 711 spu_unmap(spu);
721 kfree(spu); 712 kfree(spu);
@@ -728,6 +719,7 @@ static void cleanup_spu_base(void)
728 list_for_each_entry_safe(spu, tmp, &spu_list, list) 719 list_for_each_entry_safe(spu, tmp, &spu_list, list)
729 destroy_spu(spu); 720 destroy_spu(spu);
730 mutex_unlock(&spu_mutex); 721 mutex_unlock(&spu_mutex);
722 sysdev_class_unregister(&spu_sysdev_class);
731} 723}
732module_exit(cleanup_spu_base); 724module_exit(cleanup_spu_base);
733 725
@@ -736,6 +728,11 @@ static int __init init_spu_base(void)
736 struct device_node *node; 728 struct device_node *node;
737 int ret; 729 int ret;
738 730
731 /* create sysdev class for spus */
732 ret = sysdev_class_register(&spu_sysdev_class);
733 if (ret)
734 return ret;
735
739 ret = -ENODEV; 736 ret = -ENODEV;
740 for (node = of_find_node_by_type(NULL, "spe"); 737 for (node = of_find_node_by_type(NULL, "spe");
741 node; node = of_find_node_by_type(node, "spe")) { 738 node; node = of_find_node_by_type(node, "spe")) {
diff --git a/arch/powerpc/platforms/cell/spu_callbacks.c b/arch/powerpc/platforms/cell/spu_callbacks.c
index b47fcc5ddb78..47ec3be3edcd 100644
--- a/arch/powerpc/platforms/cell/spu_callbacks.c
+++ b/arch/powerpc/platforms/cell/spu_callbacks.c
@@ -34,307 +34,19 @@
34 */ 34 */
35 35
36void *spu_syscall_table[] = { 36void *spu_syscall_table[] = {
37 [__NR_restart_syscall] sys_ni_syscall, /* sys_restart_syscall */ 37#define SYSCALL(func) sys_ni_syscall,
38 [__NR_exit] sys_ni_syscall, /* sys_exit */ 38#define COMPAT_SYS(func) sys_ni_syscall,
39 [__NR_fork] sys_ni_syscall, /* ppc_fork */ 39#define PPC_SYS(func) sys_ni_syscall,
40 [__NR_read] sys_read, 40#define OLDSYS(func) sys_ni_syscall,
41 [__NR_write] sys_write, 41#define SYS32ONLY(func) sys_ni_syscall,
42 [__NR_open] sys_open, 42#define SYSX(f, f3264, f32) sys_ni_syscall,
43 [__NR_close] sys_close, 43
44 [__NR_waitpid] sys_waitpid, 44#define SYSCALL_SPU(func) sys_##func,
45 [__NR_creat] sys_creat, 45#define COMPAT_SYS_SPU(func) sys_##func,
46 [__NR_link] sys_link, 46#define PPC_SYS_SPU(func) ppc_##func,
47 [__NR_unlink] sys_unlink, 47#define SYSX_SPU(f, f3264, f32) f,
48 [__NR_execve] sys_ni_syscall, /* sys_execve */ 48
49 [__NR_chdir] sys_chdir, 49#include <asm/systbl.h>
50 [__NR_time] sys_time,
51 [__NR_mknod] sys_mknod,
52 [__NR_chmod] sys_chmod,
53 [__NR_lchown] sys_lchown,
54 [__NR_break] sys_ni_syscall,
55 [__NR_oldstat] sys_ni_syscall,
56 [__NR_lseek] sys_lseek,
57 [__NR_getpid] sys_getpid,
58 [__NR_mount] sys_ni_syscall, /* sys_mount */
59 [__NR_umount] sys_ni_syscall,
60 [__NR_setuid] sys_setuid,
61 [__NR_getuid] sys_getuid,
62 [__NR_stime] sys_stime,
63 [__NR_ptrace] sys_ni_syscall, /* sys_ptrace */
64 [__NR_alarm] sys_alarm,
65 [__NR_oldfstat] sys_ni_syscall,
66 [__NR_pause] sys_ni_syscall, /* sys_pause */
67 [__NR_utime] sys_ni_syscall, /* sys_utime */
68 [__NR_stty] sys_ni_syscall,
69 [__NR_gtty] sys_ni_syscall,
70 [__NR_access] sys_access,
71 [__NR_nice] sys_nice,
72 [__NR_ftime] sys_ni_syscall,
73 [__NR_sync] sys_sync,
74 [__NR_kill] sys_kill,
75 [__NR_rename] sys_rename,
76 [__NR_mkdir] sys_mkdir,
77 [__NR_rmdir] sys_rmdir,
78 [__NR_dup] sys_dup,
79 [__NR_pipe] sys_pipe,
80 [__NR_times] sys_times,
81 [__NR_prof] sys_ni_syscall,
82 [__NR_brk] sys_brk,
83 [__NR_setgid] sys_setgid,
84 [__NR_getgid] sys_getgid,
85 [__NR_signal] sys_ni_syscall, /* sys_signal */
86 [__NR_geteuid] sys_geteuid,
87 [__NR_getegid] sys_getegid,
88 [__NR_acct] sys_ni_syscall, /* sys_acct */
89 [__NR_umount2] sys_ni_syscall, /* sys_umount */
90 [__NR_lock] sys_ni_syscall,
91 [__NR_ioctl] sys_ioctl,
92 [__NR_fcntl] sys_fcntl,
93 [__NR_mpx] sys_ni_syscall,
94 [__NR_setpgid] sys_setpgid,
95 [__NR_ulimit] sys_ni_syscall,
96 [__NR_oldolduname] sys_ni_syscall,
97 [__NR_umask] sys_umask,
98 [__NR_chroot] sys_chroot,
99 [__NR_ustat] sys_ni_syscall, /* sys_ustat */
100 [__NR_dup2] sys_dup2,
101 [__NR_getppid] sys_getppid,
102 [__NR_getpgrp] sys_getpgrp,
103 [__NR_setsid] sys_setsid,
104 [__NR_sigaction] sys_ni_syscall,
105 [__NR_sgetmask] sys_sgetmask,
106 [__NR_ssetmask] sys_ssetmask,
107 [__NR_setreuid] sys_setreuid,
108 [__NR_setregid] sys_setregid,
109 [__NR_sigsuspend] sys_ni_syscall,
110 [__NR_sigpending] sys_ni_syscall,
111 [__NR_sethostname] sys_sethostname,
112 [__NR_setrlimit] sys_setrlimit,
113 [__NR_getrlimit] sys_ni_syscall,
114 [__NR_getrusage] sys_getrusage,
115 [__NR_gettimeofday] sys_gettimeofday,
116 [__NR_settimeofday] sys_settimeofday,
117 [__NR_getgroups] sys_getgroups,
118 [__NR_setgroups] sys_setgroups,
119 [__NR_select] sys_ni_syscall,
120 [__NR_symlink] sys_symlink,
121 [__NR_oldlstat] sys_ni_syscall,
122 [__NR_readlink] sys_readlink,
123 [__NR_uselib] sys_ni_syscall, /* sys_uselib */
124 [__NR_swapon] sys_ni_syscall, /* sys_swapon */
125 [__NR_reboot] sys_ni_syscall, /* sys_reboot */
126 [__NR_readdir] sys_ni_syscall,
127 [__NR_mmap] sys_mmap,
128 [__NR_munmap] sys_munmap,
129 [__NR_truncate] sys_truncate,
130 [__NR_ftruncate] sys_ftruncate,
131 [__NR_fchmod] sys_fchmod,
132 [__NR_fchown] sys_fchown,
133 [__NR_getpriority] sys_getpriority,
134 [__NR_setpriority] sys_setpriority,
135 [__NR_profil] sys_ni_syscall,
136 [__NR_statfs] sys_ni_syscall, /* sys_statfs */
137 [__NR_fstatfs] sys_ni_syscall, /* sys_fstatfs */
138 [__NR_ioperm] sys_ni_syscall,
139 [__NR_socketcall] sys_socketcall,
140 [__NR_syslog] sys_syslog,
141 [__NR_setitimer] sys_setitimer,
142 [__NR_getitimer] sys_getitimer,
143 [__NR_stat] sys_newstat,
144 [__NR_lstat] sys_newlstat,
145 [__NR_fstat] sys_newfstat,
146 [__NR_olduname] sys_ni_syscall,
147 [__NR_iopl] sys_ni_syscall,
148 [__NR_vhangup] sys_vhangup,
149 [__NR_idle] sys_ni_syscall,
150 [__NR_vm86] sys_ni_syscall,
151 [__NR_wait4] sys_wait4,
152 [__NR_swapoff] sys_ni_syscall, /* sys_swapoff */
153 [__NR_sysinfo] sys_sysinfo,
154 [__NR_ipc] sys_ni_syscall, /* sys_ipc */
155 [__NR_fsync] sys_fsync,
156 [__NR_sigreturn] sys_ni_syscall,
157 [__NR_clone] sys_ni_syscall, /* ppc_clone */
158 [__NR_setdomainname] sys_setdomainname,
159 [__NR_uname] ppc_newuname,
160 [__NR_modify_ldt] sys_ni_syscall,
161 [__NR_adjtimex] sys_adjtimex,
162 [__NR_mprotect] sys_mprotect,
163 [__NR_sigprocmask] sys_ni_syscall,
164 [__NR_create_module] sys_ni_syscall,
165 [__NR_init_module] sys_ni_syscall, /* sys_init_module */
166 [__NR_delete_module] sys_ni_syscall, /* sys_delete_module */
167 [__NR_get_kernel_syms] sys_ni_syscall,
168 [__NR_quotactl] sys_ni_syscall, /* sys_quotactl */
169 [__NR_getpgid] sys_getpgid,
170 [__NR_fchdir] sys_fchdir,
171 [__NR_bdflush] sys_bdflush,
172 [__NR_sysfs] sys_ni_syscall, /* sys_sysfs */
173 [__NR_personality] ppc64_personality,
174 [__NR_afs_syscall] sys_ni_syscall,
175 [__NR_setfsuid] sys_setfsuid,
176 [__NR_setfsgid] sys_setfsgid,
177 [__NR__llseek] sys_llseek,
178 [__NR_getdents] sys_getdents,
179 [__NR__newselect] sys_select,
180 [__NR_flock] sys_flock,
181 [__NR_msync] sys_msync,
182 [__NR_readv] sys_readv,
183 [__NR_writev] sys_writev,
184 [__NR_getsid] sys_getsid,
185 [__NR_fdatasync] sys_fdatasync,
186 [__NR__sysctl] sys_ni_syscall, /* sys_sysctl */
187 [__NR_mlock] sys_mlock,
188 [__NR_munlock] sys_munlock,
189 [__NR_mlockall] sys_mlockall,
190 [__NR_munlockall] sys_munlockall,
191 [__NR_sched_setparam] sys_sched_setparam,
192 [__NR_sched_getparam] sys_sched_getparam,
193 [__NR_sched_setscheduler] sys_sched_setscheduler,
194 [__NR_sched_getscheduler] sys_sched_getscheduler,
195 [__NR_sched_yield] sys_sched_yield,
196 [__NR_sched_get_priority_max] sys_sched_get_priority_max,
197 [__NR_sched_get_priority_min] sys_sched_get_priority_min,
198 [__NR_sched_rr_get_interval] sys_sched_rr_get_interval,
199 [__NR_nanosleep] sys_nanosleep,
200 [__NR_mremap] sys_mremap,
201 [__NR_setresuid] sys_setresuid,
202 [__NR_getresuid] sys_getresuid,
203 [__NR_query_module] sys_ni_syscall,
204 [__NR_poll] sys_poll,
205 [__NR_nfsservctl] sys_ni_syscall, /* sys_nfsservctl */
206 [__NR_setresgid] sys_setresgid,
207 [__NR_getresgid] sys_getresgid,
208 [__NR_prctl] sys_prctl,
209 [__NR_rt_sigreturn] sys_ni_syscall, /* ppc64_rt_sigreturn */
210 [__NR_rt_sigaction] sys_ni_syscall, /* sys_rt_sigaction */
211 [__NR_rt_sigprocmask] sys_ni_syscall, /* sys_rt_sigprocmask */
212 [__NR_rt_sigpending] sys_ni_syscall, /* sys_rt_sigpending */
213 [__NR_rt_sigtimedwait] sys_ni_syscall, /* sys_rt_sigtimedwait */
214 [__NR_rt_sigqueueinfo] sys_ni_syscall, /* sys_rt_sigqueueinfo */
215 [__NR_rt_sigsuspend] sys_ni_syscall, /* sys_rt_sigsuspend */
216 [__NR_pread64] sys_pread64,
217 [__NR_pwrite64] sys_pwrite64,
218 [__NR_chown] sys_chown,
219 [__NR_getcwd] sys_getcwd,
220 [__NR_capget] sys_capget,
221 [__NR_capset] sys_capset,
222 [__NR_sigaltstack] sys_ni_syscall, /* sys_sigaltstack */
223 [__NR_sendfile] sys_sendfile64,
224 [__NR_getpmsg] sys_ni_syscall,
225 [__NR_putpmsg] sys_ni_syscall,
226 [__NR_vfork] sys_ni_syscall, /* ppc_vfork */
227 [__NR_ugetrlimit] sys_getrlimit,
228 [__NR_readahead] sys_readahead,
229 [192] sys_ni_syscall,
230 [193] sys_ni_syscall,
231 [194] sys_ni_syscall,
232 [195] sys_ni_syscall,
233 [196] sys_ni_syscall,
234 [197] sys_ni_syscall,
235 [__NR_pciconfig_read] sys_ni_syscall, /* sys_pciconfig_read */
236 [__NR_pciconfig_write] sys_ni_syscall, /* sys_pciconfig_write */
237 [__NR_pciconfig_iobase] sys_ni_syscall, /* sys_pciconfig_iobase */
238 [__NR_multiplexer] sys_ni_syscall,
239 [__NR_getdents64] sys_getdents64,
240 [__NR_pivot_root] sys_pivot_root,
241 [204] sys_ni_syscall,
242 [__NR_madvise] sys_madvise,
243 [__NR_mincore] sys_mincore,
244 [__NR_gettid] sys_gettid,
245 [__NR_tkill] sys_tkill,
246 [__NR_setxattr] sys_setxattr,
247 [__NR_lsetxattr] sys_lsetxattr,
248 [__NR_fsetxattr] sys_fsetxattr,
249 [__NR_getxattr] sys_getxattr,
250 [__NR_lgetxattr] sys_lgetxattr,
251 [__NR_fgetxattr] sys_fgetxattr,
252 [__NR_listxattr] sys_listxattr,
253 [__NR_llistxattr] sys_llistxattr,
254 [__NR_flistxattr] sys_flistxattr,
255 [__NR_removexattr] sys_removexattr,
256 [__NR_lremovexattr] sys_lremovexattr,
257 [__NR_fremovexattr] sys_fremovexattr,
258 [__NR_futex] sys_futex,
259 [__NR_sched_setaffinity] sys_sched_setaffinity,
260 [__NR_sched_getaffinity] sys_sched_getaffinity,
261 [224] sys_ni_syscall,
262 [__NR_tuxcall] sys_ni_syscall,
263 [226] sys_ni_syscall,
264 [__NR_io_setup] sys_io_setup,
265 [__NR_io_destroy] sys_io_destroy,
266 [__NR_io_getevents] sys_io_getevents,
267 [__NR_io_submit] sys_io_submit,
268 [__NR_io_cancel] sys_io_cancel,
269 [__NR_set_tid_address] sys_ni_syscall, /* sys_set_tid_address */
270 [__NR_fadvise64] sys_fadvise64,
271 [__NR_exit_group] sys_ni_syscall, /* sys_exit_group */
272 [__NR_lookup_dcookie] sys_ni_syscall, /* sys_lookup_dcookie */
273 [__NR_epoll_create] sys_epoll_create,
274 [__NR_epoll_ctl] sys_epoll_ctl,
275 [__NR_epoll_wait] sys_epoll_wait,
276 [__NR_remap_file_pages] sys_remap_file_pages,
277 [__NR_timer_create] sys_timer_create,
278 [__NR_timer_settime] sys_timer_settime,
279 [__NR_timer_gettime] sys_timer_gettime,
280 [__NR_timer_getoverrun] sys_timer_getoverrun,
281 [__NR_timer_delete] sys_timer_delete,
282 [__NR_clock_settime] sys_clock_settime,
283 [__NR_clock_gettime] sys_clock_gettime,
284 [__NR_clock_getres] sys_clock_getres,
285 [__NR_clock_nanosleep] sys_clock_nanosleep,
286 [__NR_swapcontext] sys_ni_syscall, /* ppc64_swapcontext */
287 [__NR_tgkill] sys_tgkill,
288 [__NR_utimes] sys_utimes,
289 [__NR_statfs64] sys_statfs64,
290 [__NR_fstatfs64] sys_fstatfs64,
291 [254] sys_ni_syscall,
292 [__NR_rtas] ppc_rtas,
293 [256] sys_ni_syscall,
294 [257] sys_ni_syscall,
295 [258] sys_ni_syscall,
296 [__NR_mbind] sys_ni_syscall, /* sys_mbind */
297 [__NR_get_mempolicy] sys_ni_syscall, /* sys_get_mempolicy */
298 [__NR_set_mempolicy] sys_ni_syscall, /* sys_set_mempolicy */
299 [__NR_mq_open] sys_ni_syscall, /* sys_mq_open */
300 [__NR_mq_unlink] sys_ni_syscall, /* sys_mq_unlink */
301 [__NR_mq_timedsend] sys_ni_syscall, /* sys_mq_timedsend */
302 [__NR_mq_timedreceive] sys_ni_syscall, /* sys_mq_timedreceive */
303 [__NR_mq_notify] sys_ni_syscall, /* sys_mq_notify */
304 [__NR_mq_getsetattr] sys_ni_syscall, /* sys_mq_getsetattr */
305 [__NR_kexec_load] sys_ni_syscall, /* sys_kexec_load */
306 [__NR_add_key] sys_ni_syscall, /* sys_add_key */
307 [__NR_request_key] sys_ni_syscall, /* sys_request_key */
308 [__NR_keyctl] sys_ni_syscall, /* sys_keyctl */
309 [__NR_waitid] sys_ni_syscall, /* sys_waitid */
310 [__NR_ioprio_set] sys_ni_syscall, /* sys_ioprio_set */
311 [__NR_ioprio_get] sys_ni_syscall, /* sys_ioprio_get */
312 [__NR_inotify_init] sys_ni_syscall, /* sys_inotify_init */
313 [__NR_inotify_add_watch] sys_ni_syscall, /* sys_inotify_add_watch */
314 [__NR_inotify_rm_watch] sys_ni_syscall, /* sys_inotify_rm_watch */
315 [__NR_spu_run] sys_ni_syscall, /* sys_spu_run */
316 [__NR_spu_create] sys_ni_syscall, /* sys_spu_create */
317 [__NR_pselect6] sys_ni_syscall, /* sys_pselect */
318 [__NR_ppoll] sys_ni_syscall, /* sys_ppoll */
319 [__NR_unshare] sys_unshare,
320 [__NR_splice] sys_splice,
321 [__NR_tee] sys_tee,
322 [__NR_vmsplice] sys_vmsplice,
323 [__NR_openat] sys_openat,
324 [__NR_mkdirat] sys_mkdirat,
325 [__NR_mknodat] sys_mknodat,
326 [__NR_fchownat] sys_fchownat,
327 [__NR_futimesat] sys_futimesat,
328 [__NR_newfstatat] sys_newfstatat,
329 [__NR_unlinkat] sys_unlinkat,
330 [__NR_renameat] sys_renameat,
331 [__NR_linkat] sys_linkat,
332 [__NR_symlinkat] sys_symlinkat,
333 [__NR_readlinkat] sys_readlinkat,
334 [__NR_fchmodat] sys_fchmodat,
335 [__NR_faccessat] sys_faccessat,
336 [__NR_get_robust_list] sys_get_robust_list,
337 [__NR_set_robust_list] sys_set_robust_list,
338}; 50};
339 51
340long spu_sys_callback(struct spu_syscall_block *s) 52long spu_sys_callback(struct spu_syscall_block *s)
diff --git a/arch/powerpc/platforms/cell/spu_priv1.c b/arch/powerpc/platforms/cell/spu_priv1.c
deleted file mode 100644
index b2656421c7b5..000000000000
--- a/arch/powerpc/platforms/cell/spu_priv1.c
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * access to SPU privileged registers
3 */
4#include <linux/module.h>
5
6#include <asm/io.h>
7#include <asm/spu.h>
8
9void spu_int_mask_and(struct spu *spu, int class, u64 mask)
10{
11 u64 old_mask;
12
13 old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
14 out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
15}
16EXPORT_SYMBOL_GPL(spu_int_mask_and);
17
18void spu_int_mask_or(struct spu *spu, int class, u64 mask)
19{
20 u64 old_mask;
21
22 old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
23 out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
24}
25EXPORT_SYMBOL_GPL(spu_int_mask_or);
26
27void spu_int_mask_set(struct spu *spu, int class, u64 mask)
28{
29 out_be64(&spu->priv1->int_mask_RW[class], mask);
30}
31EXPORT_SYMBOL_GPL(spu_int_mask_set);
32
33u64 spu_int_mask_get(struct spu *spu, int class)
34{
35 return in_be64(&spu->priv1->int_mask_RW[class]);
36}
37EXPORT_SYMBOL_GPL(spu_int_mask_get);
38
39void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
40{
41 out_be64(&spu->priv1->int_stat_RW[class], stat);
42}
43EXPORT_SYMBOL_GPL(spu_int_stat_clear);
44
45u64 spu_int_stat_get(struct spu *spu, int class)
46{
47 return in_be64(&spu->priv1->int_stat_RW[class]);
48}
49EXPORT_SYMBOL_GPL(spu_int_stat_get);
50
51void spu_int_route_set(struct spu *spu, u64 route)
52{
53 out_be64(&spu->priv1->int_route_RW, route);
54}
55EXPORT_SYMBOL_GPL(spu_int_route_set);
56
57u64 spu_mfc_dar_get(struct spu *spu)
58{
59 return in_be64(&spu->priv1->mfc_dar_RW);
60}
61EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
62
63u64 spu_mfc_dsisr_get(struct spu *spu)
64{
65 return in_be64(&spu->priv1->mfc_dsisr_RW);
66}
67EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
68
69void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
70{
71 out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
72}
73EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
74
75void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
76{
77 out_be64(&spu->priv1->mfc_sdr_RW, sdr);
78}
79EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
80
81void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
82{
83 out_be64(&spu->priv1->mfc_sr1_RW, sr1);
84}
85EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
86
87u64 spu_mfc_sr1_get(struct spu *spu)
88{
89 return in_be64(&spu->priv1->mfc_sr1_RW);
90}
91EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
92
93void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
94{
95 out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
96}
97EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
98
99u64 spu_mfc_tclass_id_get(struct spu *spu)
100{
101 return in_be64(&spu->priv1->mfc_tclass_id_RW);
102}
103EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
104
105void spu_tlb_invalidate(struct spu *spu)
106{
107 out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
108}
109EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
110
111void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
112{
113 out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
114}
115EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
116
117u64 spu_resource_allocation_groupID_get(struct spu *spu)
118{
119 return in_be64(&spu->priv1->resource_allocation_groupID_RW);
120}
121EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
122
123void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
124{
125 out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
126}
127EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
128
129u64 spu_resource_allocation_enable_get(struct spu *spu)
130{
131 return in_be64(&spu->priv1->resource_allocation_enable_RW);
132}
133EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);
diff --git a/arch/powerpc/platforms/cell/spu_priv1_mmio.c b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
new file mode 100644
index 000000000000..71b69f0a1a48
--- /dev/null
+++ b/arch/powerpc/platforms/cell/spu_priv1_mmio.c
@@ -0,0 +1,159 @@
1/*
2 * spu hypervisor abstraction for direct hardware access.
3 *
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
5 * Copyright 2006 Sony Corp.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/module.h>
22
23#include <asm/io.h>
24#include <asm/spu.h>
25#include <asm/spu_priv1.h>
26
27#include "interrupt.h"
28
29static void int_mask_and(struct spu *spu, int class, u64 mask)
30{
31 u64 old_mask;
32
33 old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
34 out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
35}
36
37static void int_mask_or(struct spu *spu, int class, u64 mask)
38{
39 u64 old_mask;
40
41 old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
42 out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
43}
44
45static void int_mask_set(struct spu *spu, int class, u64 mask)
46{
47 out_be64(&spu->priv1->int_mask_RW[class], mask);
48}
49
50static u64 int_mask_get(struct spu *spu, int class)
51{
52 return in_be64(&spu->priv1->int_mask_RW[class]);
53}
54
55static void int_stat_clear(struct spu *spu, int class, u64 stat)
56{
57 out_be64(&spu->priv1->int_stat_RW[class], stat);
58}
59
60static u64 int_stat_get(struct spu *spu, int class)
61{
62 return in_be64(&spu->priv1->int_stat_RW[class]);
63}
64
65static void cpu_affinity_set(struct spu *spu, int cpu)
66{
67 u64 target = iic_get_target_id(cpu);
68 u64 route = target << 48 | target << 32 | target << 16;
69 out_be64(&spu->priv1->int_route_RW, route);
70}
71
72static u64 mfc_dar_get(struct spu *spu)
73{
74 return in_be64(&spu->priv1->mfc_dar_RW);
75}
76
77static u64 mfc_dsisr_get(struct spu *spu)
78{
79 return in_be64(&spu->priv1->mfc_dsisr_RW);
80}
81
82static void mfc_dsisr_set(struct spu *spu, u64 dsisr)
83{
84 out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
85}
86
87static void mfc_sdr_set(struct spu *spu, u64 sdr)
88{
89 out_be64(&spu->priv1->mfc_sdr_RW, sdr);
90}
91
92static void mfc_sr1_set(struct spu *spu, u64 sr1)
93{
94 out_be64(&spu->priv1->mfc_sr1_RW, sr1);
95}
96
97static u64 mfc_sr1_get(struct spu *spu)
98{
99 return in_be64(&spu->priv1->mfc_sr1_RW);
100}
101
102static void mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
103{
104 out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
105}
106
107static u64 mfc_tclass_id_get(struct spu *spu)
108{
109 return in_be64(&spu->priv1->mfc_tclass_id_RW);
110}
111
112static void tlb_invalidate(struct spu *spu)
113{
114 out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
115}
116
117static void resource_allocation_groupID_set(struct spu *spu, u64 id)
118{
119 out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
120}
121
122static u64 resource_allocation_groupID_get(struct spu *spu)
123{
124 return in_be64(&spu->priv1->resource_allocation_groupID_RW);
125}
126
127static void resource_allocation_enable_set(struct spu *spu, u64 enable)
128{
129 out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
130}
131
132static u64 resource_allocation_enable_get(struct spu *spu)
133{
134 return in_be64(&spu->priv1->resource_allocation_enable_RW);
135}
136
137const struct spu_priv1_ops spu_priv1_mmio_ops =
138{
139 .int_mask_and = int_mask_and,
140 .int_mask_or = int_mask_or,
141 .int_mask_set = int_mask_set,
142 .int_mask_get = int_mask_get,
143 .int_stat_clear = int_stat_clear,
144 .int_stat_get = int_stat_get,
145 .cpu_affinity_set = cpu_affinity_set,
146 .mfc_dar_get = mfc_dar_get,
147 .mfc_dsisr_get = mfc_dsisr_get,
148 .mfc_dsisr_set = mfc_dsisr_set,
149 .mfc_sdr_set = mfc_sdr_set,
150 .mfc_sr1_set = mfc_sr1_set,
151 .mfc_sr1_get = mfc_sr1_get,
152 .mfc_tclass_id_set = mfc_tclass_id_set,
153 .mfc_tclass_id_get = mfc_tclass_id_get,
154 .tlb_invalidate = tlb_invalidate,
155 .resource_allocation_groupID_set = resource_allocation_groupID_set,
156 .resource_allocation_groupID_get = resource_allocation_groupID_get,
157 .resource_allocation_enable_set = resource_allocation_enable_set,
158 .resource_allocation_enable_get = resource_allocation_enable_get,
159};
diff --git a/arch/powerpc/platforms/cell/spufs/Makefile b/arch/powerpc/platforms/cell/spufs/Makefile
index a7cddf40e3d9..bb5dc634272c 100644
--- a/arch/powerpc/platforms/cell/spufs/Makefile
+++ b/arch/powerpc/platforms/cell/spufs/Makefile
@@ -1,5 +1,7 @@
1obj-y += switch.o
2
1obj-$(CONFIG_SPU_FS) += spufs.o 3obj-$(CONFIG_SPU_FS) += spufs.o
2spufs-y += inode.o file.o context.o switch.o syscalls.o 4spufs-y += inode.o file.o context.o syscalls.o
3spufs-y += sched.o backing_ops.o hw_ops.o run.o 5spufs-y += sched.o backing_ops.o hw_ops.o run.o
4 6
5# Rules to build switch.o with the help of SPU tool chain 7# Rules to build switch.o with the help of SPU tool chain
@@ -8,11 +10,14 @@ SPU_CC := $(SPU_CROSS)gcc
8SPU_AS := $(SPU_CROSS)gcc 10SPU_AS := $(SPU_CROSS)gcc
9SPU_LD := $(SPU_CROSS)ld 11SPU_LD := $(SPU_CROSS)ld
10SPU_OBJCOPY := $(SPU_CROSS)objcopy 12SPU_OBJCOPY := $(SPU_CROSS)objcopy
11SPU_CFLAGS := -O2 -Wall -I$(srctree)/include -I$(objtree)/include2 13SPU_CFLAGS := -O2 -Wall -I$(srctree)/include \
12SPU_AFLAGS := -c -D__ASSEMBLY__ -I$(srctree)/include -I$(objtree)/include2 14 -I$(objtree)/include2 -D__KERNEL__
15SPU_AFLAGS := -c -D__ASSEMBLY__ -I$(srctree)/include \
16 -I$(objtree)/include2 -D__KERNEL__
13SPU_LDFLAGS := -N -Ttext=0x0 17SPU_LDFLAGS := -N -Ttext=0x0
14 18
15$(obj)/switch.o: $(obj)/spu_save_dump.h $(obj)/spu_restore_dump.h 19$(obj)/switch.o: $(obj)/spu_save_dump.h $(obj)/spu_restore_dump.h
20clean-files := spu_save_dump.h spu_restore_dump.h
16 21
17# Compile SPU files 22# Compile SPU files
18 cmd_spu_cc = $(SPU_CC) $(SPU_CFLAGS) -c -o $@ $< 23 cmd_spu_cc = $(SPU_CC) $(SPU_CFLAGS) -c -o $@ $<
@@ -45,7 +50,8 @@ cmd_hexdump = ( \
45 echo " * Hex-dump auto generated from $*.c." ; \ 50 echo " * Hex-dump auto generated from $*.c." ; \
46 echo " * Do not edit!" ; \ 51 echo " * Do not edit!" ; \
47 echo " */" ; \ 52 echo " */" ; \
48 echo "static unsigned int $*_code[] __page_aligned = {" ; \ 53 echo "static unsigned int $*_code[] " \
54 "__attribute__((__aligned__(128))) = {" ; \
49 hexdump -v -e '"0x" 4/1 "%02x" "," "\n"' $< ; \ 55 hexdump -v -e '"0x" 4/1 "%02x" "," "\n"' $< ; \
50 echo "};" ; \ 56 echo "};" ; \
51 ) > $@ 57 ) > $@
diff --git a/arch/powerpc/platforms/cell/spufs/context.c b/arch/powerpc/platforms/cell/spufs/context.c
index 8bb33abfad17..36439c5e9f2d 100644
--- a/arch/powerpc/platforms/cell/spufs/context.c
+++ b/arch/powerpc/platforms/cell/spufs/context.c
@@ -30,7 +30,7 @@
30struct spu_context *alloc_spu_context(void) 30struct spu_context *alloc_spu_context(void)
31{ 31{
32 struct spu_context *ctx; 32 struct spu_context *ctx;
33 ctx = kmalloc(sizeof *ctx, GFP_KERNEL); 33 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
34 if (!ctx) 34 if (!ctx)
35 goto out; 35 goto out;
36 /* Binding to physical processor deferred 36 /* Binding to physical processor deferred
@@ -48,17 +48,7 @@ struct spu_context *alloc_spu_context(void)
48 init_waitqueue_head(&ctx->wbox_wq); 48 init_waitqueue_head(&ctx->wbox_wq);
49 init_waitqueue_head(&ctx->stop_wq); 49 init_waitqueue_head(&ctx->stop_wq);
50 init_waitqueue_head(&ctx->mfc_wq); 50 init_waitqueue_head(&ctx->mfc_wq);
51 ctx->ibox_fasync = NULL;
52 ctx->wbox_fasync = NULL;
53 ctx->mfc_fasync = NULL;
54 ctx->mfc = NULL;
55 ctx->tagwait = 0;
56 ctx->state = SPU_STATE_SAVED; 51 ctx->state = SPU_STATE_SAVED;
57 ctx->local_store = NULL;
58 ctx->cntl = NULL;
59 ctx->signal1 = NULL;
60 ctx->signal2 = NULL;
61 ctx->spu = NULL;
62 ctx->ops = &spu_backing_ops; 52 ctx->ops = &spu_backing_ops;
63 ctx->owner = get_task_mm(current); 53 ctx->owner = get_task_mm(current);
64 goto out; 54 goto out;
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 366185e92667..80c02660e617 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -825,6 +825,55 @@ DEFINE_SIMPLE_ATTRIBUTE(spufs_signal2_type, spufs_signal2_type_get,
825 spufs_signal2_type_set, "%llu"); 825 spufs_signal2_type_set, "%llu");
826 826
827#ifdef CONFIG_SPUFS_MMAP 827#ifdef CONFIG_SPUFS_MMAP
828static struct page *spufs_mss_mmap_nopage(struct vm_area_struct *vma,
829 unsigned long address, int *type)
830{
831 return spufs_ps_nopage(vma, address, type, 0x0000);
832}
833
834static struct vm_operations_struct spufs_mss_mmap_vmops = {
835 .nopage = spufs_mss_mmap_nopage,
836};
837
838/*
839 * mmap support for problem state MFC DMA area [0x0000 - 0x0fff].
840 * Mapping this area requires that the application have CAP_SYS_RAWIO,
841 * as these registers require special care when read/writing.
842 */
843static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma)
844{
845 if (!(vma->vm_flags & VM_SHARED))
846 return -EINVAL;
847
848 if (!capable(CAP_SYS_RAWIO))
849 return -EPERM;
850
851 vma->vm_flags |= VM_RESERVED;
852 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
853 | _PAGE_NO_CACHE);
854
855 vma->vm_ops = &spufs_mss_mmap_vmops;
856 return 0;
857}
858#endif
859
860static int spufs_mss_open(struct inode *inode, struct file *file)
861{
862 struct spufs_inode_info *i = SPUFS_I(inode);
863
864 file->private_data = i->i_ctx;
865 return nonseekable_open(inode, file);
866}
867
868static struct file_operations spufs_mss_fops = {
869 .open = spufs_mss_open,
870#ifdef CONFIG_SPUFS_MMAP
871 .mmap = spufs_mss_mmap,
872#endif
873};
874
875
876#ifdef CONFIG_SPUFS_MMAP
828static struct page *spufs_mfc_mmap_nopage(struct vm_area_struct *vma, 877static struct page *spufs_mfc_mmap_nopage(struct vm_area_struct *vma,
829 unsigned long address, int *type) 878 unsigned long address, int *type)
830{ 879{
@@ -1279,6 +1328,22 @@ static u64 spufs_srr0_get(void *data)
1279DEFINE_SIMPLE_ATTRIBUTE(spufs_srr0_ops, spufs_srr0_get, spufs_srr0_set, 1328DEFINE_SIMPLE_ATTRIBUTE(spufs_srr0_ops, spufs_srr0_get, spufs_srr0_set,
1280 "%llx\n") 1329 "%llx\n")
1281 1330
1331static u64 spufs_id_get(void *data)
1332{
1333 struct spu_context *ctx = data;
1334 u64 num;
1335
1336 spu_acquire(ctx);
1337 if (ctx->state == SPU_STATE_RUNNABLE)
1338 num = ctx->spu->number;
1339 else
1340 num = (unsigned int)-1;
1341 spu_release(ctx);
1342
1343 return num;
1344}
1345DEFINE_SIMPLE_ATTRIBUTE(spufs_id_ops, spufs_id_get, 0, "0x%llx\n")
1346
1282struct tree_descr spufs_dir_contents[] = { 1347struct tree_descr spufs_dir_contents[] = {
1283 { "mem", &spufs_mem_fops, 0666, }, 1348 { "mem", &spufs_mem_fops, 0666, },
1284 { "regs", &spufs_regs_fops, 0666, }, 1349 { "regs", &spufs_regs_fops, 0666, },
@@ -1292,6 +1357,7 @@ struct tree_descr spufs_dir_contents[] = {
1292 { "signal2", &spufs_signal2_fops, 0666, }, 1357 { "signal2", &spufs_signal2_fops, 0666, },
1293 { "signal1_type", &spufs_signal1_type, 0666, }, 1358 { "signal1_type", &spufs_signal1_type, 0666, },
1294 { "signal2_type", &spufs_signal2_type, 0666, }, 1359 { "signal2_type", &spufs_signal2_type, 0666, },
1360 { "mss", &spufs_mss_fops, 0666, },
1295 { "mfc", &spufs_mfc_fops, 0666, }, 1361 { "mfc", &spufs_mfc_fops, 0666, },
1296 { "cntl", &spufs_cntl_fops, 0666, }, 1362 { "cntl", &spufs_cntl_fops, 0666, },
1297 { "npc", &spufs_npc_ops, 0666, }, 1363 { "npc", &spufs_npc_ops, 0666, },
@@ -1301,5 +1367,6 @@ struct tree_descr spufs_dir_contents[] = {
1301 { "spu_tag_mask", &spufs_spu_tag_mask_ops, 0666, }, 1367 { "spu_tag_mask", &spufs_spu_tag_mask_ops, 0666, },
1302 { "event_mask", &spufs_event_mask_ops, 0666, }, 1368 { "event_mask", &spufs_event_mask_ops, 0666, },
1303 { "srr0", &spufs_srr0_ops, 0666, }, 1369 { "srr0", &spufs_srr0_ops, 0666, },
1370 { "phys-id", &spufs_id_ops, 0666, },
1304 {}, 1371 {},
1305}; 1372};
diff --git a/arch/powerpc/platforms/cell/spufs/hw_ops.c b/arch/powerpc/platforms/cell/spufs/hw_ops.c
index a13a8b5a014d..ede2cac46b6d 100644
--- a/arch/powerpc/platforms/cell/spufs/hw_ops.c
+++ b/arch/powerpc/platforms/cell/spufs/hw_ops.c
@@ -32,6 +32,7 @@
32 32
33#include <asm/io.h> 33#include <asm/io.h>
34#include <asm/spu.h> 34#include <asm/spu.h>
35#include <asm/spu_priv1.h>
35#include <asm/spu_csa.h> 36#include <asm/spu_csa.h>
36#include <asm/mmu_context.h> 37#include <asm/mmu_context.h>
37#include "spufs.h" 38#include "spufs.h"
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index d9554199afa7..1987697b23a0 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -157,20 +157,12 @@ static void spufs_prune_dir(struct dentry *dir)
157 mutex_unlock(&dir->d_inode->i_mutex); 157 mutex_unlock(&dir->d_inode->i_mutex);
158} 158}
159 159
160/* Caller must hold root->i_mutex */
160static int spufs_rmdir(struct inode *root, struct dentry *dir_dentry) 161static int spufs_rmdir(struct inode *root, struct dentry *dir_dentry)
161{ 162{
162 struct spu_context *ctx;
163
164 /* remove all entries */ 163 /* remove all entries */
165 mutex_lock(&root->i_mutex);
166 spufs_prune_dir(dir_dentry); 164 spufs_prune_dir(dir_dentry);
167 mutex_unlock(&root->i_mutex);
168
169 /* We have to give up the mm_struct */
170 ctx = SPUFS_I(dir_dentry->d_inode)->i_ctx;
171 spu_forget(ctx);
172 165
173 /* XXX Do we need to hold i_mutex here ? */
174 return simple_rmdir(root, dir_dentry); 166 return simple_rmdir(root, dir_dentry);
175} 167}
176 168
@@ -199,16 +191,23 @@ out:
199 191
200static int spufs_dir_close(struct inode *inode, struct file *file) 192static int spufs_dir_close(struct inode *inode, struct file *file)
201{ 193{
194 struct spu_context *ctx;
202 struct inode *dir; 195 struct inode *dir;
203 struct dentry *dentry; 196 struct dentry *dentry;
204 int ret; 197 int ret;
205 198
206 dentry = file->f_dentry; 199 dentry = file->f_dentry;
207 dir = dentry->d_parent->d_inode; 200 dir = dentry->d_parent->d_inode;
201 ctx = SPUFS_I(dentry->d_inode)->i_ctx;
208 202
203 mutex_lock(&dir->i_mutex);
209 ret = spufs_rmdir(dir, dentry); 204 ret = spufs_rmdir(dir, dentry);
205 mutex_unlock(&dir->i_mutex);
210 WARN_ON(ret); 206 WARN_ON(ret);
211 207
208 /* We have to give up the mm_struct */
209 spu_forget(ctx);
210
212 return dcache_dir_close(inode, file); 211 return dcache_dir_close(inode, file);
213} 212}
214 213
@@ -305,6 +304,10 @@ long spufs_create_thread(struct nameidata *nd,
305 nd->dentry != nd->dentry->d_sb->s_root) 304 nd->dentry != nd->dentry->d_sb->s_root)
306 goto out; 305 goto out;
307 306
307 /* all flags are reserved */
308 if (flags)
309 goto out;
310
308 dentry = lookup_create(nd, 1); 311 dentry = lookup_create(nd, 1);
309 ret = PTR_ERR(dentry); 312 ret = PTR_ERR(dentry);
310 if (IS_ERR(dentry)) 313 if (IS_ERR(dentry))
@@ -324,8 +327,13 @@ long spufs_create_thread(struct nameidata *nd,
324 * in error path of *_open(). 327 * in error path of *_open().
325 */ 328 */
326 ret = spufs_context_open(dget(dentry), mntget(nd->mnt)); 329 ret = spufs_context_open(dget(dentry), mntget(nd->mnt));
327 if (ret < 0) 330 if (ret < 0) {
328 spufs_rmdir(nd->dentry->d_inode, dentry); 331 WARN_ON(spufs_rmdir(nd->dentry->d_inode, dentry));
332 mutex_unlock(&nd->dentry->d_inode->i_mutex);
333 spu_forget(SPUFS_I(dentry->d_inode)->i_ctx);
334 dput(dentry);
335 goto out;
336 }
329 337
330out_dput: 338out_dput:
331 dput(dentry); 339 dput(dentry);
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index bf652cd77000..3dcc5d8d66b9 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -43,6 +43,7 @@
43#include <asm/mmu_context.h> 43#include <asm/mmu_context.h>
44#include <asm/spu.h> 44#include <asm/spu.h>
45#include <asm/spu_csa.h> 45#include <asm/spu_csa.h>
46#include <asm/spu_priv1.h>
46#include "spufs.h" 47#include "spufs.h"
47 48
48#define SPU_MIN_TIMESLICE (100 * HZ / 1000) 49#define SPU_MIN_TIMESLICE (100 * HZ / 1000)
@@ -363,7 +364,7 @@ int spu_activate(struct spu_context *ctx, u64 flags)
363 * We're likely to wait for interrupts on the same 364 * We're likely to wait for interrupts on the same
364 * CPU that we are now on, so send them here. 365 * CPU that we are now on, so send them here.
365 */ 366 */
366 spu_irq_setaffinity(spu, raw_smp_processor_id()); 367 spu_cpu_affinity_set(spu, raw_smp_processor_id());
367 put_active_spu(spu); 368 put_active_spu(spu);
368 return 0; 369 return 0;
369} 370}
diff --git a/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped b/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
index 1b2355ff7036..15183d209b58 100644
--- a/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
+++ b/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
@@ -3,229 +3,901 @@
3 * Hex-dump auto generated from spu_restore.c. 3 * Hex-dump auto generated from spu_restore.c.
4 * Do not edit! 4 * Do not edit!
5 */ 5 */
6static unsigned int spu_restore_code[] __page_aligned = { 6static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
70x40800000, 0x409ff801, 0x24000080, 0x24fd8081, 70x40800000,
80x1cd80081, 0x33001180, 0x42030003, 0x33800284, 80x409ff801,
90x1c010204, 0x40200000, 0x40200000, 0x40200000, 90x24000080,
100x34000190, 0x34004191, 0x34008192, 0x3400c193, 100x24fd8081,
110x141fc205, 0x23fffd84, 0x1c100183, 0x217ffa85, 110x1cd80081,
120x3080a000, 0x3080a201, 0x3080a402, 0x3080a603, 120x33001180,
130x3080a804, 0x3080aa05, 0x3080ac06, 0x3080ae07, 130x42030003,
140x3080b008, 0x3080b209, 0x3080b40a, 0x3080b60b, 140x33800284,
150x3080b80c, 0x3080ba0d, 0x3080bc0e, 0x3080be0f, 150x1c010204,
160x00003ffc, 0x00000000, 0x00000000, 0x00000000, 160x40200000,
170x01a00182, 0x3ec00083, 0xb0a14103, 0x01a00204, 170x40200000,
180x3ec10082, 0x4202800e, 0x04000703, 0xb0a14202, 180x40200000,
190x21a00803, 0x3fbf028d, 0x3f20068d, 0x3fbe0682, 190x34000190,
200x3fe30102, 0x21a00882, 0x3f82028f, 0x3fe3078f, 200x34004191,
210x3fbf0784, 0x3f200204, 0x3fbe0204, 0x3fe30204, 210x34008192,
220x04000203, 0x21a00903, 0x40848002, 0x21a00982, 220x3400c193,
230x40800003, 0x21a00a03, 0x40802002, 0x21a00a82, 230x141fc205,
240x21a00083, 0x40800082, 0x21a00b02, 0x10002818, 240x23fffd84,
250x40a80002, 0x32800007, 0x4207000c, 0x18008208, 250x1c100183,
260x40a0000b, 0x4080020a, 0x40800709, 0x00200000, 260x217ffa85,
270x42070002, 0x3ac30384, 0x1cffc489, 0x00200000, 270x3080a000,
280x18008383, 0x38830382, 0x4cffc486, 0x3ac28185, 280x3080a201,
290xb0408584, 0x28830382, 0x1c020387, 0x38828182, 290x3080a402,
300xb0408405, 0x1802c408, 0x28828182, 0x217ff886, 300x3080a603,
310x04000583, 0x21a00803, 0x3fbe0682, 0x3fe30102, 310x3080a804,
320x04000106, 0x21a00886, 0x04000603, 0x21a00903, 320x3080aa05,
330x40803c02, 0x21a00982, 0x40800003, 0x04000184, 330x3080ac06,
340x21a00a04, 0x40802202, 0x21a00a82, 0x42028005, 340x3080ae07,
350x34208702, 0x21002282, 0x21a00804, 0x21a00886, 350x3080b008,
360x3fbf0782, 0x3f200102, 0x3fbe0102, 0x3fe30102, 360x3080b209,
370x21a00902, 0x40804003, 0x21a00983, 0x21a00a04, 370x3080b40a,
380x40805a02, 0x21a00a82, 0x40800083, 0x21a00b83, 380x3080b60b,
390x01a00c02, 0x01a00d83, 0x3420c282, 0x21a00e02, 390x3080b80c,
400x34210283, 0x21a00f03, 0x34200284, 0x77400200, 400x3080ba0d,
410x3421c282, 0x21a00702, 0x34218283, 0x21a00083, 410x3080bc0e,
420x34214282, 0x21a00b02, 0x4200480c, 0x00200000, 420x3080be0f,
430x1c010286, 0x34220284, 0x34220302, 0x0f608203, 430x00003ffc,
440x5c024204, 0x3b81810b, 0x42013c02, 0x00200000, 440x00000000,
450x18008185, 0x38808183, 0x3b814182, 0x21004e84, 450x00000000,
460x4020007f, 0x35000100, 0x000004e0, 0x000002a0, 460x00000000,
470x000002e8, 0x00000428, 0x00000360, 0x000002e8, 470x01a00182,
480x000004a0, 0x00000468, 0x000003c8, 0x00000360, 480x3ec00083,
490x409ffe02, 0x30801203, 0x40800204, 0x3ec40085, 490xb0a14103,
500x10009c09, 0x3ac10606, 0xb060c105, 0x4020007f, 500x01a00204,
510x4020007f, 0x20801203, 0x38810602, 0xb0408586, 510x3ec10082,
520x28810602, 0x32004180, 0x34204702, 0x21a00382, 520x4202800e,
530x4020007f, 0x327fdc80, 0x409ffe02, 0x30801203, 530x04000703,
540x40800204, 0x3ec40087, 0x40800405, 0x00200000, 540xb0a14202,
550x40800606, 0x3ac10608, 0x3ac14609, 0x3ac1860a, 550x21a00803,
560xb060c107, 0x20801203, 0x41004003, 0x38810602, 560x3fbf028d,
570x4020007f, 0xb0408188, 0x4020007f, 0x28810602, 570x3f20068d,
580x41201002, 0x38814603, 0x10009c09, 0xb060c109, 580x3fbe0682,
590x4020007f, 0x28814603, 0x41193f83, 0x38818602, 590x3fe30102,
600x60ffc003, 0xb040818a, 0x28818602, 0x32003080, 600x21a00882,
610x409ffe02, 0x30801203, 0x40800204, 0x3ec40087, 610x3f82028f,
620x41201008, 0x10009c14, 0x40800405, 0x3ac10609, 620x3fe3078f,
630x40800606, 0x3ac1460a, 0xb060c107, 0x3ac1860b, 630x3fbf0784,
640x20801203, 0x38810602, 0xb0408409, 0x28810602, 640x3f200204,
650x38814603, 0xb060c40a, 0x4020007f, 0x28814603, 650x3fbe0204,
660x41193f83, 0x38818602, 0x60ffc003, 0xb040818b, 660x3fe30204,
670x28818602, 0x32002380, 0x409ffe02, 0x30801204, 670x04000203,
680x40800205, 0x3ec40083, 0x40800406, 0x3ac14607, 680x21a00903,
690x3ac18608, 0xb0810103, 0x41004002, 0x20801204, 690x40848002,
700x4020007f, 0x38814603, 0x10009c0b, 0xb060c107, 700x21a00982,
710x4020007f, 0x4020007f, 0x28814603, 0x38818602, 710x40800003,
720x4020007f, 0x4020007f, 0xb0408588, 0x28818602, 720x21a00a03,
730x4020007f, 0x32001780, 0x409ffe02, 0x1000640e, 730x40802002,
740x40800204, 0x30801203, 0x40800405, 0x3ec40087, 740x21a00a82,
750x40800606, 0x3ac10608, 0x3ac14609, 0x3ac1860a, 750x21a00083,
760xb060c107, 0x20801203, 0x413d8003, 0x38810602, 760x40800082,
770x4020007f, 0x327fd780, 0x409ffe02, 0x10007f0c, 770x21a00b02,
780x40800205, 0x30801204, 0x40800406, 0x3ec40083, 780x10002818,
790x3ac14607, 0x3ac18608, 0xb0810103, 0x413d8002, 790x42a00002,
800x20801204, 0x38814603, 0x4020007f, 0x327feb80, 800x32800007,
810x409ffe02, 0x30801203, 0x40800204, 0x3ec40087, 810x4207000c,
820x40800405, 0x1000650a, 0x40800606, 0x3ac10608, 820x18008208,
830x3ac14609, 0x3ac1860a, 0xb060c107, 0x20801203, 830x40a0000b,
840x38810602, 0xb0408588, 0x4020007f, 0x327fc980, 840x4080020a,
850x00400000, 0x40800003, 0x4020007f, 0x35000000, 850x40800709,
860x00000000, 0x00000000, 0x00000000, 0x00000000, 860x00200000,
870x00000000, 0x00000000, 0x00000000, 0x00000000, 870x42070002,
880x00000000, 0x00000000, 0x00000000, 0x00000000, 880x3ac30384,
890x00000000, 0x00000000, 0x00000000, 0x00000000, 890x1cffc489,
900x00000000, 0x00000000, 0x00000000, 0x00000000, 900x00200000,
910x00000000, 0x00000000, 0x00000000, 0x00000000, 910x18008383,
920x00000000, 0x00000000, 0x00000000, 0x00000000, 920x38830382,
930x00000000, 0x00000000, 0x00000000, 0x00000000, 930x4cffc486,
940x00000000, 0x00000000, 0x00000000, 0x00000000, 940x3ac28185,
950x00000000, 0x00000000, 0x00000000, 0x00000000, 950xb0408584,
960x00000000, 0x00000000, 0x00000000, 0x00000000, 960x28830382,
970x00000000, 0x00000000, 0x00000000, 0x00000000, 970x1c020387,
980x00000000, 0x00000000, 0x00000000, 0x00000000, 980x38828182,
990x00000000, 0x00000000, 0x00000000, 0x00000000, 990xb0408405,
1000x00000000, 0x00000000, 0x00000000, 0x00000000, 1000x1802c408,
1010x00000000, 0x00000000, 0x00000000, 0x00000000, 1010x28828182,
1020x00000000, 0x00000000, 0x00000000, 0x00000000, 1020x217ff886,
1030x00000000, 0x00000000, 0x00000000, 0x00000000, 1030x04000583,
1040x00000000, 0x00000000, 0x00000000, 0x00000000, 1040x21a00803,
1050x00000000, 0x00000000, 0x00000000, 0x00000000, 1050x3fbe0682,
1060x00000000, 0x00000000, 0x00000000, 0x00000000, 1060x3fe30102,
1070x00000000, 0x00000000, 0x00000000, 0x00000000, 1070x04000106,
1080x00000000, 0x00000000, 0x00000000, 0x00000000, 1080x21a00886,
1090x00000000, 0x00000000, 0x00000000, 0x00000000, 1090x04000603,
1100x00000000, 0x00000000, 0x00000000, 0x00000000, 1100x21a00903,
1110x00000000, 0x00000000, 0x00000000, 0x00000000, 1110x40803c02,
1120x00000000, 0x00000000, 0x00000000, 0x00000000, 1120x21a00982,
1130x00000000, 0x00000000, 0x00000000, 0x00000000, 1130x40800003,
1140x00000000, 0x00000000, 0x00000000, 0x00000000, 1140x04000184,
1150x00000000, 0x00000000, 0x00000000, 0x00000000, 1150x21a00a04,
1160x00000000, 0x00000000, 0x00000000, 0x00000000, 1160x40802202,
1170x00000000, 0x00000000, 0x00000000, 0x00000000, 1170x21a00a82,
1180x00000000, 0x00000000, 0x00000000, 0x00000000, 1180x42028005,
1190x00000000, 0x00000000, 0x00000000, 0x00000000, 1190x34208702,
1200x00000000, 0x00000000, 0x00000000, 0x00000000, 1200x21002282,
1210x00000000, 0x00000000, 0x00000000, 0x00000000, 1210x21a00804,
1220x00000000, 0x00000000, 0x00000000, 0x00000000, 1220x21a00886,
1230x00000000, 0x00000000, 0x00000000, 0x00000000, 1230x3fbf0782,
1240x00000000, 0x00000000, 0x00000000, 0x00000000, 1240x3f200102,
1250x00000000, 0x00000000, 0x00000000, 0x00000000, 1250x3fbe0102,
1260x00000000, 0x00000000, 0x00000000, 0x00000000, 1260x3fe30102,
1270x00000000, 0x00000000, 0x00000000, 0x00000000, 1270x21a00902,
1280x00000000, 0x00000000, 0x00000000, 0x00000000, 1280x40804003,
1290x00000000, 0x00000000, 0x00000000, 0x00000000, 1290x21a00983,
1300x00000000, 0x00000000, 0x00000000, 0x00000000, 1300x21a00a04,
1310x00000000, 0x00000000, 0x00000000, 0x00000000, 1310x40805a02,
1320x00000000, 0x00000000, 0x00000000, 0x00000000, 1320x21a00a82,
1330x00000000, 0x00000000, 0x00000000, 0x00000000, 1330x40800083,
1340x00000000, 0x00000000, 0x00000000, 0x00000000, 1340x21a00b83,
1350x00000000, 0x00000000, 0x00000000, 0x00000000, 1350x01a00c02,
1360x00000000, 0x00000000, 0x00000000, 0x00000000, 1360x01a00d83,
1370x00000000, 0x00000000, 0x00000000, 0x00000000, 1370x3420c282,
1380x00000000, 0x00000000, 0x00000000, 0x00000000, 1380x21a00e02,
1390x00000000, 0x00000000, 0x00000000, 0x00000000, 1390x34210283,
1400x00000000, 0x00000000, 0x00000000, 0x00000000, 1400x21a00f03,
1410x00000000, 0x00000000, 0x00000000, 0x00000000, 1410x34200284,
1420x00000000, 0x00000000, 0x00000000, 0x00000000, 1420x77400200,
1430x00000000, 0x00000000, 0x00000000, 0x00000000, 1430x3421c282,
1440x00000000, 0x00000000, 0x00000000, 0x00000000, 1440x21a00702,
1450x00000000, 0x00000000, 0x00000000, 0x00000000, 1450x34218283,
1460x00000000, 0x00000000, 0x00000000, 0x00000000, 1460x21a00083,
1470x00000000, 0x00000000, 0x00000000, 0x00000000, 1470x34214282,
1480x00000000, 0x00000000, 0x00000000, 0x00000000, 1480x21a00b02,
1490x00000000, 0x00000000, 0x00000000, 0x00000000, 1490x4200480c,
1500x00000000, 0x00000000, 0x00000000, 0x00000000, 1500x00200000,
1510x00000000, 0x00000000, 0x00000000, 0x00000000, 1510x1c010286,
1520x00000000, 0x00000000, 0x00000000, 0x00000000, 1520x34220284,
1530x00000000, 0x00000000, 0x00000000, 0x00000000, 1530x34220302,
1540x00000000, 0x00000000, 0x00000000, 0x00000000, 1540x0f608203,
1550x00000000, 0x00000000, 0x00000000, 0x00000000, 1550x5c024204,
1560x00000000, 0x00000000, 0x00000000, 0x00000000, 1560x3b81810b,
1570x00000000, 0x00000000, 0x00000000, 0x00000000, 1570x42013c02,
1580x00000000, 0x00000000, 0x00000000, 0x00000000, 1580x00200000,
1590x00000000, 0x00000000, 0x00000000, 0x00000000, 1590x18008185,
1600x00000000, 0x00000000, 0x00000000, 0x00000000, 1600x38808183,
1610x00000000, 0x00000000, 0x00000000, 0x00000000, 1610x3b814182,
1620x00000000, 0x00000000, 0x00000000, 0x00000000, 1620x21004e84,
1630x00000000, 0x00000000, 0x00000000, 0x00000000, 1630x4020007f,
1640x00000000, 0x00000000, 0x00000000, 0x00000000, 1640x35000100,
1650x00000000, 0x00000000, 0x00000000, 0x00000000, 1650x000004e0,
1660x00000000, 0x00000000, 0x00000000, 0x00000000, 1660x000002a0,
1670x00000000, 0x00000000, 0x00000000, 0x00000000, 1670x000002e8,
1680x00000000, 0x00000000, 0x00000000, 0x00000000, 1680x00000428,
1690x00000000, 0x00000000, 0x00000000, 0x00000000, 1690x00000360,
1700x00000000, 0x00000000, 0x00000000, 0x00000000, 1700x000002e8,
1710x00000000, 0x00000000, 0x00000000, 0x00000000, 1710x000004a0,
1720x00000000, 0x00000000, 0x00000000, 0x00000000, 1720x00000468,
1730x00000000, 0x00000000, 0x00000000, 0x00000000, 1730x000003c8,
1740x00000000, 0x00000000, 0x00000000, 0x00000000, 1740x00000360,
1750x00000000, 0x00000000, 0x00000000, 0x00000000, 1750x409ffe02,
1760x00000000, 0x00000000, 0x00000000, 0x00000000, 1760x30801203,
1770x00000000, 0x00000000, 0x00000000, 0x00000000, 1770x40800204,
1780x00000000, 0x00000000, 0x00000000, 0x00000000, 1780x3ec40085,
1790x00000000, 0x00000000, 0x00000000, 0x00000000, 1790x10009c09,
1800x00000000, 0x00000000, 0x00000000, 0x00000000, 1800x3ac10606,
1810x00000000, 0x00000000, 0x00000000, 0x00000000, 1810xb060c105,
1820x00000000, 0x00000000, 0x00000000, 0x00000000, 1820x4020007f,
1830x00000000, 0x00000000, 0x00000000, 0x00000000, 1830x4020007f,
1840x00000000, 0x00000000, 0x00000000, 0x00000000, 1840x20801203,
1850x00000000, 0x00000000, 0x00000000, 0x00000000, 1850x38810602,
1860x00000000, 0x00000000, 0x00000000, 0x00000000, 1860xb0408586,
1870x00000000, 0x00000000, 0x00000000, 0x00000000, 1870x28810602,
1880x00000000, 0x00000000, 0x00000000, 0x00000000, 1880x32004180,
1890x00000000, 0x00000000, 0x00000000, 0x00000000, 1890x34204702,
1900x00000000, 0x00000000, 0x00000000, 0x00000000, 1900x21a00382,
1910x00000000, 0x00000000, 0x00000000, 0x00000000, 1910x4020007f,
1920x00000000, 0x00000000, 0x00000000, 0x00000000, 1920x327fdc80,
1930x00000000, 0x00000000, 0x00000000, 0x00000000, 1930x409ffe02,
1940x00000000, 0x00000000, 0x00000000, 0x00000000, 1940x30801203,
1950x00000000, 0x00000000, 0x00000000, 0x00000000, 1950x40800204,
1960x00000000, 0x00000000, 0x00000000, 0x00000000, 1960x3ec40087,
1970x00000000, 0x00000000, 0x00000000, 0x00000000, 1970x40800405,
1980x00000000, 0x00000000, 0x00000000, 0x00000000, 1980x00200000,
1990x00000000, 0x00000000, 0x00000000, 0x00000000, 1990x40800606,
2000x00000000, 0x00000000, 0x00000000, 0x00000000, 2000x3ac10608,
2010x00000000, 0x00000000, 0x00000000, 0x00000000, 2010x3ac14609,
2020x00000000, 0x00000000, 0x00000000, 0x00000000, 2020x3ac1860a,
2030x00000000, 0x00000000, 0x00000000, 0x00000000, 2030xb060c107,
2040x00000000, 0x00000000, 0x00000000, 0x00000000, 2040x20801203,
2050x00000000, 0x00000000, 0x00000000, 0x00000000, 2050x41004003,
2060x00000000, 0x00000000, 0x00000000, 0x00000000, 2060x38810602,
2070x00000000, 0x00000000, 0x00000000, 0x00000000, 2070x4020007f,
2080x00000000, 0x00000000, 0x00000000, 0x00000000, 2080xb0408188,
2090x00000000, 0x00000000, 0x00000000, 0x00000000, 2090x4020007f,
2100x00000000, 0x00000000, 0x00000000, 0x00000000, 2100x28810602,
2110x00000000, 0x00000000, 0x00000000, 0x00000000, 2110x41201002,
2120x00000000, 0x00000000, 0x00000000, 0x00000000, 2120x38814603,
2130x00000000, 0x00000000, 0x00000000, 0x00000000, 2130x10009c09,
2140x00000000, 0x00000000, 0x00000000, 0x00000000, 2140xb060c109,
2150x00000000, 0x00000000, 0x00000000, 0x00000000, 2150x4020007f,
2160x00000000, 0x00000000, 0x00000000, 0x00000000, 2160x28814603,
2170x00000000, 0x00000000, 0x00000000, 0x00000000, 2170x41193f83,
2180x00000000, 0x00000000, 0x00000000, 0x00000000, 2180x38818602,
2190x00000000, 0x00000000, 0x00000000, 0x00000000, 2190x60ffc003,
2200x00000000, 0x00000000, 0x00000000, 0x00000000, 2200xb040818a,
2210x00000000, 0x00000000, 0x00000000, 0x00000000, 2210x28818602,
2220x00000000, 0x00000000, 0x00000000, 0x00000000, 2220x32003080,
2230x00000000, 0x00000000, 0x00000000, 0x00000000, 2230x409ffe02,
2240x00000000, 0x00000000, 0x00000000, 0x00000000, 2240x30801203,
2250x00000000, 0x00000000, 0x00000000, 0x00000000, 2250x40800204,
2260x00000000, 0x00000000, 0x00000000, 0x00000000, 2260x3ec40087,
2270x00000000, 0x00000000, 0x00000000, 0x00000000, 2270x41201008,
2280x00000000, 0x00000000, 0x00000000, 0x00000000, 2280x10009c14,
2290x00000000, 0x00000000, 0x00000000, 0x00000000, 2290x40800405,
2300x00000000, 0x00000000, 0x00000000, 0x00000000, 2300x3ac10609,
2310x40800606,
2320x3ac1460a,
2330xb060c107,
2340x3ac1860b,
2350x20801203,
2360x38810602,
2370xb0408409,
2380x28810602,
2390x38814603,
2400xb060c40a,
2410x4020007f,
2420x28814603,
2430x41193f83,
2440x38818602,
2450x60ffc003,
2460xb040818b,
2470x28818602,
2480x32002380,
2490x409ffe02,
2500x30801204,
2510x40800205,
2520x3ec40083,
2530x40800406,
2540x3ac14607,
2550x3ac18608,
2560xb0810103,
2570x41004002,
2580x20801204,
2590x4020007f,
2600x38814603,
2610x10009c0b,
2620xb060c107,
2630x4020007f,
2640x4020007f,
2650x28814603,
2660x38818602,
2670x4020007f,
2680x4020007f,
2690xb0408588,
2700x28818602,
2710x4020007f,
2720x32001780,
2730x409ffe02,
2740x1000640e,
2750x40800204,
2760x30801203,
2770x40800405,
2780x3ec40087,
2790x40800606,
2800x3ac10608,
2810x3ac14609,
2820x3ac1860a,
2830xb060c107,
2840x20801203,
2850x413d8003,
2860x38810602,
2870x4020007f,
2880x327fd780,
2890x409ffe02,
2900x10007f0c,
2910x40800205,
2920x30801204,
2930x40800406,
2940x3ec40083,
2950x3ac14607,
2960x3ac18608,
2970xb0810103,
2980x413d8002,
2990x20801204,
3000x38814603,
3010x4020007f,
3020x327feb80,
3030x409ffe02,
3040x30801203,
3050x40800204,
3060x3ec40087,
3070x40800405,
3080x1000650a,
3090x40800606,
3100x3ac10608,
3110x3ac14609,
3120x3ac1860a,
3130xb060c107,
3140x20801203,
3150x38810602,
3160xb0408588,
3170x4020007f,
3180x327fc980,
3190x00400000,
3200x40800003,
3210x4020007f,
3220x35000000,
3230x00000000,
3240x00000000,
3250x00000000,
3260x00000000,
3270x00000000,
3280x00000000,
3290x00000000,
3300x00000000,
3310x00000000,
3320x00000000,
3330x00000000,
3340x00000000,
3350x00000000,
3360x00000000,
3370x00000000,
3380x00000000,
3390x00000000,
3400x00000000,
3410x00000000,
3420x00000000,
3430x00000000,
3440x00000000,
3450x00000000,
3460x00000000,
3470x00000000,
3480x00000000,
3490x00000000,
3500x00000000,
3510x00000000,
3520x00000000,
3530x00000000,
3540x00000000,
3550x00000000,
3560x00000000,
3570x00000000,
3580x00000000,
3590x00000000,
3600x00000000,
3610x00000000,
3620x00000000,
3630x00000000,
3640x00000000,
3650x00000000,
3660x00000000,
3670x00000000,
3680x00000000,
3690x00000000,
3700x00000000,
3710x00000000,
3720x00000000,
3730x00000000,
3740x00000000,
3750x00000000,
3760x00000000,
3770x00000000,
3780x00000000,
3790x00000000,
3800x00000000,
3810x00000000,
3820x00000000,
3830x00000000,
3840x00000000,
3850x00000000,
3860x00000000,
3870x00000000,
3880x00000000,
3890x00000000,
3900x00000000,
3910x00000000,
3920x00000000,
3930x00000000,
3940x00000000,
3950x00000000,
3960x00000000,
3970x00000000,
3980x00000000,
3990x00000000,
4000x00000000,
4010x00000000,
4020x00000000,
4030x00000000,
4040x00000000,
4050x00000000,
4060x00000000,
4070x00000000,
4080x00000000,
4090x00000000,
4100x00000000,
4110x00000000,
4120x00000000,
4130x00000000,
4140x00000000,
4150x00000000,
4160x00000000,
4170x00000000,
4180x00000000,
4190x00000000,
4200x00000000,
4210x00000000,
4220x00000000,
4230x00000000,
4240x00000000,
4250x00000000,
4260x00000000,
4270x00000000,
4280x00000000,
4290x00000000,
4300x00000000,
4310x00000000,
4320x00000000,
4330x00000000,
4340x00000000,
4350x00000000,
4360x00000000,
4370x00000000,
4380x00000000,
4390x00000000,
4400x00000000,
4410x00000000,
4420x00000000,
4430x00000000,
4440x00000000,
4450x00000000,
4460x00000000,
4470x00000000,
4480x00000000,
4490x00000000,
4500x00000000,
4510x00000000,
4520x00000000,
4530x00000000,
4540x00000000,
4550x00000000,
4560x00000000,
4570x00000000,
4580x00000000,
4590x00000000,
4600x00000000,
4610x00000000,
4620x00000000,
4630x00000000,
4640x00000000,
4650x00000000,
4660x00000000,
4670x00000000,
4680x00000000,
4690x00000000,
4700x00000000,
4710x00000000,
4720x00000000,
4730x00000000,
4740x00000000,
4750x00000000,
4760x00000000,
4770x00000000,
4780x00000000,
4790x00000000,
4800x00000000,
4810x00000000,
4820x00000000,
4830x00000000,
4840x00000000,
4850x00000000,
4860x00000000,
4870x00000000,
4880x00000000,
4890x00000000,
4900x00000000,
4910x00000000,
4920x00000000,
4930x00000000,
4940x00000000,
4950x00000000,
4960x00000000,
4970x00000000,
4980x00000000,
4990x00000000,
5000x00000000,
5010x00000000,
5020x00000000,
5030x00000000,
5040x00000000,
5050x00000000,
5060x00000000,
5070x00000000,
5080x00000000,
5090x00000000,
5100x00000000,
5110x00000000,
5120x00000000,
5130x00000000,
5140x00000000,
5150x00000000,
5160x00000000,
5170x00000000,
5180x00000000,
5190x00000000,
5200x00000000,
5210x00000000,
5220x00000000,
5230x00000000,
5240x00000000,
5250x00000000,
5260x00000000,
5270x00000000,
5280x00000000,
5290x00000000,
5300x00000000,
5310x00000000,
5320x00000000,
5330x00000000,
5340x00000000,
5350x00000000,
5360x00000000,
5370x00000000,
5380x00000000,
5390x00000000,
5400x00000000,
5410x00000000,
5420x00000000,
5430x00000000,
5440x00000000,
5450x00000000,
5460x00000000,
5470x00000000,
5480x00000000,
5490x00000000,
5500x00000000,
5510x00000000,
5520x00000000,
5530x00000000,
5540x00000000,
5550x00000000,
5560x00000000,
5570x00000000,
5580x00000000,
5590x00000000,
5600x00000000,
5610x00000000,
5620x00000000,
5630x00000000,
5640x00000000,
5650x00000000,
5660x00000000,
5670x00000000,
5680x00000000,
5690x00000000,
5700x00000000,
5710x00000000,
5720x00000000,
5730x00000000,
5740x00000000,
5750x00000000,
5760x00000000,
5770x00000000,
5780x00000000,
5790x00000000,
5800x00000000,
5810x00000000,
5820x00000000,
5830x00000000,
5840x00000000,
5850x00000000,
5860x00000000,
5870x00000000,
5880x00000000,
5890x00000000,
5900x00000000,
5910x00000000,
5920x00000000,
5930x00000000,
5940x00000000,
5950x00000000,
5960x00000000,
5970x00000000,
5980x00000000,
5990x00000000,
6000x00000000,
6010x00000000,
6020x00000000,
6030x00000000,
6040x00000000,
6050x00000000,
6060x00000000,
6070x00000000,
6080x00000000,
6090x00000000,
6100x00000000,
6110x00000000,
6120x00000000,
6130x00000000,
6140x00000000,
6150x00000000,
6160x00000000,
6170x00000000,
6180x00000000,
6190x00000000,
6200x00000000,
6210x00000000,
6220x00000000,
6230x00000000,
6240x00000000,
6250x00000000,
6260x00000000,
6270x00000000,
6280x00000000,
6290x00000000,
6300x00000000,
6310x00000000,
6320x00000000,
6330x00000000,
6340x00000000,
6350x00000000,
6360x00000000,
6370x00000000,
6380x00000000,
6390x00000000,
6400x00000000,
6410x00000000,
6420x00000000,
6430x00000000,
6440x00000000,
6450x00000000,
6460x00000000,
6470x00000000,
6480x00000000,
6490x00000000,
6500x00000000,
6510x00000000,
6520x00000000,
6530x00000000,
6540x00000000,
6550x00000000,
6560x00000000,
6570x00000000,
6580x00000000,
6590x00000000,
6600x00000000,
6610x00000000,
6620x00000000,
6630x00000000,
6640x00000000,
6650x00000000,
6660x00000000,
6670x00000000,
6680x00000000,
6690x00000000,
6700x00000000,
6710x00000000,
6720x00000000,
6730x00000000,
6740x00000000,
6750x00000000,
6760x00000000,
6770x00000000,
6780x00000000,
6790x00000000,
6800x00000000,
6810x00000000,
6820x00000000,
6830x00000000,
6840x00000000,
6850x00000000,
6860x00000000,
6870x00000000,
6880x00000000,
6890x00000000,
6900x00000000,
6910x00000000,
6920x00000000,
6930x00000000,
6940x00000000,
6950x00000000,
6960x00000000,
6970x00000000,
6980x00000000,
6990x00000000,
7000x00000000,
7010x00000000,
7020x00000000,
7030x00000000,
7040x00000000,
7050x00000000,
7060x00000000,
7070x00000000,
7080x00000000,
7090x00000000,
7100x00000000,
7110x00000000,
7120x00000000,
7130x00000000,
7140x00000000,
7150x00000000,
7160x00000000,
7170x00000000,
7180x00000000,
7190x00000000,
7200x00000000,
7210x00000000,
7220x00000000,
7230x00000000,
7240x00000000,
7250x00000000,
7260x00000000,
7270x00000000,
7280x00000000,
7290x00000000,
7300x00000000,
7310x00000000,
7320x00000000,
7330x00000000,
7340x00000000,
7350x00000000,
7360x00000000,
7370x00000000,
7380x00000000,
7390x00000000,
7400x00000000,
7410x00000000,
7420x00000000,
7430x00000000,
7440x00000000,
7450x00000000,
7460x00000000,
7470x00000000,
7480x00000000,
7490x00000000,
7500x00000000,
7510x00000000,
7520x00000000,
7530x00000000,
7540x00000000,
7550x00000000,
7560x00000000,
7570x00000000,
7580x00000000,
7590x00000000,
7600x00000000,
7610x00000000,
7620x00000000,
7630x00000000,
7640x00000000,
7650x00000000,
7660x00000000,
7670x00000000,
7680x00000000,
7690x00000000,
7700x00000000,
7710x00000000,
7720x00000000,
7730x00000000,
7740x00000000,
7750x00000000,
7760x00000000,
7770x00000000,
7780x00000000,
7790x00000000,
7800x00000000,
7810x00000000,
7820x00000000,
7830x00000000,
7840x00000000,
7850x00000000,
7860x00000000,
7870x00000000,
7880x00000000,
7890x00000000,
7900x00000000,
7910x00000000,
7920x00000000,
7930x00000000,
7940x00000000,
7950x00000000,
7960x00000000,
7970x00000000,
7980x00000000,
7990x00000000,
8000x00000000,
8010x00000000,
8020x00000000,
8030x00000000,
8040x00000000,
8050x00000000,
8060x00000000,
8070x00000000,
8080x00000000,
8090x00000000,
8100x00000000,
8110x00000000,
8120x00000000,
8130x00000000,
8140x00000000,
8150x00000000,
8160x00000000,
8170x00000000,
8180x00000000,
8190x00000000,
8200x00000000,
8210x00000000,
8220x00000000,
8230x00000000,
8240x00000000,
8250x00000000,
8260x00000000,
8270x00000000,
8280x00000000,
8290x00000000,
8300x00000000,
8310x00000000,
8320x00000000,
8330x00000000,
8340x00000000,
8350x00000000,
8360x00000000,
8370x00000000,
8380x00000000,
8390x00000000,
8400x00000000,
8410x00000000,
8420x00000000,
8430x00000000,
8440x00000000,
8450x00000000,
8460x00000000,
8470x00000000,
8480x00000000,
8490x00000000,
8500x00000000,
8510x00000000,
8520x00000000,
8530x00000000,
8540x00000000,
8550x00000000,
8560x00000000,
8570x00000000,
8580x00000000,
8590x00000000,
8600x00000000,
8610x00000000,
8620x00000000,
8630x00000000,
8640x00000000,
8650x00000000,
8660x00000000,
8670x00000000,
8680x00000000,
8690x00000000,
8700x00000000,
8710x00000000,
8720x00000000,
8730x00000000,
8740x00000000,
8750x00000000,
8760x00000000,
8770x00000000,
8780x00000000,
8790x00000000,
8800x00000000,
8810x00000000,
8820x00000000,
8830x00000000,
8840x00000000,
8850x00000000,
8860x00000000,
8870x00000000,
8880x00000000,
8890x00000000,
8900x00000000,
8910x00000000,
8920x00000000,
8930x00000000,
8940x00000000,
8950x00000000,
8960x00000000,
8970x00000000,
8980x00000000,
8990x00000000,
9000x00000000,
9010x00000000,
9020x00000000,
231}; 903};
diff --git a/arch/powerpc/platforms/cell/spufs/spu_save_dump.h_shipped b/arch/powerpc/platforms/cell/spufs/spu_save_dump.h_shipped
index 39e54003f1df..b9f81ac8a632 100644
--- a/arch/powerpc/platforms/cell/spufs/spu_save_dump.h_shipped
+++ b/arch/powerpc/platforms/cell/spufs/spu_save_dump.h_shipped
@@ -3,189 +3,741 @@
3 * Hex-dump auto generated from spu_save.c. 3 * Hex-dump auto generated from spu_save.c.
4 * Do not edit! 4 * Do not edit!
5 */ 5 */
6static unsigned int spu_save_code[] __page_aligned = { 6static unsigned int spu_save_code[] __attribute__((__aligned__(128))) = {
70x20805000, 0x20805201, 0x20805402, 0x20805603, 70x20805000,
80x20805804, 0x20805a05, 0x20805c06, 0x20805e07, 80x20805201,
90x20806008, 0x20806209, 0x2080640a, 0x2080660b, 90x20805402,
100x2080680c, 0x20806a0d, 0x20806c0e, 0x20806e0f, 100x20805603,
110x4201c003, 0x33800184, 0x1c010204, 0x40200000, 110x20805804,
120x24000190, 0x24004191, 0x24008192, 0x2400c193, 120x20805a05,
130x141fc205, 0x23fffd84, 0x1c100183, 0x217ffb85, 130x20805c06,
140x40800000, 0x409ff801, 0x24000080, 0x24fd8081, 140x20805e07,
150x1cd80081, 0x33000180, 0x00000000, 0x00000000, 150x20806008,
160x01a00182, 0x3ec00083, 0xb1c38103, 0x01a00204, 160x20806209,
170x3ec10082, 0x4201400d, 0xb1c38202, 0x01a00583, 170x2080640a,
180x34218682, 0x3ed80684, 0xb0408184, 0x24218682, 180x2080660b,
190x01a00603, 0x00200000, 0x34214682, 0x3ed40684, 190x2080680c,
200xb0408184, 0x40800003, 0x24214682, 0x21a00083, 200x20806a0d,
210x40800082, 0x21a00b02, 0x4020007f, 0x1000251e, 210x20806c0e,
220x40a80002, 0x32800008, 0x4205c00c, 0x00200000, 220x20806e0f,
230x40a0000b, 0x3f82070f, 0x4080020a, 0x40800709, 230x4201c003,
240x3fe3078f, 0x3fbf0783, 0x3f200183, 0x3fbe0183, 240x33800184,
250x3fe30187, 0x18008387, 0x4205c002, 0x3ac30404, 250x1c010204,
260x1cffc489, 0x00200000, 0x18008403, 0x38830402, 260x40200000,
270x4cffc486, 0x3ac28185, 0xb0408584, 0x28830402, 270x24000190,
280x1c020408, 0x38828182, 0xb0408385, 0x1802c387, 280x24004191,
290x28828182, 0x217ff886, 0x04000582, 0x32800007, 290x24008192,
300x21a00802, 0x3fbf0705, 0x3f200285, 0x3fbe0285, 300x2400c193,
310x3fe30285, 0x21a00885, 0x04000603, 0x21a00903, 310x141fc205,
320x40803c02, 0x21a00982, 0x04000386, 0x21a00a06, 320x23fffd84,
330x40801202, 0x21a00a82, 0x73000003, 0x24200683, 330x1c100183,
340x01a00404, 0x00200000, 0x34204682, 0x3ec40683, 340x217ffb85,
350xb0408203, 0x24204682, 0x01a00783, 0x00200000, 350x40800000,
360x3421c682, 0x3edc0684, 0xb0408184, 0x2421c682, 360x409ff801,
370x21a00806, 0x21a00885, 0x3fbf0784, 0x3f200204, 370x24000080,
380x3fbe0204, 0x3fe30204, 0x21a00904, 0x40804002, 380x24fd8081,
390x21a00982, 0x21a00a06, 0x40805a02, 0x21a00a82, 390x1cd80081,
400x04000683, 0x21a00803, 0x21a00885, 0x21a00904, 400x33000180,
410x40848002, 0x21a00982, 0x21a00a06, 0x40801002, 410x00000000,
420x21a00a82, 0x21a00a06, 0x40806602, 0x00200000, 420x00000000,
430x35800009, 0x21a00a82, 0x40800083, 0x21a00b83, 430x01a00182,
440x01a00c02, 0x01a00d83, 0x00003ffb, 0x40800003, 440x3ec00083,
450x4020007f, 0x35000000, 0x00000000, 0x00000000, 450xb1c38103,
460x00000000, 0x00000000, 0x00000000, 0x00000000, 460x01a00204,
470x00000000, 0x00000000, 0x00000000, 0x00000000, 470x3ec10082,
480x00000000, 0x00000000, 0x00000000, 0x00000000, 480x4201400d,
490x00000000, 0x00000000, 0x00000000, 0x00000000, 490xb1c38202,
500x00000000, 0x00000000, 0x00000000, 0x00000000, 500x01a00583,
510x00000000, 0x00000000, 0x00000000, 0x00000000, 510x34218682,
520x00000000, 0x00000000, 0x00000000, 0x00000000, 520x3ed80684,
530x00000000, 0x00000000, 0x00000000, 0x00000000, 530xb0408184,
540x00000000, 0x00000000, 0x00000000, 0x00000000, 540x24218682,
550x00000000, 0x00000000, 0x00000000, 0x00000000, 550x01a00603,
560x00000000, 0x00000000, 0x00000000, 0x00000000, 560x00200000,
570x00000000, 0x00000000, 0x00000000, 0x00000000, 570x34214682,
580x00000000, 0x00000000, 0x00000000, 0x00000000, 580x3ed40684,
590x00000000, 0x00000000, 0x00000000, 0x00000000, 590xb0408184,
600x00000000, 0x00000000, 0x00000000, 0x00000000, 600x40800003,
610x00000000, 0x00000000, 0x00000000, 0x00000000, 610x24214682,
620x00000000, 0x00000000, 0x00000000, 0x00000000, 620x21a00083,
630x00000000, 0x00000000, 0x00000000, 0x00000000, 630x40800082,
640x00000000, 0x00000000, 0x00000000, 0x00000000, 640x21a00b02,
650x00000000, 0x00000000, 0x00000000, 0x00000000, 650x4020007f,
660x00000000, 0x00000000, 0x00000000, 0x00000000, 660x1000251e,
670x00000000, 0x00000000, 0x00000000, 0x00000000, 670x42a00002,
680x00000000, 0x00000000, 0x00000000, 0x00000000, 680x32800008,
690x00000000, 0x00000000, 0x00000000, 0x00000000, 690x4205c00c,
700x00000000, 0x00000000, 0x00000000, 0x00000000, 700x00200000,
710x00000000, 0x00000000, 0x00000000, 0x00000000, 710x40a0000b,
720x00000000, 0x00000000, 0x00000000, 0x00000000, 720x3f82070f,
730x00000000, 0x00000000, 0x00000000, 0x00000000, 730x4080020a,
740x00000000, 0x00000000, 0x00000000, 0x00000000, 740x40800709,
750x00000000, 0x00000000, 0x00000000, 0x00000000, 750x3fe3078f,
760x00000000, 0x00000000, 0x00000000, 0x00000000, 760x3fbf0783,
770x00000000, 0x00000000, 0x00000000, 0x00000000, 770x3f200183,
780x00000000, 0x00000000, 0x00000000, 0x00000000, 780x3fbe0183,
790x00000000, 0x00000000, 0x00000000, 0x00000000, 790x3fe30187,
800x00000000, 0x00000000, 0x00000000, 0x00000000, 800x18008387,
810x00000000, 0x00000000, 0x00000000, 0x00000000, 810x4205c002,
820x00000000, 0x00000000, 0x00000000, 0x00000000, 820x3ac30404,
830x00000000, 0x00000000, 0x00000000, 0x00000000, 830x1cffc489,
840x00000000, 0x00000000, 0x00000000, 0x00000000, 840x00200000,
850x00000000, 0x00000000, 0x00000000, 0x00000000, 850x18008403,
860x00000000, 0x00000000, 0x00000000, 0x00000000, 860x38830402,
870x00000000, 0x00000000, 0x00000000, 0x00000000, 870x4cffc486,
880x00000000, 0x00000000, 0x00000000, 0x00000000, 880x3ac28185,
890x00000000, 0x00000000, 0x00000000, 0x00000000, 890xb0408584,
900x00000000, 0x00000000, 0x00000000, 0x00000000, 900x28830402,
910x00000000, 0x00000000, 0x00000000, 0x00000000, 910x1c020408,
920x00000000, 0x00000000, 0x00000000, 0x00000000, 920x38828182,
930x00000000, 0x00000000, 0x00000000, 0x00000000, 930xb0408385,
940x00000000, 0x00000000, 0x00000000, 0x00000000, 940x1802c387,
950x00000000, 0x00000000, 0x00000000, 0x00000000, 950x28828182,
960x00000000, 0x00000000, 0x00000000, 0x00000000, 960x217ff886,
970x00000000, 0x00000000, 0x00000000, 0x00000000, 970x04000582,
980x00000000, 0x00000000, 0x00000000, 0x00000000, 980x32800007,
990x00000000, 0x00000000, 0x00000000, 0x00000000, 990x21a00802,
1000x00000000, 0x00000000, 0x00000000, 0x00000000, 1000x3fbf0705,
1010x00000000, 0x00000000, 0x00000000, 0x00000000, 1010x3f200285,
1020x00000000, 0x00000000, 0x00000000, 0x00000000, 1020x3fbe0285,
1030x00000000, 0x00000000, 0x00000000, 0x00000000, 1030x3fe30285,
1040x00000000, 0x00000000, 0x00000000, 0x00000000, 1040x21a00885,
1050x00000000, 0x00000000, 0x00000000, 0x00000000, 1050x04000603,
1060x00000000, 0x00000000, 0x00000000, 0x00000000, 1060x21a00903,
1070x00000000, 0x00000000, 0x00000000, 0x00000000, 1070x40803c02,
1080x00000000, 0x00000000, 0x00000000, 0x00000000, 1080x21a00982,
1090x00000000, 0x00000000, 0x00000000, 0x00000000, 1090x04000386,
1100x00000000, 0x00000000, 0x00000000, 0x00000000, 1100x21a00a06,
1110x00000000, 0x00000000, 0x00000000, 0x00000000, 1110x40801202,
1120x00000000, 0x00000000, 0x00000000, 0x00000000, 1120x21a00a82,
1130x00000000, 0x00000000, 0x00000000, 0x00000000, 1130x73000003,
1140x00000000, 0x00000000, 0x00000000, 0x00000000, 1140x24200683,
1150x00000000, 0x00000000, 0x00000000, 0x00000000, 1150x01a00404,
1160x00000000, 0x00000000, 0x00000000, 0x00000000, 1160x00200000,
1170x00000000, 0x00000000, 0x00000000, 0x00000000, 1170x34204682,
1180x00000000, 0x00000000, 0x00000000, 0x00000000, 1180x3ec40683,
1190x00000000, 0x00000000, 0x00000000, 0x00000000, 1190xb0408203,
1200x00000000, 0x00000000, 0x00000000, 0x00000000, 1200x24204682,
1210x00000000, 0x00000000, 0x00000000, 0x00000000, 1210x01a00783,
1220x00000000, 0x00000000, 0x00000000, 0x00000000, 1220x00200000,
1230x00000000, 0x00000000, 0x00000000, 0x00000000, 1230x3421c682,
1240x00000000, 0x00000000, 0x00000000, 0x00000000, 1240x3edc0684,
1250x00000000, 0x00000000, 0x00000000, 0x00000000, 1250xb0408184,
1260x00000000, 0x00000000, 0x00000000, 0x00000000, 1260x2421c682,
1270x00000000, 0x00000000, 0x00000000, 0x00000000, 1270x21a00806,
1280x00000000, 0x00000000, 0x00000000, 0x00000000, 1280x21a00885,
1290x00000000, 0x00000000, 0x00000000, 0x00000000, 1290x3fbf0784,
1300x00000000, 0x00000000, 0x00000000, 0x00000000, 1300x3f200204,
1310x00000000, 0x00000000, 0x00000000, 0x00000000, 1310x3fbe0204,
1320x00000000, 0x00000000, 0x00000000, 0x00000000, 1320x3fe30204,
1330x00000000, 0x00000000, 0x00000000, 0x00000000, 1330x21a00904,
1340x00000000, 0x00000000, 0x00000000, 0x00000000, 1340x40804002,
1350x00000000, 0x00000000, 0x00000000, 0x00000000, 1350x21a00982,
1360x00000000, 0x00000000, 0x00000000, 0x00000000, 1360x21a00a06,
1370x00000000, 0x00000000, 0x00000000, 0x00000000, 1370x40805a02,
1380x00000000, 0x00000000, 0x00000000, 0x00000000, 1380x21a00a82,
1390x00000000, 0x00000000, 0x00000000, 0x00000000, 1390x04000683,
1400x00000000, 0x00000000, 0x00000000, 0x00000000, 1400x21a00803,
1410x00000000, 0x00000000, 0x00000000, 0x00000000, 1410x21a00885,
1420x00000000, 0x00000000, 0x00000000, 0x00000000, 1420x21a00904,
1430x00000000, 0x00000000, 0x00000000, 0x00000000, 1430x40848002,
1440x00000000, 0x00000000, 0x00000000, 0x00000000, 1440x21a00982,
1450x00000000, 0x00000000, 0x00000000, 0x00000000, 1450x21a00a06,
1460x00000000, 0x00000000, 0x00000000, 0x00000000, 1460x40801002,
1470x00000000, 0x00000000, 0x00000000, 0x00000000, 1470x21a00a82,
1480x00000000, 0x00000000, 0x00000000, 0x00000000, 1480x21a00a06,
1490x00000000, 0x00000000, 0x00000000, 0x00000000, 1490x40806602,
1500x00000000, 0x00000000, 0x00000000, 0x00000000, 1500x00200000,
1510x00000000, 0x00000000, 0x00000000, 0x00000000, 1510x35800009,
1520x00000000, 0x00000000, 0x00000000, 0x00000000, 1520x21a00a82,
1530x00000000, 0x00000000, 0x00000000, 0x00000000, 1530x40800083,
1540x00000000, 0x00000000, 0x00000000, 0x00000000, 1540x21a00b83,
1550x00000000, 0x00000000, 0x00000000, 0x00000000, 1550x01a00c02,
1560x00000000, 0x00000000, 0x00000000, 0x00000000, 1560x01a00d83,
1570x00000000, 0x00000000, 0x00000000, 0x00000000, 1570x00003ffb,
1580x00000000, 0x00000000, 0x00000000, 0x00000000, 1580x40800003,
1590x00000000, 0x00000000, 0x00000000, 0x00000000, 1590x4020007f,
1600x00000000, 0x00000000, 0x00000000, 0x00000000, 1600x35000000,
1610x00000000, 0x00000000, 0x00000000, 0x00000000, 1610x00000000,
1620x00000000, 0x00000000, 0x00000000, 0x00000000, 1620x00000000,
1630x00000000, 0x00000000, 0x00000000, 0x00000000, 1630x00000000,
1640x00000000, 0x00000000, 0x00000000, 0x00000000, 1640x00000000,
1650x00000000, 0x00000000, 0x00000000, 0x00000000, 1650x00000000,
1660x00000000, 0x00000000, 0x00000000, 0x00000000, 1660x00000000,
1670x00000000, 0x00000000, 0x00000000, 0x00000000, 1670x00000000,
1680x00000000, 0x00000000, 0x00000000, 0x00000000, 1680x00000000,
1690x00000000, 0x00000000, 0x00000000, 0x00000000, 1690x00000000,
1700x00000000, 0x00000000, 0x00000000, 0x00000000, 1700x00000000,
1710x00000000, 0x00000000, 0x00000000, 0x00000000, 1710x00000000,
1720x00000000, 0x00000000, 0x00000000, 0x00000000, 1720x00000000,
1730x00000000, 0x00000000, 0x00000000, 0x00000000, 1730x00000000,
1740x00000000, 0x00000000, 0x00000000, 0x00000000, 1740x00000000,
1750x00000000, 0x00000000, 0x00000000, 0x00000000, 1750x00000000,
1760x00000000, 0x00000000, 0x00000000, 0x00000000, 1760x00000000,
1770x00000000, 0x00000000, 0x00000000, 0x00000000, 1770x00000000,
1780x00000000, 0x00000000, 0x00000000, 0x00000000, 1780x00000000,
1790x00000000, 0x00000000, 0x00000000, 0x00000000, 1790x00000000,
1800x00000000, 0x00000000, 0x00000000, 0x00000000, 1800x00000000,
1810x00000000, 0x00000000, 0x00000000, 0x00000000, 1810x00000000,
1820x00000000, 0x00000000, 0x00000000, 0x00000000, 1820x00000000,
1830x00000000, 0x00000000, 0x00000000, 0x00000000, 1830x00000000,
1840x00000000, 0x00000000, 0x00000000, 0x00000000, 1840x00000000,
1850x00000000, 0x00000000, 0x00000000, 0x00000000, 1850x00000000,
1860x00000000, 0x00000000, 0x00000000, 0x00000000, 1860x00000000,
1870x00000000, 0x00000000, 0x00000000, 0x00000000, 1870x00000000,
1880x00000000, 0x00000000, 0x00000000, 0x00000000, 1880x00000000,
1890x00000000, 0x00000000, 0x00000000, 0x00000000, 1890x00000000,
1900x00000000, 0x00000000, 0x00000000, 0x00000000, 1900x00000000,
1910x00000000,
1920x00000000,
1930x00000000,
1940x00000000,
1950x00000000,
1960x00000000,
1970x00000000,
1980x00000000,
1990x00000000,
2000x00000000,
2010x00000000,
2020x00000000,
2030x00000000,
2040x00000000,
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2100x00000000,
2110x00000000,
2120x00000000,
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2160x00000000,
2170x00000000,
2180x00000000,
2190x00000000,
2200x00000000,
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2250x00000000,
2260x00000000,
2270x00000000,
2280x00000000,
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2400x00000000,
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2430x00000000,
2440x00000000,
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2500x00000000,
2510x00000000,
2520x00000000,
2530x00000000,
2540x00000000,
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2560x00000000,
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2600x00000000,
2610x00000000,
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2630x00000000,
2640x00000000,
2650x00000000,
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2700x00000000,
2710x00000000,
2720x00000000,
2730x00000000,
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2800x00000000,
2810x00000000,
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2900x00000000,
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2980x00000000,
2990x00000000,
3000x00000000,
3010x00000000,
3020x00000000,
3030x00000000,
3040x00000000,
3050x00000000,
3060x00000000,
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3080x00000000,
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3100x00000000,
3110x00000000,
3120x00000000,
3130x00000000,
3140x00000000,
3150x00000000,
3160x00000000,
3170x00000000,
3180x00000000,
3190x00000000,
3200x00000000,
3210x00000000,
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3230x00000000,
3240x00000000,
3250x00000000,
3260x00000000,
3270x00000000,
3280x00000000,
3290x00000000,
3300x00000000,
3310x00000000,
3320x00000000,
3330x00000000,
3340x00000000,
3350x00000000,
3360x00000000,
3370x00000000,
3380x00000000,
3390x00000000,
3400x00000000,
3410x00000000,
3420x00000000,
3430x00000000,
3440x00000000,
3450x00000000,
3460x00000000,
3470x00000000,
3480x00000000,
3490x00000000,
3500x00000000,
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3520x00000000,
3530x00000000,
3540x00000000,
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3560x00000000,
3570x00000000,
3580x00000000,
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3600x00000000,
3610x00000000,
3620x00000000,
3630x00000000,
3640x00000000,
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3660x00000000,
3670x00000000,
3680x00000000,
3690x00000000,
3700x00000000,
3710x00000000,
3720x00000000,
3730x00000000,
3740x00000000,
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3760x00000000,
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3790x00000000,
3800x00000000,
3810x00000000,
3820x00000000,
3830x00000000,
3840x00000000,
3850x00000000,
3860x00000000,
3870x00000000,
3880x00000000,
3890x00000000,
3900x00000000,
3910x00000000,
3920x00000000,
3930x00000000,
3940x00000000,
3950x00000000,
3960x00000000,
3970x00000000,
3980x00000000,
3990x00000000,
4000x00000000,
4010x00000000,
4020x00000000,
4030x00000000,
4040x00000000,
4050x00000000,
4060x00000000,
4070x00000000,
4080x00000000,
4090x00000000,
4100x00000000,
4110x00000000,
4120x00000000,
4130x00000000,
4140x00000000,
4150x00000000,
4160x00000000,
4170x00000000,
4180x00000000,
4190x00000000,
4200x00000000,
4210x00000000,
4220x00000000,
4230x00000000,
4240x00000000,
4250x00000000,
4260x00000000,
4270x00000000,
4280x00000000,
4290x00000000,
4300x00000000,
4310x00000000,
4320x00000000,
4330x00000000,
4340x00000000,
4350x00000000,
4360x00000000,
4370x00000000,
4380x00000000,
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4400x00000000,
4410x00000000,
4420x00000000,
4430x00000000,
4440x00000000,
4450x00000000,
4460x00000000,
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4600x00000000,
4610x00000000,
4620x00000000,
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4640x00000000,
4650x00000000,
4660x00000000,
4670x00000000,
4680x00000000,
4690x00000000,
4700x00000000,
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4720x00000000,
4730x00000000,
4740x00000000,
4750x00000000,
4760x00000000,
4770x00000000,
4780x00000000,
4790x00000000,
4800x00000000,
4810x00000000,
4820x00000000,
4830x00000000,
4840x00000000,
4850x00000000,
4860x00000000,
4870x00000000,
4880x00000000,
4890x00000000,
4900x00000000,
4910x00000000,
4920x00000000,
4930x00000000,
4940x00000000,
4950x00000000,
4960x00000000,
4970x00000000,
4980x00000000,
4990x00000000,
5000x00000000,
5010x00000000,
5020x00000000,
5030x00000000,
5040x00000000,
5050x00000000,
5060x00000000,
5070x00000000,
5080x00000000,
5090x00000000,
5100x00000000,
5110x00000000,
5120x00000000,
5130x00000000,
5140x00000000,
5150x00000000,
5160x00000000,
5170x00000000,
5180x00000000,
5190x00000000,
5200x00000000,
5210x00000000,
5220x00000000,
5230x00000000,
5240x00000000,
5250x00000000,
5260x00000000,
5270x00000000,
5280x00000000,
5290x00000000,
5300x00000000,
5310x00000000,
5320x00000000,
5330x00000000,
5340x00000000,
5350x00000000,
5360x00000000,
5370x00000000,
5380x00000000,
5390x00000000,
5400x00000000,
5410x00000000,
5420x00000000,
5430x00000000,
5440x00000000,
5450x00000000,
5460x00000000,
5470x00000000,
5480x00000000,
5490x00000000,
5500x00000000,
5510x00000000,
5520x00000000,
5530x00000000,
5540x00000000,
5550x00000000,
5560x00000000,
5570x00000000,
5580x00000000,
5590x00000000,
5600x00000000,
5610x00000000,
5620x00000000,
5630x00000000,
5640x00000000,
5650x00000000,
5660x00000000,
5670x00000000,
5680x00000000,
5690x00000000,
5700x00000000,
5710x00000000,
5720x00000000,
5730x00000000,
5740x00000000,
5750x00000000,
5760x00000000,
5770x00000000,
5780x00000000,
5790x00000000,
5800x00000000,
5810x00000000,
5820x00000000,
5830x00000000,
5840x00000000,
5850x00000000,
5860x00000000,
5870x00000000,
5880x00000000,
5890x00000000,
5900x00000000,
5910x00000000,
5920x00000000,
5930x00000000,
5940x00000000,
5950x00000000,
5960x00000000,
5970x00000000,
5980x00000000,
5990x00000000,
6000x00000000,
6010x00000000,
6020x00000000,
6030x00000000,
6040x00000000,
6050x00000000,
6060x00000000,
6070x00000000,
6080x00000000,
6090x00000000,
6100x00000000,
6110x00000000,
6120x00000000,
6130x00000000,
6140x00000000,
6150x00000000,
6160x00000000,
6170x00000000,
6180x00000000,
6190x00000000,
6200x00000000,
6210x00000000,
6220x00000000,
6230x00000000,
6240x00000000,
6250x00000000,
6260x00000000,
6270x00000000,
6280x00000000,
6290x00000000,
6300x00000000,
6310x00000000,
6320x00000000,
6330x00000000,
6340x00000000,
6350x00000000,
6360x00000000,
6370x00000000,
6380x00000000,
6390x00000000,
6400x00000000,
6410x00000000,
6420x00000000,
6430x00000000,
6440x00000000,
6450x00000000,
6460x00000000,
6470x00000000,
6480x00000000,
6490x00000000,
6500x00000000,
6510x00000000,
6520x00000000,
6530x00000000,
6540x00000000,
6550x00000000,
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6580x00000000,
6590x00000000,
6600x00000000,
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7170x00000000,
7180x00000000,
7190x00000000,
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7210x00000000,
7220x00000000,
7230x00000000,
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7260x00000000,
7270x00000000,
7280x00000000,
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7300x00000000,
7310x00000000,
7320x00000000,
7330x00000000,
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191}; 743};
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index 1726bfe38ee0..b30e55dab832 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -46,6 +46,7 @@
46 46
47#include <asm/io.h> 47#include <asm/io.h>
48#include <asm/spu.h> 48#include <asm/spu.h>
49#include <asm/spu_priv1.h>
49#include <asm/spu_csa.h> 50#include <asm/spu_csa.h>
50#include <asm/mmu_context.h> 51#include <asm/mmu_context.h>
51 52
@@ -622,12 +623,17 @@ static inline void save_ppuint_mb(struct spu_state *csa, struct spu *spu)
622static inline void save_ch_part1(struct spu_state *csa, struct spu *spu) 623static inline void save_ch_part1(struct spu_state *csa, struct spu *spu)
623{ 624{
624 struct spu_priv2 __iomem *priv2 = spu->priv2; 625 struct spu_priv2 __iomem *priv2 = spu->priv2;
625 u64 idx, ch_indices[7] = { 0UL, 1UL, 3UL, 4UL, 24UL, 25UL, 27UL }; 626 u64 idx, ch_indices[7] = { 0UL, 3UL, 4UL, 24UL, 25UL, 27UL };
626 int i; 627 int i;
627 628
628 /* Save, Step 42: 629 /* Save, Step 42:
629 * Save the following CH: [0,1,3,4,24,25,27]
630 */ 630 */
631
632 /* Save CH 1, without channel count */
633 out_be64(&priv2->spu_chnlcntptr_RW, 1);
634 csa->spu_chnldata_RW[1] = in_be64(&priv2->spu_chnldata_RW);
635
636 /* Save the following CH: [0,3,4,24,25,27] */
631 for (i = 0; i < 7; i++) { 637 for (i = 0; i < 7; i++) {
632 idx = ch_indices[i]; 638 idx = ch_indices[i];
633 out_be64(&priv2->spu_chnlcntptr_RW, idx); 639 out_be64(&priv2->spu_chnlcntptr_RW, idx);
@@ -718,13 +724,15 @@ static inline void invalidate_slbs(struct spu_state *csa, struct spu *spu)
718 724
719static inline void get_kernel_slb(u64 ea, u64 slb[2]) 725static inline void get_kernel_slb(u64 ea, u64 slb[2])
720{ 726{
721 slb[0] = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) | SLB_VSID_KERNEL; 727 u64 llp;
722 slb[1] = (ea & ESID_MASK) | SLB_ESID_V;
723 728
724 /* Large pages are used for kernel text/data, but not vmalloc. */ 729 if (REGION_ID(ea) == KERNEL_REGION_ID)
725 if (cpu_has_feature(CPU_FTR_16M_PAGE) 730 llp = mmu_psize_defs[mmu_linear_psize].sllp;
726 && REGION_ID(ea) == KERNEL_REGION_ID) 731 else
727 slb[0] |= SLB_VSID_L; 732 llp = mmu_psize_defs[mmu_virtual_psize].sllp;
733 slb[0] = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) |
734 SLB_VSID_KERNEL | llp;
735 slb[1] = (ea & ESID_MASK) | SLB_ESID_V;
728} 736}
729 737
730static inline void load_mfc_slb(struct spu *spu, u64 slb[2], int slbe) 738static inline void load_mfc_slb(struct spu *spu, u64 slb[2], int slbe)
@@ -1103,13 +1111,18 @@ static inline void clear_spu_status(struct spu_state *csa, struct spu *spu)
1103static inline void reset_ch_part1(struct spu_state *csa, struct spu *spu) 1111static inline void reset_ch_part1(struct spu_state *csa, struct spu *spu)
1104{ 1112{
1105 struct spu_priv2 __iomem *priv2 = spu->priv2; 1113 struct spu_priv2 __iomem *priv2 = spu->priv2;
1106 u64 ch_indices[7] = { 0UL, 1UL, 3UL, 4UL, 24UL, 25UL, 27UL }; 1114 u64 ch_indices[7] = { 0UL, 3UL, 4UL, 24UL, 25UL, 27UL };
1107 u64 idx; 1115 u64 idx;
1108 int i; 1116 int i;
1109 1117
1110 /* Restore, Step 20: 1118 /* Restore, Step 20:
1111 * Reset the following CH: [0,1,3,4,24,25,27]
1112 */ 1119 */
1120
1121 /* Reset CH 1 */
1122 out_be64(&priv2->spu_chnlcntptr_RW, 1);
1123 out_be64(&priv2->spu_chnldata_RW, 0UL);
1124
1125 /* Reset the following CH: [0,3,4,24,25,27] */
1113 for (i = 0; i < 7; i++) { 1126 for (i = 0; i < 7; i++) {
1114 idx = ch_indices[i]; 1127 idx = ch_indices[i];
1115 out_be64(&priv2->spu_chnlcntptr_RW, idx); 1128 out_be64(&priv2->spu_chnlcntptr_RW, idx);
@@ -1570,12 +1583,17 @@ static inline void restore_decr_wrapped(struct spu_state *csa, struct spu *spu)
1570static inline void restore_ch_part1(struct spu_state *csa, struct spu *spu) 1583static inline void restore_ch_part1(struct spu_state *csa, struct spu *spu)
1571{ 1584{
1572 struct spu_priv2 __iomem *priv2 = spu->priv2; 1585 struct spu_priv2 __iomem *priv2 = spu->priv2;
1573 u64 idx, ch_indices[7] = { 0UL, 1UL, 3UL, 4UL, 24UL, 25UL, 27UL }; 1586 u64 idx, ch_indices[7] = { 0UL, 3UL, 4UL, 24UL, 25UL, 27UL };
1574 int i; 1587 int i;
1575 1588
1576 /* Restore, Step 59: 1589 /* Restore, Step 59:
1577 * Restore the following CH: [0,1,3,4,24,25,27]
1578 */ 1590 */
1591
1592 /* Restore CH 1 without count */
1593 out_be64(&priv2->spu_chnlcntptr_RW, 1);
1594 out_be64(&priv2->spu_chnldata_RW, csa->spu_chnldata_RW[1]);
1595
1596 /* Restore the following CH: [0,3,4,24,25,27] */
1579 for (i = 0; i < 7; i++) { 1597 for (i = 0; i < 7; i++) {
1580 idx = ch_indices[i]; 1598 idx = ch_indices[i];
1581 out_be64(&priv2->spu_chnlcntptr_RW, idx); 1599 out_be64(&priv2->spu_chnlcntptr_RW, idx);
@@ -2074,6 +2092,7 @@ int spu_save(struct spu_state *prev, struct spu *spu)
2074 } 2092 }
2075 return rc; 2093 return rc;
2076} 2094}
2095EXPORT_SYMBOL_GPL(spu_save);
2077 2096
2078/** 2097/**
2079 * spu_restore - SPU context restore, with harvest and locking. 2098 * spu_restore - SPU context restore, with harvest and locking.
@@ -2090,7 +2109,6 @@ int spu_restore(struct spu_state *new, struct spu *spu)
2090 2109
2091 acquire_spu_lock(spu); 2110 acquire_spu_lock(spu);
2092 harvest(NULL, spu); 2111 harvest(NULL, spu);
2093 spu->stop_code = 0;
2094 spu->dar = 0; 2112 spu->dar = 0;
2095 spu->dsisr = 0; 2113 spu->dsisr = 0;
2096 spu->slb_replace = 0; 2114 spu->slb_replace = 0;
@@ -2103,6 +2121,7 @@ int spu_restore(struct spu_state *new, struct spu *spu)
2103 } 2121 }
2104 return rc; 2122 return rc;
2105} 2123}
2124EXPORT_SYMBOL_GPL(spu_restore);
2106 2125
2107/** 2126/**
2108 * spu_harvest - SPU harvest (reset) operation 2127 * spu_harvest - SPU harvest (reset) operation
@@ -2125,6 +2144,7 @@ static void init_prob(struct spu_state *csa)
2125 csa->spu_chnlcnt_RW[28] = 1; 2144 csa->spu_chnlcnt_RW[28] = 1;
2126 csa->spu_chnlcnt_RW[30] = 1; 2145 csa->spu_chnlcnt_RW[30] = 1;
2127 csa->prob.spu_runcntl_RW = SPU_RUNCNTL_STOP; 2146 csa->prob.spu_runcntl_RW = SPU_RUNCNTL_STOP;
2147 csa->prob.mb_stat_R = 0x000400;
2128} 2148}
2129 2149
2130static void init_priv1(struct spu_state *csa) 2150static void init_priv1(struct spu_state *csa)
@@ -2193,6 +2213,7 @@ void spu_init_csa(struct spu_state *csa)
2193 init_priv1(csa); 2213 init_priv1(csa);
2194 init_priv2(csa); 2214 init_priv2(csa);
2195} 2215}
2216EXPORT_SYMBOL_GPL(spu_init_csa);
2196 2217
2197void spu_fini_csa(struct spu_state *csa) 2218void spu_fini_csa(struct spu_state *csa)
2198{ 2219{
@@ -2203,3 +2224,4 @@ void spu_fini_csa(struct spu_state *csa)
2203 2224
2204 vfree(csa->lscsa); 2225 vfree(csa->lscsa);
2205} 2226}
2227EXPORT_SYMBOL_GPL(spu_fini_csa);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-21 12:09:36 -0500