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Diffstat (limited to 'arch/powerpc/platforms/86xx/mpc8610_hpcd.c')
-rw-r--r--arch/powerpc/platforms/86xx/mpc8610_hpcd.c87
1 files changed, 0 insertions, 87 deletions
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 30725302884a..5eedb710896e 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -58,93 +58,6 @@ static int __init mpc8610_declare_of_platform_devices(void)
58} 58}
59machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices); 59machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
60 60
61#ifdef CONFIG_PCI
62static void __devinit quirk_uli1575(struct pci_dev *dev)
63{
64 u32 temp32;
65
66 /* Disable INTx */
67 pci_read_config_dword(dev, 0x48, &temp32);
68 pci_write_config_dword(dev, 0x48, (temp32 | 1<<26));
69
70 /* Enable sideband interrupt */
71 pci_read_config_dword(dev, 0x90, &temp32);
72 pci_write_config_dword(dev, 0x90, (temp32 | 1<<22));
73}
74
75static void __devinit quirk_uli5288(struct pci_dev *dev)
76{
77 unsigned char c;
78 unsigned short temp;
79
80 /* Interrupt Disable, Needed when SATA disabled */
81 pci_read_config_word(dev, PCI_COMMAND, &temp);
82 temp |= 1<<10;
83 pci_write_config_word(dev, PCI_COMMAND, temp);
84
85 pci_read_config_byte(dev, 0x83, &c);
86 c |= 0x80;
87 pci_write_config_byte(dev, 0x83, c);
88
89 pci_write_config_byte(dev, PCI_CLASS_PROG, 0x01);
90 pci_write_config_byte(dev, PCI_CLASS_DEVICE, 0x06);
91
92 pci_read_config_byte(dev, 0x83, &c);
93 c &= 0x7f;
94 pci_write_config_byte(dev, 0x83, c);
95}
96
97/*
98 * Since 8259PIC was disabled on the board, the IDE device can not
99 * use the legacy IRQ, we need to let the IDE device work under
100 * native mode and use the interrupt line like other PCI devices.
101 * IRQ14 is a sideband interrupt from IDE device to CPU and we use this
102 * as the interrupt for IDE device.
103 */
104static void __devinit quirk_uli5229(struct pci_dev *dev)
105{
106 unsigned char c;
107
108 pci_read_config_byte(dev, 0x4b, &c);
109 c |= 0x10;
110 pci_write_config_byte(dev, 0x4b, c);
111}
112
113/*
114 * SATA interrupt pin bug fix
115 * There's a chip bug for 5288, The interrupt pin should be 2,
116 * not the read only value 1, So it use INTB#, not INTA# which
117 * actually used by the IDE device 5229.
118 * As of this bug, during the PCI initialization, 5288 read the
119 * irq of IDE device from the device tree, this function fix this
120 * bug by re-assigning a correct irq to 5288.
121 *
122 */
123static void __devinit final_uli5288(struct pci_dev *dev)
124{
125 struct pci_controller *hose = pci_bus_to_host(dev->bus);
126 struct device_node *hosenode = hose ? hose->dn : NULL;
127 struct of_irq oirq;
128 int virq, pin = 2;
129 u32 laddr[3];
130
131 if (!hosenode)
132 return;
133
134 laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(31, 0) << 8);
135 laddr[1] = laddr[2] = 0;
136 of_irq_map_raw(hosenode, &pin, 1, laddr, &oirq);
137 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
138 oirq.size);
139 dev->irq = virq;
140}
141
142DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575);
143DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
144DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
145DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5288, final_uli5288);
146#endif /* CONFIG_PCI */
147
148#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) 61#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
149 62
150static u32 get_busfreq(void) 63static u32 get_busfreq(void)