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Diffstat (limited to 'arch/powerpc/platforms/85xx/mpc85xx_mds.c')
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c52
1 files changed, 38 insertions, 14 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 7dd029034aec..b2c0a4319973 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -206,23 +206,24 @@ static void __init mpc85xx_mds_setup_arch(void)
206 } 206 }
207 207
208 if (bcsr_regs) { 208 if (bcsr_regs) {
209 if (machine_is(mpc8568_mds)) {
209#define BCSR_UCC1_GETH_EN (0x1 << 7) 210#define BCSR_UCC1_GETH_EN (0x1 << 7)
210#define BCSR_UCC2_GETH_EN (0x1 << 7) 211#define BCSR_UCC2_GETH_EN (0x1 << 7)
211#define BCSR_UCC1_MODE_MSK (0x3 << 4) 212#define BCSR_UCC1_MODE_MSK (0x3 << 4)
212#define BCSR_UCC2_MODE_MSK (0x3 << 0) 213#define BCSR_UCC2_MODE_MSK (0x3 << 0)
213 214
214 /* Turn off UCC1 & UCC2 */ 215 /* Turn off UCC1 & UCC2 */
215 clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); 216 clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
216 clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); 217 clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
217 218
218 /* Mode is RGMII, all bits clear */ 219 /* Mode is RGMII, all bits clear */
219 clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK | 220 clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK |
220 BCSR_UCC2_MODE_MSK); 221 BCSR_UCC2_MODE_MSK);
221
222 /* Turn UCC1 & UCC2 on */
223 setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
224 setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
225 222
223 /* Turn UCC1 & UCC2 on */
224 setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN);
225 setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN);
226 }
226 iounmap(bcsr_regs); 227 iounmap(bcsr_regs);
227 } 228 }
228#endif /* CONFIG_QUICC_ENGINE */ 229#endif /* CONFIG_QUICC_ENGINE */
@@ -257,7 +258,8 @@ static int __init board_fixups(void)
257 258
258 return 0; 259 return 0;
259} 260}
260machine_arch_initcall(mpc85xx_mds, board_fixups); 261machine_arch_initcall(mpc8568_mds, board_fixups);
262machine_arch_initcall(mpc8569_mds, board_fixups);
261 263
262static struct of_device_id mpc85xx_ids[] = { 264static struct of_device_id mpc85xx_ids[] = {
263 { .type = "soc", }, 265 { .type = "soc", },
@@ -276,7 +278,8 @@ static int __init mpc85xx_publish_devices(void)
276 278
277 return 0; 279 return 0;
278} 280}
279machine_device_initcall(mpc85xx_mds, mpc85xx_publish_devices); 281machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
282machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices);
280 283
281static void __init mpc85xx_mds_pic_init(void) 284static void __init mpc85xx_mds_pic_init(void)
282{ 285{
@@ -321,8 +324,8 @@ static int __init mpc85xx_mds_probe(void)
321 return of_flat_dt_is_compatible(root, "MPC85xxMDS"); 324 return of_flat_dt_is_compatible(root, "MPC85xxMDS");
322} 325}
323 326
324define_machine(mpc85xx_mds) { 327define_machine(mpc8568_mds) {
325 .name = "MPC85xx MDS", 328 .name = "MPC8568 MDS",
326 .probe = mpc85xx_mds_probe, 329 .probe = mpc85xx_mds_probe,
327 .setup_arch = mpc85xx_mds_setup_arch, 330 .setup_arch = mpc85xx_mds_setup_arch,
328 .init_IRQ = mpc85xx_mds_pic_init, 331 .init_IRQ = mpc85xx_mds_pic_init,
@@ -334,3 +337,24 @@ define_machine(mpc85xx_mds) {
334 .pcibios_fixup_bus = fsl_pcibios_fixup_bus, 337 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
335#endif 338#endif
336}; 339};
340
341static int __init mpc8569_mds_probe(void)
342{
343 unsigned long root = of_get_flat_dt_root();
344
345 return of_flat_dt_is_compatible(root, "fsl,MPC8569EMDS");
346}
347
348define_machine(mpc8569_mds) {
349 .name = "MPC8569 MDS",
350 .probe = mpc8569_mds_probe,
351 .setup_arch = mpc85xx_mds_setup_arch,
352 .init_IRQ = mpc85xx_mds_pic_init,
353 .get_irq = mpic_get_irq,
354 .restart = fsl_rstcr_restart,
355 .calibrate_decr = generic_calibrate_decr,
356 .progress = udbg_progress,
357#ifdef CONFIG_PCI
358 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
359#endif
360};