diff options
Diffstat (limited to 'arch/powerpc/platforms/85xx/mpc85xx_ads.h')
| -rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_ads.h | 60 |
1 files changed, 0 insertions, 60 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.h b/arch/powerpc/platforms/85xx/mpc85xx_ads.h deleted file mode 100644 index 46c3532992aa..000000000000 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.h +++ /dev/null | |||
| @@ -1,60 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * MPC85xx ADS board definitions | ||
| 3 | * | ||
| 4 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> | ||
| 5 | * | ||
| 6 | * Copyright 2004 Freescale Semiconductor Inc. | ||
| 7 | * | ||
| 8 | * 2006 (c) MontaVista Software, Inc. | ||
| 9 | * Vitaly Bordug <vbordug@ru.mvista.com> | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify it | ||
| 12 | * under the terms of the GNU General Public License as published by the | ||
| 13 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 14 | * option) any later version. | ||
| 15 | * | ||
| 16 | */ | ||
| 17 | |||
| 18 | #ifndef __MACH_MPC85XXADS_H | ||
| 19 | #define __MACH_MPC85XXADS_H | ||
| 20 | |||
| 21 | #include <linux/initrd.h> | ||
| 22 | #include <sysdev/fsl_soc.h> | ||
| 23 | |||
| 24 | #define BCSR_ADDR ((uint)0xf8000000) | ||
| 25 | #define BCSR_SIZE ((uint)(32 * 1024)) | ||
| 26 | |||
| 27 | #ifdef CONFIG_CPM2 | ||
| 28 | |||
| 29 | #define MPC85xx_CPM_OFFSET (0x80000) | ||
| 30 | |||
| 31 | #define CPM_MAP_ADDR (get_immrbase() + MPC85xx_CPM_OFFSET) | ||
| 32 | #define CPM_IRQ_OFFSET 60 | ||
| 33 | |||
| 34 | #define SIU_INT_SMC1 ((uint)0x04+CPM_IRQ_OFFSET) | ||
| 35 | #define SIU_INT_SMC2 ((uint)0x05+CPM_IRQ_OFFSET) | ||
| 36 | #define SIU_INT_SCC1 ((uint)0x28+CPM_IRQ_OFFSET) | ||
| 37 | #define SIU_INT_SCC2 ((uint)0x29+CPM_IRQ_OFFSET) | ||
| 38 | #define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET) | ||
| 39 | #define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET) | ||
| 40 | |||
| 41 | /* FCC1 Clock Source Configuration. These can be | ||
| 42 | * redefined in the board specific file. | ||
| 43 | * Can only choose from CLK9-12 */ | ||
| 44 | #define F1_RXCLK 12 | ||
| 45 | #define F1_TXCLK 11 | ||
| 46 | |||
| 47 | /* FCC2 Clock Source Configuration. These can be | ||
| 48 | * redefined in the board specific file. | ||
| 49 | * Can only choose from CLK13-16 */ | ||
| 50 | #define F2_RXCLK 13 | ||
| 51 | #define F2_TXCLK 14 | ||
| 52 | |||
| 53 | /* FCC3 Clock Source Configuration. These can be | ||
| 54 | * redefined in the board specific file. | ||
| 55 | * Can only choose from CLK13-16 */ | ||
| 56 | #define F3_RXCLK 15 | ||
| 57 | #define F3_TXCLK 16 | ||
| 58 | |||
| 59 | #endif /* CONFIG_CPM2 */ | ||
| 60 | #endif /* __MACH_MPC85XXADS_H */ | ||