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Diffstat (limited to 'arch/powerpc/platforms/52xx/mpc52xx_pci.c')
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pci.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index e3428ddd9040..5a382bb15f62 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -63,6 +63,7 @@
63 63
64#define MPC52xx_PCI_TCR_P 0x01000000 64#define MPC52xx_PCI_TCR_P 0x01000000
65#define MPC52xx_PCI_TCR_LD 0x00010000 65#define MPC52xx_PCI_TCR_LD 0x00010000
66#define MPC52xx_PCI_TCR_WCT8 0x00000008
66 67
67#define MPC52xx_PCI_TBATR_DISABLE 0x0 68#define MPC52xx_PCI_TBATR_DISABLE 0x0
68#define MPC52xx_PCI_TBATR_ENABLE 0x1 69#define MPC52xx_PCI_TBATR_ENABLE 0x1
@@ -313,7 +314,7 @@ mpc52xx_pci_setup(struct pci_controller *hose,
313 out_be32(&pci_regs->tbatr1, 314 out_be32(&pci_regs->tbatr1,
314 MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_MEM ); 315 MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_MEM );
315 316
316 out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD); 317 out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD | MPC52xx_PCI_TCR_WCT8);
317 318
318 tmp = in_be32(&pci_regs->gscr); 319 tmp = in_be32(&pci_regs->gscr);
319#if 0 320#if 0