diff options
Diffstat (limited to 'arch/powerpc/perf/power7-pmu.c')
-rw-r--r-- | arch/powerpc/perf/power7-pmu.c | 80 |
1 files changed, 72 insertions, 8 deletions
diff --git a/arch/powerpc/perf/power7-pmu.c b/arch/powerpc/perf/power7-pmu.c index 2ee01e38d5e2..b554879bd31e 100644 --- a/arch/powerpc/perf/power7-pmu.c +++ b/arch/powerpc/perf/power7-pmu.c | |||
@@ -51,6 +51,18 @@ | |||
51 | #define MMCR1_PMCSEL_MSK 0xff | 51 | #define MMCR1_PMCSEL_MSK 0xff |
52 | 52 | ||
53 | /* | 53 | /* |
54 | * Power7 event codes. | ||
55 | */ | ||
56 | #define PME_PM_CYC 0x1e | ||
57 | #define PME_PM_GCT_NOSLOT_CYC 0x100f8 | ||
58 | #define PME_PM_CMPLU_STALL 0x4000a | ||
59 | #define PME_PM_INST_CMPL 0x2 | ||
60 | #define PME_PM_LD_REF_L1 0xc880 | ||
61 | #define PME_PM_LD_MISS_L1 0x400f0 | ||
62 | #define PME_PM_BRU_FIN 0x10068 | ||
63 | #define PME_PM_BRU_MPRED 0x400f6 | ||
64 | |||
65 | /* | ||
54 | * Layout of constraint bits: | 66 | * Layout of constraint bits: |
55 | * 6666555555555544444444443333333333222222222211111111110000000000 | 67 | * 6666555555555544444444443333333333222222222211111111110000000000 |
56 | * 3210987654321098765432109876543210987654321098765432109876543210 | 68 | * 3210987654321098765432109876543210987654321098765432109876543210 |
@@ -307,14 +319,14 @@ static void power7_disable_pmc(unsigned int pmc, unsigned long mmcr[]) | |||
307 | } | 319 | } |
308 | 320 | ||
309 | static int power7_generic_events[] = { | 321 | static int power7_generic_events[] = { |
310 | [PERF_COUNT_HW_CPU_CYCLES] = 0x1e, | 322 | [PERF_COUNT_HW_CPU_CYCLES] = PME_PM_CYC, |
311 | [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x100f8, /* GCT_NOSLOT_CYC */ | 323 | [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = PME_PM_GCT_NOSLOT_CYC, |
312 | [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x4000a, /* CMPLU_STALL */ | 324 | [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = PME_PM_CMPLU_STALL, |
313 | [PERF_COUNT_HW_INSTRUCTIONS] = 2, | 325 | [PERF_COUNT_HW_INSTRUCTIONS] = PME_PM_INST_CMPL, |
314 | [PERF_COUNT_HW_CACHE_REFERENCES] = 0xc880, /* LD_REF_L1_LSU*/ | 326 | [PERF_COUNT_HW_CACHE_REFERENCES] = PME_PM_LD_REF_L1, |
315 | [PERF_COUNT_HW_CACHE_MISSES] = 0x400f0, /* LD_MISS_L1 */ | 327 | [PERF_COUNT_HW_CACHE_MISSES] = PME_PM_LD_MISS_L1, |
316 | [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x10068, /* BRU_FIN */ | 328 | [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = PME_PM_BRU_FIN, |
317 | [PERF_COUNT_HW_BRANCH_MISSES] = 0x400f6, /* BR_MPRED */ | 329 | [PERF_COUNT_HW_BRANCH_MISSES] = PME_PM_BRU_MPRED, |
318 | }; | 330 | }; |
319 | 331 | ||
320 | #define C(x) PERF_COUNT_HW_CACHE_##x | 332 | #define C(x) PERF_COUNT_HW_CACHE_##x |
@@ -362,6 +374,57 @@ static int power7_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { | |||
362 | }, | 374 | }, |
363 | }; | 375 | }; |
364 | 376 | ||
377 | |||
378 | GENERIC_EVENT_ATTR(cpu-cycles, CYC); | ||
379 | GENERIC_EVENT_ATTR(stalled-cycles-frontend, GCT_NOSLOT_CYC); | ||
380 | GENERIC_EVENT_ATTR(stalled-cycles-backend, CMPLU_STALL); | ||
381 | GENERIC_EVENT_ATTR(instructions, INST_CMPL); | ||
382 | GENERIC_EVENT_ATTR(cache-references, LD_REF_L1); | ||
383 | GENERIC_EVENT_ATTR(cache-misses, LD_MISS_L1); | ||
384 | GENERIC_EVENT_ATTR(branch-instructions, BRU_FIN); | ||
385 | GENERIC_EVENT_ATTR(branch-misses, BRU_MPRED); | ||
386 | |||
387 | POWER_EVENT_ATTR(CYC, CYC); | ||
388 | POWER_EVENT_ATTR(GCT_NOSLOT_CYC, GCT_NOSLOT_CYC); | ||
389 | POWER_EVENT_ATTR(CMPLU_STALL, CMPLU_STALL); | ||
390 | POWER_EVENT_ATTR(INST_CMPL, INST_CMPL); | ||
391 | POWER_EVENT_ATTR(LD_REF_L1, LD_REF_L1); | ||
392 | POWER_EVENT_ATTR(LD_MISS_L1, LD_MISS_L1); | ||
393 | POWER_EVENT_ATTR(BRU_FIN, BRU_FIN) | ||
394 | POWER_EVENT_ATTR(BRU_MPRED, BRU_MPRED); | ||
395 | |||
396 | static struct attribute *power7_events_attr[] = { | ||
397 | GENERIC_EVENT_PTR(CYC), | ||
398 | GENERIC_EVENT_PTR(GCT_NOSLOT_CYC), | ||
399 | GENERIC_EVENT_PTR(CMPLU_STALL), | ||
400 | GENERIC_EVENT_PTR(INST_CMPL), | ||
401 | GENERIC_EVENT_PTR(LD_REF_L1), | ||
402 | GENERIC_EVENT_PTR(LD_MISS_L1), | ||
403 | GENERIC_EVENT_PTR(BRU_FIN), | ||
404 | GENERIC_EVENT_PTR(BRU_MPRED), | ||
405 | |||
406 | POWER_EVENT_PTR(CYC), | ||
407 | POWER_EVENT_PTR(GCT_NOSLOT_CYC), | ||
408 | POWER_EVENT_PTR(CMPLU_STALL), | ||
409 | POWER_EVENT_PTR(INST_CMPL), | ||
410 | POWER_EVENT_PTR(LD_REF_L1), | ||
411 | POWER_EVENT_PTR(LD_MISS_L1), | ||
412 | POWER_EVENT_PTR(BRU_FIN), | ||
413 | POWER_EVENT_PTR(BRU_MPRED), | ||
414 | NULL | ||
415 | }; | ||
416 | |||
417 | |||
418 | static struct attribute_group power7_pmu_events_group = { | ||
419 | .name = "events", | ||
420 | .attrs = power7_events_attr, | ||
421 | }; | ||
422 | |||
423 | static const struct attribute_group *power7_pmu_attr_groups[] = { | ||
424 | &power7_pmu_events_group, | ||
425 | NULL, | ||
426 | }; | ||
427 | |||
365 | static struct power_pmu power7_pmu = { | 428 | static struct power_pmu power7_pmu = { |
366 | .name = "POWER7", | 429 | .name = "POWER7", |
367 | .n_counter = 6, | 430 | .n_counter = 6, |
@@ -373,6 +436,7 @@ static struct power_pmu power7_pmu = { | |||
373 | .get_alternatives = power7_get_alternatives, | 436 | .get_alternatives = power7_get_alternatives, |
374 | .disable_pmc = power7_disable_pmc, | 437 | .disable_pmc = power7_disable_pmc, |
375 | .flags = PPMU_ALT_SIPR, | 438 | .flags = PPMU_ALT_SIPR, |
439 | .attr_groups = power7_pmu_attr_groups, | ||
376 | .n_generic = ARRAY_SIZE(power7_generic_events), | 440 | .n_generic = ARRAY_SIZE(power7_generic_events), |
377 | .generic_events = power7_generic_events, | 441 | .generic_events = power7_generic_events, |
378 | .cache_events = &power7_cache_events, | 442 | .cache_events = &power7_cache_events, |