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-rw-r--r--arch/powerpc/perf/core-book3s.c67
1 files changed, 31 insertions, 36 deletions
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 426180b84978..845c867444e6 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -110,7 +110,7 @@ static inline void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw) {}
110 110
111static bool regs_use_siar(struct pt_regs *regs) 111static bool regs_use_siar(struct pt_regs *regs)
112{ 112{
113 return !!(regs->result & 1); 113 return !!regs->result;
114} 114}
115 115
116/* 116/*
@@ -136,22 +136,30 @@ static inline unsigned long perf_ip_adjust(struct pt_regs *regs)
136 * If we're not doing instruction sampling, give them the SDAR 136 * If we're not doing instruction sampling, give them the SDAR
137 * (sampled data address). If we are doing instruction sampling, then 137 * (sampled data address). If we are doing instruction sampling, then
138 * only give them the SDAR if it corresponds to the instruction 138 * only give them the SDAR if it corresponds to the instruction
139 * pointed to by SIAR; this is indicated by the [POWER6_]MMCRA_SDSYNC or 139 * pointed to by SIAR; this is indicated by the [POWER6_]MMCRA_SDSYNC, the
140 * the [POWER7P_]MMCRA_SDAR_VALID bit in MMCRA. 140 * [POWER7P_]MMCRA_SDAR_VALID bit in MMCRA, or the SDAR_VALID bit in SIER.
141 */ 141 */
142static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp) 142static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp)
143{ 143{
144 unsigned long mmcra = regs->dsisr; 144 unsigned long mmcra = regs->dsisr;
145 unsigned long sdsync; 145 bool sdar_valid;
146 146
147 if (ppmu->flags & PPMU_SIAR_VALID) 147 if (ppmu->flags & PPMU_HAS_SIER)
148 sdsync = POWER7P_MMCRA_SDAR_VALID; 148 sdar_valid = regs->dar & SIER_SDAR_VALID;
149 else if (ppmu->flags & PPMU_ALT_SIPR) 149 else {
150 sdsync = POWER6_MMCRA_SDSYNC; 150 unsigned long sdsync;
151 else 151
152 sdsync = MMCRA_SDSYNC; 152 if (ppmu->flags & PPMU_SIAR_VALID)
153 sdsync = POWER7P_MMCRA_SDAR_VALID;
154 else if (ppmu->flags & PPMU_ALT_SIPR)
155 sdsync = POWER6_MMCRA_SDSYNC;
156 else
157 sdsync = MMCRA_SDSYNC;
158
159 sdar_valid = mmcra & sdsync;
160 }
153 161
154 if (!(mmcra & MMCRA_SAMPLE_ENABLE) || (mmcra & sdsync)) 162 if (!(mmcra & MMCRA_SAMPLE_ENABLE) || sdar_valid)
155 *addrp = mfspr(SPRN_SDAR); 163 *addrp = mfspr(SPRN_SDAR);
156} 164}
157 165
@@ -181,11 +189,6 @@ static bool regs_sipr(struct pt_regs *regs)
181 return !!(regs->dsisr & sipr); 189 return !!(regs->dsisr & sipr);
182} 190}
183 191
184static bool regs_no_sipr(struct pt_regs *regs)
185{
186 return !!(regs->result & 2);
187}
188
189static inline u32 perf_flags_from_msr(struct pt_regs *regs) 192static inline u32 perf_flags_from_msr(struct pt_regs *regs)
190{ 193{
191 if (regs->msr & MSR_PR) 194 if (regs->msr & MSR_PR)
@@ -208,7 +211,7 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs)
208 * SIAR which should give slightly more reliable 211 * SIAR which should give slightly more reliable
209 * results 212 * results
210 */ 213 */
211 if (regs_no_sipr(regs)) { 214 if (ppmu->flags & PPMU_NO_SIPR) {
212 unsigned long siar = mfspr(SPRN_SIAR); 215 unsigned long siar = mfspr(SPRN_SIAR);
213 if (siar >= PAGE_OFFSET) 216 if (siar >= PAGE_OFFSET)
214 return PERF_RECORD_MISC_KERNEL; 217 return PERF_RECORD_MISC_KERNEL;
@@ -239,22 +242,9 @@ static inline void perf_read_regs(struct pt_regs *regs)
239 int use_siar; 242 int use_siar;
240 243
241 regs->dsisr = mmcra; 244 regs->dsisr = mmcra;
242 regs->result = 0;
243
244 if (ppmu->flags & PPMU_NO_SIPR)
245 regs->result |= 2;
246
247 /*
248 * On power8 if we're in random sampling mode, the SIER is updated.
249 * If we're in continuous sampling mode, we don't have SIPR.
250 */
251 if (ppmu->flags & PPMU_HAS_SIER) {
252 if (marked)
253 regs->dar = mfspr(SPRN_SIER);
254 else
255 regs->result |= 2;
256 }
257 245
246 if (ppmu->flags & PPMU_HAS_SIER)
247 regs->dar = mfspr(SPRN_SIER);
258 248
259 /* 249 /*
260 * If this isn't a PMU exception (eg a software event) the SIAR is 250 * If this isn't a PMU exception (eg a software event) the SIAR is
@@ -279,12 +269,12 @@ static inline void perf_read_regs(struct pt_regs *regs)
279 use_siar = 1; 269 use_siar = 1;
280 else if ((ppmu->flags & PPMU_NO_CONT_SAMPLING)) 270 else if ((ppmu->flags & PPMU_NO_CONT_SAMPLING))
281 use_siar = 0; 271 use_siar = 0;
282 else if (!regs_no_sipr(regs) && regs_sipr(regs)) 272 else if (!(ppmu->flags & PPMU_NO_SIPR) && regs_sipr(regs))
283 use_siar = 0; 273 use_siar = 0;
284 else 274 else
285 use_siar = 1; 275 use_siar = 1;
286 276
287 regs->result |= use_siar; 277 regs->result = use_siar;
288} 278}
289 279
290/* 280/*
@@ -308,8 +298,13 @@ static inline int siar_valid(struct pt_regs *regs)
308 unsigned long mmcra = regs->dsisr; 298 unsigned long mmcra = regs->dsisr;
309 int marked = mmcra & MMCRA_SAMPLE_ENABLE; 299 int marked = mmcra & MMCRA_SAMPLE_ENABLE;
310 300
311 if ((ppmu->flags & PPMU_SIAR_VALID) && marked) 301 if (marked) {
312 return mmcra & POWER7P_MMCRA_SIAR_VALID; 302 if (ppmu->flags & PPMU_HAS_SIER)
303 return regs->dar & SIER_SIAR_VALID;
304
305 if (ppmu->flags & PPMU_SIAR_VALID)
306 return mmcra & POWER7P_MMCRA_SIAR_VALID;
307 }
313 308
314 return 1; 309 return 1;
315} 310}