1 files changed, 10 insertions, 6 deletions

diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c
index 2b2f35f6985e..1ec06576f619 100644
--- a/arch/powerpc/mm/tlb_hash64.c
+++ b/arch/powerpc/mm/tlb_hash64.c
@@ -53,11 +53,6 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
 
         i = batch->index;
 
-        /* We mask the address for the base page size. Huge pages will
-         * have applied their own masking already
-         */
-        addr &= PAGE_MASK;
-
         /* Get page size (maybe move back to caller).
          *
          * NOTE: when using special 64K mappings in 4K environment like
@@ -68,12 +63,21 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
         if (huge) {
 #ifdef CONFIG_HUGETLB_PAGE
                 psize = get_slice_psize(mm, addr);
+                /* Mask the address for the correct page size */
+                addr &= ~((1UL << mmu_psize_defs[psize].shift) - 1);
 #else
                 BUG();
                 psize = pte_pagesize_index(mm, addr, pte); /* shutup gcc */
 #endif
-        } else
+        } else {
                 psize = pte_pagesize_index(mm, addr, pte);
+                /* Mask the address for the standard page size.  If we
+                 * have a 64k page kernel, but the hardware does not
+                 * support 64k pages, this might be different from the
+                 * hardware page size encoded in the slice table. */
+                addr &= PAGE_MASK;
+        }
+
 
         /* Build full vaddr */
         if (!is_kernel_addr(addr)) {